Film forming apparatus

Abstract

This film forming apparatus includes: a vacuum chamber capable of evacuating the inside thereof; a substrate support portion provided in the vacuum chamber and supporting a substrate; a target support portion provided in the vacuum chamber and supporting a target material disposed facing the substrate; a sputtering power supply including a high frequency power supply for generating an AC wave; and a control portion for controlling the sputtering power supply. The control portion controls the high frequency power supply so that a first period in which negative voltage is supplied to the target support portion and a second period in which positive voltage is supplied to the target support portion are alternately repeated, and an integral value of an absolute value of positive voltage in the second period is smaller than an integral value of negative voltage in the first period.

Description

Film forming equipment

[0001] An embodiment of the present invention relates to a film formation apparatus for forming a nitride semiconductor film.

[0002] Generally, gallium nitride films are formed on sapphire substrates using metal organic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE) at high temperatures of 800° C. to 1000° C. Meanwhile, a method for forming gallium nitride films by sputtering has been developed, which allows film formation at relatively low temperatures (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2020-164927

[0004] In recent years, the Sustainable Development Goals (SDGs) have been promoted. Sputtering, which can form films at low temperatures, can reduce the energy required for film formation, making it an attractive film formation method for achieving the SDGs. However, to date, gallium nitride films produced by sputtering have not been of sufficient quality.

[0005] In view of the above problems, one object of one embodiment of the present invention is to provide a film deposition apparatus capable of depositing a high-quality nitride semiconductor film.

[0006] A film formation apparatus according to one embodiment of the present invention includes a vacuum chamber capable of evacuating the interior thereof, a substrate support section provided within the vacuum chamber and supporting a substrate, a target support section provided within the vacuum chamber and supporting a target material positioned opposite the substrate, a sputtering power supply including a high-frequency power supply that generates an AC wave, and a control section that controls the sputtering power supply, wherein the control section controls the high-frequency power supply so that a first period in which a negative voltage is supplied to the target support section and a second period in which a positive voltage is supplied to the target support section are alternately repeated, and the integral value of the absolute value of the positive voltage during the second period is smaller than the integral value of the negative voltage during the first period.

[0007] A film formation apparatus according to one embodiment of the present invention includes: a vacuum chamber capable of evacuating the interior; a substrate support portion provided within the vacuum chamber and supporting a substrate; a target support portion provided within the vacuum chamber and supporting a target material disposed opposite the substrate; a sputtering power supply including a first pulsed power supply that generates a negative pulsed voltage and a second pulsed power supply that generates a positive pulsed voltage; and a control portion that controls the sputtering power supply, wherein the control portion controls the first pulsed power supply and the second pulsed power supply so that a first period during which the negative pulsed voltage is supplied to the target support portion and a second period during which a positive pulsed voltage is supplied to the target support portion are repeated, and the amplitude of the positive pulsed voltage is smaller than the amplitude of the negative pulsed voltage.

[0008] a target support section provided in the vacuum chamber and supporting a target material disposed opposite the substrate; a sputtering power supply including a first pulsed power supply that generates a first negative pulsed voltage, a second pulsed power supply that generates a first positive pulsed voltage, and a third pulsed power supply that generates a second negative pulsed voltage; and a control section that controls the sputtering power supplies, wherein the control section controls the first pulsed power supply and the second pulsed power supply so that a first period during which the first negative pulsed voltage is supplied to the substrate support section and a second period during which the first positive pulsed voltage is supplied to the substrate support section are repeated, and controls the third pulsed power supply so that a second negative pulsed voltage is supplied to the target support section during a third period, the third period being shorter than the first period and the second period.

[0009] FIG. 1 is a schematic diagram showing the configuration of a film formation apparatus according to one embodiment of the present invention. FIG. 2 is a schematic diagram showing the configuration of a film formation apparatus according to one embodiment of the present invention. FIG. 3 is a block diagram explaining control of a sputtering power supply by a control unit in a film formation apparatus according to one embodiment of the present invention. FIG. 4 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to one embodiment of the present invention. FIG. 5 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to one embodiment of the present invention. FIG. 6 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to one embodiment of the present invention. FIG. 7 is a block diagram explaining control of a sputtering power supply by a control unit in a film formation apparatus according to one embodiment of the present invention. FIG. 8 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to one embodiment of the present invention. FIG. 9 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to one embodiment of the present invention. FIG. 10 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to one embodiment of the present invention. FIG. 1 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to an embodiment of the present invention; FIG. 2 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to an embodiment of the present invention; FIG. 3 is a timing chart showing a voltage supplied to a cathode electrode in a film formation apparatus according to an embodiment of the present invention; FIG. 4 is a block diagram illustrating control of a sputtering power supply unit by a control unit in a film formation apparatus according to an embodiment of the present invention; FIG. 5 is a timing chart showing voltages supplied to a cathode electrode and an anode electrode in a film formation apparatus according to an embodiment of the present invention; and FIG. 6 is a block diagram illustrating control of a sputtering power supply unit by a control unit in a film formation apparatus according to an embodiment of the present invention.FIG. 1 is a timing chart showing voltages supplied to a cathode electrode and an anode electrode in a film formation apparatus according to an embodiment of the present invention. FIG. 2 is a timing chart explaining a method for forming a nitride semiconductor film according to an embodiment of the present invention. FIG. 3 is a timing chart explaining a method for forming a nitride semiconductor film according to an embodiment of the present invention. FIG. 4 is a schematic diagram showing the configuration of a light-emitting element according to an embodiment of the present invention. FIG. 5 is a flowchart showing a method for fabricating a light-emitting element according to an embodiment of the present invention. FIG. 6 is a schematic diagram showing the configuration of a semiconductor element according to an embodiment of the present invention. FIG. 7 is a flowchart showing a method for fabricating a semiconductor element according to an embodiment of the present invention.

[0010] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that each embodiment is merely an example, and any embodiment that a person skilled in the art could easily come up with by making appropriate modifications while maintaining the gist of the invention is naturally included in the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment. However, the illustrated shapes are merely examples and do not limit the interpretation of the present invention.

[0011] In this specification, unless otherwise specified, expressions such as "α includes A, B, or C," "α includes any of A, B, and C," and "α includes one selected from the group consisting of A, B, and C" do not exclude cases where α includes multiple combinations of A to C. Furthermore, these expressions do not exclude cases where α includes other components.

[0012] In this specification, for the sake of convenience, the terms "above" or "upper" or "below" or "belower" are used. In principle, the substrate on which the structure is formed is used as the reference, and the direction from the substrate toward the structure is referred to as "above." Conversely, the direction from the structure toward the substrate is referred to as "below." Therefore, in the expression "structure on a substrate," the surface of the structure facing the substrate is the lower surface of the structure, and the surface opposite to that is the upper surface of the structure. Furthermore, the expression "structure on a substrate" merely describes the vertical relationship between the substrate and the structure, and other components may be disposed between the substrate and the structure. Furthermore, the terms "above" or "upper" or "below" or "belower" refer to the stacking order in a structure in which multiple layers are stacked, and do not necessarily have to be in an overlapping positional relationship in a planar view.

[0013] In this specification, the letters "first," "second," or "third" attached to each component are convenient labels used to distinguish each component, and have no other meaning unless otherwise specified.

[0014] In this specification and drawings, the same reference numeral is used to collectively represent multiple identical or similar components, and when these multiple components are to be distinguished from one another, they may be accompanied by lowercase or uppercase letters. Furthermore, when multiple parts of a single component are to be distinguished from one another, a hyphen and a natural number may be used.

[0015] As used herein, the term "nitride semiconductor" refers to a compound containing one or more Group 13 elements and nitrogen and having semiconductor properties. Examples of nitride semiconductors include gallium nitride (GaN), indium nitride (InN), indium gallium nitride (InGaN), and aluminum gallium nitride (AlGaN).

[0016] In this specification, cations and anions may be referred to as positive ions and negative ions, respectively.

[0017] The following embodiments can be combined with each other unless a technical contradiction occurs.

[0018] First Embodiment A film forming apparatus 10 according to one embodiment of the present invention will be described with reference to FIGS.

[0019] 1. Configuration of Film Forming Apparatus 10 FIG. 1 is a schematic diagram showing the configuration of a film forming apparatus 10 according to one embodiment of the present invention.

[0020] As shown in FIG. 1, the film forming apparatus 10 includes a vacuum chamber 100, a substrate support unit 110, a heating unit 120, a target support unit 140, a pump 150, a sputtering power supply unit 160, a sputtering gas supply unit 170, and a control unit 180.

[0021] The substrate support 110 and the target support 140 are installed in the vacuum chamber 100. The substrate support 110 is installed in the lower part of the vacuum chamber 100, and the target support 140 is installed in the upper part of the vacuum chamber 100. Note that the positions of the substrate support 110 and the target support 140 may be reversed. That is, the substrate support 110 may be installed in the upper part of the vacuum chamber 100, and the target support 140 may be installed in the upper part of the vacuum chamber 100.

[0022] The film formation apparatus 10 is a so-called sputtering apparatus. In the film formation apparatus 10, the substrate support 110 and the target support 140 may function as an anode electrode and a cathode electrode, respectively. For example, when a voltage is applied to the substrate support 110, the substrate support 110 can function as an anode electrode. However, the configuration of the substrate support 110 is not limited to this. The substrate support 110 may be grounded, in which case the entire film formation apparatus 10 can function as an anode electrode.

[0023] The substrate support 110 can support the substrate 500. In other words, the substrate 500 is placed on the substrate support 110. The substrate support 110 includes a heating unit 120 therein. The heating unit 120 can heat the substrate 500 placed on the substrate support 110 to a predetermined temperature. The predetermined temperature is, for example, 400° C. or higher and 650° C. or lower.

[0024] The substrate 500 can be, for example, a sapphire substrate, a glass substrate, a quartz substrate, a nitride semiconductor substrate, or a silicon substrate. By using the film formation apparatus 10, a nitride semiconductor film can be formed directly on the substrate 500, even at low temperatures. When the substrate 500 is a glass substrate, a large-area glass substrate known as mother glass can be used to form the nitride semiconductor film at low temperatures. Glass substrates are inexpensive, which can reduce manufacturing costs. A substrate having a buffer layer formed on the substrate 500 can also be used. For example, when forming a nitride semiconductor film on a glass substrate, it is preferable to use a substrate 500 having a buffer layer formed on the glass substrate. For example, an aluminum nitride film or the like can be used as the buffer layer.

[0025] The target support 140 can support the target material 600. For example, the target support 140 is a backing plate, but is not limited to this. Although not shown, a flow path through which cooling water flows may be provided within the target support 140. Since the temperature of the target material 600 rises during sputtering, the target material 600 can be cooled using cooling water.

[0026] The target material 600 can be a nitride semiconductor such as gallium nitride (GaN), indium nitride (InN), indium gallium nitride (InGaN), or aluminum gallium nitride (AlGaN). The composition of the nitride semiconductor in the target material 600 preferably has a ratio of Group 13 elements to nitrogen of 0.5 or more and 2 or less. Nitrogen for the nitride semiconductor film formed on the substrate 500 is supplied from the target material 600 and the sputtering gas supply unit 170, while the Group 13 elements for the nitride semiconductor film are supplied only from the target material 600. Therefore, the composition of the nitride semiconductor in the target material 600 may contain more Group 13 elements than nitrogen. Alternatively, the target material 600 can be a nitride semiconductor doped with an impurity element such as silicon (Si) or magnesium (Mg). Sputtering using the target material 600 doped with an impurity element can form an n-type nitride semiconductor film and a p-type nitride semiconductor film.

[0027] Outside the vacuum chamber 100, a pump 150, a sputtering power supply unit 160, a sputtering gas supply unit 170, and a control unit 180 are installed.

[0028] The pump 150 is connected to the vacuum chamber 100 through a pipe 151. The pump 150 can exhaust gas from the vacuum chamber 100 through the pipe 151. That is, the pump 150 connected to the vacuum chamber 100 can exhaust gas from the vacuum chamber 100 to a predetermined vacuum level or less. The predetermined vacuum level is, for example, 10 －６ The pressure in the vacuum chamber 100 can be maintained constant by opening and closing a valve 152 connected to the pipe 151. The pump 150 can be, for example, a turbomolecular pump or a cryopump.

[0029] The sputtering power supply unit 160 is electrically connected to the target support unit 140 via wiring 161. A predetermined voltage is generated in the sputtering power supply unit 160, and the generated predetermined voltage is supplied to the target support unit 140. The detailed configuration of the sputtering power supply unit 160 will be described later.

[0030] The sputtering gas supply unit 170 is connected to the vacuum chamber 100 through a pipe 171. The sputtering gas supply unit 170 can supply a sputtering gas into the vacuum chamber 100 through the pipe 171. The flow rate of the sputtering gas can be adjusted by a mass flow controller 172 connected to the pipe 171. The sputtering gas supplied from the sputtering gas supply unit 170 can be argon (Ar) gas, nitrogen (N ２ ) gas, or a mixture of these gases can be used.

[0031] In the film formation apparatus 10, when a predetermined voltage is supplied to the target support 140, the sputtering gas is ionized into cations and electrons, generating plasma. In forming a nitride semiconductor film, it is preferable that the sputtering gas contains nitrogen gas. As will be described in detail later, if the sputtering gas contains nitrogen gas, nitrogen cations are generated, and the nitride semiconductor film formed on the substrate 500 can be nitrided.

[0032] The control unit 180 controls the sputtering power supply unit 160 so that a predetermined voltage is supplied to the target support unit 140. The control unit 180 is a computer capable of performing arithmetic processing using data or information, and includes, for example, a central processing unit (CPU), a microprocessor (MPU), or a random access memory (RAM). Specifically, the control unit 180 can execute a predetermined program to perform various controls. The control of the sputtering power supply unit 160 by the control unit 180 will be described later.

[0033] The control unit 180 may also control the operation of components other than the sputtering power supply unit 160. For example, the control unit 180 may control the pump 150 or the mass flow controller 172 so that the inside of the vacuum chamber 100 is maintained at a predetermined pressure. The control unit 180 may also control the heating unit 120 so that the substrate 500 placed on the substrate support unit 110 is heated to a predetermined temperature.

[0034] The configuration of the film formation apparatus 10 is not limited to the configuration shown in Fig. 1. Here, a film formation apparatus 10A, which is a modified example of the film formation apparatus 10, will be described with reference to Fig. 2. In the following, when the film formation apparatus 10A includes the same components as the film formation apparatus 10, the description of those components may be omitted.

[0035] FIG. 2 is a schematic diagram showing the configuration of a film forming apparatus 10A according to one embodiment of the present invention.

[0036] As shown in FIG. 2 , the film formation apparatus 10A includes a rotational driver 130 connected to the substrate support 110. The rotational driver 130 can rotate the substrate support 110. The target support 140 is disposed so that the target material 600 supported by the target support 140 faces the substrate 500 on the substrate support 110, but the central axis of the target support 140 does not coincide with the central axis (i.e., the rotation axis) of the substrate support 110. Furthermore, in the film formation apparatus 10A, the substrate 500 is placed at a position offset from the central axis of the substrate support 110. Therefore, as the substrate support 110 rotates, the substrate 500 periodically passes through an area overlapping the target material 600, during which a nitride semiconductor is deposited on the substrate 500. In other words, the film formation apparatus 10A can perform intermittent sputtering film formation, in which periods during which a nitride semiconductor is deposited and periods during which it is not deposited are alternated.

[0037] 2. Control of the Sputtering Power Supply Unit 160 by the Control Unit 180 The control of the sputtering power supply unit 160 by the control unit 180 in the film forming apparatus 10 will be described with reference to FIGS.

[0038] FIG. 3 is a block diagram illustrating the control of the sputtering power supply unit 160 by the control unit 180 in the film forming apparatus 10 according to one embodiment of the present invention.

[0039] As shown in FIG. 3 , the sputtering power supply unit 160 includes a high-frequency power supply 162 and a pulse power supply 163. The high-frequency power supply 162 generates an AC voltage. The generated AC voltage is supplied to the cathode electrode CA (i.e., the target support unit 140) via wiring 161. The high-frequency power supply 162 includes a matching box, which adjusts the input / output impedance of the AC voltage. The frequency of the AC voltage is, for example, 13.56 MHz. The pulse power supply 163 generates a positive or negative pulse voltage. The generated pulse voltage is supplied to the cathode electrode CA via wiring 161.

[0040] The control unit 180 controls the high frequency power supply 162 and the pulse power supply 163, and can adjust the timing at which the AC voltage generated by the high frequency power supply 162 and the pulse voltage generated by the pulse power supply 163 are supplied to the cathode electrode CA. In other words, the control unit 180 can control the voltage supplied to the cathode electrode CA. Here, with reference to FIG. 4 , the voltage supplied to the cathode electrode CA under the control of the control unit 180 will be described.

[0041] 4 is a timing chart showing the voltage supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention. The AC voltage generated by the high-frequency power supply 162 and the pulse voltage generated by the pulse power supply 163 are also shown in FIG.

[0042] The high-frequency power supply 162 generates an AC voltage in which positive and negative voltages alternate repeatedly. The waveform of the AC voltage may be a sine wave or a rectangular wave. The AC voltage includes a period in which a negative voltage is supplied to the cathode electrode CA and a period in which a positive voltage is supplied to the cathode electrode CA. However, when the AC voltage generated by the high-frequency power supply 162 is supplied to the cathode electrode CA, the AC voltage is negatively biased due to the self-bias effect. Therefore, as shown in FIG. 4 , the integral of the absolute value of the positive voltage during the period in which a positive voltage is supplied to the cathode electrode CA is smaller than the integral of the absolute value of the negative voltage during the period in which a negative voltage is supplied to the cathode electrode CA. On the other hand, the pulse power supply 163 generates a positive pulse voltage to be supplied to the cathode electrode CA.

[0043] The control unit 180 controls the high-frequency power supply 162 and the pulse power supply 163 so that a voltage obtained by superimposing a positive pulse voltage generated by the pulse power supply 163 on the AC voltage generated by the high-frequency power supply 162 is supplied to the cathode electrode CA. More specifically, the control unit 180 controls the output timing of the high-frequency power supply 162 and the pulse power supply 163 so that the period in which a positive AC voltage is supplied to the cathode electrode CA overlaps with the period in which a positive pulse voltage is supplied to the cathode electrode CA. As a result, a negative voltage is supplied to the cathode electrode CA during a first period τ1, and a positive voltage is supplied during a second period τ2 following the first period τ1. The control unit 180 also controls the high-frequency power supply 162 and the pulse power supply 163 so that the first period τ1 in which a negative voltage is supplied and the second period τ2 in which a positive voltage is supplied are alternately repeated. Here, the control unit 180 controls the high-frequency power supply 162 and the pulse power supply 163 so that the integral of the absolute value of the positive voltage during the second period τ2 is smaller than the integral of the absolute value of the negative voltage during the first period τ1. The control unit 180 may also control the high-frequency power supply 162 and the pulse power supply 163 so that the maximum amplitude A2 of the positive voltage during the second period τ2 is smaller than the maximum amplitude A1 of the negative voltage during the first period τ1.

[0044] When a voltage is supplied to the cathode electrode CA, the sputtering gas is ionized into positive ions and electrons to generate plasma between the substrate 500 and the target material 600. For example, when the sputtering gas is nitrogen gas, it is ionized into nitrogen positive ions and electrons.

[0045] During a first period τ1 in which a negative voltage is supplied to the cathode electrode CA, nitrogen cations are attracted to the target support 140, which is the cathode electrode CA, and collide with the target material 600. This collision causes particles containing nitride semiconductors (hereinafter referred to as "sputtering particles") to be emitted from the target material 600. When the sputtering particles reach the substrate 500, they are deposited on the substrate 500, resulting in the formation of a nitride semiconductor film on the substrate 500.

[0046] On the other hand, during the second period τ2 in which a positive voltage is supplied to the cathode electrode CA, the substrate 500 functions as the cathode electrode. In this case, nitrogen cations are attracted to the substrate 500 and react with the nitride semiconductor film on the substrate 500. That is, the nitride semiconductor film formed on the substrate 500 is nitrided by the nitrogen cations.

[0047] As described above, in the film forming apparatus 10, the control unit 180 adjusts the first period τ1 of the negative voltage and the second period τ2 of the positive voltage supplied to the cathode electrode CA. A nitride semiconductor film is formed on the substrate 500 during the first period τ1, while the nitride semiconductor film is nitrided during the second period τ2. This allows a high-quality nitride semiconductor film to be formed on the substrate 500. During the second period τ2, nitrogen cations may collide with the nitride semiconductor film formed on the substrate 500, resulting in the generation of defects in the nitride semiconductor film. To prevent the generation of defects in the nitride semiconductor film due to the collision of nitrogen cations, it is necessary to reduce the collision energy of the nitrogen cations. Therefore, as described above, the control unit 180 controls the high-frequency power supply 162 and the pulse power supply 163 so that the integral of the absolute value of the positive voltage during the second period τ2 is smaller than the integral of the absolute value of the negative voltage during the first period τ1. Alternatively, the control unit 180 controls the high frequency power supply 162 and the pulse power supply 163 so that the maximum amplitude A2 of the positive voltage in the second period τ2 is smaller than the maximum amplitude A1 of the negative voltage in the first period τ1.

[0048] Although the configuration using the pulsed power supply 163 has been described above, a configuration without using the pulsed power supply 163 is also possible in this embodiment. However, when adjusting the waveform of the positive voltage in the second period τ2, it is preferable to use the pulsed power supply 163. By using the pulsed power supply 163, the voltage supplied to the cathode electrode CA can be varied in various ways. Below, modifications of the voltage supplied to the cathode electrode CA in this embodiment will be described. Note that, below, descriptions of configurations similar to those described above may be omitted.

[0049] <Modification 1> FIG. 5 is a timing chart showing the voltage supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention.

[0050] In the control shown in Fig. 5, the control unit 180 controls the output timing of the high-frequency power supply 162 and the pulse power supply 163 so that a positive pulse voltage is supplied to the cathode electrode CA during at least one period during which a positive AC voltage is supplied. As a result, different positive voltages are supplied to the cathode electrode CA during multiple different periods. For example, as shown in Fig. 5, a positive voltage having a maximum amplitude A2-1 (positive AC voltage) is supplied to the cathode electrode CA during a 2-1 period τ2-1, and a positive voltage having a maximum amplitude A2-2 (a voltage in which a positive pulse voltage is superimposed on the positive AC voltage) is supplied to the cathode electrode CA during a 2-2 period τ2-2.

[0051] 5 , the control unit 180 also controls the high-frequency power supply 162 and the pulse power supply 163 so that the integral of the absolute value of the positive voltage in each of the 2-1st period τ2-1 and the 2-2nd period τ2-2 is smaller than the integral of the absolute value of the negative voltage in the first period τ1. Alternatively, the control unit 180 controls the high-frequency power supply 162 and the pulse power supply 163 so that the maximum amplitude A2-1 of the positive voltage in the 2-1st period τ2-1 and the maximum amplitude A2-2 of the 2-2nd period τ2-2 is smaller than the maximum amplitude A1 of the negative voltage in the first period τ1. This allows the nitride thin film to be nitrided in the 2-1st period τ2-1 and the 2-2nd period τ2-2, and a high-quality nitride semiconductor film to be formed on the substrate 500.

[0052] <Modification 2> FIG. 6 is a timing chart showing the voltage supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention.

[0053] In the control shown in FIG. 6 , the control unit 180 controls the high-frequency power supply 162 and the pulse power supply 163 so that a positive pulse voltage is supplied to the cathode electrode CA during at least one period in which a negative voltage of the AC voltage is supplied. Here, the amplitude of the positive pulse voltage is greater than the amplitude of the negative voltage of the AC voltage. Therefore, the second period τ2 includes a period in which two or more adjacent positive voltages of the AC voltage are supplied. As a result, the second period τ2 is longer than the first period τ1.

[0054] 6 , the control unit 180 also controls the high-frequency power supply 162 and the pulse power supply 163 so that the integral of the absolute value of the positive voltage during the second period τ2 is smaller than the integral of the absolute value of the negative voltage during the first period τ1. Alternatively, the control unit 180 controls the high-frequency power supply 162 and the pulse power supply 163 so that the maximum amplitude A2 of the positive voltage during the second period τ2 is smaller than the maximum amplitude A1 of the negative voltage during the first period τ1. This makes it possible to nitride the nitride semiconductor film during the second period τ2 and form a high-quality nitride semiconductor film on the substrate 500.

[0055] <Modification 3> FIG. 7 is a timing chart showing the voltage supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention.

[0056] In the control shown in FIG. 7 , the pulsed power supply 163 generates a negative pulsed voltage to be supplied to the cathode electrode CA. The control unit 180 controls the high-frequency power supply 162 and the pulsed power supply 163 so that a voltage obtained by superimposing the negative pulsed voltage generated by the pulsed power supply 163 on the AC voltage generated by the high-frequency power supply 162 is supplied to the cathode electrode CA. More specifically, the control unit 180 controls the output timing of the high-frequency power supply 162 and the pulsed power supply 163 so that a negative pulsed voltage is supplied to the cathode electrode CA during at least one period during which a positive voltage of the AC voltage is supplied. Here, the amplitude of the negative pulsed voltage is approximately the same as the amplitude of the positive voltage of the AC voltage. In other words, the waveform of the negative pulsed voltage is substantially the same as the waveform of the positive voltage of the AC voltage. As a result, the number of second periods τ2 is smaller than the number of first periods τ1.

[0057] 7 , the control unit 180 also controls the high-frequency power supply 162 and the pulse power supply 163 so that the integral of the absolute value of the positive voltage during the second period τ2 is smaller than the integral of the absolute value of the negative voltage during the first period τ1. Alternatively, the control unit 180 controls the high-frequency power supply 162 and the pulse power supply 163 so that the maximum amplitude A2 of the positive voltage during the second period τ2 is smaller than the maximum amplitude A1 of the negative voltage during the first period τ1. This allows the nitride semiconductor to be nitrided during the second period τ2, forming a high-quality nitride semiconductor film on the substrate 500. Furthermore, in the control shown in FIG. 7 , the number of second periods τ2 is smaller than the number of first periods τ1, thereby reducing the frequency of nitrogen cations colliding with the nitride semiconductor film on the substrate 500 and suppressing the generation of defects in the nitride semiconductor film.

[0058] As described above, according to the film formation apparatus 10 of this embodiment, including the modified examples, a nitride semiconductor film can be formed on the substrate 500 during the first period τ1 in which a negative voltage is supplied to the cathode electrode CA, and the nitride semiconductor film on the substrate 500 can be nitrided during the second period τ2 in which a positive voltage is supplied to the cathode electrode CA. This makes it possible to suppress crystal defects in the nitride semiconductor film and form a high-quality nitride semiconductor film even when the film is formed at a low temperature (for example, 650° C. or lower).

[0059] 8 to 11, a film formation apparatus 10 according to an embodiment of the present invention, which is different from the film formation apparatus 10 of the first embodiment, will be described. Note that, in the following, description of the same configuration as the film formation apparatus 10 of the first embodiment may be omitted.

[0060] FIG. 8 is a block diagram illustrating the control of the sputtering power supply unit 160 by the control unit 180 in the film forming apparatus 10 according to one embodiment of the present invention.

[0061] 8 , the sputtering power supply unit 160 includes a first pulsed power supply 164 and a second pulsed power supply 165. The first pulsed power supply 164 generates a negative pulsed voltage, and the second pulsed power supply 165 generates a positive pulsed voltage. The generated positive pulsed voltage and negative pulsed voltage are supplied to the cathode electrode CA via a wiring 161.

[0062] 9 to 11 are timing charts showing voltages supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention.

[0063] As shown in FIGS. 9 to 11 , the negative pulse voltage generated by the first pulse power supply 164 has an amplitude A1 and a first period τ1 (sometimes referred to as the first pulse width τ1). The positive pulse voltage generated by the second pulse power supply 165 has an amplitude A2 and a second period τ2 (sometimes referred to as the second pulse width τ2). The amplitude A2 of the positive pulse voltage is smaller than the amplitude A1 of the negative pulse voltage. The control unit 180 controls the output timing of the first pulse power supply 164 and the second pulse power supply 165 so that a positive pulse voltage is supplied to the cathode electrode CA between two adjacent first periods τ1. As a result, a negative pulse voltage is supplied to the cathode electrode CA during the first period τ1, and a positive pulse voltage is supplied during the second period τ2. In addition, the control unit 180 controls the first pulse power supply 164 and the second pulse power supply 165 so that a first period τ1 in which a negative pulse voltage is supplied and a second period τ2 in which a positive pulse voltage is supplied are repeated.

[0064] The timing at which the positive pulse voltage is supplied to the cathode electrode CA is not particularly limited. For example, the positive pulse voltage may be supplied to the cathode electrode CA immediately after the negative pulse voltage is supplied (see FIG. 9 ). In other words, the second period τ2 may be provided immediately after the first period τ1. The positive pulse voltage may also be supplied to the cathode electrode CA a predetermined time after the negative pulse voltage is supplied (see FIG. 10 ). In other words, the second period τ2 may be provided a predetermined time after the first period τ1. The positive pulse voltage may also be supplied to the cathode electrode CA immediately before the negative pulse voltage is supplied (see FIG. 11 ). In other words, the second period τ2 may be provided immediately before the first period τ1.

[0065] The control unit 180 controls the first pulse power supply 164 and the second pulse power supply 165 so that the integral of the absolute value of the positive pulse voltage during the second period τ2 is smaller than the integral of the absolute value of the negative pulse voltage during the first period τ1. Alternatively, the control unit 180 may control the first pulse power supply 164 and the second pulse power supply 165 so that the maximum amplitude A2 of the positive pulse voltage during the second period τ2 is smaller than the maximum amplitude A1 of the negative pulse voltage during the first period τ1. This makes it possible to nitride the nitride semiconductor film on the substrate 500 during the second period τ2 and form a high-quality nitride semiconductor film.

[0066] In the following, a modified example of the voltage supplied to the cathode electrode CA in this embodiment will be described. Note that in the following, description of the same configuration as that described above may be omitted.

[0067] <Modification 1> FIG. 12 is a timing chart showing the voltage supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention.

[0068] In the control shown in FIG. 12 , the control unit 180 controls the first pulse power supply 164 and the second pulse power supply 165 so that a plurality of second periods τ2 are provided between two adjacent first periods τ1. That is, the control unit 180 controls the output timing of the first pulse power supply 164 and the second pulse power supply 165 so that a plurality of positive pulse voltages are supplied to the cathode electrode CA during a period in which a negative pulse voltage is not supplied to the cathode electrode CA. For example, as shown in FIG. 12 , a first positive pulse voltage having a maximum amplitude A2-1 is supplied to the cathode electrode CA during a 2-1 period τ2-1, and a second positive pulse voltage having a maximum amplitude A2-2 is supplied to the cathode electrode CA during a 2-2 period τ2-2. The maximum amplitudes of the plurality of positive pulse voltages may be the same or different.

[0069] 12 , the control unit 180 also controls the first pulsed power supply 164 and the second pulsed power supply 165 so that the integral of the absolute value of the positive pulsed voltage in each of the 2-1 period τ2-1 and the 2-2 period τ2-2 is smaller than the integral of the absolute value of the negative pulsed voltage in the first period τ1. Alternatively, the control unit 180 may control the first pulsed power supply 164 and the second pulsed power supply 165 so that the maximum amplitude A2-1 of the positive pulsed voltage in the 2-1 period τ2-1 and the maximum amplitude A2-2 of the positive pulsed voltage in the 2-2 period τ2-2 are smaller than the maximum amplitude A1 of the negative pulsed voltage in the first period τ1. This allows the nitride thin film to be nitrided in the 2-1 period τ2-1 and the 2-2 period τ2-2, and a high-quality nitride semiconductor film to be formed on the substrate 500.

[0070] <Modification 2> FIG. 13 is a timing chart showing the voltage supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention.

[0071] 13 , the control unit 180 controls the first pulsed power supply 164 and the second pulsed power supply 165 so that a second period τ2 is provided connecting two adjacent first periods τ1. That is, the control unit 180 controls the output timing of the first pulsed power supply 164 and the second pulsed power supply 165 so that a positive pulsed voltage is supplied to the cathode electrode CA over a period in which a negative pulsed voltage is not supplied to the cathode electrode CA. As a result, the second period τ2 is longer than the first period τ1.

[0072] 13 , the control unit 180 also controls the first pulsed power supply 164 and the second pulsed power supply 165 so that the integral of the absolute value of the positive pulsed voltage during the second period τ2 is smaller than the integral of the absolute value of the negative pulsed voltage during the first period τ1. Alternatively, the control unit 180 may control the first pulsed power supply 164 and the second pulsed power supply 165 so that the maximum amplitude A2 of the positive pulsed voltage during the second period τ2 is smaller than the maximum amplitude A1 of the negative pulsed voltage during the first period τ1. This makes it possible to nitride the nitride thin film during the second period τ2 and form a high-quality nitride semiconductor film on the substrate 500.

[0073] <Modification 3> FIGS. 14 to 16 are timing charts showing voltages supplied to the cathode electrode CA in the film forming apparatus 10 according to one embodiment of the present invention.

[0074] 14 to 16, the positive pulse voltage generated by the second pulse power supply 165 can have various waveforms. For example, the waveform of the positive pulse voltage may be triangular (see FIG. 14), trapezoidal (see FIG. 15), or stepped (see FIG. 16) including a 2-1 amplitude A2-1 and a 2-2 amplitude A2-2.

[0075] 14 to 16 , the control unit 180 also controls the first pulsed power supply 164 and the second pulsed power supply 165 so that the integral of the absolute value of the positive pulsed voltage during the second period τ2 is smaller than the integral of the absolute value of the negative pulsed voltage during the first period τ1. Alternatively, the control unit 180 may control the first pulsed power supply 164 and the second pulsed power supply 165 so that the maximum amplitude A2 (amplitude A2-2 in FIG. 16 ) of the positive pulsed voltage during the second period τ2 is smaller than the maximum amplitude A1 of the negative pulsed voltage during the first period τ1. This makes it possible to nitride the nitride semiconductor film on the substrate 500 during the second period τ2 and form a high-quality nitride semiconductor film.

[0076] As described above, according to the film formation apparatus 10 of this embodiment, including the modified examples, a nitride semiconductor film can be formed on the substrate 500 during the first period τ1 in which a negative voltage is supplied to the cathode electrode CA, and the nitride semiconductor film on the substrate 500 can be nitrided during the second period τ2 in which a positive voltage is supplied to the cathode electrode CA. This makes it possible to suppress crystal defects in the nitride semiconductor film and form a high-quality nitride semiconductor film even when the film is formed at a low temperature (for example, 650° C. or lower).

[0077] 17 and 18, a film formation apparatus 10 according to one embodiment of the present invention, which is different from the film formation apparatus 10 of the first and second embodiments, will be described. Note that, in the following, description of the same configuration as the film formation apparatus 10 of the first and second embodiments may be omitted in some cases.

[0078] FIG. 17 is a block diagram illustrating the control of the sputtering power supply unit 160 by the control unit 180 in the film forming apparatus 10 according to one embodiment of the present invention.

[0079] 17 , the sputtering power supply unit 160 includes a first pulsed power supply 164, a third pulsed power supply 166, and a fourth pulsed power supply 167. The first pulsed power supply 164 and the third pulsed power supply 166 generate a negative pulsed voltage, and the fourth pulsed power supply 167 generates a positive pulsed voltage. The negative pulsed voltage generated by the first pulsed power supply 164 is supplied to the cathode electrode CA via wiring 161. On the other hand, the negative pulsed voltage generated by the third pulsed power supply 166 and the positive pulsed voltage generated by the fourth pulsed power supply 167 are supplied to the anode electrode AN (i.e., the substrate support unit 110) via wiring different from the wiring 161.

[0080] FIG. 18 is a timing chart showing voltages supplied to the cathode electrode CA and the anode electrode AN in the film forming apparatus 10 according to one embodiment of the present invention.

[0081] 18 , the control unit 180 controls the output timing of the first pulsed power supply 164 and the third pulsed power supply 166 so that, during a first period τ1, the negative pulsed voltage generated by the first pulsed power supply 164 is supplied to the cathode electrode CA, and the negative pulsed voltage generated by the third pulsed power supply 166 is supplied to the anode electrode AN. That is, the output of the negative pulsed voltage generated by the first pulsed power supply 164 and the output of the negative pulsed voltage generated by the third pulsed power supply 166 are controlled to be synchronized. Furthermore, during a second period τ2, the control unit 180 controls the output timing of the fourth pulsed power supply 167 so that the positive pulsed voltage generated by the fourth pulsed power supply 167 is supplied to the anode electrode AN. In other words, the positive pulsed voltage generated by the fourth pulsed power supply 167 is supplied to the anode electrode AN during two adjacent first periods τ1.

[0082] During the first period τ1, the sputtering particles in the plasma are accelerated by the negative pulse voltage supplied to the cathode electrode CA. However, because the negative pulse voltage is supplied to the anode electrode AN, the sputtering particles are decelerated and lose energy. As a result, the sputtering particles are deposited on the substrate 500 to form a nitride semiconductor film, and the generation of crystal defects due to collisions of the sputtering particles with the nitride semiconductor film can be suppressed.

[0083] Nitrogen atoms have a high electronegative potential, so the presence of electrons easily generates nitrogen anions. Therefore, during the first period τ1, not only nitrogen cations but also nitrogen anions are generated in the plasma. During the second period τ2, the nitride semiconductor film is nitrided using the nitrogen anions. During the second period τ2, a positive pulse voltage is supplied to the anode electrode AN, causing anions to be incident on the substrate 500. Crystal defects in the nitride semiconductor film on the substrate 500 are primarily caused by nitrogen vacancies, and cations of Group 13 elements (e.g., gallium cations) are present in the crystal defects. Therefore, during the second period τ2, the nitride semiconductor film on the substrate 500 can be nitrided by recombination of the cations of Group 13 elements in the crystal defects with the incident nitrogen anions.

[0084] It should be noted that the cations that recombine with the nitrogen anions during the second period τ2 are not limited to cations of Group 13 elements in the crystal defects. When cations (e.g., nitrogen cations) present near the substrate 500 recombine with nitrogen anions, recombination energy is generated. When the recombination energy is transferred to the sputtered particles deposited on the substrate 500, migration of the sputtered particles occurs, which can promote the crystal growth of the nitride semiconductor film.

[0085] In this embodiment, for convenience, the first period τ1 has been described as the period during which the negative pulse voltage is supplied to the cathode electrode CA and the period during which the negative pulse voltage is supplied to the anode electrode AN. However, the period during which the negative pulse voltage is supplied to the cathode electrode CA and the period during which the negative pulse voltage is supplied to the anode electrode AN may be different. For example, the period during which the negative pulse voltage is supplied to the cathode electrode CA may be shorter than the period during which the negative pulse voltage is supplied to the anode electrode AN. However, in this case, the period during which the negative pulse voltage is supplied to the cathode electrode CA overlaps with the period during which the negative pulse voltage is supplied to the anode electrode AN.

[0086] In the following, a modified example of the voltage supplied to the cathode electrode CA in this embodiment will be described. Note that in the following, description of the same configuration as that described above may be omitted.

[0087] <Modification> FIG. 19 is a block diagram illustrating the control of the sputtering power supply unit 160 by the control unit 180 in the film forming apparatus 10 according to one embodiment of the present invention.

[0088] 19 , the sputtering power supply unit 160 includes a first pulsed power supply 164, a second pulsed power supply 165, a third pulsed power supply 166, and a fourth pulsed power supply 167. The first pulsed power supply 164 and the third pulsed power supply 166 generate negative pulsed voltages, and the second pulsed power supply 165 and the fourth pulsed power supply 167 generate positive pulsed voltages. The negative pulsed voltage generated by the first pulsed power supply 164 and the positive pulsed voltage generated by the second pulsed power supply 165 are supplied to the cathode electrode CA via wiring 161.

[0089] FIG. 20 is a timing chart showing voltages supplied to the cathode electrode CA and the anode electrode AN in the film forming apparatus 10 according to one embodiment of the present invention.

[0090] 20 , the control unit 180 controls the output timings of the first pulsed power supply 164 and the third pulsed power supply 166 so that, during a first period τ1, a negative pulsed voltage generated by the first pulsed power supply 164 is supplied to the cathode electrode CA, and a negative pulsed voltage generated by the third pulsed power supply 166 is supplied to the anode electrode AN. That is, the output of the negative pulsed voltage generated by the first pulsed power supply 164 and the output of the negative pulsed voltage generated by the third pulsed power supply 166 are controlled to be synchronized. Furthermore, the control unit 180 controls the output timings of the second pulsed power supply 165 and the fourth pulsed power supply 167 so that, during a second period τ2, a positive pulsed voltage generated by the second pulsed power supply 165 is supplied to the cathode electrode CA, and a positive pulsed voltage generated by the fourth pulsed power supply 167 is supplied to the anode electrode AN. In other words, the positive pulse voltage generated by the second pulse power supply 165 is supplied to the cathode electrode CA during two adjacent first periods τ1, and the positive pulse voltage generated by the fourth pulse power supply 167 is supplied to the anode electrode AN during two adjacent first periods τ1.

[0091] During the second period τ2, a positive pulse voltage is supplied to the cathode electrode CA, causing the substrate support 110 to function as a cathode electrode. Therefore, nitrogen cations in the plasma are incident on the substrate 500. However, because a positive pulse voltage is supplied to the anode electrode AN, the nitrogen cations are decelerated and lose energy. Therefore, the nitride semiconductor film can be nitrided while generating crystal defects in the nitride semiconductor film on the substrate 500.

[0092] Furthermore, in the second period τ2, since a positive pulse voltage is supplied to the anode electrode AN, the nitride semiconductor film on the substrate 500 can also be nitrided by the nitrogen anions.

[0093] In this modified example, for convenience, the second period τ2 has been used in which the period during which a positive pulse voltage is supplied to the cathode electrode CA and the period during which a positive pulse voltage is supplied to the anode electrode AN coincide, but the period during which a positive pulse voltage is supplied to the cathode electrode CA and the period during which a positive pulse voltage is supplied to the anode electrode AN may be different. For example, the period during which a positive pulse voltage is supplied to the cathode electrode CA may be shorter than the period during which a positive pulse voltage is supplied to the anode electrode AN. However, in this case, the period during which a positive pulse voltage is supplied to the cathode electrode CA overlaps with the period during which a positive pulse voltage is supplied to the anode electrode AN.

[0094] As described above, according to the film formation apparatus 10 of this embodiment, including the modified examples, a nitride semiconductor film can be formed on the substrate 500 during the first period τ1 in which a negative voltage is supplied to the cathode electrode CA, and the nitride semiconductor film on the substrate 500 can be nitrided during the second period τ2 in which a positive voltage is supplied to the cathode electrode CA. This makes it possible to suppress crystal defects in the nitride semiconductor film and form a high-quality nitride semiconductor film even when the film is formed at a low temperature (for example, 650° C. or lower).

[0095] 21, a method for forming a nitride semiconductor film using the film formation apparatus 10 according to the first to third embodiments will be described. The method for forming a nitride semiconductor film described in this embodiment is one example, and the method for forming a nitride semiconductor film using the film formation apparatus 10 is not limited to this. Note that, in the following, description of configurations similar to those described in the first to third embodiments may be omitted.

[0096] 21 is a timing chart illustrating a method for forming a nitride semiconductor film according to one embodiment of the present invention, specifically showing the voltage supplied to the cathode electrode CA.

[0097] 21 , when a nitride semiconductor film is formed using the film formation apparatus 10, a first film formation stage ST1 and a second film formation stage ST2 are repeated to form a nitride semiconductor film on a substrate 500. In the first film formation stage ST1, a first negative pulse voltage and a first positive pulse voltage are repeatedly supplied to the cathode electrode CA. The first negative pulse voltage has a first amplitude A1 and a first period τ1. The first positive pulse voltage has a second amplitude A2 and a second period τ2. In the second film formation stage ST2, a second negative pulse voltage and a second positive pulse voltage are repeatedly supplied to the cathode electrode CA. The second negative pulse voltage has a third amplitude A3 and a third period τ3. The second positive pulse voltage has a fourth amplitude A4 and a fourth period τ4.

[0098] The first amplitude A1 is greater than the second amplitude A2, the third amplitude A3, and the fourth amplitude. The third amplitude A3 is greater than the fourth amplitude A4. The second amplitude A2 is greater than the fourth amplitude A4. Preferably, the second amplitude A2 is greater than the third amplitude A3. Alternatively, the first period τ1 is longer than the second period τ2, the third period τ3, and the fourth period. The third period τ3 is longer than the fourth period τ4. The second period τ2 is longer than the fourth period. Preferably, the second period τ2 is longer than the third period τ3.

[0099] In the first film formation stage ST1, mainly, crystalline nuclei of a nitride semiconductor are generated. In order to generate crystalline nuclei of a nitride semiconductor on the substrate 500, it is preferable that sputtered particles having high energy are deposited on the substrate 500. Therefore, in the first period τ1, a negative pulse voltage having a large first amplitude A1 is supplied to the cathode electrode CA. Alternatively, the first period τ1 of the negative pulse voltage is lengthened. As a result, crystalline nuclei of a nitride semiconductor are generated on the substrate 500. Furthermore, in the second period τ2, a positive pulse voltage is supplied to the cathode electrode CA to nitride the sputtered particles deposited on the substrate 500. As a result, crystalline nuclei with few defects and high crystallinity are generated on the substrate 500.

[0100] In the second film formation stage ST2, crystal growth mainly occurs from crystal nuclei in the in-plane direction. The third amplitude A3 of the negative pulse voltage in the third period τ3 is smaller than the first amplitude A1 of the negative pulse voltage in the first period τ. Therefore, the energy of the sputtered particles is small, and when the sputtered particles reach the substrate 500, migration occurs, causing crystal growth from the crystal nuclei in the in-plane direction. As a result, a nitride semiconductor film is formed on the substrate 500. Furthermore, in the fourth period τ4, a positive pulse voltage is supplied to the cathode electrode CA to nitride the nitride semiconductor film on the substrate 500. As a result, a nitride semiconductor film with few defects and high crystallinity is formed on the substrate 500.

[0101] In this way, crystal nuclei are generated in the first film-forming stage ST1, and crystal growth in the in-plane direction from the crystal nuclei is promoted in the second film-forming stage ST2. By repeating the first film-forming stage ST1 and the second film-forming stage ST2, a nitride semiconductor film having a desired thickness can be formed on the substrate 500 even at a low temperature.

[0102] A modified example of the nitride semiconductor film forming method according to this embodiment will be described below, in which the description of the same configuration as that described above may be omitted.

[0103] 22 is a timing chart illustrating a method for forming a nitride semiconductor film according to one embodiment of the present invention. Specifically, FIG. 22 shows voltages supplied to the cathode electrode CA and the anode electrode AN.

[0104] 22 , a nitride semiconductor film is formed on a substrate 500 by repeating a first film-forming step ST1 and a second film-forming step ST2. In this modification, a voltage is supplied not only to the cathode electrode CA but also to the anode electrode AN. In the first film-forming step ST1, a third positive pulse voltage and a third negative pulse voltage are repeatedly supplied to the anode electrode AN. The third positive pulse voltage has a fifth amplitude A5 and a fifth period τ5. The third negative pulse voltage has a sixth amplitude A6 and a sixth period τ6. In the second film-forming step ST2, a fourth positive pulse voltage and a fourth negative pulse voltage are repeatedly supplied to the anode electrode AN. The fourth positive pulse voltage has a seventh amplitude A7 and a seventh period τ7. The fourth negative pulse voltage has an eighth amplitude A8 and an eighth period τ8.

[0105] The fifth period τ5 is synchronized with and overlaps the first period τ1. The sixth period τ6 is synchronized with and overlaps the second period τ2. The seventh period τ7 is synchronized with and overlaps the third period τ3. The eighth period τ8 is synchronized with and overlaps the fourth period τ4.

[0106] The fifth amplitude A5 is equal to or greater than the sixth amplitude A6. The seventh amplitude A7 is equal to or greater than the eighth amplitude A8. The fifth amplitude A5 and the sixth amplitude A6 are greater than the seventh amplitude A7 and the eighth amplitude A8. Alternatively, the fifth period τ5 is equal to or greater than the sixth period τ6. The seventh period τ7 is equal to or greater than the eighth period τ8. The fifth period τ5 and the sixth period τ6 are greater than the seventh period τ7 and the eighth period τ8. Note that the fifth amplitude A5, the sixth amplitude A6, the seventh amplitude A7, and the eighth amplitude A8 are smaller than the first amplitude A1, the second amplitude A2, the third amplitude A3, and the fourth amplitude A4, respectively.

[0107] In the first film formation stage ST1, primarily, crystalline nuclei of nitride semiconductors are generated. During the period when the first negative pulse voltage is supplied to the cathode electrode CA and the third positive pulse voltage is supplied to the anode electrode AN (i.e., the period when the first period τ1 and the fifth period τ5 overlap), the potential difference between the cathode electrode CA and the anode electrode AN is large, and sputtered particles in the plasma have high energy. Therefore, crystalline nuclei of nitride semiconductors are generated on the substrate 500. Furthermore, during the period when the first positive pulse voltage is supplied to the cathode electrode CA and the third negative pulse voltage is supplied to the anode electrode AN (i.e., the period when the second period τ2 and the sixth period τ6 overlap), nitrogen cations in the plasma are incident on the substrate 500 and nitride the sputtered particles deposited on the substrate 500. This results in the generation of crystalline nuclei with fewer defects and higher crystallinity on the substrate 500.

[0108] In the second film formation stage ST2, crystal growth mainly occurs from crystal nuclei in the in-plane direction. During the period when the second negative pulse voltage is supplied to the cathode electrode CA and the fourth positive pulse voltage is supplied to the anode electrode AN (i.e., the period when the third period τ3 and the seventh period τ7 overlap), sputtered particles in the plasma have low energy. Therefore, when the sputtered particles reach the substrate 500, migration occurs, and crystal growth from the crystal nuclei in the in-plane direction occurs. As a result, a nitride semiconductor film is formed on the substrate 500. Furthermore, during the period when the second positive pulse voltage is supplied to the cathode electrode CA and the fourth negative pulse voltage is supplied to the anode electrode AN (i.e., the period when the fourth period τ4 and the eighth period τ8 overlap), nitrogen ions in the plasma are incident on the substrate 500 and nitride the nitride semiconductor film on the substrate 500. As a result, a nitride semiconductor film with few defects and high crystallinity is formed on the substrate 500.

[0109] As described above, according to the nitride semiconductor film deposition method of this embodiment, including the modified examples, a nitride semiconductor film is deposited through multiple deposition stages with different deposition conditions using the film deposition apparatus 10. For example, crystal nuclei are generated in the first deposition stage, and crystal growth from the crystal nuclei occurs in the in-plane direction in the second deposition stage. This makes it possible to suppress defects in the nitride semiconductor film and form a high-quality nitride semiconductor film even when the film is deposited at a low temperature (e.g., 650°C or lower).

[0110] Fifth Embodiment A light emitting device 1000 according to one embodiment of the present invention will be described with reference to FIGS.

[0111] 23 is a schematic diagram showing the configuration of a light-emitting device 1000 according to one embodiment of the present invention.

[0112] 23 , the light-emitting device 1000 includes a substrate 1010, a compensation layer 1020, a buffer layer 1030, an undoped semiconductor layer 1035, an n-type semiconductor layer 1040, a light-emitting layer 1050, a p-type semiconductor layer 1060, a protective layer 1070, an n-type electrode 1080, and a p-type electrode 1090. The light-emitting device 1000 is a so-called LED (Light Emitting Diode), but is not limited to this.

[0113] For example, a sapphire substrate, a glass substrate, or a quartz substrate can be used as the substrate 1010. When the film formation apparatus 10 is used, a gallium nitride film can be formed at a low temperature, so that an inexpensive glass substrate can also be used as the substrate 1010.

[0114] The glass substrate is an amorphous substrate made of a glass material that does not generally have a crystalline structure but has a crystalline structure in a small amount. The upper limit of the thermal expansion coefficient of the glass substrate is 4.2 × 10 －６ / K, preferably less than 4.0 × 10 －６ The lower limit of the thermal expansion coefficient of the glass substrate is less than 3.0 × 10 －６ / K, preferably 3.5 × 10 －６ / K. The glass substrate is required to have resistance to the thermal history during the fabrication of a semiconductor device. Therefore, the lower limit of the glass transition point of the glass substrate is, for example, 650°C or higher, preferably 720°C or higher. The upper limit of the glass transition point of the glass substrate is, for example, 900°C or lower, preferably 810°C or lower. For the same reason, the lower limit of the softening point of the glass substrate is, for example, 900°C or higher, preferably 950°C or higher. The upper limit of the softening point of the glass substrate is, for example, 1150°C or lower, preferably 1050°C or lower.

[0115] To prevent alkali metal components in the glass material from contaminating the light-emitting layer 1050, a glass material with a low alkali metal content can be used as the glass substrate. For example, the alkali metal content in the glass substrate is 0.1 mass % or less.

[0116] For example, an amorphous glass material such as aluminoborosilicate glass or aluminosilicate glass is used as the glass substrate. Such amorphous glass materials are used in liquid crystal displays and organic electroluminescence (organic EL) displays, and large-area glass substrates called mother glasses are also available on the market. By selecting a glass substrate as the substrate for the light-emitting element 1000, the light-emitting element 1000 can be manufactured at low cost.

[0117] The substrate 1010 has a first surface on which the light-emitting layer 1050 is formed and a second surface on which the compensation layer 1020 is formed. The surface roughness of the first surface and the second surface of the substrate 1010 do not need to be the same. However, from the viewpoint of preventing electrostatic breakdown due to peeling charging when the light-emitting element 1000 is removed from various devices during the manufacturing process of the light-emitting element 1000, the surface roughness of the second surface can be made rougher than the surface roughness of the first surface.

[0118] The thickness of the substrate 1010 is not particularly limited, but from the viewpoint of reducing warpage of the substrate 1010, it is possible to use a substrate that is sufficiently thicker than the total film thickness of the n-type semiconductor layer 1040, the light emitting layer 1050, and the p-type semiconductor layer 1060. For example, the substrate 1010 has a film thickness that is 50 times or more the total film thickness of the n-type semiconductor layer 1040, the light emitting layer 1050, and the p-type semiconductor layer 1060. The substrate 1010 has a thickness of, for example, 0.5 to 1.0 mm.

[0119] There are no particular limitations on the mechanical strength of the substrate 1010, but from the perspective of reducing warpage of the substrate 1010, it is preferable that the substrate 1010 has a Young's modulus of, for example, 70 to 90 GPa.

[0120] The compensation layer 1020 is formed on the second surface of the substrate 1010. By providing the compensation layer 1020 on the second surface, it is possible to reduce warpage of the substrate 1010, which is detrimental when fabricating the light-emitting device 1000. Furthermore, by providing the compensation layer 1020 on the second surface, it is possible to prevent H from being generated from the second surface side of the substrate 1010 during reduced pressure and heating when forming the n-type semiconductor layer 1040, the light-emitting layer 1050, and the p-type semiconductor layer 1060. ２ This reduces degassing such as O, and reduces oxygen contamination into n-type semiconductor layer 1040, light-emitting layer 1050, and p-type semiconductor layer 1060. Furthermore, by appropriately selecting the material of compensation layer 1020, the resistance to chemical treatment with acid used in the manufacturing process of light-emitting element 1000 is also improved.

[0121] By setting the thermal expansion coefficient of the compensation layer 1020 within a predetermined range, it is possible to mitigate warping of the substrate 1010 caused by differences in the thermal expansion coefficient between the substrate 1010 and the n-type semiconductor layer 1040, the light emitting layer 1050, or the p-type semiconductor layer 1060. The thermal expansion coefficient of the compensation layer 1020 is greater than that of the substrate 1010 and less than that of the substrate 1010, the n-type semiconductor layer 1040, the light emitting layer 1050, and the p-type semiconductor layer 1060. The lower limit of the thermal expansion coefficient of the compensation layer 1020 is, for example, 4.0×10 －６ / K, preferably 4.1 × 10 －６ / K. The upper limit of the thermal expansion coefficient of the compensation layer 1020 is, for example, 5.0×10 －６ / K, preferably less than 4.6 × 10 －６ / K.

[0122] Since the compensation layer 1020 is adjacent to the substrate 1010, by setting the thermal conductivity to a predetermined value, heat can be transferred efficiently and uniformly to the entire substrate 1010 during the heating process when forming the n-type semiconductor layer 1040, the light-emitting layer 1050, and the p-type semiconductor layer 1060 on the substrate 1010. As a result, the uniformity of the film thicknesses of the n-type semiconductor layer 1040, the light-emitting layer 1050, and the p-type semiconductor layer 1060 can also be improved. Therefore, the compensation layer 1020 can have a thermal conductivity that exceeds that of the substrate 1010. The thermal conductivity of the compensation layer 1020 can be set appropriately depending on the material constituting the substrate 1010, but it is preferable that the thermal conductivity be, for example, 10 W m －１ ・K －１ More than 40 W m －１ ・K －１ Exceeds.

[0123] The thermal conductivity of the compensation layer 1020 can be adjusted by adjusting the film density to a predetermined value. The relationship between film density and thermal conductivity varies depending on the material that constitutes the compensation layer 1020, but the lower limit of the film density of the compensation layer 1020 is, for example, 2.50 g / cm. ３ or more, preferably 2.60 g / cm ３ The upper limit of the film density of the compensation layer 1020 is 4.10 g / cm ３ and preferably 4.00 g / cm ３ The following is the result.

[0124] The material used for the compensation layer 1020 is not particularly limited as long as it satisfies the above-mentioned physical properties, but it is preferable that the material be resistant to chemical treatment with acid or the like used in the manufacturing process of the light-emitting element 1000. As the compensation layer 1020, for example, an aluminum nitride film or an aluminum oxide film, or a laminated film of an aluminum nitride film and an aluminum oxide film can be used.

[0125] The method for forming the compensation layer 1020 is not particularly limited, and known film formation methods can be used. However, in order to form the compensation layer on a large-area substrate and to prevent the temperature of the substrate from rising excessively, it is preferable to form the compensation layer 1020 by sputtering. The sputtering conditions are not particularly limited, and a known sputtering device can be used, and the conditions can be set appropriately.

[0126] The thickness of compensation layer 1020 is not particularly limited and is set appropriately depending on the structure of light-emitting element 1000. However, from the viewpoint of reducing warpage of substrate 1010, compensation layer 1020 can be formed so as not to be excessively thin compared to the total thickness of n-type semiconductor layer 1040, light-emitting layer 1050, and p-type semiconductor layer 1060. Compensation layer 1020 can have a thickness that is, for example, 80% or more of the total thickness of n-type semiconductor layer 1040, light-emitting layer 1050, and p-type semiconductor layer 1060.

[0127] The buffer layer 1030 can control the crystal orientation of the undoped semiconductor layer 1035 and the n-type semiconductor layer 1040, and can improve the crystallinity of the n-type semiconductor layer 1040. The buffer layer 1030 can be, for example, an aluminum nitride film.

[0128] The undoped semiconductor layer 1035 can promote epitaxial growth of the n-type semiconductor layer 1040. As the undoped semiconductor layer 1035, for example, a gallium nitride film can be used.

[0129] The n-type semiconductor layer 1040 may be a silicon-doped gallium nitride film or the like. The light-emitting layer 1050 may be a stack of indium gallium nitride films and gallium nitride films stacked alternately. The p-type semiconductor layer 1060 may be a magnesium-doped gallium nitride film or the like. The protective layer 1070 may be a silicon oxide film or the like. The n-type electrode 1080 may be a metal film such as indium. The p-type electrode 1090 may be a metal film such as palladium or gold. The oxygen concentration in the light-emitting layer 1050 and the p-type semiconductor layer 1060 may be 1×10 １８ cm －３ It is preferable that it is less than 10 ...

[0130] 2. Method for Fabricating Light-Emitting Device 1000 FIG. 24 is a flowchart showing a method for fabricating light-emitting device 1000 according to one embodiment of the present invention.

[0131] In step S1000, an aluminum nitride film is deposited on the second surface of the substrate 1010 as the compensation layer 1020. The aluminum nitride film can be deposited using the deposition apparatus 10 or another sputtering apparatus. When the deposition apparatus 10 is used, aluminum or aluminum nitride is used as the target material 600.

[0132] In step S1010, an aluminum nitride film is formed as the buffer layer 1030 on the first surface of the substrate 1010. The aluminum nitride film can be formed using the film formation apparatus 10 or another sputtering apparatus. When the film formation apparatus 10 is used, aluminum or aluminum nitride is used as the target material 600.

[0133] In step S1020, a gallium nitride film is formed on the buffer layer 1030 as the undoped semiconductor layer 1035. The gallium nitride film can be formed using the film formation apparatus 10.

[0134] In step S1030, a silicon-doped gallium nitride film is formed as the n-type semiconductor layer 1040 on the undoped semiconductor layer 1035. The silicon-doped gallium nitride film can be formed using the film formation apparatus 10. Specifically, silicon-doped gallium nitride is used as the target material 600.

[0135] In step S1040, indium gallium nitride films and gallium nitride films are alternately formed as light emitting layer 1050 on n-type semiconductor layer 1040. The indium gallium nitride films and gallium nitride films can be formed using film formation apparatus 10. In the formation of the indium gallium nitride films, indium gallium nitride is used as target material 600.

[0136] In step S1050, a magnesium-doped gallium nitride film is formed as p-type semiconductor layer 1060 on light-emitting layer 1050. The magnesium-doped gallium nitride film can be formed using film formation apparatus 10. Specifically, magnesium-doped gallium nitride is used as target material 600.

[0137] In step S1060, a heat treatment is performed. The activation rate of the magnesium added to the gallium nitride film in step S1050 may be low. In this case, the magnesium can be activated by the heat treatment, and the film can function as a p-type semiconductor layer 1060.

[0138] In step S1070, p-type semiconductor layer 1060, light-emitting layer 1050, and n-type semiconductor layer 1040 are etched into a predetermined pattern using photolithography. Note that n-type semiconductor layer 1040 is etched so that its surface is exposed (i.e., so that a portion of n-type semiconductor layer 1040 remains). For example, plasma etching can be used as the etching method.

[0139] In step S1080, a silicon oxide film is formed as protective layer 1070 so as to cover the surface of p-type semiconductor layer 1060, the exposed surface of n-type semiconductor layer 1040, and the side surfaces of each layer. The silicon oxide film can be formed using a CVD apparatus.

[0140] In step S1090, the protective layer 1070 is patterned using photolithography so as to form openings that expose the surfaces of the p-type semiconductor layer 1060 and the n-type semiconductor layer 1040.

[0141] In step S1100, a metal laminated film of Ti / Al / Ti / Au is formed as n-type electrode 1080 on n-type semiconductor layer 1040 through the opening.

[0142] In step S1110, a metal laminated film of Ni / Au is formed as p-type electrode 1090 on p-type semiconductor layer 1060 through the opening.

[0143] In step S1120, a heat treatment is performed, which can reduce the contact resistance between the n-type semiconductor layer 1040 and the n-type electrode 1080, and between the p-type semiconductor layer 1060 and the p-type electrode 1090.

[0144] As described above, the light emitting device 1000 according to this embodiment can include a high-quality gallium nitride film by using the film forming apparatus 10. Therefore, the characteristics of the light emitting device 1000 are improved.

[0145] Sixth Embodiment A semiconductor device 2000 according to one embodiment of the present invention will be described with reference to FIGS.

[0146] 1. Configuration of Semiconductor Element 2000 FIG. 25 is a schematic diagram showing the configuration of a semiconductor element 2000 according to one embodiment of the present invention.

[0147] 25, the semiconductor device 2000 includes a substrate 2010, a compensation layer 2020, a buffer layer 2030, a semiconductor layer 2040, a gate insulating layer 2050, a gate electrode 2060, a source electrode 2070, and a drain electrode 2080. The semiconductor device 2000 is a so-called transistor, but is not limited to this.

[0148] The substrate 2010, compensation layer 2020, and buffer layer 2030 are similar to the substrate 1010, compensation layer 1020, and buffer layer 1030 of the third embodiment, respectively, and therefore will not be described here.

[0149] For example, a silicon-doped gallium nitride film (n-type gallium nitride semiconductor film) or a gallium nitride film (undoped gallium nitride semiconductor film) can be used as the semiconductor layer 2040. A silicon oxide film, a silicon nitride film, or the like can be used as the gate insulating layer 2050. A metal film such as aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), silver (Ag), palladium (Pd), or indium (In), or a laminated metal film thereof can be used as each of the gate electrode 2060, the source electrode 2070, and the drain electrode 2080.

[0150] 2. Method for Fabricating Semiconductor Element 2000 FIG. 26 is a flowchart showing a method for fabricating a semiconductor element 2000 according to one embodiment of the present invention.

[0151] In step S2000, an aluminum nitride film is deposited as compensation layer 2020 on the second surface of substrate 2010. The aluminum nitride film can be deposited using deposition apparatus 10 or another sputtering apparatus. When deposition apparatus 10 is used, aluminum or aluminum nitride is used as target material 600.

[0152] In step S2010, an aluminum nitride film is formed as the buffer layer 2030 on the first surface of the substrate 2010. The aluminum nitride film can be formed using the film formation apparatus 10 or another sputtering apparatus. When the film formation apparatus 10 is used, aluminum or aluminum nitride is used as the target material 600.

[0153] In step S2020, a gallium nitride film is formed on the buffer layer 2030 as the semiconductor layer 2040. The gallium nitride film can be formed using the film formation apparatus 10.

[0154] In step S2030, a silicon oxide film is formed as a gate insulating layer 2050 on the semiconductor layer 2040. The silicon oxide film can be formed using a CVD apparatus.

[0155] In step S2040, photolithography is used to pattern the gate insulating layer 2050 and the semiconductor layer 2040. The gate insulating layer 2050 is patterned so as to expose the surface of the semiconductor layer 2040. The semiconductor layer 2040 is patterned into an island shape.

[0156] In step S2050, a Ti / Al laminated metal film is formed on the gate insulating layer 2050 as the gate electrode 2060. Also, a Ti / Al laminated metal film is formed on the exposed surface of the semiconductor layer 2040 as the source electrode 2070 and the drain electrode 2080.

[0157] In step S2060, a heat treatment is performed, which can reduce the contact resistance between the semiconductor layer 2040 and the source electrode 2070, and between the semiconductor layer 2040 and the drain electrode 2080.

[0158] As described above, the semiconductor element 2000 according to this embodiment can include a high-quality gallium nitride film by using the film forming apparatus 10. Therefore, the characteristics of the semiconductor element 2000 are improved.

[0159] The above-described embodiments of the present invention may be combined as appropriate as long as they are not mutually inconsistent. Furthermore, even if a person skilled in the art appropriately adds or deletes components or modifies the design based on each embodiment, or adds or omits steps or modifies conditions, such combinations are included within the scope of the present invention as long as they include the gist of the present invention.

[0160] Even if there are other effects and advantages different from those brought about by the above-mentioned embodiments, those that are clear from the description in this specification or that can be easily predicted by a person skilled in the art are naturally understood to be brought about by the present invention.

[0161] 10, 10A: Film forming apparatus, 100: Vacuum chamber, 110: Substrate support section, 120: Heating section, 130: Rotation drive section, 140: Target support section, 150: Pump, 151: Piping, 152: Valve, 160: Sputtering power supply section, 161: Wiring, 162: High frequency power supply, 163: Pulse power supply, 164: First pulse power supply, 165: Second pulse power supply, 166: Third pulse power supply, 167: Fourth pulse power supply, 170: Sputtering gas supply section, 171: Piping, 172: Mass flow controller, 180: Control section, 500: Substrate, Target material: 600, 1000: Light emitting element, 1010: Substrate, 1020: Compensation layer, 1030: Buffer layer, 1035: Undoped semiconductor layer, 1040: n-type semiconductor layer, 1050: Light-emitting layer, 1060: p-type semiconductor layer, 1070: Protective layer, 1080: n-type electrode, 1090: p-type electrode, 2000: Semiconductor element, 2010: Substrate, 2020: Compensation layer, 2030: Buffer layer, 2040: Semiconductor layer, 2050: Gate insulating layer, 2060: Gate electrode, 2070: Source electrode, 2080: Drain electrode

Claims

1. A film formation apparatus comprising: a vacuum chamber capable of evacuating the interior; a substrate support section provided within the vacuum chamber and supporting a substrate; a target support section provided within the vacuum chamber and supporting a target material positioned opposite the substrate; a sputtering power supply including a high frequency power supply that generates an AC wave; and a control section that controls the sputtering power supply, wherein the control section controls the high frequency power supply so that a first period in which a negative voltage is supplied to the target support section and a second period in which a positive voltage is supplied to the target support section are alternately repeated, and the integral of the absolute value of the positive voltage during the second period is smaller than the integral of the absolute value of the negative voltage during the first period.

2. The film forming apparatus according to claim 1, wherein the sputtering power supply further includes a pulse power supply that generates a positive pulse voltage, and the control unit controls the pulse power supply so that the positive pulse voltage is supplied to the target support unit during at least one of the plurality of second periods.

3. The film forming apparatus according to claim 1, wherein the sputtering power supply further includes a pulse power supply that applies a positive pulse voltage, and the control unit controls the pulse power supply so that the positive pulse voltage is supplied to the target support unit over at least two or more adjacent second periods.

4. The film formation apparatus according to claim 1, wherein the sputtering power supply further includes a pulse power supply that supplies a negative pulse voltage, the control unit controls the pulse power supply so that the negative pulse voltage is supplied to the target support unit during at least one of the plurality of second periods, and the waveform of the negative pulse voltage is substantially the same as the waveform of the positive voltage.

5. A film formation apparatus comprising: a vacuum chamber capable of evacuating the interior; a substrate support section provided within the vacuum chamber and supporting a substrate; a target support section provided within the vacuum chamber and supporting a target material arranged opposite the substrate; a sputtering power supply including a first pulse power supply that generates a negative pulse voltage and a second pulse power supply that generates a positive pulse voltage; and a control section that controls the sputtering power supply, wherein the control section controls the first pulse power supply and the second pulse power supply so that a first period during which the negative pulse voltage is supplied to the target support section and a second period during which the positive pulse voltage is supplied to the target support section are repeated, and the amplitude of the positive pulse voltage is smaller than the amplitude of the negative pulse voltage.

6. The film forming apparatus according to claim 5, wherein the integral of the absolute value of the positive pulse voltage in the second period is smaller than the integral of the absolute value of the negative pulse voltage in the first period.

7. The film forming apparatus according to claim 5, wherein the second period is longer than the first period.

8. The film forming apparatus according to claim 5, wherein the waveform of the positive pulse voltage is triangular.

9. The film forming apparatus according to claim 5, wherein the waveform of the positive pulse voltage is trapezoidal.

10. The film forming apparatus according to claim 5, wherein the waveform of the positive pulse voltage has a stepped shape including a first amplitude and a second amplitude.

11. The film forming apparatus according to claim 5, wherein a plurality of the second periods are provided between two adjacent first periods.

12. A film formation apparatus comprising: a vacuum chamber capable of evacuating the interior; a substrate support section provided within the vacuum chamber and supporting a substrate; a target support section provided within the vacuum chamber and supporting a target material disposed opposite the substrate; a sputtering power supply including a first pulsed power supply that generates a first negative pulsed voltage, a second pulsed power supply that generates a first positive pulsed voltage, and a third pulsed power supply that generates a second negative pulsed voltage; and a control section that controls the sputtering power supplies, wherein the control section controls the first pulsed power supply and the second pulsed power supply so that a first period during which the first negative pulsed voltage is supplied to the substrate support section and a second period during which the first positive pulsed voltage is supplied to the substrate support section are repeated, and controls the third pulsed power supply so that the second negative pulsed voltage is supplied to the target support section during a third period that overlaps with the first period.

13. The film forming apparatus according to claim 12, wherein the third period is shorter than the first period and the second period.

14. The film forming apparatus of claim 12, wherein the sputtering power supply further includes a fourth pulse power supply that generates a second positive pulse voltage, the control unit controls the third pulse power supply and the fourth pulse power supply so that the third period and a fourth period in which the second positive pulse voltage is supplied to the target support unit are repeated, and the second period overlaps with the fourth period.

15. A film forming apparatus according to any one of claims 1 to 14, wherein the target material is a nitride semiconductor.

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