Systems and methods for analyzing semiconductor wafer defects using surface inspection tools

Abstract

A method of analyzing a surface of a wafer includes receiving, from a light based surface inspection tool, a first set of data produced by the surface inspection tool with respect to the surface of the wafer and a second set of data produced by the surface inspection tool with respect to the surface of the wafer. The first set of data corresponds to a first channel of the surface inspection tool and the second set of data corresponds to a second channel of the surface inspection tool and is different than the first set of data. The method includes determining whether or not an undesirable surface defect exists on the surface of the wafer based at least in part on the first set of data and the second set of data, and the wafer is sorted based on the determination.

Description

SYSTEMS AND METHODS FOR ANALYZING SEMICONDUCTOR WAFER DEFECTS USING SURFACE INSPECTION TOOLSCROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 673,628, filed July 19, 2024, which is hereby incorporated by reference in its entirety.BACKGROUND

[0002] This disclosure relates to system and methods for analyzing defects in semiconductor substrates and, more particularly, to systems and methods for detecting and analyzing bulk micro defects in a semiconductor wafer using a surface scan instrument.

[0003] Semiconductor wafers are analyzed for surface defects using wafer inspection tools, such as a KLA-Tencor Surfscan SPx Wafer Surface Analysis System. The SPx tool uses a laser scattering dark field (DF) or a bright field differential interference contrast (BF-DIC) channel to detect defects on a wafer surface.

[0004] Semiconductor wafers (e.g., silicon wafers) typically have some defects on their surface. Most of the surface defects do not impact the end device fabrication (e.g., integrated circuit fabrication) process. Customer and manufacturer specification criteria typically allow for some defects to exist on the wafer surface. Some defects, such as stacking faults (e.g., oxidation-induced stacking faults (OSFs), oxygen precipitates, bulk micro defects (BMDs), crystal-originated particles (COPs), light point defects (LPDs), laser scattering tomography defects (LSTDs), are epistacking faults (ESFs) and the like, could significantly impact end device (e.g., integrated circuit) yield. These defects could exacerbate or agglomerate during wafer processing (e.g., during semiconductor-on-insulator processing) at high process temperature and / or oxidizing conditions and are, thus, undesirable defects (i.e., defects that may impact end device fabrication or are otherwise not acceptable)

[0005] Wafer inspection tools (e.g., an SPx tool) cannot provide meaningful distinctions between the undesirable defects and the minor ones to enable the manufacture to determine whether a wafer is in suitable condition for end use. For example, the DF and the BF used by the SPx tool detect potential defects, but cannot separate out the undesirable defects from the minor defects.

[0006] Scanning electron microscopes are sometimes relied on to detect harmful defects. This equipment is very costly and not readily available. It is therefore not typically used in mass production applications.

[0007] There is a need for systems and methods for analyzing wafers that enable detecting harmful detects before significant wafer processing has been performed and to do so in a readily available, cost-efficient and effective manner.

[0008] This background section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and / or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.BRIEF SUMMARY

[0009] One aspect of the present disclosure is a method of analyzing a surface of a wafer. The method includes receiving, from a light based surface inspection tool, a first set of data produced by the surface inspection tool with respect to the surface of the wafer and a second set of data produced by the surface inspection tool with respect to the surface of the wafer. The first set of data corresponds to a first channel of the surface inspection tool and the second set of data corresponds to a second channel of the surface inspection tool and is different than the first set of data. The method includes determining whether or not an undesirable surface defect exists on the surface of the wafer based at least in part on the first set of data and the second set of data, and the wafer is sorted based on the determination by: sorting the wafer for end use processing when it is determined that an undesirable surface defect does not exist on the surface of the wafer, and sorting the wafer for further front-end processing when it is determined that an undesirable surface defect does exist on the surface of the wafer.

[0010] Another aspect of this disclosure is a system for analyzing a surface of a wafer. The system includes a computing device including a processor and a memory. The memory stores instructions that when executed by the processor program the processor to receive, from a light-based surface inspection tool, a first set of data produced by the surface inspection tool with respect to the surface of the wafer and a second set of data produced by the surface inspection tool with respect to the surface of the wafer. The first set of data corresponds to a first channel of the surface inspection tool and the second set of data corresponds to a second channel of the surface inspection tool and is different than the first set of data. The processer is programmedto determine whether or not an undesirable surface defect exists on the surface of the wafer based at least in part on the first set of data and the second set of data, and sort the wafer based on the determination by: sorting the wafer for end use processing when it is determined that an undesirable surface defect does not exist on the surface of the wafer, and sorting the wafer for further front-end processing when it is determined that an undesirable surface defect does exist on the surface of the wafer.

[0011] According to another aspect of this disclosure, a non-transitory computer readable medium storing instructions that when executed by a processor program the processor to receive, from a light based surface inspection tool, a first set of data produced by the surface inspection tool with respect to the surface of a wafer and a second set of data produced by the surface inspection tool with respect to the surface of the wafer. The first set of data corresponds to a first channel of the surface inspection tool and the second set of data corresponds to a second channel of the surface inspection tool and being different than the first set of data. The instructions also program the processor to determine whether or not an undesirable surface defect exists on the surface of the wafer based at least in part on the first set of data and the second set of data and sort the wafer based on the determination by: sorting the wafer for end use processing when it is determined that an undesirable surface defect does not exist on the surface of the wafer, and sorting the wafer for further front-end processing when it is determined that an undesirable surface defect does exist on the surface of the wafer.

[0012] Various refinements exist of the features noted in relation to the above-mentioned aspects. Further features may also be incorporated in the above- mentioned aspects. These refinements and additional features may exist individuallyor in any combination. For instance, various features discussed below in relation to any of the illustrated embodiments may be incorporated into any of the above-described aspects, alone or in any combination.BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The following figures illustrate various aspects of the disclosure.

[0014] Fig. 1 is simplified explanation of a semiconductor on insulator (SOI) process in which a defect is present.

[0015] Fig. 2 is an example system for analyzing the surface of a wafer.

[0016] Fig. 3 is an example computing device for use in the system shown in Fig. 1.

[0017] Fig. 4 is an example light-based surface inspection tool for use in the system shown in Fig. 1.

[0018] Fig. 5 is explanatory diagram of operation of bright field (BF) differential interference contrast (DIC) scanning that may be performed by the surface inspection tool shown in Fig. 4.

[0019] Corresponding reference characters indicate corresponding parts throughout the drawings.DETAILED DESCRIPTION

[0020] The example embodiments of this disclosure relate to distinguishing defects in a semiconductor (e.g., silicon) wafer using data from two channels of a light-based surface inspection tool. Some embodiments utilize data from an SPx surface inspection tool, such as an SPx tool available from KLA-Tencor (Milpitas, CA). However, the present disclosure is not limited to any specific wafer surface inspection tool, and can be implemented on any suitable inspection or metrology tool having similar functionality and / or operation to an SPx tool. Although the examples described herein are described with respect to a silicon wafer, the methods and systems of this disclosure may be applied to any suitable surface inspection of an item potentially having surface defects.

[0021] Silicon wafers generally have at least some defects on their surface. Known surface inspection tools are able to detect many of these defects, which will be referred to herein as potential defects. Potential defects as used herein are generally actual defects, but only some of them are undesirable defect. The potential defects detected by the surface detection tools, and present in the data output by such tools, will typically include two types of actual defects: 1) defects that are minor or otherwise not a concern and 2) undesirable defects that are more significant and may affect end device (e.g., integrated circuit) processing and yield. The undesirable defects may include, for example, OSF, oxygen precipitates, BMDs, COPs, ESFs, LSTDs, and / or another defect that could significantly impact end device yield.

[0022] Some undesirable defects arise in semiconductor- on-insulator (SOI) processing. Referring now to Fig. 1, in SOI processing, a handle wafer 10 isbonded to a donor wafer 20. If a defect 30 exists between the handle wafer 10 and the donor wafer 20 when they are bonded, the defect 30 will remain after they are bonded and will likely impact IC yield (e.g., by causing one or more IC to be unusable because of being affected by the defect). The systems and methods of the present disclosure enable the detection of the defect, so that the wafer may be re-processed and salvaged to eliminate the defect before any SOI processing is performed using the wafer, improving yield, reducing costs, and eliminating waste.

[0023] Fig. 2 is a simplified block diagram of an example system 100 for analyzing a surface of a wafer 102. The system includes a surface inspection tool 104 and a computing device 106 communicatively coupled to the surface inspection tool 104.

[0024] The example surface inspection tool 104 is a light-based surface inspection tool. In some embodiments, the tool 104 is an SPx tool. In other embodiments, the surface inspection tool may be any other suitable surface inspection tool. As will be explained in more detail below, in the example embodiments, the surface inspection tool uses different techniques to detect potential defects and outputs data from the different techniques as different channels. In the example embodiment, two channels are used to detect undesirable defects and the computing device 106 receives a first set of data from the surface inspection tool and a second set of data from the surface inspection tool when the surface inspection tool inspects the surface of the wafer 102. the first set of data corresponding to the first channel of the surface inspection tool and the second set of data corresponding to the second channel of the surface inspection tool.

[0025] The computing device 106 receives the first and second data sets and determines whether or not an undesirable surface defect exists on the surface of the wafer 102 based at least in part on the first set of data and the second set of data. The determination is generally made based on a comparison of the first data set and the second data set.

[0026] The data sets each include information about potential defects on the surface of the wafer 102, including, for example, size and location (e.g., x-y coordinates) on the surface of the wafer. Determining whether or not the undesirable surface defect exists on the surface of the wafer is based at least in part on the location of the one or more potential defects in the first data set relative to the location of the one or more potential defects in the second data set in the example embodiment. Thus, if a potential defect in the first data set is located at an x-y location within a threshold distance (i.e., less than the threshold distance away) of a potential defect in the second data set, the potential defects may be flagged / identified as undesirable defects. In some embodiments, the threshold distance is a predetermined, fixed distance, such as 2 millimeters (mm), 1mm, 0.5 mm, or the like. Alternatively, the threshold distance may be variable, such as a threshold that is calculated based on the size of one or both of the potential defects, based on the requirements of the particular end use, or the like. In the example embodiment, the distance between the two potential defects is measured between the centers of the two potential defects. In other embodiments, the distance may be measured between any outer edge of the two potential defects, the center of one potential defect to any edge of the other potential defect, or the like.

[0027] In some embodiments, the locations of the potential defects from the two channels relative to one another are used in connection with additional factors to further refine the identification of undesirable surface defects. Thus, in some embodiments, determination of the whether or not an undesirable defect exists on the surface of the wafer is determined by selecting all defects in the first data set (from the first channel) that have a size greater than a size threshold, selecting all defects in the second data set (from the second channel) regardless of size, and identifying as undesirable surface defects any of the selected potential defects from the first and second channels that are less than the threshold distance from each other. In some embodiments, the size threshold is 0.16 micrometers (pm). In other embodiments, the size threshold is less than 0.16 pm. Alternatively, any suitable size threshold may be used.

[0028] After the determination of whether or not an undesirable surface defect exists is made, the computing device then sorts the wafer (e.g., instructs machinery - not shown - where to send the wafer and / or what step / process should next be performed on the wafer) based on the determination. If the computing device determines that an undesirable surface defect does not exist on the surface of the wafer 102, the wafer is sorted for und use processing (e.g., moved on to an IC process). If the computing device determines that an undesirable defect does exist on the surface, the wafer is sorted for additional front-end processing (i.e., prior to end-use processing) to attempt to remove the undesirable defect from the wafer.

[0029] Fig. 3 is a block diagram of an example embodiment of a computing device 300 suitable for use as the computing device 106 shown in Fig. 2.The computing device 300 includes a processor 305 for executing instructions. In some embodiments, executable instructions are stored in a memory area 310. The processor 305 may include one or more processing units (e.g., in a multi-core configuration). The memory area 310 is any device allowing information such as executable instructions and / or data to be stored and retrieved. The memory area 310 may include one or more computer readable storage devices or other computer readable media, including transitory and non-transitory computer readable media.

[0030] In at least some implementations, the computing device 300 also includes at least one media output component 315 for presenting information to a user 301. The media output component 315 is any component capable of conveying information to the user 301. In some embodiments, the media output component 315 includes an output adapter such as a video adapter and / or an audio adapter. An output adapter is operatively connected to the processor 305 and operatively connectable to an output device such as a display device (e.g., a liquid crystal display (LCD), organic light emitting diode (OLED) display, cathode ray tube (CRT), or “electronic ink” display) or an audio output device (e.g., a speaker or headphones). In some embodiments, at least one such display device and / or audio device is included in the media output component 315.

[0031] In some embodiments, the computing device 300 includes an input device 320 for receiving input from the user 301. The input device 320 may include, for example, a keyboard, a pointing device, a mouse, a stylus, a touch sensitive panel (e.g., a touch pad or a touch screen), a gyroscope, an accelerometer, a position detector, or an audio input device. A single component such as a touch screen mayfunction as both an output device of the media output component 315 and the input device 320.

[0032] The computing device 300 also includes a communication interface 325, which may be communicatively connected to one or more remote devices, including the surface inspection tool 104 (Fig. 2). The communication interface 325 may include, for example, a wired or wireless network adapter or a wireless data transceiver for use with a mobile phone network (e.g., Global System for Mobile communications (GSM), 3G, 4G or Bluetooth) or other mobile data network (e.g., Worldwide Interoperability for Microwave Access (WIMAX)). Although a single communication interface is shown, the computing device 300 may include any number of communication interfaces 325.

[0033] Stored in the memory area 310 are, for example, processorexecutable instructions for providing a user interface to the user 301 via media output component 315 and, optionally, receiving and processing input from the input device 320. The memory area 310 may include, but is not limited to, any computer-operated hardware suitable for storing and / or retrieving processor-executable instructions and / or data. The memory area 310 may include random access memory (RAM) such as dynamic RAM (DRAM) or static RAM (SRAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable readonly memory (EEPROM), and non-volatile RAM (NVRAM). Further, the memory area 310 may include multiple storage units such as hard disks or solid state disks in a redundant array of inexpensive disks (RAID) configuration. The memory area 310 may include a storage area network (SAN) and / or a network attached storage (NAS) system.In some embodiments, the memory area 310 includes memory that is integrated in the computing device 300. For example, the computing device 300 may include one or more hard disk drives as the memory area 310. The memory area 310 may also include memory that is external to the computing device 300 and may be accessed by a plurality of computing devices. The above memory types are exemplary only, and are thus not limiting as to the types of memory usable for storage of processor-executable instructions and / or data.

[0034] In some embodiments, the computing device 300 or one or more components of the computing device may be implemented in a cloud computing environment and may be located remote from the rest of the system 100. Thus, for example, the computing device 300 may be a cloud-based computing device or may be a physical computing device using cloud-based storage for all or part of its memory area 310. Cloud computing is a model of service delivery for enabling convenient, on- demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal management effort or interaction with a provider of the service. As used herein, the term “cloud computing” and related terms, e.g., “cloud computing devices” refers generally to a computer architecture allowing for the use of multiple heterogeneous computing devices for data storage, retrieval, and processing. The heterogeneous computing devices may use a common network or a plurality of networks so that some computing devices are in networked communication with one another over a common network but not all computing devices. In other words, aplurality of networks may be used in order to facilitate the communication between and coordination of all computing devices.

[0035] Fig. 4 is an example of a portion of a light-based surface inspection tool 400 usable as the surface inspection tool 104 shown in Fig. 2. The tool 400 includes an optical subsystem configured to acquire output for potential defects on a wafer 102. The output is acquired by different combinations of illumination and collection channels of the optical subsystem. The optical subsystem in this example includes two illumination channels. A first illumination channel is configured to generate light 402 and directs the light 402 to wafer 102 at an oblique angle of incidence. The angle of incidence may vary depending on, for example, the characteristics of the light and the characteristics of the wafer. One suitable angle of incidence may be about 70° from normal to the upper surface of the wafer.

[0036] In this example embodiment, the optical subsystem also includes a second illumination channel, to generate light 404, which is directed by the to wafer 102 at a substantially normal angle of incidence. The first and second illumination channels may include a number of optical components (not shown) positioned in the path of light 402 and 404 such as folding mirror(s), beam splitter(s), polarizing component(s), filter(s), and lenses to allow the channel to function as described herein.

[0037] The light sources used to generate light 402 and 404 may include any suitable light sources, including lasers. In some embodiments, the system may include a single light source that is used to provide light 402 and 404, for example, using a beam splitter.

[0038] Wafer 102 is supported on a stage (not shown), which may be rotated and translated such that light 402 and 404 illuminates an area or spot on the wafer that moves in a spiral path. Alternatively, light 402 and 404 may be scanned over the wafer.

[0039] Illumination of the wafer 102 will cause scattering of the light from the wafer. The tool 400 includes a detection subsystem that is configured to collect and detect light scattered from the wafer (e.g., light scattered from defects on the wafer) and to generate output responsive to the scattered light.

[0040] The detection subsystem includes two different collection channels. A first collection channel includes lens collector 406, mirror 408, and detector 410, which forms a “narrow” angle collection channel of the detection subsystem. Light scattered from the illuminated area on the wafer along directions relatively close to normal to the surface of the wafer is collected and focused by lens collector 406. Lens collector 406 directs the collected light to mirror 408, which directs the light to detector 410. The narrow channel is configured as a dark field (DF) channel. In the example embodiment, detector 410 includes a photomultiplier tube (PMT), but may include any suitable detectors in other embodiments.

[0041] A second collection channel of the detection subsystem includes ellipsoidal mirror 412 and detector 414, which form a “wide” angle collection. Light scattered from the illuminated area on the wafer along directions relatively far from normal to the surface of the wafer is collected and focused by ellipsoidal mirror 412. Ellipsoidal mirror 412 directs the collected light to detector 414. The wide channel is configured as a DF channel. In the example embodiment, detector 414 includes aPMT, but may include any suitable detectors in other embodiments. The wide angle and narrow angle collection channels of the detection subsystem may include other optical components (not shown or not labeled). For example, one or more polarizing components, spatial filter, or the like may be included. [Inventors: Is the DF output you are using in your invention the wide angle, narrow angle, or some combination of the two?]

[0042] In some embodiments, the optical subsystem of the tool 400 includes a combination of illumination and collection channels configured for bright field (BF) differential interference contrast (DIC). In BF DIC technology, phase difference reveals height or slope information, which can be used to identify relatively low spatial frequency defects that are relatively large, flat, or shallow and may not be detected by DF. BF DIC technology will be explained with reference to Fig. 5. Fig. 5 shows an example surface 500 of wafer 102, example illumination beams 502 and 504 output by tool 400 and output (signals) 506 acquired by the surface inspection tool 400 for various points on the wafer surface. The wafer surface shown in Fig. 5 is an arbitrary wafer surface having different topography at sections A, B, and C across the wafer surface. BF DIC is performed by scanning beams 502 and 504 across wafer surface 500. Beams 502 and 504 are reflected from the wafer surface pass through prism 507 (e.g., a Nomarski prism or the like), which combines orthogonal wave fronts to generate beam 508. Beam 508 may pass through an analyzer (not shown) configured to pass only those components parallel to the transmission azimuth of the analyzer. Those parallel wavefronts that pass through the analyzer are able to interfere with each other thereby producing interference that can be detected by a detector (not shown).

[0043] The output signal 506 generated by detection of the beam 508 varies depending on the topography of the wafer surface 500. In particular, portions of the wafer surface that are substantially planar (e.g., section A), portions of the wafer surface that have a convex topography (e.g., section B), and portions that have a convex topography (e.g., portion C) will produce different BF DIC signals. Moreover, the period of the output wave may be used to determine the size of the potential defect and the amplitude of the output signal corresponds to the size / height of the potential defect. As such, output generated by BF DIC may be used to identify relatively low spatial frequency defects that are relatively large, flat, or shallow and may not be detected by DF.

[0044] This written description uses examples to disclose the invention, including the best mode, and also to enable any person skilled in the art to practice the invention, including making and using any devices or systems and performing any incorporated methods. The patentable scope is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal languages of the claims.

[0045] As used herein, the terms “about,” “substantially,” “essentially” and “approximately” when used in conjunction with ranges of dimensions, concentrations, temperatures or other physical or chemical properties or characteristics is meant to cover variations that may exist in the upper and / or lower limits of the rangesof the properties or characteristics, including, for example, variations resulting from rounding, measurement methodology or other statistical variation.

[0046] When introducing elements of the present disclosure or the embodiment(s) thereof, the articles “a”, “an”, “the” and "said" are intended to mean that there are one or more of the elements. The terms “comprising,” “including,” “containing” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements. The use of terms indicating a particular orientation (e.g., “top”, “bottom”, "side", etc.) is for convenience of description and does not require any particular orientation of the item described.

[0047] As various changes could be made in the above constructions and methods without departing from the scope of the disclosure, it is intended that all matter contained in the above description and shown in the accompanying drawing[s] shall be interpreted as illustrative and not in a limiting sense.

Claims

WHAT IS CLAIMED IS:

1. A method of analyzing a surface of a wafer, the method comprising: receiving, from a light based surface inspection tool, a first set of data produced by the surface inspection tool with respect to the surface of the wafer and a second set of data produced by the surface inspection tool with respect to the surface of the wafer, the first set of data corresponding to a first channel of the surface inspection tool and the second set of data corresponding to a second channel of the surface inspection tool and being different than the first set of data; determining whether or not an undesirable surface defect exists on the surface of the wafer based at least in part on the first set of data and the second set of data; and sorting the wafer based on the determination by: sorting the wafer for end use processing when it is determined that an undesirable surface defect does not exist on the surface of the wafer; and sorting the wafer for further front-end processing when it is determined that an undesirable surface defect does exist on the surface of the wafer.

2. The method of claim 1, wherein the surface inspection tool is anSPx tool.

3. The method of any one preceding claim, wherein the first channel is a dark field (DF) channel and the second channel is a bright field (BF) channel.

4. The method of any one preceding claim, wherein the first data set and the second data set each identify one or more potential defects on the surface of the wafer and a location of the one or more potential defects on the surface of the wafer.

5. The method of claim 4, wherein determining whether or not the undesirable surface defect exists on the surface of the wafer comprises determining whether or not the undesirable surface defect exists on the surface of the wafer based at least in part on the location of the one or more potential defects in the first data set relative to the location of the one or more potential defects in the second data set.

6. The method of claim 4, wherein determining whether or not the undesirable surface defect exists on the surface of the wafer comprises: i) selecting all potential defects on the surface of the wafer in the first channel that have a size greater than or equal a size threshold; ii) selecting all potential defects in the second data set; and iii) identifying as undesirable surface defects any of the selected potential defects from the first channel and the second channel that are less than a threshold distance from each other.

7. The method of claim 6, wherein the threshold distance is one millimeter (mm) and the size threshold is 0.16 micrometers (pm).

8. A system for analyzing a surface of a wafer, the system comprising: a computing device including a processor and a memory, the memory storing instructions that when executed by the processor program the processor to: receive, from a light based surface inspection tool, a first set of data produced by the surface inspection tool with respect to the surface of the wafer and a second set of data produced by the surface inspection tool with respect to the surface of the wafer, the first set of data corresponding to a first channel of the surface inspection tool and the second set of data corresponding to a second channel of the surface inspection tool and being different than the first set of data; determine whether or not an undesirable surface defect exists on the surface of the wafer based at least in part on the first set of data and the second set of data; and sort the wafer based on the determination by: sorting the wafer for end use processing when it is determined that an undesirable surface defect does not exist on the surface of the wafer; and sorting the wafer for further front-end processing when it is determined that an undesirable surface defect does exist on the surface of the wafer.

9. The system of claim 8, wherein the surface inspection tool is an SPx tool, the first channel is a dark field (DF) channel, and the second channel is a bright field (BF) channel.

10. The system of any one claim of claims 8 and 9, wherein the first data set and the second data set each identify one or more potential defects on the surface of the wafer and a location of the one or more potential defects on the surface of the wafer.

11. The system of claim 10, wherein the instructions program the processor to determine whether or not the undesirable surface defect exists on the surface of the wafer by determining whether or not the undesirable surface defect exists on the surface of the wafer based at least in part on the location of the one or more potential defects in the first data set relative to the location of the one or more potential defects in the second data set.

12. The system of claim 10, wherein the instructions program the processor to determine whether or not the undesirable surface defect exists on the surface of the wafer by: i) selecting all potential defects on the surface of the wafer in the first channel that have a size greater than or equal to a size threshold; ii) selecting all potential defects in the second data set; andiii) identifying as undesirable surface defects any of the selected potential defects from the first channel and the second channel that are less than a threshold distance from each other.

13. The system of claim 12, wherein the threshold distance is one millimeter (mm) and the size threshold is 0.16 micrometers (pm).

14. The system of claim any one claim of claims 8-13, further comprising the surface inspection tool.

15. A non-transitory computer readable medium storing instructions that when executed by a processor program the processor to: receive, from a light based surface inspection tool, a first set of data produced by the surface inspection tool with respect to the surface of a wafer and a second set of data produced by the surface inspection tool with respect to the surface of the wafer, the first set of data corresponding to a first channel of the surface inspection tool and the second set of data corresponding to a second channel of the surface inspection tool and being different than the first set of data; determine whether or not an undesirable surface defect exists on the surface of the wafer based at least in part on the first set of data and the second set of data; and sort the wafer based on the determination by: sorting the wafer for end use processing when it is determined that an undesirable surface defect does not exist on the surface of the wafer; andsorting the wafer for further front-end processing when it is determined that an undesirable surface defect does exist on the surface of the wafer.

16. The non-transitory computer readable medium of claim 15, wherein the surface inspection tool is an SPx tool, the first channel is a dark field (DF) channel, and the second channel is a bright field (BF) channel.

17. The non-transitory computer readable medium of one of claims 15 and 16, wherein the first data set and the second data set each identify one or more potential defects on the surface of the wafer and a location of the one or more potential defects on the surface of the wafer.

18. The non-transitory computer readable medium of claim 17, wherein the instructions program the processor to determine whether or not the undesirable surface defect exists on the surface of the wafer by determining whether or not the undesirable surface defect exists on the surface of the wafer based at least in part on the location of the one or more potential defects in the first data set relative to the location of the one or more potential defects in the second data set.

19. The non-transitory computer readable medium of claim 17, wherein the instructions program the processor to determine whether or not the undesirable surface defect exists on the surface of the wafer by: i) selecting all potential defects on the surface of the wafer in the first channel that have a size greater than or equal to a size threshold;ii) selecting all potential defects in the second data set; and iii) identifying as undesirable surface defects any of the selected potential defects from the first channel and the second channel that are less than a threshold distance from each other.

20. The non-transitory computer readable medium of claim 19, wherein the threshold distance is one millimeter (mm) and the size threshold is 0.16 micrometers (pm).

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