Light-emitting device and image display device

Abstract

The present invention provides a light-emitting device in which the effects of heavy metal contamination are suppressed. A light-emitting device according to an embodiment of the present disclosure comprises: a first substrate having a first surface and one or more semiconductor elements; a second substrate having a second surface joined to the first surface and one or more light-emitting elements each containing a heavy metal; and one or more shielding bodies that impede the permeation of heavy metals. The one or more shielding bodies are provided in a region between the first surface of the first substrate and the one or more semiconductor elements, and / or in a region between the second surface of the second substrate and the one or more light-emitting elements.

Description

Light-emitting device and image display device

[0001] The present disclosure relates to a light-emitting device and an image display device including the light-emitting device.

[0002] To date, for example, an image display element has been proposed in which a drive circuit board and a micro light-emitting element are bonded via a P-side electrode and an N-side electrode, and the bonding surface is flattened by an insulating film (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2020-088383

[0004] In a light-emitting device in which an element substrate including an LED (Light Emitting Diode) or the like and a drive circuit substrate including a silicon substrate or the like are hybrid-bonded, heavy metals may diffuse from the element substrate side to the drive circuit substrate side, and there is a concern that the reliability of a silicon substrate contaminated with heavy metals may decrease.

[0005] A light-emitting device according to one embodiment of the present disclosure comprises a first substrate having a first surface and one or more semiconductor elements, a second substrate having a second surface bonded to the first surface and one or more light-emitting elements each containing a heavy metal, and one or more shields that prevent the heavy metal from passing through, the one or more shields being provided in at least one of a region on the first substrate between the first surface and the one or more semiconductor elements and a region on the second substrate between the second surface and the one or more light-emitting elements.

[0006] An image display device according to an embodiment of the present disclosure includes a light-emitting device, and the light-emitting device includes the light-emitting device according to the embodiment of the present disclosure.

[0007] In the light-emitting device and image display device according to an embodiment of the present disclosure, a shield that prevents heavy metals from passing through is provided near the bonding surface between the first substrate and the second substrate, thereby preventing heavy metals contained in the second substrate from penetrating into one or more semiconductor elements.

[0008] FIG. 1 is a cross-sectional view illustrating an example of a configuration of a light-emitting device according to an embodiment of the present disclosure. FIG. 2 is a functional block diagram illustrating an example of a configuration of a light-emitting device. FIG. 3A is a schematic view illustrating an example of a planar configuration of an element substrate of the light-emitting device illustrated in FIG. 1. FIG. 3B is a schematic view illustrating an example of a planar configuration of an analog substrate of the light-emitting device illustrated in FIG. 1. FIG. 3C is a schematic view illustrating an example of a planar configuration of a logic substrate of the light-emitting device illustrated in FIG. 1. FIG. 4 is a schematic view illustrating an enlarged view of a portion of the planar configuration of the wiring layer, second pad, and second shield illustrated in FIG. 1. FIG. 5 is a schematic view illustrating an enlarged view of a portion of the planar configuration of the first via, wiring layer, and third shield illustrated in FIG. 1. FIG. 6A is a cross-sectional view illustrating an example of a manufacturing process for the light-emitting device illustrated in FIG. 1. FIG. 6B is a cross-sectional view illustrating a process subsequent to FIG. 6A. FIG. 6C is a cross-sectional view illustrating a process subsequent to FIG. 6B. FIG. 6D is a cross-sectional view illustrating a process subsequent to FIG. 6C. FIG. 6E is a cross-sectional view illustrating a process subsequent to FIG. 6D. 6F is a schematic cross-sectional view showing a step subsequent to FIG. 6E. FIG. 6G is a schematic cross-sectional view showing a step subsequent to FIG. 6F. FIG. 7 is a schematic cross-sectional view showing an example of the configuration of a light-emitting device according to Modification 1 of the present disclosure. FIG. 8 is a schematic cross-sectional view showing an example of the configuration of a light-emitting device according to Modification 2 of the present disclosure. FIG. 9A is a schematic plan view showing an example of the configuration of a light-emitting device according to Modification 3 of the present disclosure. FIG. 9B is a schematic plan view showing another example of the configuration of a light-emitting device according to Modification 3 of the present disclosure. FIG. 10A is a front view showing an example of the appearance of a digital still camera as an application example of the present disclosure. FIG. 10B is a rear view showing an example of the appearance of the digital still camera shown in FIG. 10A. FIG. 11A is a perspective view showing the appearance of an example of a head-mounted display as an application example of the present disclosure. FIG. 11B is a perspective view showing the appearance of another example of a head-mounted display as an application example of the present disclosure. FIG. 12 is a perspective view showing an example of the appearance of a television device as an application example of the present disclosure.

[0009] An embodiment of the present disclosure will be described in detail below with reference to the drawings. The following description is a specific example of the present disclosure, and the present disclosure is not limited to the following embodiment. Furthermore, the present disclosure is not limited to the arrangement, dimensions, dimensional ratios, etc. of the components shown in the drawings. The description will be given in the following order: 1. Embodiment (Example of a light emitting device in which a shield is provided near the junction surface of a hybrid junction) 1-1. Configuration of the light emitting device 1-2. Method of manufacturing the light emitting device 1-3. Actions and effects 2. Modifications 2-1. Modification 1 (Another example of a light emitting device) 2-2. Modification 2 (Another example of a light emitting device) 2-3. Modification 3 (Another example of a light emitting device) 3. Application examples

[0010] 1 is a schematic diagram illustrating an example of a cross-sectional configuration of a light-emitting device (light-emitting device 1) according to an embodiment of the present disclosure. The light-emitting device 1 is suitable for use in an image display device known as an LED display (e.g., an electronic viewfinder 1124 of a digital still camera 1120, see FIG. 10B ).

[0011] [1-1. Configuration of the Light-Emitting Device] The light-emitting device 1 has a layered structure in which, for example, a logic substrate 30, an analog substrate 20, an element substrate 10, and an optical unit 40 are stacked in this order in the Z-axis direction, which is the thickness direction perpendicular to the XY plane. In the light-emitting device 1, the element substrate 10, the analog substrate 20, and the logic substrate 30 are electrically connected to each other, for example, by hybrid junction. The element substrate 10 has, for example, a display area 100A in which a plurality of light-emitting elements 11 are arranged in a two-dimensional array, and a frame area 100B provided around the display area 100A. The analog substrate 20 and the logic substrate 30 are provided with drive circuits that control the drive of the plurality of light-emitting elements 11 arranged in the display area 100A. The analog substrate 20 and the logic substrate 30 are each provided with circuits having different functions. The analog substrate 20 is stacked so that a surface 20S1 faces a surface 10S1 of the element substrate 10. The logic substrate 30 is stacked so that its surface 30S1 faces the surface 20S2 of the analog substrate 20. The element substrate 10 corresponds to a specific example of a "second substrate" as one aspect of the present disclosure. The multiple light-emitting elements 11 correspond to a specific example of "one or more light-emitting elements" as one aspect of the present disclosure. The analog substrate 20 corresponds to a specific example of a "first substrate" as one aspect of the present disclosure. The logic substrate 30 corresponds to a specific example of a "third substrate" as one aspect of the present disclosure. The surface 10S1 corresponds to a specific example of a "second surface" as one aspect of the present disclosure. The surface 20S1 corresponds to a specific example of a "first surface" as one aspect of the present disclosure.

[0012] 2 is a functional block diagram showing an example of the configuration of the light emitting device 1. The light emitting device 1 includes, for example, an interface 1001, a timing generation circuit (TCON) 1002, a memory 1003, a V-logic circuit 1004, a logic circuit 1005, a V-analog circuit 1006, an H-logic circuit 1007, and an H-analog circuit 1008.

[0013] The TCON 1002 generates various timing signals such as a start signal and a clock signal for driving the internal circuit of the light emitting device 1 .

[0014] The memory 1003 stores, for example, video signals and non-uniformity correction data.

[0015] The V-logic circuit 1004 is composed of, for example, a shift register that generates signals to drive the pixels P, an address decode circuit, and the like.

[0016] The logic circuit 1005 is composed of, for example, a video signal processing circuit, a gamma correction circuit, a brightness adjustment circuit, and a non-uniformity correction circuit.

[0017] The V-analog circuit 1006 is composed of, for example, a level shifter that converts the voltage level into a voltage suitable for driving the pixel P.

[0018] The H-logic circuit 1007 may have a built-in address decode circuit that latches the video signal for one horizontal line and supplies it to the H-analog circuit 1008, and may be configured to latch partially.

[0019] For example, in the case of a pulse amplitude modulation (PAM) system, the H-analog circuit 1008 converts the supplied digital signal into an analog signal and transmits it to the pixel P. For example, in the case of a pulse width modulation (PWM) system, the H-analog circuit 1008 pulse-width-modulates the supplied digital signal and transmits it to the pixel P.

[0020] The light emitting device 1 is connected to an external video supply device, such as a computer such as a PC (not shown) or various image players, via an interface 1001. The light emitting device 1 processes the video signal input to the interface 1001 as shown in Fig. 2. The pixel P receives the video signal that has been signal processed by the TCON 1002, memory 1003, V-logic circuit 1004, logic circuit 1005, V-analog circuit 1006, H-logic circuit 1007, and H-analog circuit 1008.

[0021] 3A to 3C are schematic diagrams showing an example of the planar configuration of the element substrate 10, analog substrate 20, and logic substrate 30 that constitute the light emitting device 1. FIG.

[0022] 3A, the element substrate 10 has a display area 100A in which a plurality of pixels P are arranged in a two-dimensional array, and a frame area 100B surrounding the display area 100A. The frame area 100B is provided with external connection terminals 61 to be connected to, for example, an external power supply.

[0023] The circuits mounted on the analog substrate 20 and the logic substrate 30 are distinguished, for example, by their drive voltages. For example, the analog substrate 20 is equipped with circuits having a higher drive voltage than the circuits mounted on the logic substrate 30. For example, the interface 1001, TCON 1002, memory 1003, V-logic circuit 1004, logic circuit 1005, V-analog circuit 1006, H-logic circuit 1007, and H-analog circuit 1008 are separately mounted on the analog substrate 20 and the logic substrate 30, for example, as shown in FIG. 3B . The analog substrate 20 further includes a drive circuit for controlling the drive of the plurality of light-emitting elements 11 at a position corresponding to the display region 100A provided on the element substrate 10, and the V-analog circuit 1006 and H-analog circuit 1008 are respectively disposed at positions corresponding to the frame region 100B provided on the element substrate 10. The logic board 30 is mounted with an interface 1001, a TCON 1002, a memory 1003, a V-logic circuit 1004, a logic circuit 1005, and an H-logic circuit 1007, as shown in FIG. 3C, for example.

[0024] (Configuration of Element Substrate 10) The element substrate 10 includes a plurality of light-emitting elements 11, one or more embedded layers 12, one or more insulating layers 14, one or more insulating layers 16, and one or more shields 17. The element substrate 10 is bonded to the analog substrate 20 at a surface 10S1. The element substrate 10 further includes one or more vias 13 extending in the Z-axis direction and one or more pads 15 electrically connected to the one or more light-emitting elements 11 via the one or more vias 13 and exposed on the surface 10S1 of the element substrate 10. The vias 13 correspond to a specific example of a "second via" as one aspect of the present disclosure. The pads 15 correspond to a specific example of a "second pad" as one aspect of the present disclosure. The insulating layer 16 corresponds to a specific example of a "second insulating layer" as one aspect of the present disclosure. The shields 17 correspond to a specific example of "one or more light shields" as one aspect of the present disclosure.

[0025] The light-emitting element 11 is a solid-state light-emitting element that emits light in a predetermined wavelength band from its upper surface, such as an LED (Light Emitting Diode) chip. The LED chip refers to an element cut from a wafer used for crystal growth, and is not a packaged type covered with molded resin or the like. The LED chip is, for example, 100 μm or less in size and is known as a micro LED.

[0026] The light emitting element 11 includes a laminated structure in which a contact layer 111 and a compound semiconductor layer 112 are laminated in this order from the analog substrate 20 side.

[0027] The contact layer 111 is in ohmic contact with the compound semiconductor layer 112. The contact layer 111 is formed using a heavy metal with a specific gravity of 4 or more. The contact layer 111 is formed using, for example, a multilayer film (Au / Pt) of gold (Au) and platinum (Pt).

[0028] The compound semiconductor layer 112 is formed of a compound semiconductor material such as InGaN, AlGaInP, AlGaAs, or GaP. Light in the blue band of, for example, 430 nm or more and 500 nm or less is extracted from the compound semiconductor layer 112. Light with a wavelength corresponding to, for example, the ultraviolet region (ultraviolet light) may also be extracted from the compound semiconductor layer 112.

[0029] The embedded layer 12 is provided so as to cover the plurality of light-emitting elements 11. The embedded layer 12 is intended to flatten the surface of the element substrate 10 facing the optical section 40. The embedded layer 12 is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), titanium oxide (TiO), or the like.

[0030] The via 13 is provided in contact with the contact layer 111, and electrically connects the light emitting element 11 and the analog substrate 20. The via 13 is formed using, for example, copper (Cu), aluminum (Al), tungsten (W), silver (Ag), or an alloy thereof.

[0031] The insulating layer 14 is provided so as to fill the gaps between the contact layer 111 and the via 13. The insulating layer 14 is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), titanium oxide (TiO), or the like.

[0032] A plurality of pads 15 are embedded in the insulating layer 16. The pads 15 are formed using, for example, copper (Cu), aluminum (Al), tungsten (W), silver (Ag), or an alloy thereof.

[0033] The insulating layer 16 occupies the periphery of the pad 15 and is exposed on the surface 10S1 of the element substrate 10. The insulating layer 16 is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), titanium oxide (TiO), or the like.

[0034] The shield 17 prevents heavy metals contained in the contact layer 111 of the element substrate 10 from penetrating into the analog substrate 20. The shield 17 is provided in the region between the surface 10S1 of the element substrate 10 and the light emitting element 11. Furthermore, in the light emitting device 1 of FIG. 1, for example, the shield 17 is provided in the region between the pad 15 and the light emitting element 11. The shield 17 includes a portion that overlaps with a part of the pad 15 in the Z-axis direction. The shield 17 is made of a material that captures heavy metals, that is, performs so-called gettering. The shield 17 can be made of, for example, polysilicon, silicon nitride (SiN), silicon carbonitride (SiCN), aluminum oxide (Al ２ O ３ The insulating film may be composed of a single layer or a multilayer film including at least one of titanium dioxide (TiO 3 ) and titanium nitride (TiN).

[0035] (Configuration of Analog Substrate 20) As described above, the analog substrate 20 is provided with a drive circuit that controls the V-analog circuit 1006, the H-analog circuit 1008, and the drive circuits that control the drive of the plurality of light-emitting elements 11 arranged in the display region 100A. The analog substrate 20 includes one or more semiconductor layers 211, a plurality of through vias 212, one or more insulating layers 22, a plurality of wiring layers 23, one or more insulating layers 24, one or more insulating layers 26, a plurality of wiring layers 27, a plurality of pads 28, and one or more shields 291, 292. The analog substrate 20 has a surface 20S1 and a surface 20S2 that faces the surface 20S1. The analog substrate 20 is bonded to the element substrate 10 at the surface 20S1. The analog substrate 20 further includes one or more vias 251 extending in the Z-axis direction intersecting with the surface 20S1, and one or more pads 252 electrically connected to the semiconductor layer 211 via the one or more vias 251 and exposed on the surface 20S1. The semiconductor layer 211 corresponds to a specific example of "one or more semiconductor elements" according to one aspect of the present disclosure. The via 251 corresponds to a specific example of "first via" according to one aspect of the present disclosure. The pad 252 corresponds to a specific example of "first pad" according to one aspect of the present disclosure. The insulating layer 24 corresponds to a specific example of "first insulating layer" according to one aspect of the present disclosure. The shields 291 and 292 correspond to a specific example of "one or more shields" according to one aspect of the present disclosure.

[0036] The semiconductor layer 211 has a surface 211S1 facing the element substrate 10. The semiconductor layer 211 is formed using, for example, silicon (Si).

[0037] The through via 212 penetrates the semiconductor layer 211 and the shield 292, and electrically connects the wiring layer 23 and the wiring layer 27. The through via 212 is formed using, for example, copper (Cu), aluminum (Al), tungsten (W), silver (Ag), or an alloy thereof.

[0038] The insulating layer 22 is provided so as to fill gaps between the plurality of wiring layers 23. The insulating layer 22 is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), titanium oxide (TiO), or the like.

[0039] The wiring layers 23, 27 and the vias electrically connecting between the respective wiring layers are formed using, for example, copper (Cu), tantalum (Ta), cobalt (Co), titanium (Ti), aluminum (Al), tungsten (W), silver (Ag), or alloys thereof. Alternatively, the wiring layers 23, 27 and the vias electrically connecting between the respective wirings can be formed using, for example, tantalum nitride (TaN) or titanium nitride (TiN).

[0040] The insulating layer 24 is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), titanium oxide (TiO), etc. The insulating layer 24 occupies the periphery of the pad 252 and is exposed on the surface 20S1 of the analog substrate 20. The insulating layer 24 is bonded to the insulating layer 16 of the element substrate 10.

[0041] The via 251 penetrates the shield 291 and is provided in contact with the wiring layer 23 and the pad 252. The via 251 is formed using, for example, copper (Cu), aluminum (Al), tungsten (W), silver (Ag), or an alloy thereof.

[0042] A plurality of pads 252 are embedded in the insulating layer 24. The pads 252 are formed using, for example, copper (Cu), aluminum (Al), tungsten (W), silver (Ag), or an alloy thereof.

[0043] The insulating layer 26 is provided so as to fill gaps between the wiring layers 27 and the pads 28. The insulating layer 26 is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), titanium oxide (TiO), or the like. The insulating layer 26 occupies the periphery of the pads 28 and is exposed on the surface 20S2 of the analog substrate 20.

[0044] The pads 28 are electrically connected to the semiconductor layer 211 through vias in the wiring layer 27 and are exposed on the surface 20S2. The pads 28 are formed using, for example, copper (Cu), aluminum (Al), tungsten (W), silver (Ag), or alloys thereof.

[0045] Fig. 4 is a schematic diagram showing an enlargement of a part of the planar configuration of the via 251, the pad 252, and the shield 291 shown in Fig. 1. Fig. 5 is a schematic diagram showing an enlargement of a part of the planar configuration of the through via 212, the wiring layer 23, and the shield 292 shown in Fig. 1.

[0046] The shield 291 prevents heavy metals contained in the contact layer 111 of the element substrate 10, etc., from penetrating into the semiconductor layer 211 of the analog substrate 20. The shield 291 is provided in the region between the surface 20S1 of the analog substrate 20 and the semiconductor layer 211. Furthermore, in the light-emitting device 1 of FIG. 1, for example, the shield 291 is provided in the region between the pad 252 and the semiconductor layer 211. As shown in FIGS. 1 and 4, the shield 291 includes a portion that overlaps with a part of the pad 252 in the Z-axis direction. The shield 291 is made of a material that captures heavy metals, that is, performs so-called gettering. The shield 291 can be made of, for example, polysilicon, silicon nitride (SiN), silicon carbonitride (SiCN), aluminum oxide (Al ２ O ３The insulating layer may have a single layer structure containing at least one of titanium dioxide (TiO 3 ) and titanium nitride (TiN), or may have a multilayer structure in which a plurality of layers each containing at least one of these materials are stacked.

[0047] The shield 292 is provided to cover the surface 211S1 of the semiconductor layer 211. As shown in FIGS. 1 and 5 , the shield 292 includes a portion that overlaps with a part of the wiring layer 23 in the Z-axis direction. The shield 292 is made of a material that captures heavy metals, that is, performs so-called gettering. The shield 292 includes either carbon or phosphorus.

[0048] (Configuration of Logic Board 30) As described above, the logic board 30 has the interface 1001, the TCON 1002, the memory 1003, the V-logic circuit 1004, the logic circuit 1005, and the H-logic circuit 1007. The logic board 30 is provided on the side of the analog board 20 opposite the element board 10. The logic board 30 has a support board 31 made of, for example, silicon (Si). An interlayer insulating layer 32 including a plurality of wiring layers (for example, wiring layer 33) is provided on the support board 31, and a plurality of pads 34 are exposed on the bonding surface (surface 30S1) of the interlayer insulating layer 32 that is bonded to the analog board 20.

[0049] The interlayer insulating layer 32 is made of, for example, silicon oxide (SiO) or silicon nitride (SiN).

[0050] The wiring layer 33 and the vias electrically connecting the wiring layers are formed using, for example, copper (Cu), tantalum (Ta), cobalt (Co), titanium (Ti), aluminum (Al), tungsten (W), silver (Ag), or alloys thereof. Alternatively, the wirings M1, ..., Mn and the vias electrically connecting the wirings can be formed using, for example, tantalum nitride (TaN) or titanium nitride (TiN). The pads 34 are formed using, for example, copper (Cu) or gold (Au). The pads 34 are bonded to the pads 28 of the analog substrate 20.

[0051] The element substrate 10, analog substrate 20, and logic substrate 30 are electrically connected to each other by hybrid bonding. Specifically, the element substrate 10 and analog substrate 20 are electrically connected by bonding together a plurality of pads 15 and a plurality of pads 252 provided on the opposing surfaces 10S2 and 20S1, respectively. The analog substrate 20 and logic substrate 30 are electrically connected by bonding together a plurality of pads 28 and a plurality of pads 34 provided on the opposing surfaces 20S2 and 30S1, respectively. As described above, the plurality of pads 15, 252, 28, and 34 are formed using, for example, copper (Cu). In other words, the element substrate 10, analog substrate 20, and logic substrate 30 are electrically connected to each other by Cu-Cu bonding.

[0052] (Configuration of Optical Unit 40) The optical unit 40 is provided on the side of the element substrate 10 opposite to the analog substrate 20. The optical unit 40 is provided with a protective layer 41 and an on-chip lens layer 42 in this order from the element substrate 10 side.

[0053] The protective layer 41 is for protecting the surface of the light emitting device 1, and is formed using, for example, silicon oxide (SiO) or silicon nitride (SiN).

[0054] The on-chip lens layer 42 is for collecting or diverging light emitted from the plurality of light-emitting elements 11. The on-chip lens layer 42 is made of a light-transmitting material, and is made of, for example, a single-layer film made of any of silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiCN), etc., or a stacked film made of two or more of these materials.

[0055] 1-2. Method for Manufacturing Light-Emitting Device The light-emitting device 1 of this embodiment can be manufactured, for example, as follows: Figures 6A to 6G show an example of a manufacturing process for the light-emitting device 1.

[0056] 6A , analog substrate 20 is fabricated by providing insulating layer 26, into which wiring layer 27 and multiple pads 28 are embedded, on surface 211S2 of semiconductor layer 211. A portion of each of multiple pads 28 is exposed on the surface of insulating layer 26, i.e., the surface of insulating layer 26 opposite to the surface facing semiconductor layer 211. In addition, logic substrate 30 is separately fabricated by providing interlayer insulating layer 32, into which wiring layer 33 and multiple pads 34 are embedded, on support substrate 31.

[0057] 6B, the analog substrate 20 and the logic substrate 30 are bonded together (so-called hybrid bonding) by bonding the pads 28 and the pads 34 together and bonding the insulating layer 26 and the interlayer insulating layer 32 together. Next, as shown in FIG. 6C, the semiconductor layer 211 is thinned, and then carbon ions are implanted into the semiconductor layer 211 from the surface 211S1 or phosphorus is doped into the semiconductor layer 211 to form a shield 292.

[0058] Next, a plurality of through vias 212 are formed penetrating the semiconductor layer 211 and the shield 292. Next, the insulating layer 22 having the plurality of wiring layers 23 embedded therein is bonded to each of the plurality of through vias 212 and each of the plurality of wiring layers 23. Next, as shown in Fig. 6D, a shield 291 having a plurality of vias 251 embedded therein and an insulating layer 24 having a plurality of pads 252 embedded therein are formed in this order on the insulating layer 22.

[0059] Next, an element substrate 10 is separately prepared on a support substrate 51, in which an insulating layer 14 in which a plurality of contact layers 111 and a plurality of vias 13 are embedded, a shield 17, and an insulating layer 16 in which a plurality of pads 15 are embedded are provided in that order. Then, as shown in Fig. 6E, the analog substrate 20 and the element substrate 10 are bonded together so that the pads 252 of the analog substrate 20 and the pads 15 of the element substrate 10 are bonded together (so-called hybrid bonding is performed).

[0060] Next, the support substrate 51 is removed by, for example, grinding and polishing, and then one or more compound semiconductor layers 112 are selectively formed on the exposed contact layers 111. Subsequently, as shown in Fig. 6F, the buried layer 12 is formed by, for example, a chemical vapor deposition (CVD) method so as to cover the one or more compound semiconductor layers 112. This operation flattens the surface 10S2 of the element substrate 10.

[0061] 6G, a protective layer 41 is formed on the surface 10S2 of the element substrate 10 by, for example, a CVD method. After that, an on-chip lens layer 42 is bonded onto the protective layer 41. In this manner, the light-emitting device 1 shown in FIG. 1 is completed.

[0062] [1-3. Actions and Effects] The light emitting device 1 of the present embodiment includes an element substrate 10 having a surface 10S1 and a plurality of light emitting elements 11 each containing a heavy metal, and an analog substrate 20 having a surface 20S1 bonded to surface 10S1 and a semiconductor layer 211. Furthermore, the light emitting device 1 includes shields 18, 291, 292 that prevent the penetration of heavy metals in the region of the element substrate 10 between surface 10S1 and the plurality of light emitting elements 11, and in the region of the analog substrate 20 between surface 20S1 and the semiconductor layer 211. This prevents the heavy metals contained in the element substrate 10 from penetrating into the semiconductor layer 211. This is described below.

[0063] Generally, when electrically connecting different types of substrates, a so-called hybrid bonding method is sometimes used, in which electrode pads formed on the surfaces of the respective insulating layers are bonded together to connect them. In particular, bonding copper (Cu) electrode pads together is called CuCu bonding. This eliminates the need for a connection section compared to bonding using through vias that penetrate both substrates, and enables bonding at a fine pitch. This allows for improved flexibility in the arrangement of pixels, including light-emitting elements, and allows for higher density.

[0064] However, in a light-emitting device in which an element substrate having light-emitting elements made of compound semiconductors is hybrid-bonded to a drive substrate having semiconductor elements containing silicon or the like, there is a concern that heavy metals generated from the contact layer between the element substrate and the light-emitting elements may diffuse into the drive substrate through the bonding surface. If heavy metals penetrate into the drive substrate, for example, leakage current or threshold voltage fluctuations may occur in the semiconductor elements in the drive substrate, or the reliability of the wiring in the drive substrate may be reduced.

[0065] In contrast to this, in the light emitting device 1 of the present embodiment, as described above, the shields 18, 291, 292 that prevent the transmission of heavy metals are provided without any gaps in a plan view in the region between the hybrid-bonded light emitting element 11 of the element substrate 10 and the semiconductor layer 211 of the analog substrate 20. This makes it possible to efficiently prevent the heavy metals contained in the element substrate 10 from penetrating into the semiconductor layer 211. Therefore, the light emitting device 1 of the present embodiment can minimize the deterioration of characteristics and reliability due to heavy metal contamination.

[0066] 2. Modifications Next, modifications 1 to 3 and application examples of the present disclosure will be described. Note that components corresponding to those in the light emitting device 1 of the above embodiment will be assigned the same reference numerals and descriptions thereof will be omitted.

[0067] [2-1. Modification 1] FIG. 7 is a schematic diagram illustrating an example of a cross-sectional configuration of a light-emitting device (light-emitting device 1A) according to Modification 1 of the present disclosure.

[0068] In the light emitting device 1A of this modification, the shield 292a is provided so as to fill the space between the semiconductor layer 211 and the through via 212. Except for the above points, the configuration of the light emitting device 1A is substantially the same as the configuration of the light emitting device 1 of the above embodiment.

[0069] In the manufacturing process of the light emitting device 1A of this modification, after the semiconductor layer 211 is thinned, the through via 212 is formed, and the shield 292a is obtained by self-aligning the semiconductor layer 211 and performing carbon ion implantation or phosphorus doping on the portion of the semiconductor layer 211 surrounding the through via 212. The subsequent manufacturing process is substantially the same as the manufacturing process of the light emitting device 1 of the above embodiment. In the light emitting device 1A of this modification, the shield 292a is also provided between the semiconductor layer 211 and the through via 212, so that it is possible to prevent heavy metals from entering the semiconductor layer 211 from the gap between the semiconductor layer 211 and the through via 212, and thus a higher barrier property is obtained.

[0070] [2-2. Modification 2] FIG. 8 is a schematic diagram illustrating an example of a cross-sectional configuration of a light-emitting device (light-emitting device 1B) according to Modification 2 of the present disclosure.

[0071] In the above embodiment, an example has been shown in which the surface 20S1 (rear surface) of the analog substrate 20 and the surface 10S1 of the element substrate 10 are bonded together, but the present disclosure is not limited to this. In the light emitting device 1B of this modified example, the surface 20S2 of the analog substrate 20 and the surface 10S1 of the element substrate 10 are bonded together. Except for the above points, the configuration of the light emitting device 1B is substantially the same as the configuration of the light emitting device 1 of the above embodiment.

[0072] The light emitting device 1B of this modified example can also achieve the same effects as the light emitting device 1 of the above embodiment. Furthermore, in the light emitting device 1B, the surface 20S2 of the analog substrate 20 and the surface 10S1 of the element substrate 10 are joined together, so that the wiring layer 23 and the wiring layer 27 can be electrically connected with a smaller number of through vias 212 than the number of through vias 212 in the light emitting device 1 of the above embodiment.

[0073] 9A is a schematic diagram illustrating an example of a cross-sectional configuration of a light-emitting device (light-emitting device 1C-1) according to Modification 3 of the present disclosure. FIG. 9B is a schematic diagram illustrating another example of a cross-sectional configuration of a light-emitting device (light-emitting device 1C-2) according to Modification 3 of the present disclosure.

[0074] In the above embodiment, an example has been shown in which the surface 20S1 (rear surface) of the analog substrate 20 is bonded to the surface 10S1 of the element substrate 10, and the analog substrate 20 and the logic substrate 30 are hybrid-bonded, but the present disclosure is not limited to this. In the light-emitting device 1C-1 of this modified example, the surface 20S1 (rear surface) of the analog substrate 20 is bonded to the surface 10S1 of the element substrate 10, and the analog substrate 20 and the logic substrate 30 are electrically connected via a through via 212c that penetrates the analog substrate 20. In the light-emitting device 1C-2 of this modified example, the surface 20S2 of the analog substrate 20 is bonded to the surface 10S1 of the element substrate 10, and the analog substrate 20 and the logic substrate 30 are electrically connected via a through via 212c that penetrates the analog substrate 20.

[0075] Except for the above points, the configuration of the light emitting devices 1C-1 and 1C-2 is substantially the same as the configuration of the light emitting device 1 of the above embodiment. The light emitting devices 1C-1 and 1C-2 having such a configuration can also achieve the same effects as the light emitting device 1 of the above embodiment.

[0076] 3. Application Examples Application Example 1 Fig. 10A is a front view showing an example of the appearance of a digital still camera (electronic device) 1120. Fig. 10B is a rear view showing an example of the appearance of the digital still camera 1120. The digital still camera 1120 is an interchangeable lens single-lens reflex camera. The digital still camera 1120 has an interchangeable taking lens unit (interchangeable lens) 1121 located approximately in the center of the front of a camera main body (camera body) 1122, and a grip portion 1123 for the photographer to hold on the left side of the front.

[0077] A monitor 1126 is provided at a position shifted to the left from the center of the back of the camera body 1122. An electronic viewfinder (eyepiece window) 1124 is provided above the monitor 1126. By looking through the electronic viewfinder 1124, the photographer can visually confirm the optical image of the subject guided by the photographing lens unit 1121 and determine the composition. The electronic viewfinder 1124 is equipped with a light-emitting device 1.

[0078] (Application Example 2) The light-emitting device (e.g., the light-emitting device 1) of the present disclosure can also be applied to a head-mounted display (hereinafter referred to as an HMD). The head-mounted display 1130A can be used for virtual reality (VR), augmented reality (AR), mixed reality (MR), or substitutional reality (SR), etc.

[0079] 11A is a perspective view showing the appearance of a head-mounted display (electronic device) 1130A. The head-mounted display 1130A has, for example, ear hooks 1131 on both sides of a glasses-shaped display unit 1132 for wearing on the user's head. The display unit 1132 is equipped with a light-emitting device 1.

[0080] FIG. 11B is a perspective view showing the appearance of another head-mounted display (electronic device). The head-mounted display is smart glasses 1130B that display various information on glasses 1133. The smart glasses 1130B include a main body, an arm 1135, and a lens barrel 1136. The main body 1134 is connected to the arm 1135. The main body 1134 is detachable from the glasses 1133. The main body 1134 incorporates a control board and a display unit for controlling the operation of the smart glasses 1130B. The main body 1134 and the lens barrel 1136 are connected to each other via the arm 1135. The lens barrel 1136 emits image light emitted from the main body 1134 via the arm 1135 toward the lenses 1137 of the glasses 1133. This image light enters the human eye through the lens 1137. 11B, a wearer of the smart glasses 1130B can visually recognize not only the surrounding situation but also various pieces of information emitted from the lens barrel 1136, as with normal glasses. The main body 1134 includes the light-emitting device 1.

[0081] 13 is a perspective view showing an example of the appearance of a television device (electronic device) 1140. This television device 1140 has, for example, an image display screen unit 1141 including a front panel 1142 and a filter glass 1143. The image display screen unit 1141 is equipped with the light-emitting device 1.

[0082] Although the present technology has been described above with reference to the embodiment, variations 1 to 3, and application examples, the present technology is not limited to the above-described embodiment, etc., and various modifications are possible. For example, in the above-described embodiment, etc., an example has been shown in which the light emitted from the light-emitting element 11 is blue light or ultraviolet light, but the present technology is not limited to this. For example, the light-emitting device 1 may use a light-emitting element that emits two or more types of light, such as blue light and green light, or ultraviolet light and green light.

[0083] Furthermore, in the above embodiments, each component constituting the light emitting device 1 etc. has been specifically listed and described, but it is not necessary to include all components, and other components may also be included.

[0084] In addition, although the above-described embodiments and the like have exemplified a light-emitting device having a three-layer laminated structure including an element substrate, an analog substrate, and a logic substrate, the present disclosure is not limited to this. For example, a two-layer laminated structure including an element substrate and an analog substrate without including a logic substrate may also be used.

[0085] The effects described in this specification are merely examples and are not limited to those described, and other effects may also be obtained.

[0086] The present technology can also be configured as follows. According to the present technology configured as follows, the intrusion of heavy metals contained in a second substrate into one or more semiconductor elements is suppressed, thereby minimizing deterioration of characteristics and reliability due to heavy metal contamination. (1) A light-emitting device comprising: a first substrate having a first surface and one or more semiconductor elements; a second substrate having a second surface bonded to the first surface and one or more light-emitting elements each containing a heavy metal; and one or more shields that prevent the heavy metals from passing through, wherein the one or more shields are provided in at least one of a region of the first substrate between the first surface and the one or more semiconductor elements and a region of the second substrate between the second surface and the one or more light-emitting elements. (2) The light-emitting device according to (1), wherein the first substrate further has one or more first vias extending in a thickness direction intersecting the first surface, and one or more first pads electrically connected to the one or more semiconductor elements via the one or more first vias and exposed on the first surface, the second substrate further has one or more second vias extending in the thickness direction, and one or more second pads electrically connected to the one or more light-emitting elements via the one or more second vias and exposed on the second surface, the one or more first pads and the one or more second pads being bonded together. (3) The light-emitting device according to (2), wherein the first substrate further has a first insulating layer surrounding the one or more first pads and exposed on the first surface, the second substrate further has a second insulating layer surrounding the one or more second pads and exposed on the second surface, the first insulating layer and the second insulating layer being bonded together. (4) The light emitting device according to (2) or (3), wherein the one or more shields are provided in at least one of a region between the first pad and the one or more semiconductor elements and a region between the second pad and the one or more light emitting elements. (5) The light emitting device according to (4), wherein the one or more shields include a portion that overlaps with at least one of the first pad and the second pad in the thickness direction. (6) The light emitting device according to any one of (1) to (5), wherein the one or more shields capture the heavy metals.(7) The light-emitting device according to (6), wherein the one or more shields contain at least one of polysilicon, silicon nitride, silicon carbonitride, aluminum oxide, and titanium nitride. (8) The light-emitting device according to any one of (1) to (7), wherein the one or more shields are provided so as to cover the surfaces of the one or more semiconductor elements facing the first surfaces. (9) The light-emitting device according to (8), wherein the first substrate further has one or more through vias penetrating the one or more semiconductor elements and the one or more shields. (10) The light-emitting device according to (9), wherein the one or more shields contain either carbon or phosphorus. (11) The light-emitting device according to (9) or (10), wherein the first or more shields fill spaces between the one or more semiconductor elements and the one or more through vias. (12) The light-emitting device according to any one of (1) to (11), further comprising a third substrate on the opposite side of the first substrate from the second substrate. (13) The light-emitting device according to (12), wherein the first substrate further has one or more third vias extending in a thickness direction intersecting the first surface and one or more third pads electrically connected to the one or more semiconductor elements via the one or more third vias and exposed on a surface opposite to the first surface, and the third substrate further has one or more fourth pads exposed on a surface bonded to the surface of the first substrate opposite to the first surface, and the one or more third pads and the one or more fourth pads are bonded. (14) An image display device comprising a light-emitting device, the light-emitting device including: a first substrate having a first surface and one or more semiconductor elements, a second substrate having a second surface bonded to the first surface and one or more light-emitting elements each containing a heavy metal, and one or more shields that prevent the heavy metal from passing through, and the one or more shields are provided in at least one of a region of the first substrate between the first surface and the one or more semiconductor elements, and a region of the second substrate between the second surface and the one or more light-emitting elements.

[0087] This application claims priority based on Japanese Patent Application No. 2024-120258, filed on July 25, 2024, in the Japan Patent Office, the entire contents of which are incorporated herein by reference.

[0088] Those skilled in the art will recognize that various modifications, combinations, subcombinations, and variations may occur depending on design requirements and other factors, and are intended to be within the scope of the appended claims and their equivalents.

Claims

1. A light-emitting device comprising: a first substrate having a first surface and one or more semiconductor elements; a second substrate having a second surface bonded to the first surface and one or more light-emitting elements each containing a heavy metal; and one or more shields that prevent the heavy metal from passing through, wherein the one or more shields are provided in at least one of a region of the first substrate between the first surface and the one or more semiconductor elements, and a region of the second substrate between the second surface and the one or more light-emitting elements.

2. The light-emitting device described in claim 1, wherein the first substrate further has one or more first vias extending in a thickness direction intersecting the first surface, and one or more first pads electrically connected to the one or more semiconductor elements via the one or more first vias and exposed on the first surface; the second substrate further has one or more second vias extending in the thickness direction, and one or more second pads electrically connected to the one or more light-emitting elements via the one or more second vias and exposed on the second surface; and the one or more first pads and the one or more second pads are bonded.

3. The light-emitting device described in claim 2, wherein the first substrate further has a first insulating layer surrounding the one or more first pads and exposed on the first surface, and the second substrate further has a second insulating layer surrounding the one or more second pads and exposed on the second surface, and the first insulating layer and the second insulating layer are bonded together.

4. The light-emitting device according to claim 2, wherein the one or more shields are provided in at least one of the region between the first pad and the one or more semiconductor elements and the region between the second pad and the one or more light-emitting elements.

5. The light emitting device according to claim 4, wherein the one or more shielding members include a portion that overlaps with at least one of the first pad and the second pad in the thickness direction.

6. The light emitting device according to claim 1, wherein the one or more shields capture the heavy metals.

7. The light emitting device of claim 6, wherein the one or more shields comprise at least one of polysilicon, silicon nitride, silicon carbonitride, aluminum oxide, and titanium nitride.

8. The light emitting device according to claim 1, wherein the one or more shields are provided so as to cover the surfaces of the one or more semiconductor elements that face the first surface.

9. The light emitting device according to claim 8, wherein the first substrate further comprises one or more through vias that pass through the one or more semiconductor elements and the one or more shields.

10. The light emitting device of claim 9, wherein the one or more shields include one of carbon or phosphorus.

11. The light emitting device according to claim 9, wherein the first or more shields are embedded between the one or more semiconductor elements and the one or more through vias.

12. The light emitting device according to claim 1, further comprising a third substrate on the opposite side of the first substrate from the second substrate.

13. The light-emitting device described in claim 12, wherein the first substrate further has one or more third vias extending in a thickness direction intersecting the first surface, and one or more third pads electrically connected to the one or more semiconductor elements via the one or more third vias and exposed on a surface opposite the first surface, and the third substrate further has one or more fourth pads exposed on a surface bonded to the surface of the first substrate opposite the first surface, and the one or more third pads and the one or more fourth pads are bonded.

14. An image display device comprising a light-emitting device, the light-emitting device including: a first substrate having a first surface and one or more semiconductor elements; a second substrate having a second surface bonded to the first surface and one or more light-emitting elements each containing a heavy metal; and one or more shielding bodies that prevent the heavy metal from passing through, the one or more shielding bodies being provided in at least one of a region on the first substrate between the first surface and the one or more semiconductor elements, and a region on the second substrate between the second surface and the one or more light-emitting elements.

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