Pulsed DC bias for substrate processing system with remote plasma

The pulsed DC bias in remote plasma systems addresses the lack of control in remote plasma systems by modulating charged species directionality and energy, improving etching processes and reducing surface damage.

WO2026030027A1PCT designated stage Publication Date: 2026-02-05LAM RES CORP
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Patent Information

Application Number
PCT/US2025/038474
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-31
Filing Date
2025-07-21
Publication Date
2026-02-05

AI Technical Summary

Technical Problem

Remote plasma systems lack control over the directionality, energy, and polarity of charged species reaching the substrate, leading to issues such as aspect ratio dependent loading, topographic structure profile tuning, and surface damage during substrate processing.

Method used

A pulsed DC bias is applied to the substrate support in a remote plasma processing system, allowing for control of process parameters by adjusting the DC bias voltage, duty cycle, and frequency to modulate the attraction and repulsion of charged species.

Benefits of technology

The pulsed DC bias enhances control over etching processes, reduces surface roughness and damage, and improves aspect ratio dependent loading by adjusting ion trajectories and energy, thereby optimizing substrate treatment.

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Abstract

A remote plasma processing system includes a plasma generator configured to generate plasma in an upper region of a processing chamber. A dual gas diffusing device is arranged between the upper region and a lower region of the processing chamber. The dual gas diffusing device is configured to supply metastable species and ions from the upper region to the lower region and a reactant gas to the lower region separately from the metastable species and ions. A substrate support is arranged in the lower region of the remote plasma processing system and includes a resistive heater. A first voltage source is configured to supply power to the resistive heater. A pulsed DC voltage source is configured to supply a pulsed DC bias to the resistive heater.
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Description

PULSED DC BIAS FOR SUBSTRATE PROCESSING SYSTEM WITH REMOTE PLASMACROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application No. 63 / 677,698 filed on July 31 , 2024. The entire disclosure of the above application is incorporated herein by reference.FIELD

[0002] The present disclosure relates to substrate processing systems, and more particularly to a pulsed DC bias for a substrate processing system with remote plasma.BACKGROUND

[0003] The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

[0004] Substrate processing systems may be used to treat substrates such as semiconductor wafers. A substrate may be arranged on a substrate support in a processing chamber of the substrate processing system. During processing, gas mixtures including one or more precursors may be introduced into the processing chamber. In some substrate treatments, plasma may be used to initiate chemical reactions. Examples of substrate treatments include deposition, etching, cleaning and other treatments. For example, etching may include stripping photoresist or removing film on a substrate selectively relative to other exposed films on the substrate.SUMMARY

[0005] A remote plasma processing system includes a plasma generator configured to generate plasma in an upper region of a processing chamber. A dual gas diffusing device is arranged between the upper region and a lower region of the processing chamber. The dual gas diffusing device is configured to supply metastable species and ions from the upper region to the lower region and a reactant gas to the lower region separately from the metastable species and ions. A substrate support is arranged in thelower region of the remote plasma processing system and includes a resistive heater. A first voltage source is configured to supply power to the resistive heater. A pulsed DC voltage source is configured to supply a pulsed DC bias to the resistive heater.

[0006] In other features, a low pass filter is arranged between the first voltage source and the resistive heater. The first voltage source includes first and second terminals connected with first and second terminals of the low pass filter. Third and fourth terminals of the low pass filter are connected to first and second terminals of the resistive heater.

[0007] In other features, a first capacitor includes first and second terminals. A second capacitor includes first and second terminals. A first terminal of the pulsed DC voltage source is connected to first terminals of the first and second capacitors and second terminals of the first and second capacitors are connected to the first and second terminals of the resistive heater.

[0008] In other features, a third capacitor includes first and second terminals. A fourth capacitor includes first and second terminals. The first terminal of the third capacitor is connected to the first terminal of the resistive heater. The first terminal of the fourth capacitor is connected to the second terminal of the resistive heater. The second terminals of the third capacitor and the fourth capacitor are connected to a reference potential.

[0009] In other features, a first capacitor includes first and second terminals. A second capacitor includes first and second terminals. A first terminal of the pulsed DC voltage source is connected to first terminals of the first and second capacitors and second terminals of the first and second capacitors are connected to first and second terminals of the resistive heater.

[0010] In other features, a first capacitor includes first and second terminals. A second capacitor includes first and second terminals. The first terminal of the first capacitor is connected to a first terminal of the resistive heater. The first terminal of the second capacitor is connected to a second terminal of the resistive heater. The second terminals of the first capacitor and the second capacitor are connected to a reference potential.

[0011] In other features, a pulse frequency of the pulsed DC voltage source is in a range from 2 to 250 kHz. A duty cycle of the pulsed DC voltage source is in a rangefrom 10 to 90%. A positive voltage of the pulsed DC voltage source is in a range from 0V to 1200 V and a negative voltage of the pulsed DC voltage source is in a range from -1200 V to 0V. A top surface of the substrate support includes a plurality of minimum contact area projections supporting a substrate above the top surface of the substrate support.

[0012] In other features, the plurality of minimum contact area projections have a semicircular cross section.

[0013] In other features, at least one of a bias voltage, a duty cycle, or a frequency of the pulsed DC bias is adjustable to modulate at least one process parameter of the remote plasma processing system.

[0014] A method for processing a substrate using remote plasma includes generating plasma in an upper region of a processing chamber; arranging a gas diffusing device between the upper region and a lower region of the processing chamber; supplying metastable species and ions from the upper region to the lower region; supplying a reactant gas to the lower region separately from the metastable species and ions; arranging a substrate one a substrate support in the lower region; heating the substrate using a resistive heater embedding in the substrate support; supplying power to the resistive heater; and supplying a pulsed DC bias to the resistive heater.

[0015] In other features, a pulse frequency of the pulsed DC bias is in a range from 2 to 250 kHz. A duty cycle of the pulsed DC bias is in a range from 10 to 90%. A positive voltage of the pulsed DC bias is in a range from 0V to 1200 V and a negative voltage of the pulsed DC bias is in a range from -1200 V to 0V.

[0016] In other features, the method includes supporting the substrate on a top surface of the substrate support using a plurality of minimum contact area projections. The plurality of minimum contact area projections have a semicircular cross section.

[0017] Further areas of applicability of the present disclosure will become apparent from the detailed description, the claims, and the drawings. The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the disclosure.BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present disclosure will become more fully understood from the detailed description and the accompanying drawings, wherein:

[0019] FIG. 1 is a functional block diagram of an example of a substrate processing system including a dual gas diffusing device according to the present disclosure;

[0020] FIGS. 2A and 2B are top and partial bottom views of an example of a dual gas diffusing device according to the present disclosure;

[0021] FIG. 3A illustrates an example of angle distribution of ions without using the pulsed DC bias;

[0022] FIG. 3B illustrates an example of improvement in top down loading due to control of the angle distribution of ions when using the pulsed DC bias according to the present disclosure;

[0023] FIG. 3C illustrates an example of surface roughness without using the pulsed DC bias;

[0024] FIG. 3D illustrates an example of improvement in surface roughness due to control of the selectivity with the pulsed DC bias according to the present disclosure;

[0025] FIG. 3E illustrates an example of surface damage without using the pulsed DC bias;

[0026] FIG. 3F illustrates an example of improvement in surface damage due to control of the substrate polarity with the pulsed DC bias according to the present disclosure;

[0027] FIG. 3G illustrates an example of material removal without using the pulsed DC bias;

[0028] FIG. 3H illustrates an example of improvement in material removal due to control of ion energy with the pulsed DC bias according to the present disclosure;

[0029] FIG. 4 is an electrical schematic and functional block diagram of an example of a pulsed DC bias according to the present disclosure;

[0030] FIG. 5 is a graph illustrating an example of voltage and current as a function of time according to the present disclosure;

[0031] FIGS. 6A to 6D are graphs illustrating an example of voltage wavefronts as a function of time for different voltage ranges and duty cycles according to the present disclosure; and

[0032] FIG. 7 is a flowchart of a method for providing a DC pulsed bias.

[0033] In the drawings, reference numbers may be reused to identify similar and / or identical elements.DETAILED DESCRIPTION

[0034] Many substrate processing systems use direct plasma. Direct plasma directly exposes the substrate to plasma. For substrate surface treatment processes (e.g., oxidation, nitridation, contaminant removal, low-k repair, etc.), remote plasma (or sometimes referred to as indirect plasma) may be used. Remote plasma does not directly expose the substrate to the plasma. In a remote plasma processing system, the substrate is located remotely from the plasma generation zone. In other words, the substrate is not directly exposed to the plasma. Charged species produced by the plasma are carried downstream to the substrate via gas flow.

[0035] When using remote plasma, the directionality and energy of charged species are diffusive. There is no control over the directionality, energy, and / or polarity of charged species reaching the substrate. As a result, remote plasma systems cannot control process parameters such as aspect ratio dependent loading, topographic structures profile tuning, surface damage, etc.

[0036] The present disclosure relates to a remote plasma processing system including a pulsed DC voltage source that biases the substrate. A pulsed DC bias is supplied to a substrate support upon which a substrate is arranged. In some examples, the pulsed DC voltage source is connected in parallel with a resistive heater embedded in the substrate support. A DC bias voltage, duty cycle, and / or frequency of the pulsed DC bias generated by the pulsed DC voltage source can be adjusted to modulate process parameters such as aspect ratio dependent loading, topographic structures profile tuning, surface damage, etch rate, etc. The pulsed DC voltage source enables control of attraction and repulsion of charged species of different polarities.

[0037] In some examples, the pulsed DC voltage source can be used to modulate etching (such as sidewall etching), oxidation / nitridation, surface modification, profile tuning, and / or other applications. In some examples, the pulsed DC voltage source can be used to control a process reaction rate on flat and topographic surfaces. In other examples, the pulsed DC voltage source can be used to improve aspect ratio dependent loading.

[0038] For example, the pulsed DC voltage source can be operated in an attractive mode and used to collimate in trajectory and / or to add energy to the ions (which improves aspect ratio dependent loading and / or reduce surface roughness). For example, the pulsed DC voltage source can be operated in a repulsive mode and used to reduce ion flux to the substrate and / or ion contribution to the reaction (which may reduce substrate damage).

[0039] Referring now to FIG. 1 , a substrate processing system 100 is shown to include a processing chamber 110 including an upper region 112 and a lower region 116. In some examples, the processing chamber 110 has a dome shape, although other shapes can be used. A dual gas diffusing device 114 is arranged between the upper region 112 and the lower region 116 of the processing chamber 110. A substrate support 120 such as a pedestal is arranged in the lower region 116. A substrate 130 is supported on an upper surface of the substrate support 120 during processing. In some examples, an upper surface of the substrate support 120 includes a plurality of minimum contact area (MCA) projections 124 configured to support the substrate 130 above the upper surface of the substrate support 120. In some examples, the substrate support 120 includes 3 to 30 MCA projections, although additional or fewer can be used. In some examples, the MCA projections 124 have a semicircular cross section. The substrate support 120 includes one or more resistive heaters 128 configured to heat the substrate 130. The substrate support 120 also includes P lift pins (not shown), where P is an integer greater than two. In some examples, the P lift pins are spaced 360Q / P.

[0040] A first gas delivery system 140 supplies a first gas mixture to the upper region 112. In some examples, the first gas mixture includes plasma gas (such as an inert gas), purge gas, or another gas mixture. A second gas delivery system 146 supplies a second gas mixture to a port (e.g., located on a flange) of the dual gas diffusing device 114 as described further below. In some examples, the second gas mixture includes a reactant species, a purge gas, or other gas mixture. In some examples, the first gas delivery system 140 and / or the second gas delivery system 146 include one or more gas sources, one or more valves, and / or one or more mass flow controllers to select and / or supply different gases or gas mixtures.

[0041] A plasma generating system 134 selectively supplies RF power to inductive coils 135 arranged around the upper region 112 of the processing chamber 110. Insome examples, the plasma generating system 134 includes an RF source 136 to supply an RF voltage and a matching network 138 to match an impedance of the inductive coils 135 and the plasma to the RF source 136.

[0042] A throttle valve 154 and a pump 156 evacuate reactants from the processing chamber 110 and / or control pressure within the processing chamber 110. A heater controller 164 supplies power to the resistive heaters 128 arranged in the substrate support 120.

[0043] A controller 170 is configured to control the process. The controller 170 is configured to control the first and second gas mixtures supplied by the first gas delivery system 140 and / or the second gas delivery system 146, respectively, RF power supplied by the plasma generating system 134, and parameters of the pulsed DC voltage source described below. The controller 170 is further configured to control a temperature of the substrate 130 during processing using the heater controller 164. The controller 170 is also configured to control pressure within the processing chamber 110 and / or to evacuate reactants from the processing chamber 110 using the throttle valve 154 and the pump 156. The controller is configured to control a pulsed DC source 172 as will be described further below.

[0044] During substrate treatment, the first gas mixture (e.g., including inert gas) is supplied by a gas injector 172 into the upper region 112 of the processing chamber 110. As used herein, selective etching means etching more of one exposed film material relative to one or more other exposed film materials (e.g., at a ratio greater than N:1 , where N is greater than 2). The plasma generating system 134 provides RF power to the inductive coils 135, which generate a magnetic field in the processing chamber 110 that is used to strike and / or maintain the plasma.

[0045] The plasma in the upper region 112 of the processing chamber 110 produces metastable species and ions. In some examples, the dual gas diffusing device 114 is grounded and the gas through holes in the dual gas diffusing device 114 have a relatively high aspect ratio (most of the ions do not pass through the dual gas diffusing device 114). However, the metastable species are neutral so they pass through the gas through holes.

[0046] The dual gas diffusing device 114 also includes gas channels and gas through holes that supply the second gas mixture including the active etching species to the lower region 116 of the processing chamber 110 separately from the delivery of themetastable species. Upon reaching the lower region 116 of the processing chamber 110, the metastable species transfer energy to the second gas mixture (e.g., the active etching species) to generate radicals (rather than ions) for selective film removal.

[0047] In some examples, the controller 170 is configured to control the first gas delivery system 140, the second gas delivery system 146, and the plasma generating system 134 to supply the inert gas species selected from a group consisting of helium, argon, neon, krypton, and xenon, to strike plasma, and to supply the reactive gas species selected from a group consisting of molecular oxygen, molecular nitrogen, molecular hydrogen, nitrogen trifluoride, and carbon tetrafluoride.

[0048] In some examples, the upper region of the processing chamber is domeshaped. The plasma generating system includes an inductive coil arranged around an outer surface of the upper region. The first gas delivery system includes a gas injector arranged in an upper portion of the upper region. The gas injector is configured to inject gas into the upper region in center and side gas injection directions.

[0049] Referring now to FIGS. 2A and 2B, the dual gas diffusing device 114 includes a flange 210, a side wall 214, and a gas diffusing device 216. The flange 210 extends radially outwardly from an upper edge of the side wall 214. The side wall 214 extends downwardly from a radially inner edge of the flange 210 to the dual gas diffusing device 216. The dual gas diffusing device 216 extends between and encloses a lower edge of the side wall 214 and includes a plurality of through holes 220 configured to deliver metastable species from the upper region to the lower region.

[0050] The side wall 214 and the dual gas diffusing device 216 define an inner cavity 212 enclosing a bottom side of the upper region 112. At a planar side portion 211 of the flange 210, one or more inlets 239 are connected to one or more horizontal gas channels 240 extending radially inwardly. Each of the one or more horizontal gas channels 240 is connected to one or more vertical gas channels 242 extending from the flange 210 through the side wall 214. In some examples, the inlets 239, the horizontal gas channels 240, and the vertical gas channels 242 define two or more separate gas flow paths.

[0051] The dual gas diffusing device 216 includes patterns 230 of through holes 220 extending through the dual gas diffusing device 216 from the upper region 112 to the lower region 116. In some examples, the through holes 220 are uniformly spaced and are predominantly located adjacent to connecting gas channels as shown in portions ofFIG. 2. In other examples, the through holes 220 are uniformly spaced and fill regions between connecting gas channels (as shown for example at 211).

[0052] In FIGS. 2A and 2B, an annular channel 252 is fed by the vertical channels 242. The annular channel 252 feeds cross channels 254 (e.g., arranged on chords). A bottom surface of the cross channels 254 includes gas through holes 256 to supply the reactant gas to the lower chamber.

[0053] Referring now to FIGS. 3A and 3B, examples of angle distribution of ions without and with substrate bias are shown, respectively. In FIG. 3A, a substrate 300 includes layer 310 that is being etched. A mask 314 defines openings into trenches 318 that need to be etched with a high aspect ratio while minimizing etching of side walls 324 of the trenches 318. When the substrate is not biased, ions 320 may have a trajectory that is not ideal. In other words, an angle of incidence of the ions 320 is not vertical. Some of the trenches may have different opening sizes. When the ion trajectory is not perpendicular, the etch rate in some of the trenches may be different than in others. When the substrate is biased as described herein, the trajectory of the ions 320 can be adjusted to uniformly etch material in the trenches 318. In other words, an angle of incidence of the ions 320 can be adjusted to be more vertical.

[0054] Referring now to FIGS. 3C to 3F, surface roughness and surface damage improvements can also be realized using the pulsed DC source. In FIG. 3C, selectivity between different materials 370 and 372 may be greater than 1 when the pulsed DC bias is not used. In FIGS. 3D, the pulsed DC bias is used to reduce selectivity between the different materials 370 and 372 in a direction towards a selectivity of 1 (and / or to a selectivity of 1 ) to reduce surface roughness when the pulsed DC bias is used. In FIG. 3E, ion bombardment may cause surface damage 380 on sensitive materials 382. In FIG. 3F, the pulsed DC bias may be used to reduce surface damage due to control of the bias on the substrate when the pulsed DC bias is used.

[0055] Referring now to FIGS. 3G and 3H, improvements in the removal of material during etching may also be realized using the pulsed DC source. For example, in FIGS. 3G and 3H, a substrate 392 includes a layer 394 of material that is being etched. In such examples, the layer 394 of material may include, for example, a photoresist material, a low-k material, etc. When the substrate 392 is not biased (in FIG. 3G), ions 390 are provided to the layer 394 of material in an attempt to remove the layer 394 or portions thereof. In FIG. 3G, no material from the layer 394 is removed or an etch rateof the material is slow. However, when the pulsed DC bias is used (in FIG. 3H), the ions 390 can gain energy which can enhance the removal of the material from the layer 394. For example, in FIG. 3H, the ions 390 are accelerated by the pulsed DC bias due to an applied electric field induced by the pulsed DC bias, thereby causing the ions 390 to gain energy before bombarding the layer 394. With this approach, an etch rate (e.g., a removal rate) can be controlled based on the pulsed DC bias to enhance removal of the material from the layer 394. As such, the etch rate can be increased, resulting in a faster removal of the material in the layer 394, as shown in FIG. 3H.

[0056] In some examples, the frequency and / or voltage of the pulsed DC bias may be controlled to enhance the removal of the material from the layer 394 while minimizing damage to the substrate 392. For example, in some instances, a high voltage (e.g., above 400V) of the pulsed DC bias may cause the ions 390 to have a high kinetic energy. In turn, a secondary plasma is created above the substrate 392, causing the ions 390 to accelerate before hitting the substrate 392. This increased acceleration may cause damage to the substrate 392. However, by controlling the frequency and / or voltage of the pulsed DC bias, damage to the substrate 392 may be minimized. For example, if the voltage of the pulsed DC bias is between 300-400V, a secondary plasma may not be created above the substrate 392. Thus, while the ions 390 may accelerate and gain energy due to the pulsed DC bias (as explained above), the acceleration may be controlled to minimize damage to the substrate 392.

[0057] Additionally, in some examples, the enhanced removal of the material from the layer 394 through the use of the pulsed DC bias may also enable processing at a lower temperature. For example, to avoid diffusion in which charged particles in plasma move from areas of higher concentration to areas of lower concentration, a temperature of the substrate 392 may be between about 50QC or more but less than 220QC. However, in this low temperature range, a removal rate decreases. As such, with the use of the pulsed DC bias, the temperature of the substrate 392 may remain in the low temperature range to avoid diffusion while also maintaining or increasing an etch rate with the pulsed DC bias.

[0058] Referring now to FIG. 4, a pulsed DC bias circuit 400 is shown. An output of an AC power source 410 supplies heating power and is connected to a low pass filter 414. In some examples, the AC power source 410 supplies 208 V AC at a frequency of 50- 60 Hz, although other AC voltage levels and frequencies can be used. The low passfilter 414 includes capacitors C1 and C2 including first terminals that are connected to first and second terminals of the AC power source 410, respectively. A node between the capacitors C1 and C2 is connected to ground or another reference potential. The low pass filter 414 includes inductors L1 and L2 including first terminals that are connected to the first and second terminals of the AC power source 410 and the first and second terminals of the capacitors C1 and C2, respectively. Second terminals of the inductors L1 and L2 are connected to first and second terminals of a resistive heater 428 embedded in a body 420 of a substrate support 422. The body 420 is bonded to a baseplate 424 by a bonding layer 426.

[0059] First terminals of capacitors C3 and C4 are connected to the second terminals of the inductors L1 and L2. Second terminals of the capacitors C3 and C4 are connected to a pulsed DC source 440. First terminals of capacitors C5 and C6 are connected to the second terminals of the inductors L1 and L2. Second terminals of capacitors C5 and C6 are connected to ground or another reference potential.

[0060] In some examples, the frequency, amplitude, and / or duty cycle of the pulsed DC source 440 are varied to adjust the trajectory of the ions, selectivity, etch rate, and / or surface damage. In some examples, the pulse frequency of the pulsed DC source 440 is in a range from 2 to 250 kHz. In some examples, the DC pulse duty cycle is in a range from 10 to 90%. In some examples, the positive voltage is in a range from 0V to 1200 V. In some examples, the negative voltage is in a range from -1200 V to 0V. In some examples, the pedestal temperature is in a range from 200 to 600QC.

[0061] Referring now to FIG. 5, an example of voltage and current waveforms during DC pulsing are shown as a function of time. During each period, the DC pulsed bias includes a positive voltage period and a negative voltage period. In this example, the positive terminal output of the pulsed DC source 440 is grounded and the negative terminal output of the pulsed DC source 440 is connected between the capacitors C3 and C4.

[0062] Referring now to FIGS. 6A to 6D, voltage wavefronts are shown as a function of time for different biases and duty cycles. In some examples, the pulsed DC bias can have a 50% duty cycle and can vary between positive and negative voltages having the same magnitudes. In other examples, the duty cycle and magnitudes of the maximum amplitude of the positive and negative voltage can be varied to provide different effects.

[0063] In FIG. 6A, a voltage wavefront for a predominantly positive bias is shown. When the voltage wavefront has a predominantly positive bias, more negative ions are attracted to the substrate and more positive ions are repelled. In this example, the frequency is 2 kHz, the positive bias is 10V, the negative bias is -1 V, the duty cycle is 50%, and the period is 0.0005s, although other values can be used.

[0064] In FIG. 6B, a voltage wavefront for a negative bias is shown. When the voltage wavefront has a predominantly negative bias, more positive ions are attracted to the substrate and more negative ions are repelled. In this example, the frequency is 2 kHz, the positive bias is 1 V, the negative bias is -10V, the duty cycle is 50%, and the period is 0.0005s, although other values can be used.

[0065] The duty cycle of the predominantly positive or negative wavefront voltage can be adjusted to increase or reduce the effect of the particular voltage wavefront that is used. In FIG. 6C, a voltage wavefront for a high duty cycle is shown. In this example, the frequency is 2 kHz, the positive bias is 10V, the negative bias is -1 V, the duty cycle is 90%, and the period is 0.0005s. In FIG. 6D, a voltage wavefront for a low duty cycle is shown. In this example, the frequency is 2 kHz, the positive bias is 1 V, the negative bias is -10V, the duty cycle is 10%, and the period is 0.0005s.

[0066] In some examples, the pulsed DC voltage source transitions between a maximum positive voltage and a maximum negative voltage. In some examples, the maximum positive voltage has a magnitude greater than G times a magnitude of the maximum negative voltage and the duty cycle of the pulsed DC voltage source is in a range from greater than 50% (e.g., 60%) to less than 100% (e.g., 90%), where 1 < G < 15 (e.g., 2 < G < 15). In some examples, the duty cycle of the pulsed DC voltage source is in a range from greater than or equal to 60% to less than or equal to 90%.

[0067] In some examples, the pulsed DC voltage source transitions between a maximum positive voltage and a maximum negative voltage. In some examples, the maximum negative voltage has a magnitude greater than H times a magnitude of the maximum positive voltage and a duty cycle of the pulsed DC voltage source is in a range from greater than 0% to less than 50%, where 1 < H < 15 (e.g., 2 < H < 15). In some examples, the duty cycle of the pulsed DC voltage source is in a range from greater than or equal to 10% to less than or equal to 40%.

[0068] In some examples, the reverse voltage spec from the pulsed DC power supply is manually set in a range of 0-100V, or automatically in a range from 0-30% of the peak output voltage, whichever is smaller.

[0069] Referring now to FIG. 7, a flowchart of a method 500 for providing a DC pulsed bias is shown. At 510, plasma is generated in an upper region of a processing chamber. At 514, metastable species and ions are supplied from the upper region to a lower region of the processing chamber. At 518, a reactant gas is supplied to the lower region separately from the metastable species and ions. At 522, a substrate is heated using a resistive heater embedded in the substrate support. At 524, power is supplied to the resistive heater. At 528, a pulsed DC bias is supplied to the resistive heater.

[0070] The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. It should be understood that one or more steps within a method may be executed in different order (or concurrently) without altering the principles of the present disclosure. Further, although each of the embodiments is described above as having certain features, any one or more of those features described with respect to any embodiment of the disclosure can be implemented in and / or combined with features of any of the other embodiments, even if that combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and permutations of one or more embodiments with one another remain within the scope of this disclosure.

[0071] Spatial and functional relationships between elements (for example, between modules, circuit elements, semiconductor layers, etc.) are described using various terms, including “connected,” “engaged,” “coupled,” “adjacent,” “next to,” “on top of,” “above,” “below,” and “disposed.” Unless explicitly described as being “direct,” when a relationship between first and second elements is described in the above disclosure, that relationship can be a direct relationship where no other intervening elements are present between the first and second elements, but can also be an indirect relationship where one or more intervening elements are present (either spatially or functionally) between the first and second elements. As used herein, the phrase at least one of A, B,and C should be construed to mean a logical (A OR B OR C), using a non-exclusive logical OR, and should not be construed to mean “at least one of A, at least one of B, and at least one of C.”

[0072] In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform, or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0073] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0074] The controller, in some implementations, may be a part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g., a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus, as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0075] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0076] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.

Claims

CLAIMSWhat is claimed is:1 . A remote plasma processing system, comprising: a plasma generator configured to generate plasma in an upper region of a processing chamber; a dual gas diffusing device arranged between the upper region and a lower region of the plasma processing chamber, wherein the dual gas diffusing device is configured to supply metastable species and ions from the upper region to the lower region and a reactant gas to the lower region separately from the metastable species and ions; a substrate support arranged in the lower region of the remote plasma processing system and including a resistive heater; a first voltage source configured to supply power to the resistive heater; and a pulsed DC voltage source configured to supply a pulsed DC bias to the resistive heater.

2. The remote plasma processing system of claim 1 , further comprising a low pass filter arranged between the first voltage source and the resistive heater.

3. The remote plasma processing system of claim 2, wherein the first voltage source includes first and second terminals connected with first and second terminals of the low pass filter.

4. The remote plasma processing system of claim 3, wherein third and fourth terminals of the low pass filter are connected to first and second terminals of the resistive heater.

5. The remote plasma processing system of claim 2, further comprising: a first capacitor including first and second terminals; a second capacitor including first and second terminals; and wherein a first terminal of the pulsed DC voltage source is connected to first terminals of the first and second capacitors and second terminals of the first and second capacitors are connected to the first and second terminals of the resistive heater.

6. The remote plasma processing system of claim 5, further comprising: a third capacitor including first and second terminals; and a fourth capacitor including first and second terminals, wherein the first terminal of the third capacitor is connected to the first terminal of the resistive heater, wherein the first terminal of the fourth capacitor is connected to the second terminal of the resistive heater, and wherein the second terminals of the third capacitor and the fourth capacitor are connected to a reference potential.

7. The remote plasma processing system of claim 1 , further comprising: a first capacitor including first and second terminals; and a second capacitor including first and second terminals, wherein a first terminal of the pulsed DC voltage source is connected to first terminals of the first and second capacitors and second terminals of the first and second capacitors are connected to first and second terminals of the resistive heater.

8. The remote plasma processing system of claim 1 , further comprising: a first capacitor including first and second terminals; and a second capacitor including first and second terminals, wherein the first terminal of the first capacitor is connected to a first terminal of the resistive heater, wherein the first terminal of the second capacitor is connected to a second terminal of the resistive heater, and wherein the second terminals of the first capacitor and the second capacitor are connected to a reference potential.

9. The remote plasma processing system of claim 1 , wherein a pulse frequency of the pulsed DC voltage source is in a range from 2 to 250 kHz.

10. The remote plasma processing system of claim 1 , wherein a duty cycle of the pulsed DC voltage source is in a range from 10 to 90%.11 . The remote plasma processing system of claim 1 , wherein a positive voltage of the pulsed DC voltage source is in a range from OV to 1200 V and a negative voltage of the pulsed DC voltage source is in a range from -1200 V to 0V.

12. The remote plasma processing system of claim 1 , wherein a top surface of the substrate support includes a plurality of minimum contact area projections supporting a substrate above the top surface of the substrate support.

13. The remote plasma processing system of claim 12, wherein the plurality of minimum contact area projections have a semicircular cross section.

14. The remote plasma processing system of claim 1 , wherein at least one of a bias voltage, a duty cycle, or a frequency of the pulsed DC bias is adjustable to modulate at least one process parameter of the remote plasma processing system.

15. A method for processing a substrate using remote plasma, comprising: generating plasma in an upper region of a processing chamber; supplying metastable species and ions from the upper region to a lower region of the processing chamber; supplying a reactant gas to the lower region separately from the metastable species and ions; heating a substrate using a resistive heater embedded in a substrate support; supplying power to the resistive heater; and supplying a pulsed DC bias to the resistive heater.

16. The method of claim 15, further comprising controlling a pulse frequency of the pulsed DC bias is in a range from 2 to 250 kHz.

17. The method of claim 15, further comprising controlling a duty cycle of the pulsed DC bias is in a range from 10 to 90%.

18. The method of claim 15, further comprising controlling a positive voltage of the pulsed DC bias in a range from 0V to 1200 V and a negative voltage of the pulsed DC bias in a range from -1200 V to 0V.

19. The method of claim 15, further comprising supporting the substrate on a top surface of the substrate support using a plurality of minimum contact area projections.

20. The method of claim 19, wherein the plurality of minimum contact area projections have a semicircular cross section.

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