Laser devices and methods for producing thereof

Abstract

An optoelectronic device includes an array of vertical-cavity surface-emitting lasers (VCSELs) formed on a common substrate. Each VCSEL of the array include a first reflector structure formed above the substrate; a second reflector structure formed above the substrate; an active region formed above the substrate between the first reflector structure and the second reflector structure including one or more multiple-quantum- wells (MQWs) regions, one or more oxide layers defining an aperture region; and a grating layer formed on the first reflector structure. The grating layer includes gratings that extend parallel along a first direction in a first plane that is parallel to a top surface of the first reflector structure. For each VCSEL of the VCSEL array, a height of its gratings in the grating layer of VCSEL is a function of a position of the respective VCSEL.

Description

[0001] LASER DEVICES AND METHODS FOR PRODUCING THEREOF Field This present disclosure relates to semiconductor-based lasers and methods for producing thereof. Background FIG. 1 shows a cross-section of a vertical cavity surface emitting laser (VCSEL) 100 with etched surface gratings. The VCSEL 100 includes a p-type distributed Bragg reflector (DBR) 105 at the top, and similarly a n-type DBR 110 at the bottom. The reflector structures, e.g., the DBRs or DBR mirrors 105 and 110 are based on AlGaAs / GaAs material system. That is, each of the DBR mirrors 105 and 110 include alternating layers. For a first layer 112 can be a layer of Aluminum Gallium Arsenide (AlGAas) and a second layer 114 can be a layer of Gallium Arsenide (GaAs). The VCSEL 100 can include an active region AR that is principally made of a p-i-n junction, which can include multiple quantum-wells (MQWs) that generate photons. FIG. 1 shows a MQW or MQW layer 120 residing in the active region AR and sandwiched between a n-doped semiconductor layer and a p- doped semiconductor layer. The electrical and optical confinement in the VCSEL 100 is achieved by using an oxide layer 130, which can be located or placed above (and sometimes below) the active region. The oxide layer 130 can typically be an aluminum oxide layer (Al2O3). The oxide layer 130 can include or define an aperture or aperture region 150. The aperture region 150 may be formed from a semiconductor layer or material. These layers are typically grown on the GaAs substrate 140 and using a Metalorganic Chemical Vapor Deposition (MOCVD) technique. As shown in FIG. 1, the ohmic contacts at the top, also called the anode 165 and the ohmic contacts at the bottom, also called the cathode 160 are placed for injecting current flow into the device. In order to realize a VCSEL with polarization-stable performance, the VCSEL is fabricated to include surface gratings 195. The VCSEL 100 includes an additional “cap” or “grating layer” 190 which can be based on GaAs. This cap or grating layer 190 can be grown with a specific thickness (typically around quarter-wave-thick). The growth of the layer 190 can be a terminating surface of an epitaxial stack or the top surface of the layer 190 can be in-phase with regards to the standing optical field formed inside the cavity structure of the VCSEL 100. Following a MOCVD-growth process to from the cap layer, the binary gratings 195 are formed lithographically in which the cap layer 190 is selectively etched to a desired etch depth. Both (deep) UV and e-beam or nanoimprint lithography techniques can be used for patterning the gratings. Dry ICP- RIE etching is typically used to etch the cap layer and form the gratings with minimal sidewall angle. The VCSEL 100 can be configured to emit a light beam. The axes depicted in FIG. 1 show the typical directions at which the epitaxial layers are grown and based on. In other words, the

[0001] direction (e.g., along the Z-axis or Z- direction) shows the growth direction, while the

[0110] direction (e.g., X-axis or X-direction) and the [1-10] (e.g., Y-axis or Y-direction) are the directions at which the VCSEL 100 is typically fabricated at. FIG. 2 shows a cross-section of a multijunction VCSEL 200. In the active region AR of the VCSEL 200, each active junction includes its own oxide layer 130 to provide lateral electrical and optical confinement. Moreover, Esaki tunnel junctions are disposed to provide vertical electrical coupling between the active junctions. The optical aperture 150 is based on formation of an oxide layer 130. The tunnel junctions 125 are used to provide electrical coupling between the junctions. Like the VCSEL 100, the VCSEL 200 also includes etched surface gratings 195 in a grating or capping layer 190. The grating layer 190 and its gratings 195 can be formed as described in connection with the single-junction VCSEL 100. FIG. 3 shows an aspect of the VCSEL 100 or VCSEL 200 which includes a zoomed-in view of the cap / grating layer 190 and fabricated gratings 195. shown as part of the VCSELs 100 and 200. Also, the anode layer 165 and a DBR layer 112 are shown. There are several parameters which can be defined with regards to these gratings, including, for example: 1) Grating width: No etched area of the cap layer 2) Duty-cycle: The ratio between the non-etched to the etched area of the cap layer, and 3) Etch depth: The designated depth at which the cap layer is etched. FIG. 4 shows a top-down view of a single VCSEL aperture, such as the VCSEL 100 or 200 which includes a capping or grating layer 190 with surface gratings 195. In FIG. 4, the dashed line represents the boundary of the aperture region which also corresponds to the interface between the oxide layer 130 and aperture region 150. For positional visual reference, this boundary is superimposed over the etched gratings 195. FIG. 4, from a top plan view perspective that the etched gratings 195 are formed directly over the aperture region 150. Further, in at least this example, the effective area (measured within the XY plane) of the gratings 195 is larger than and / or covers the area of the oxide aperture 150 (within the XY plane). Such a configuration or arrangement can maximize the polarized output optical power. However, the area or span (e.g., measured in the XY plane) of the gratings 195 is area is smaller than the area (within the XY plane) encircled by the anode ring contact 165. This is so as not to adversely influence the contact resistance. In the example of FIG. 4, the gratings 195 are shown orientated (from a top perspective facing the XY plane) in the Y- direction. Said differently, the gratings are elongated in the Y-direction. Most of previous or current research is done on only single- aperture VCSEL dies, such as depicted in FIGS. 1 and 2.Therefore, the polarization behavior of single-aperture VCSELdies, and not VCSEL arrays, are studied. Description In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the disclosure. In the following description, various aspects of the disclosure are described with reference to the following drawings, in which:FIG. 1 shows a diagram of a single junctionvertical cavity surface emitting laser (VCSEL);FIG. 2 shows a diagram of a multi-junction VCSEL;FIG. 3 show a view of a cap or grating layer fora VCSEL;FIG. 4 shows a top-down view of a single VCSELaperture;FIG. 5 a top-down view of a VCSEL array OR VCSELdie;FIG. 6 shows a graph of power vs. currentcharacteristic for the VCSEL array of FIG. 5;FIGS. 7 shows a diagram of a VCSEL array and heatdissipation for the VCSEL array;FIG. 8 shows a diagram of a VCSEL array and thecorresponding profile views of gratings layers for certain VCSELs of the VCSEL array;FIGS. 9A and 9B shows graphs for of power vs. currentcharacteristic for a VCSEL array;FIG. 10 shows a diagram of a VCSEL array accordingto at least one aspect of the present disclosure;FIG. 11 shows a graph of power vs. currentcharacteristic for the VCSEL array of FIG. 10;FIG. 12 shows a block diagram of an optoelectronicdevice;FIG. 13 shows flow diagram of a method accordingto at least one aspect of the present disclosure. The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and aspects in which the disclosure may be practiced. One or more aspects are described in sufficient detail to enable those skilled in the art to practice the disclosure. Other aspects may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the disclosure. The various aspects described herein are not necessarily mutually exclusive, as some aspects can be combined with one or more other aspects to form new aspects. Various aspects are described in connection with methods and various aspects are described in connection with devices. However, it may be understood that aspects described in connection with methods may similarly apply to the devices, and vice versa. Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures. Throughout the drawings, it should be noted that proportions are not necessary to scale and that the size of features may be emphasized for ease of illustration. FIG. 5 shows a top plan view of a VCSEL array or VCSEL array die 500. The VCSEL array 500 includes a plurality of multiple single-aperture VCSELs 505. The VCSELs 505 of the VCSEL array 500 may include single-junction VCSELs, such as the VCSEL 100, and / or include multi-junctions VCSELs, such as the VCSEL 200. Each of the plurality of VCSELs 505 have a cap / grating layer 190 with surface gratings 195, e.g., as shown in FIGS. 1 and 2. In at least the example of FIG. 5, the surface gratings 195 of each of the VCSELs 505 of the VCSEL array 500 are oriented (e.g., elongated in the XY-plane) in a same direction. However, this is merely one example. In other instances, the gratings 195 of the VCSELs 505 may be oriented or elongated in other suitable directions, e.g., in the XY plane. For example, a VCSEL may include gratings 195 that oriented or elongated in the X-direction, in which the same principles and assumptions laid out in this disclosure can similarly apply to. In FIG. 5, the VCSELs 505 are arranged in a hexagonal type array pattern. However, array other configurations or arrangements may be used for such VCSEL arrays. For instance, the VCSELs may be arranged in a more conventional row and column grid configuration. FIG. 6 shows a graph 600 of an ideal representative Power vs. Current characteristic for a VCSEL array such as the VCSEL array 500 depicted in FIG. 5. The graph 600 shows that the optical power is predominantly linearly polarized (as known by one skilled in the art) in the Y-direction. AS such, the power in X-direction is minimal, leading to a polarization extinction ratio of greater than 10 dB. FIG. 7 shows heat dissipation across the VCSEL die 500, at its operating condition. For example, the operating condition can include a continuous-wave (CW) test condition, a quasi-CW test condition (bias current pulse width less than 100 µs), or a short-pulse test condition (bias current pulse width less than 10 ns). Increasing the pulse-width of the duty-cycle of the bias current pulse, leads to more heat being dissipated across the VCSEL die 500, resulting in temperature increase for the VCSELs of the VCSEL die 500. In FIG. 7, the depicted heat dissipation causes different the temperature experiences to the different VCSELS in the VCSEL array 500. In particular, the VCSELs 505 of the VCSEL array 500 located closer to the center of the die or VCSEL array 500 will generally experience larger temperature increases compared to VCSELs located closer toward the outer areas or periphery of the array 500. In FIG. 7, the VCSELs 505 of the VCSEL array 500 can be grouped, from a top view perspective in terms of temperatures zones. Various of the plurality VCSELs 505 are within the zones respectively experiencing the temperatures respectively labeled T1, T2, and T3. That is, the VCSELs for each temperature zone may have or experience the temperature corresponding to its temperature zone. Further, T1, T2, and T3 may each not only a temperature by a range of temperatures that VCSELs located in that zone can exhibit. In this scenario, the widgets located in the innermost temperature zone experience temperatures within the range of T1. The widgets in the second innermost temperature zone experience temperatures within the range of T2. Finally, the widgets in the third temperature zone from the center experience temperatures within the range of T3. In this case and for other VCSEL arrays, the temperatures have the following relation: T1 > T2 > T3 Another parameter that can be considered with respect to VCSEL arrays, e.g., VCSEL arrays similar to the VCSEL array 500, is grating height / etch depth. The etch depth can be defined as the depth of the trenches which define the height of the surface gratings. This depth can be measured, as shown in FIG. 3, along a direction perpendicular to the XY-plane or along the Z-direction. This direction can also be defined perpendicular to a main surface of the first reflector, which faces the grating layer within the context of a particular VCSEL. FIG. 8 shows an example where VCSELs 500 of the VCSEL array 500 each of the same height. That is, VCSELs from the each of the temperature zones shown in FIG. 7 have the grating height / same etch depth in its capping or grating layer. This can be expressed as follows: h1 = h2 = h3 where h1 is height of gratings of VCSEL in innermost zone (T1) h2 is height of gratings of VCSEL in second innermost zone (T2) h3 is height of gratings of VCSEL in third innermost zone (T3) It has been shown or observed that for VCSELS, the dominant polarization direction of the output in a VCSEL aperture can switch to a second polarization direction, which can be orthogonal to the dominant direction. This switching can be attributed to thermal lensing or heating of the VCSEL. These factors could be caused by the heat being dissipated during operation of the VCSEL array die. As such, it can be expected that VCSELs positioned at or close to the center of the VCSEL array or die, which exhibit higher temperature increases from heat dissipation, will tend to exhibit greater polarization switching. FIGS. 9A and 9B respectively include the graphs 900A and 900B which are each representative power vs. current characteristic of the VCSEL array experiencing polarization switching due to the heat dissipation problems. The graphs 900A and the 900B show that total linear polarized power along the [11 ̅0] or Y-direction is lower compared to the scenario where no heat dissipation was considered, e.g., as shown in FIG. 6. This effect is primarily due to the apertures or VCSELs experiencing polarization switching resulting in more output optical power polarized orthogonally along the

[0110] or X-direction. Moreover, the polarization extinction ratio is also expected to drop due to this same phenomenon. FIG. 10 shows another VCSEL array or VCSEL die 1000 according to at least one aspect or exemplary embodiment of the present disclosure. The VCSEL array 1000 may include a plurality of VCSELs 1005. The VCSELs 1005 can be similar to VCSELs described herein, such as the VCSELs 100 and 200. That the VCSELs 1000 of the VCSEL array 1000 may all be single-junction VCSELs, all multi- junction VCSELs, or a combination of both single-junction VCSELs and multi-junction VCSELs. Also, in this instance the VCSELs 1005 are arranged in a hexagonal-like configuration, however, other types of array configurations can be realized, e.g., row and column. Each VCSEL 1005, like the VCSEL 505 of FIG. 5, includes gratings. As such, the gratings of the VCSELs 1005 can all be aligned and parallel to each other. In this example the gratings are oriented, stretched, or elongated along the Y- direction, but other directions within the XY-plane can be realized. Unlike the VCSEL array 500, the VCSELs 1005 of the VCSEL array 1005 include modulated gratings. For example, the VCSEL array 1000 includes VCSELs with varying or different etch depths / grating heights (e.g., measured along the Z-direction or perpendicular to the XY–plane). In particular, for each VCSEL, the etching depth or grating heights the VCSELs 1005 can be based at least in part on or be a function of the position or placement of the VCSEL 1005 within the VCSEL array 1000, e.g., from a top view facing the VCSEL array 1000. For an individual VCSEL, the polarization of its optical output can be dependent on the etching depth or grating height and duty cycle. Therefore, the characteristics of the surface gratings can be exploited by fabricating VCSELs with different grating depths and / or duty cycle depending on the location of aperture. Further, in one or more examples, a VCSEL array such as similar the VCSELs of the VCSEL array 1000 can considered or designated in terms of subgroups or subsets. For example, a VCSEL array such as the VCSL array 1000 can include at least two or more subgroups or subsets of VCSELS. This may include one or more “first” VCSELs and one or more “second” VCSELs. Additional subgroups or subsets may also be included, e.g., a subset or subgroup of one or more “third” VCSELS. In one or more instances the first VCSELs, second VCSELs, and any other additional subgroups of VCSELs of the VCSEL array. Regardless of the number of VCSEL subgroups, each subgroup may be associated or have different grating heights (or different range of grating heights / etching depths) from the other VCSEL subgroups. For example, the grating height / etching depth (or range of grating height / etching depth) for each VCSEL (sub-)group can a function of the respective VCSEL group location within the VCSEL array. For the VCSEL array 1000 of FIG. 10, the VCSELs 1005 located or positioned at or close to the center of the VCSEL array 1000 have smaller grating heights or shallower etch depths than the VCSELs 1005 located closer to the outer periphery of the VCSEL array 1000. The decrease in etch depth for more center-positioned VCSELs can lead to an increase in the relative dichroism between the orthogonal polarization modes (e.g., polarization in X and Y directions in the XY-plane). As a result, the undesired effects from higher temperatures of the VCSELs at the center the VCSEL array, caused by heat dissipation, can be nullified or at least mitigated to some extent. Therefore, VCSEL arrays, such as the VCSEL array 1000 can have surface gratings with depths as a function of VCSEL placement or position to mitigate polarization switches. Further, in at least one instance, the trench or etch depth / grating height of a VCSEL 1005 of the VCSEL array 1000 can be a function of the distance of the particular VCSEL 1005 to a predefined region of the VCSEL array 1000. Moreover, in one or more instances, the predefined region corresponds to a region or one or more VCSELs of the VCSEL array that experiences or is known to have a temperature greater than a predefined threshold, e.g., during operation of the VCSEL array. In at least one other example, the predefined region corresponds to a region or one or more VCSELs of the VCSEL array that experiences or is known to exhibit the highest temperature when the VCSEL array is operating. In one or more case, the predefined region can correspond to or include a center or centroid of the VCSSEL array, e.g., from a top view perspective facing the VCSEL array or correspond to the VCSELs overlapping or closest to the center or centroid of the VCSEL array. In one or more instances, the predefined region can refer to either an area or location within the VCSEL array, or to one or more VCSELs. As previously described in the context of the VCSEL array 1000, which is also applicable to other similar types of VCSEL arrays, the VCSEL etching depth / grating height of the VCSELs can vary, e.g., be a function of the distance of a VCSEL to a predefined region of the VCSEL array. In the example of FIG. 10, one or more first VCSELs each has a distance from the predefined region (or VCSEL(s)) that is less than or equal to a first threshold distance. Further, the VCSEL array can include a second subset or subgroup of one or more “second” VCSELs which each have a distance from the predefined region (or VCSEL(s)) that is more than the first threshold distance. In such a case, the heights or depths of the surface gratings of each of the first VCSELs can be less than the grating heights / etching depths of each of the surface gratings of the second VCSELs. The grating heights or etching depths in the first VCSELs may be the substantially the same, but this is not necessarily so. In some cases, the grating heights or etching depths of the first VCSELs may be within a first predefined range. Similarly, the grating heights / etching depths of the second VCSELs may also be the (substantially) same, but this is not a requirement either. That is, the second VCSELs can have grating heights or etching depths that are within a second predefined range. Further, in addition to the first VCSELs and the second VCSELs, more groups of VCSELs may be realized or considered. For example, the VCSEL array 1000 may include at least another subset, e.g., a subgroup or subset of one or more “third” VCSELs which each are a distance from the predefined region that is greater than to a second threshold distance and greater than a first threshold distance. That is, the one or more first VCSELs and the one or more second VCSELs each have a distance from the predefined region (or VCSEL(s)) that is less than or equal to a second threshold distance. Accordingly in this example, the grating heights or etching depths of the one or more third VCSELs is more or greater than the grating heights / etching depths of the one or more second VCSELs and the one or more first VCSELs. This relationship(s) is depicted in FIG. 10, where the centermost VCSEL 1005a has a smaller or shallower etching depth than the VCSEL 1005b, which is further away from the center or center VCSEL 1005a. Further, the second VCSEL 1005 has a smaller / shallower etching depth than the VCSEL 1005c, which is located at or near the periphery of the VCSEL away 1000 and is even further away from the center VCSEL 1005a than the VCSEL 1005b. This relationship can be expressed as follows: h1 < h2< h3 where h1 is height (or range of heights) of gratings of VCSELS in innermost zone h2 is height (or range of heights) of gratings of VCSELs in second innermost zone h3 is height (or range of heights) of gratings of VCSELs in third innermost zone The other VCSELs 1005 can have similar gratings heights to the VCSELs 1005a, 1005b, or 1005c based on their distance from the center or center VCSEL 1005a. For example, some of the other VCSELs 1005 can have grating heights similar to VCSEL 1005b, for example in the case the other VCSELs are at the same or substantially same distance away from the predefined region or if they are more than first threshold distance away from the predefined region (e.g., center or center VCSEL) but are less than second threshold distance away from the predefined region. VCSELs 1005 which are more than the first and second threshold distances away from the predefined region can having gratings heights similar to the VCSEL 1005c. This concept can be applied mutandis mutatis to other VCSEL arrays with more subsets of VSCELs and more threshold distances, for example. That is, in other cases, there may be more than three subsets of VCSELs that each associated with a distance or threshold distance from the predefined region of the VCSEL array. For the VCSEL array 1000 as well as for similar VCSEL arrays described herein, the distances between the VCSELs and the predefined region can be linear or straight-line distances, e.g., measured in the measured along the XY-plane. In FIG. 10 shows d12 as the distance between the VCSEL 1005a and the VCSEL 1005b. In this case, the distance d12 can be from the center of the VCSEL 1005a to the center of the VCSEL 1005b (from a top view perspective). In some cases, distances can be measured or taken from other points on the VCSELs, such as the closest point between two VCSELs. In some instances, two or more VCSELS may be arranged or located at or near the center of the VCSEL array. Accordingly, distances may be measured from the center of the two or more VCSELs, e.g., as an average. These two or more “center VCSELs”. Other types of distances between VCSELs may be considered, e.g., for the above cases. For instance, distances instead of being measured can be quantified by the number of VCSELs between two VCSELs. This number may account for a combination of VCSELs located both horizontally and vertically between the two VCSELs for which a distance is to be used or considered. For the VCSEL array 1000 and other similar VCSELs, implementing VCSELs with the varying grating heights / etching depths as functions of distance to center or distance to highest temperature region of the VCSEL array can help produce more linear polarized (along Y-direction) optical output. For example, FIG. 11, includes a graph 1100 showing a representative Power vs. Current characteristic of the VCSEL array with the modulated gratings (e.g., the VCSEL array 1000). The graph 1000 shows the total polarized output power along the [11 ̅0] or Y-direction does not decrease when considering the effect of heat dissipation. Accordingly, for VCSEL arrays such as the VCSEL array 1000, the emitted optical output or optical beam is predominantly linearly polarized along the one direction. In the case of the FIG. 10, this is along the Y-direction. In addition, for VCSEL arrays like VCSEL array 1000, the optical output is emitted and propagates along the z- direction. Further, the power of light polarized in the Y- direction is several times greater than the power of light polarized in the X-direction, even when experiencing heat dissipation problems during operation of the VCSEL array. For example, the optical power of the output in Y-direction can be at least 20 times higher than in X-direction. FIG. 12 shows an optoelectronic device 1200 according to at least one example of the present disclosure. The VCSEL array 1210 can be VCSEL array such as or similar to the VCSEL array 1000 described in connection with FIG. 10. The VCSEL array 1210 can produce an optical output based on electrical input signals. The VCSEL driver 1220 can be electronic circuitry configured to supply the necessary current to the VCSEL array 1210. The power supply 1230 can be electronic circuitry configured to provide electrical power to the driver and other components, including to other components not show in FIG. 12. The processor(s) 1240 can be any suitable processor configured to process the input signal to the VCSEL array. Other components, not depicted in FIG. 12, may also be included. FIG. 13 shows a method 1300 according to at least one example of the present disclosure. The method 1300 is for forming an array of vertical-cavity surface-emitting laser (VCSELs) on a common substrate, wherein forming each VCSEL of the plurality of VCSELs includes at 1310, forming a first reflector structure formed above a first surface of the substrate and at 1320, forming a second reflector structure formed above the first surface of the substrate. The method 1300 further includes at 1330, forming an active region formed above the first surface of substrate between the first reflector structure and the second reflector structure, the active region comprising one or more multiple- quantum-wells (MQWs) regions and one or more oxide layers defining an aperture region. Further, at 1340, the method 1300 includes forming a grating layer formed on a first surface of the first reflector structure facing away from the substrate, the grating layer comprising a plurality of gratings, wherein the plurality of gratings extends parallel along a first direction in a first plane that is parallel to the first surface of the first reflector structure. Wherein for the method 1300, at 1350, for each respectively formed VCSEL of the VCSEL array, a height of the plurality of gratings in the grating layer of VCSEL, measured along a direction perpendicular to the first plane, is a function of a position of the respectively formed VCSEL. The following examples relate to further aspects of the present disclosure: Example 1 is an optoelectronic device including an array of vertical-cavity surface-emitting lasers (VCSELs) formed on a common substrate, each VCSEL of the VCSEL array comprising: a first reflector structure formed above a first surface of the substrate; a second reflector structure formed above the first surface of the substrate; an active region formed above the first surface of substrate between the first reflector structure and the second reflector structure comprising: one or more multiple-quantum-wells (MQWs) regions, one or more oxide layers defining an aperture region; and a grating layer formed on a first surface of the first reflector structure facing away from the substrate, the grating layer comprising a plurality of gratings, wherein the plurality of gratings extend parallel along a first direction in a first plane that is parallel to the first surface of the first reflector structure; wherein for each respective VCSEL of the VCSEL array, a height of the plurality of gratings in the grating layer of VCSEL, measured along a direction perpendicular to the first plane, is a function of a position of the respective VCSEL. Example 2 is the subject matter of Example 1, wherein for each respective VCSEL of the VCSEL array, the height of the plurality of gratings in the grating layer may be a function of a position of the respective VCSEL with respect to a predefined region of the VCSEL array. Example 3 is the subject matter of Example 2, wherein the VCSEL array may comprise one or more first VCSELs each having a distance from the predefined region that is less than or equal to a first threshold distance, wherein the VCSEL array may comprise one or more second VCSELs each having a distance from the predefined region that is more than the first threshold distance, and wherein the heights of the gratings of the one or more first VCSELs may be shorter or less than the heights of the gratings of the one or more second VCSELs. Example 4 is the subject matter of Example 3, wherein the VCSEL array may comprise one or more third VCSELs each having a distance from the predefined region that is greater than to a second threshold distance, wherein the one or more first VCSELs and the one or more second VCSELs may each have a distance from the predefined region that is less than or equal to a second threshold distance, wherein the heights of the gratings of the one or more third VCSELs may be greater than the heights of the gratings of the one or more second VCSELs and the one or more first VCSELs. Example 5 is the subject matter of Example 3 or 4, wherein distances between the VCSELs and the predefined region may be linear distances measured along the first plane. Example 6 is the subject matter of Example 5, wherein distances between the VCSELs and the predefined region may be measured between a center of the VCSELs and a center the predefined region. Example 7 is the subject matter of any of Examples 2 to 6, wherein the predefined region may correspond to a region that experiences a temperature greater than a predefined threshold when the VCSEL array is operating. Example 8 is the subject matter of any of Examples 2 to 7, wherein the predefined region may correspond to a region that experiences a highest temperature of the VCSEL array when the apparatus is operating. Example 9 is the subject matter of any of Examples 2 to 8, wherein the predefined region may correspond to a region surrounding a geometric center of the VCSEL region. Example 10 is the subject matter of Example 9, wherein the predefined region may include one or more VCSELs located at a center of the VCSEL array. Example 11 is the subject matter of any of Examples 1 to 10, wherein each of the VCSELs of the VCSEL array may be configured to emit an optical beam with linear polarization. Example 12 is the subject matter of Example 11, wherein the emitted optical beam may be predominantly linearly polarized along the first direction. Example 13 is the subject matter of any of Examples 1 to 12, wherein one or more of the VCSELs of the VCSEL array may include multijunction active region comprising a plurality of multiple-quantum-wells (MQWs) regions, a plurality of oxide layers, each defining an aperture region, and a plurality of tunnel junctions. Example 14 is the subject matter of any of Examples 1 to 12, wherein one or more of the VCSELs of the VCSEL array may include a single junction active region comprising a single multiple-quantum-wells (MQWs) region and single oxide layer defining an aperture region. Example 15 is the subject matter of any of Examples 1 to 14, wherein for each VCSEL, the gratings can be defined by a plurality of trenches extending in a direction perpendicular to the first plane. Example 16 is the subject matter of Example 15, wherein the plurality of trenches can be blind holes. Example 17 is the subject matter of Example 15, wherein the plurality of trenches can be through-holes. Example 18 is the subject matter of any of Examples 1 to 17, wherein for each VCSEL of the VCSEL array, the gratings may be arranged to overlap with be arranged over the aperture region defined by the one or more oxide layers of the active region of the VCSEL from a perspective facing the substrate. Example 19 is the subject matter of any of Examples 1 to 18, wherein the one or more multiple-quantum-wells (MQWs) regions and the one or more oxide layers can be a plurality of epitaxially stacked layers. Example 20 is the subject matter of any of Examples 1 to 19, wherein the substrate can include or be a semiconductor substrate. Example 21 is the subject matter of Example 20, wherein the semiconductor substrate can be or include a gallium arsenide substrate. Example 22 is the subject matter of any of Examples 1 to 21, wherein the first mirror structure can include a first distributed Bragg reflector (DBR) having a first conductivity type, and wherein the second mirror structure can include a second DBR having a second conductivity type, wherein the first conductivity type is opposite to the second conductivity type. Example 23 is the subject matter of any of Examples 1 to 22, which may further include a common cathode disposed on or over a second surface of the substrate, the second surface being opposite to the first surface of the substrate, and wherein each VCSEL of the VCSEL array comprises an anode disposed over the first surface of the substrate and disposed on or over the first reflector structure. Example 1A is a method for forming an array of vertical- cavity surface-emitting lasers (VCSELs) on a common substrate comprising, wherein forming each VCSEL of the VCSEL array comprises: forming a first reflector structure formed above a first surface of the substrate; forming a second reflector structure formed above the first surface of the substrate; forming an active region formed above the first surface of substrate between the first reflector structure and the second reflector structure, the active region comprising one or more multiple-quantum-wells (MQWs) regions and one or more oxide layers defining an aperture region; and forming a grating layer formed on a first surface of the first reflector structure facing away from the substrate, the grating layer comprising a plurality of gratings, wherein the plurality of gratings extend parallel along a first direction in a first plane that is parallel to the first surface of the first reflector structure, wherein for each respectively formed VCSEL of the VCSEL array, a height of the plurality of gratings in the grating layer of VCSEL, measured along a direction perpendicular to the first plane, is a function of a position of the respectively formed VCSEL. Example 2A is the subject matter of Example 1A, wherein forming the grating layer for each VCSEL may further include: forming a semiconductor layer on the first surface of the first reflector structure, and forming the plurality of gratings by patterning the semiconductor layer. Example 3A is the subject matter of Example 2A, wherein patterning the semiconductor layer may comprise performing lithographic etching. Example 4A is the subject matter of Example 2A or 3A, wherein the semiconductor layer may comprise a gallium arsenide layer. Example 5A is the subject matter of any of Examples 1A to 4A, wherein for each respective VCSEL of the VCSEL array, the height of the plurality of gratings in the grating layer may be a function of a position of the respective VCSEL with respect to a predefined region of the VCSEL array. Example 6A is the subject matter of Example 5A, wherein the VCSEL array may comprise one or more first VCSELs each having a distance from the predefined region that is less than or equal to a first threshold distance, wherein VCSEL array may comprise one or more second VCSELs each having a distance from the predefined region that is more than the first threshold distance, and wherein the heights of the gratings of the one or more first VCSELs is shorter or less than the heights of the gratings of the one or more second VCSELs. Example 7A is the subject matter of Example 6A, wherein the VCSEL array may comprise one or more third VCSELs each having a distance from the predefined region that is greater than to a second threshold distance, wherein the one or more first VCSELs and the one or more second VCSELs each have a distance from the predefined region that may be less than or equal to a second threshold distance, wherein the heights of the gratings of the one or more third VCSELs may be greater than the heights of the gratings of the one or more second VCSELs and greater than the one or more first VCSELs. Example 8A is the subject matter of Example 6A or 7A, wherein distances between the VCSELs and the predefined region may be linear distances measured along the first plane. Example 9A is the subject matter of Example 8A, wherein distances between the VCSELs and the predefined region may be measured or determined as distances between a center of the VCSELs and a center the predefined region. Example 10A is the subject matter of any of Examples 5A to 9A, wherein the predefined region may correspond to a region that experiences a temperature greater than a predefined threshold when the VCSEL array is operating. Example 11A is the subject matter of any of Examples 5A to 10A, wherein the predefined region may correspond to a region that experiences a highest temperature of the VCSEL array when the apparatus is operating. Example 12A is the subject matter of any of Examples 5A to 11A, wherein the predefined region may correspond to a region surrounding a geometric center of the VCSEL region. Example 13A is the subject matter of Example 12A, wherein the predefined region may include one or more VCSELs located at a center of the VCSEL array. Any of the aspects, examples, and / or embodiments described herein may be suitable or appropriately combined. The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any example or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other examples or designs. For the purposes of the present disclosure, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C). Reference to "one embodiment" or "an embodiment" in the present disclosure means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase "in one embodiment" or "in an embodiment" are not necessarily all referring to the same embodiment. The appearances of the phrase "for example," "in an example," or "in some examples" are not necessarily all referring to the same example. The words “plurality” and “multiple” in the description or the claims expressly refer to a quantity greater than one. The terms “group (of)”, “set [of]”, “collection (of)”, “series (of)”, “sequence (of)”, “grouping (of)”, etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state “plurality” or “multiple” likewise refers to a quantity equal to or greater than one. The term “connected” can be understood in the sense of a (e.g. mechanical, optical and / or electrical), e.g. direct or indirect, connection and / or interaction. For example, several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain). As used herein, unless otherwise specified the use of the ordinal adjectives “first”, “second”, “third” etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner. As utilized herein, terms "module", "component," "system," "circuit," "element," "slice," "circuitry," and the like are intended to refer to a set of one or more electronic components, a computer-related entity, hardware, software (e.g., in execution), and / or firmware. For example, circuitry or a similar term can be a processor, a process running on a processor, a controller, an object, an executable program, a storage device, and / or a computer with a processing device. By way of illustration, an application running on a server and the server can also be circuitry. One or more circuits can reside within the same circuitry, and circuitry can be localized on one computer and / or distributed between two or more computers. A set of elements or a set of other circuits can be described herein, in which the term "set" can be interpreted as "one or more." Such electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors. The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, circuitry can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute executable instructions stored in computer readable storage medium and / or firmware that confer(s), at least in part, the functionality of the electronic components. As another example, circuitry or similar term can be implemented in hardware such as application specific integrated circuit (ASIC), programmable gate array (PGA), discrete digital circuits, etc.) or in a combination of hardware and software (e.g., a software model executed by a corresponding processor). The term "semiconductor substrate" can mean any construction comprising semiconductor material, for example, a silicon substrate with or without an epitaxial layer, a silicon-on- insulator substrate containing a buried insulator layer, or a substrate with a silicon germanium layer. A lateral direction is understood to mean a direction that runs, in particular, parallel to a main extension surface of the component, in particular of a layer. A vertical direction is understood to mean a direction that is oriented, in particular, perpendicular to the main extension surface of the component and / or layer. The vertical direction and the lateral direction are approximately orthogonal to each other. Further, spatially relative terms, such as "beneath," "below," "lower," "above," "upper" and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. The term "data" as used herein may be understood to include information in any suitable analog or digital form, e.g., provided as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, and the like. Further, the term "data" may also be used to mean a reference to information, e.g., in form of a pointer. The term data, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art. As used herein, a signal that is "indicative of" a value or other information may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and / or cause a responsive action in a component receiving the signal. The signal may be stored or buffered in computer readable storage medium prior to its receipt by the receiving component and the receiving component may retrieve the signal from the storage medium. Further, a "value" that is "indicative of" some quantity, state, or parameter may be physically embodied as a digital signal, an analog signal, or stored bits that encode or otherwise communicate the value. Unless otherwise stated, the words “about” and “substantially” as used herein are to be construed as meaning the normal measuring and / or fabrication limitations related to the value or condition which the word “about” or “substantially” modifies. Unless expressly stated otherwise, the term “embodiment” is used herein to mean an embodiment of the present disclosure. As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to change characteristics such as phase, amplitude, frequency, and so on. The signal may be referred to as the same signal even as such characteristics are adapted. In general, so long as a signal continues to encode the same information, the signal may be considered as the same signal. For example, a transmit signal may be considered as referring to the transmit signal in baseband, intermediate, and radio frequencies. While the above descriptions and connected figures may depict device components as separate elements, skilled persons will appreciate the various possibilities to combine or integrate discrete features, functions into a single element. Such may include combining two or more components into a single component. Conversely, skilled persons will recognize the possibility to separate a single element into two or more discrete elements, such as splitting a single component into two or more separate components. It is appreciated that implementations of methods detailed herein are exemplary in nature, and are thus understood as capable of being implemented in a corresponding device. Likewise, it is appreciated that implementations of devices detailed herein are understood as capable of being implemented as a corresponding method. It is thus understood that a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method. All acronyms defined in the above description additionally hold in all claims included herein. While embodiments of the present disclosure have been described above, it is obvious that further embodiments may be implemented. For example, further embodiments may comprise any subcombination of features recited in the claims or any subcombination of elements described in the examples given above. Accordingly, this spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. While the disclosure has been particularly shown and described with reference to specific embodiments, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims. The scope of the disclosure is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced.

[0002] Reference Numeral List AR active region T1, T2, T3 temperature zones in VCSEL array h1, h2, h3 grating heights / etching depths of different VCSELS 100 vertical cavity surface emitting laser (VCSEL) 105 distributed Bragg reflector (DBR) 110 DBR 112 dBR layer 114 dBR layer 120 multiple quantum-wells (MQW) layer / region 130 oxide layer 140 semiconductor substrate 150 aperture region 160 cathode 165 anode 190 cap / grating layer 195 surface gratings 200 multijunction VCSEL 500 VCSEL array / VCSEL die 505 single-aperture VCSEL 600 graph 900a, 900b graphs 1000 VCSEL array / VCSEL die 1005 VCSELs 1005a, 1005b, 1005c first, second, third VCSELs 1100 graph 1200 optoelectronic device 1210 VCSEL array / VCSEL die 1220 VCSEL driver 1230 power supply 1240 processor(s) 1300, 1310-1350 method

Claims

CLAIMS 1. An optoelectronic device comprising: an array of vertical-cavity surface-emitting lasers (VCSELs) formed on a common substrate, each VCSEL of the VCSEL array comprising: a first reflector structure formed above a first surface of the substrate; a second reflector structure formed above the first surface of the substrate; an active region formed above the first surface of substrate between the first reflector structure and the second reflector structure comprising one or more multiple-quantum-wells (MQWs) regions, one or more oxide layers defining an aperture region, and a grating layer formed on a first surface of the first reflector structure facing away from the substrate, the grating layer comprising a plurality of gratings, wherein the plurality of gratings extend parallel along a first direction in a first plane that is parallel to the first surface of the first reflector structure, wherein for each respective VCSEL of the VCSEL array, a height of the plurality of gratings in the grating layer of VCSEL, measured along a direction perpendicular to the first plane, is a function of a position of the respective VCSEL.

2. The optoelectronic device of claim 1, wherein for each respective VCSEL of the VCSEL array, the height of the plurality of gratings in the grating layer is a function of a position of the respective VCSEL with respect to a predefined region of the VCSEL array.

3. The optoelectronic device of claim 2, wherein the VCSEL array comprises one or more first VCSELs each having a distance from the predefined region that is less than or equal to a first threshold distance,wherein the VCSEL array comprises one or more second VCSELs each having a distance from the predefined region that is more than the first threshold distance, and wherein the heights of the gratings of the one or more first VCSELs is shorter or less than the heights of the gratings of the one or more second VCSELs.

4. The optoelectronic device of claim 3, wherein the VCSEL array comprises one or more third VCSELs each having a distance from the predefined region that is greater than to a second threshold distance, wherein the one or more first VCSELs and the one or more second VCSELs each have a distance from the predefined region that is less than or equal to a second threshold distance, wherein the heights of the gratings of the one or more third VCSELs is greater than the heights of the gratings of the one or more second VCSELs and the one or more first VCSELs.

5. The optoelectronic device of claim 3, wherein distances between the VCSELs and the predefined region are linear distances measured along the first plane.

6. The optoelectronic device of claim 5, wherein distances between the VCSELs and the predefined region measured between a center of the VCSELs and a center the predefined region.

7. The optoelectronic device of claim 2, wherein the predefined region corresponds to a region that experiences a temperature greater than a predefined threshold when the VCSEL array is operating.

8. The optoelectronic device of claim 2, wherein the predefined region corresponds to a region that experiences a highest temperature of the VCSEL array when the apparatus is operating.

9. The optoelectronic device of claim 2,wherein the predefined region corresponds to a region surrounding a geometric center of the VCSEL region.

10. The optoelectronic device of claim 9, wherein the predefined region includes one or more VCSELs located at a center of the VCSEL array.

11. The optoelectronic device of claim 1, wherein each of the VCSELs is configured to emit an optical beam with linear polarization.

12. The optoelectronic device of claim 11, wherein the emitted optical beam is predominantly linearly polarized along the first direction.

13. The optoelectronic device of any of claims 1 to 12, wherein one or more of the VCSELs of the VCSEL array include multijunction active region comprising a plurality of multiple-quantum-wells (MQWs) regions, a plurality of oxide layers, each defining an aperture region, and a plurality of tunnel junctions.

14. The optoelectronic device of any of claims 1 to 12, wherein one or more of the VCSELs of the VCSEL array include a single junction active region comprising a single multiple- quantum-wells (MQWs) region and single oxide layer defining an aperture region 15. The optoelectronic device of any of claims 1 to 12, wherein for each VCSEL, the gratings can be defined by a plurality of trenches extending in a direction perpendicular to the first plane.

16. The optoelectronic device of claim 15, wherein the plurality of trenches comprises blind holes.

17. The optoelectronic device of claim 15, wherein the plurality of trenches comprises through-holes.

18. The optoelectronic device of any of claims 1 to 12, wherein for each VCSEL of the VCSEL array, the gratings are arranged to overlap with be arranged over the aperture region defined by the one or more oxide layers of the active region of the VCSEL from a perspective facing the substrate.

19. The optoelectronic device of any of claims 1 to 12, wherein the one or more multiple-quantum-wells (MQWs) regions and the one or more oxide layers comprise a plurality of epitaxially stacked layers.

20. The optoelectronic device of any of claims 1 to 12, wherein the substrate can include or be a semiconductor substrate.

21. The optoelectronic device of claim 20, wherein the semiconductor substrate comprises a gallium arsenide substrate.

22. The optoelectronic device of any of claims 1 to 12, wherein the first mirror structure includes a first distributed Bragg reflector (DBR) having a first conductivity type, and wherein the second mirror structure includes a second DBR having a second conductivity type, wherein the first conductivity type is opposite to the second conductivity type.

23. The optoelectronic device of any of claims 1 to 12, further comprising a common cathode disposed on or over a second surface of the substrate, the second surface being opposite to the first surface of the substrate, and wherein each VCSEL of the VCSEL array comprises an anode disposed over the first surface of the substrate and disposed on or over the first reflector structure.

24. A method for forming an array of vertical-cavity surface- emitting lasers (VCSELs) on a common substrate comprising, wherein forming each VCSEL of the VCSEL array comprises: forming a first reflector structure formed above a first surface of the substrate; forming a second reflector structure formed above the first surface of the substrate; forming an active region formed above the first surface of substrate between the first reflector structure and the second reflector structure, the active region comprising one or more multiple-quantum-wells (MQWs) regions and one or more oxide layers defining an aperture region; and forming a grating layer formed on a first surface of the first reflector structure facing away from the substrate, the grating layer comprising a plurality of gratings, wherein the plurality of gratings extend parallel along a first direction in a first plane that is parallel to the first surface of the first reflector structure, wherein for each respectively formed VCSEL of the VCSEL array, a height of the plurality of gratings in the grating layer of VCSEL, measured along a direction perpendicular to the first plane, is a function of a position of the respectively formed VCSEL.

25. The method of claim 24, wherein forming the grating layer for each VCSEL comprises: forming a semiconductor layer on the first surface of the first reflector structure, and forming the plurality of gratings by patterning the semiconductor layer.

26. The method of claim 25, wherein patterning the semiconductor layer comprises performing lithographic etching.

27. The method of claim 25,wherein the semiconductor layer comprises a gallium arsenide layer.

28. The method of claim 24, wherein for each respective VCSEL of the VCSEL array, the height of the plurality of gratings in the grating layer is a function of a position of the respective VCSEL with respect to a predefined region of the VCSEL array.

29. The method of claim 28, wherein VCSEL array comprises one or more first VCSELs each having a distance from the predefined region that is less than or equal to a first threshold distance, wherein VCSEL array comprises one or more second VCSELs each having a distance from the predefined region that is more than the first threshold distance, and wherein the heights of the gratings of the one or more first VCSELs is shorter or less than the heights of the gratings of the one or more second VCSELs.

30. The method of claim 29, wherein VCSEL array comprises one or more third VCSELs each having a distance from the predefined region that is greater than to a second threshold distance, wherein the one or more first VCSELs and the one or more second VCSELs each have a distance from the predefined region that is less than or equal to a second threshold distance, wherein the heights of the gratings of the one or more third VCSELs is greater than the heights of the gratings of the one or more second VCSELs and greater than the one or more first VCSELs.

31. The method of claim 29, wherein distances between the VCSELs and the predefined region are linear distances measured along the first plane.

32. The method of claim 31, wherein distances between the VCSELs and the predefined region may be measured or determined as distances between a center of the VCSELs and a center the predefined region.

33. The method of any of claims 28 to 32, wherein the predefined region corresponds to a region that experiences a temperature greater than a predefined threshold when the VCSEL array is operating.

34. The method of any of claims 28 to 33, wherein the predefined region corresponds to a region that experiences a highest temperature of the VCSEL array when the apparatus is operating.

35. The method of any of claims 28 to 33, wherein the predefined region corresponds to a region surrounding a geometric center of the VCSEL region.

36. The method of claim 35, wherein the predefined region includes one or more VCSELs located at a center of the VCSEL array.

Images