Fast-converging rogowski coil integrator in electric energy metering chip

Abstract

A fast-converging Rogowski coil integrator in an electric energy metering chip. The electric energy metering chip comprises a Rogowski coil, an ADC module and an electric energy metering processing module that are connected in sequence. The integrator is a bilinear integrator. The integrator is arranged between the ADC module and the electric energy metering processing module in the electric energy metering chip, and is used for processing a current path. A current inputted into the electric energy metering chip is subjected to differential processing by means of the Rogowski coil, so as to obtain a current differential signal; the current differential signal is sampled by means of the ADC module, and is then restored to a current signal by means of the bilinear integrator; and the electric energy metering processing module performs an electric energy metering operation on the restored current signal. By means of adjusting two constant coefficients, a bilinear integrator can enable a current signal to successively approach a stable value in segments, so as to realize fast convergence with high phase-shift accuracy, and prevent overflow under different metering bandwidths.

Description

A fast-converging ROGOWSKI coil integrator in an energy metering chip Technical Field

[0001] This invention relates to a Rogowski coil integrator, and more particularly to a fast-converging Rogowski coil integrator for use with an energy metering chip. Background Technology

[0002] This section provides only background information relevant to this disclosure and is not necessarily prior art.

[0003] A Rogowski coil is an alternating current sensor, a hollow toroidal coil available in both flexible and rigid forms. It is directly wrapped around the conductor being measured to measure alternating current. Rogowski coils are commonly used for current measurement, especially high-frequency, high-current measurements, and are indispensable devices for current measurement. Also called a current measuring coil or differential current sensor, a Rogowski coil is a toroidal coil uniformly wound on a non-ferromagnetic material. The output signal is the differential of the current with respect to time. By using a circuit in the power metering chip to integrate the Rogowski coil's output signal, the input current can be accurately reproduced.

[0004] In the field of power metering, to realize the application of differential current sensors, i.e. Rogowski coils, it is necessary to implement a digital integrator of the Rogowski coil output signal in the power metering chip. There are three problems that need to be solved.

[0005] First, the transfer function of an ideal digital integrator contains a pole at z=1. This pole causes the ideal digital integrator to be unstable and divergent. Therefore, it is necessary to construct a stable, approximate bilinear digital integrator.

[0006] Second, from a system perspective, the bilinear digital integrator mentioned above can achieve relatively high accuracy, but it cannot achieve fast signal convergence. Therefore, it is necessary to achieve fast convergence while meeting accuracy requirements, and at the same time, the circuit structure should be simple to save area overhead.

[0007] Third, power metering chips often need to support different metering bandwidths. Therefore, filter design often needs to support a flexible and adjustable signal frequency to prevent overflow, and has good flexibility and portability.

[0008] In electricity metering, current transformers are essential devices for measuring current. In addition to traditional electromagnetic current transformers, power systems also use differential current transformers that use Rogowski coils as current sampling elements.

[0009] The novel current sensor employing a Rogowski coil can operate in a differential state, where the transformer outputs not a current signal, but rather the derivative of that current signal. When the external sampling circuit uses a Rogowski coil, the input current signal needs to be integrated to accurately reconstruct the sampled current signal. Therefore, designing a suitable integration stage to restore the derivative current signal output by the Rogowski coil to a true current signal is a crucial step in using Rogowski coils for energy metering.

[0010] In the prior art, the integrator for Rogowski coils and its implementation method (CN1821794A) and the method for fast and high-precision calibration of Rogowski coil meters (CN115932707A) use analog implementations to achieve stable digital integrators. The methods described below do not have the capability to solve problems two and three.

[0011] In summary, the existing technology has the following drawbacks:

[0012] The stability problem of digital integrators is that the transfer function of an ideal digital integrator has a pole at z=1, which can lead to system instability and divergence.

[0013] The signal convergence speed is slow. Although the existing bilinear digital integrator can achieve high accuracy, its convergence speed is slow when processing signals, and it cannot track and process rapidly changing signals in a timely manner.

[0014] Lacking flexibility and overflow prevention mechanisms, power metering chips need to support signal measurement at different frequencies. Existing filter designs lack flexibility in dealing with frequency changes, and may cause overflow due to fluctuations in signal bandwidth and filter gain.

[0015] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0016] Purpose of the invention: The technical problem to be solved by the present invention is to provide a Rogowski coil integrator with fast convergence under an energy metering chip, which addresses the shortcomings of the prior art.

[0017] To address the aforementioned technical problems, this invention discloses a fast-converging Rogowski coil integrator within an energy metering chip. The energy metering chip includes a Rogowski coil, an ADC module, and an energy metering processing module connected sequentially. The integrator is a bilinear integrator, positioned between the ADC module and the energy metering processing module within the energy metering chip, and is used to process the current path.

[0018] The current input to the energy metering core is differentiated through a Rogowski coil to obtain a differential current signal. This differential current signal is sampled by the ADC module and then restored to a current signal by the bilinear integrator. The energy metering processing module performs energy metering calculations on the restored current signal.

[0019] Furthermore, the system function of the bilinear integrator is expressed as follows:

[0020] Wherein, H(z) is the system function of the bilinear integrator, and Ka and Kb are the first and second constant coefficients.

[0021] Furthermore, the bilinear integrator includes:

[0022] It has 4 registers, 2 adders, and 2 multipliers; among them,

[0023] There are four registers: the first input register XD0, the second input register XD1, the intermediate result register YD1, and the output result register Y.

[0024] The first adder S1 is used to calculate the sum of the first input register XD0 and the second input register XD1, and the second adder S2 is used to calculate the sum of the output of the first multiplier M1 and the output of the second multiplier M2;

[0025] The second multiplier M2 is used to calculate the product of the intermediate result register YD1 and the second constant coefficient Kb, and the first multiplier M1 is used to calculate the product of the first adder S1 and the first constant coefficient Ka.

[0026] The first constant coefficient Ka is the coefficient of the first multiplier M1, and the second constant coefficient Kb is the coefficient of the second multiplier M2.

[0027] Furthermore, the bilinear integrator also includes:

[0028] The second constant coefficient parameter switching module is used to set the second constant coefficient Kb in different time periods.

[0029] Furthermore, the second constant coefficient Kb is set in different time periods, specifically including:

[0030] Set Kb during the preset time period T1 to make the current signal converge quickly to a stable value, and then set Kb again during the preset time period T2 to make the output of the bilinear integrator approach the target accuracy.

[0031] Furthermore, the second constant coefficient Kb is set in different time periods, specifically including:

[0032] For time period T1, set Kb = 4095 / 4096; for time period T2, set Kb = 32767 / 32768.

[0033] Furthermore, the bilinear integrator also includes:

[0034] The first constant coefficient parameter adjustment module is used to adjust the value of the first constant coefficient Ka according to the frequency of the input signal.

[0035] Furthermore, the method for adjusting the value of the first constant coefficient Ka according to the frequency of the input signal is as follows: adjust the value of the first constant coefficient Ka so that the restored current signal does not exceed the maximum range of the chip.

[0036] Furthermore, the preset T1 time period is the time interval that satisfies the error between the current signal and the stable signal being ≥10%.

[0037] Furthermore, the preset T2 time period is the time interval that satisfies the condition that the error between the current signal and the stable signal is ≤10% (0.1%). Beneficial effects:

[0038] 1. The bilinear digital integrator designed in this invention features a relatively simplified architecture, focusing on processing the current path while neglecting the voltage path, resulting in a simpler and more efficient system architecture. By processing the current signal, the bilinear integrator effectively performs signal integration, making it suitable for real-time and accurate signal sampling and analysis. In its design, by adjusting two key constant parameters of the filter, the integrator can flexibly control different relative phase shift errors and settling times, thus meeting the filtering performance requirements of various application scenarios. Because this filter design has excellent convergence, it can reach the expected steady state in a shorter time, thereby improving the efficiency and accuracy of signal processing.

[0039] 2. To further improve the response speed and convergence performance of the integrator, this invention introduces a piecewise successive approximation fast convergence scheme. The constant parameter Kb, under the dynamic control of the automatic parameter switching module, effectively achieves this design. Specifically, the system gradually adjusts the value of Kb according to the current stage of signal processing, enabling the entire integrator to quickly converge to the target value through piecewise successive approximation. The advantage of this design is that it can significantly shorten the convergence time while meeting measurement accuracy requirements, ensuring rapid system stabilization, making it particularly suitable for applications with high response speed requirements.

[0040] 3. In digital signal processing, the amplitude and frequency of the signal can change depending on different application requirements. Therefore, an overflow prevention mechanism that can adapt to various frequency variations is needed. To this end, the system introduces a control design with a constant parameter Ka. Through the adjustment of the automatic shift module, the signal frequency can be flexibly adjusted, avoiding overflow problems in the integrator during processing. This design not only effectively improves the stability of the system but also greatly enhances its portability and adaptability in different application environments. Regardless of the signal frequency change, the overflow prevention design ensures the reliability of system operation and avoids calculation errors caused by excessive signal amplitude.

[0041] By combining the three design approaches described above, this invention not only possesses a simple structure but also features rapid convergence and overflow prevention, effectively meeting the signal processing needs of various applications. This design method not only improves the overall performance of the system but also provides an efficient and flexible solution for future digital signal processing. Attached Figure Description

[0042] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments, and the advantages of the present invention in the above and / or other aspects will become clearer.

[0043] Figure 1 is a block diagram of the application of Rogowski coil under the power metering chip.

[0044] Figure 2 is a hardware block diagram of a digital bilinear integrator.

[0045] Figure 3 is a schematic diagram of the amplitude-frequency characteristics of the Rogowski coil differentiator.

[0046] Figure 4 is a schematic diagram of the amplitude-frequency characteristics of a bilinear integrator.

[0047] Figure 5 is a schematic diagram showing the effect of constant coefficients on the amplitude-frequency characteristics of a bilinear integrator.

[0048] Figure 6 is a schematic diagram of the convergence time of the bilinear integrator under different Kb values. Detailed Implementation

[0049] The overall design concept of this invention is as follows:

[0050] Improving the stability of the digital integrator: By constructing a stable, approximately bilinear digital integrator, the pole problem at z=1 in an ideal integrator is avoided, ensuring the stability of the system under various conditions. Accelerating signal convergence: A digital integrator with faster convergence speed is designed to ensure accuracy, enabling rapid processing of changing signals and improving the real-time performance of the system. Enhancing flexibility and overflow prevention: A filter supporting flexible frequency adjustment is designed, and an overflow prevention mechanism is introduced to ensure stable operation of the system under different bandwidths and frequencies, while also possessing strong portability to adapt to application requirements in various power metering environments.

[0051] Specifically, the technical solution of the present invention is designed as follows:

[0052] I. Design of a simple bilinear integrator:

[0053] The bilinear digital integrator is a relatively simplified design architecture that focuses on processing the current path while neglecting the voltage path, resulting in a simpler and more efficient system architecture. By processing the current signal, the bilinear integrator can effectively perform signal integration, making it suitable for real-time and accurate signal sampling and analysis. In its design, by adjusting two key constant parameters of the filter, the integrator can flexibly control different relative phase shift errors and settling times, thus meeting the filtering performance requirements of various application scenarios. Because this filter design has excellent convergence, it can reach the expected steady state in a shorter time, thereby improving the efficiency and accuracy of signal processing.

[0054] II. Fast convergence design using piecewise successive approximation:

[0055] To further improve the integrator's response speed and convergence performance, a piecewise successive approximation fast convergence scheme is introduced in the design. This design is effectively implemented by dynamically controlling the constant parameter Kb under the automatic parameter switching module. Specifically, the system gradually adjusts the value of Kb according to the current stage of signal processing, enabling the entire integrator to converge quickly to the target value through piecewise successive approximation. The advantage of this design is that it can significantly shorten the convergence time while meeting measurement accuracy requirements, ensuring rapid system stabilization, making it particularly suitable for applications with high response speed requirements.

[0056] III. Supports a flexible and adjustable signal frequency anti-overflow design:

[0057] In digital signal processing, the amplitude and frequency of a signal can change depending on the application requirements. Therefore, an overflow prevention mechanism that can adapt to various frequency variations is needed. To address this, the system introduces a control design with a constant parameter Ka. Through the adjustment of an automatic shift module, the signal frequency can be flexibly adjusted, preventing overflow issues in the integrator during processing. This design not only effectively improves the system's stability but also greatly enhances its portability and adaptability in different application environments. Regardless of the signal frequency variation, the overflow prevention design ensures the reliability of system operation and avoids calculation errors caused by excessively large signal amplitudes.

[0058] By combining these three design approaches, the bilinear integrator not only possesses a simple structure but also features fast convergence and overflow prevention, effectively meeting the signal processing needs of various applications. This design method not only improves the overall system performance but also provides an efficient and flexible solution for future digital signal processing.

[0059] Example:

[0060] Figure 1 shows the application block diagram of the fast-converging Rogowski coil integrator under the power metering chip. The large current in the power system is differentiated by the Rogowski coil. The output current differential signal is sampled by the ADC of the power metering chip, and after being processed by the bilinear integrator, it is restored to the current signal, which can then be used for power metering and calculation.

[0061] Figure 2 shows the hardware block diagram of a digital bilinear integrator, including four registers, two adder units, and two multiplier units. The four registers are: a first input register XD0, a second input register XD1, an intermediate result register YD1, and an output result register Y. The first adder S1 calculates the sum of the first input register XD0 and the second input register XD1. The second adder S2 calculates the sum of the outputs of the first multiplier M1 and the second multiplier M2. The output of the second multiplier M2 is the result of multiplying the intermediate result register YD1 by a first constant coefficient Kb, and the output of the first multiplier M1 is the result of multiplying the first adder S1 by a first constant coefficient Ka. Ka and Kb are the coefficients of multipliers M1 and M2, respectively.

[0062] Part 1: Design of a Simple Bilinear Integrator

[0063] The behavior of a Rogowski coil (di / dt) sensor in the current channel is analyzed. It differentiates a large current in a power system to output a small current. The system function is as follows: H(z) = 1 - Z - 1

[0064] Its frequency response is shown in Figure 3. After passing through the Rogowski coil, the phase angle of the current signal increases by 90°, and the amplitude increases by 20dB for every tenth harmonic. Within a large bandwidth, the amplitude exhibits high linearity with frequency, while the phase exhibits a 90° phase shift characteristic in the frequency range below 10kHz. Since power metering primarily detects the 50Hz fundamental frequency and its higher harmonics, the 10kHz frequency range clearly meets the bandwidth requirements for power metering.

[0065] Given the Rogowski coil's differentiator amplitude-frequency characteristic, an increase of 90° in phase angle results in a 20dB increase in amplitude per decade. Therefore, the subsequent bilinear integrator needs to reduce the current by 20dB per decade and decrease the phase difference between the current and voltage by 90°. The bilinear integrator can achieve this by integrating the differential current of the Rogowski coil and outputting the original current. The system function of the bilinear integrator is shown below, where Ka and Kb are constant coefficients.

[0066] Its frequency response is shown in Figure 4. After passing through the bilinear integrator, the phase angle of the current signal is reduced by 90°, and the amplitude is reduced by 20dB for every 10 octaves. In the large bandwidth range, the amplitude changes with frequency with high linearity, while the phase has a 90° phase shift characteristic in the frequency range greater than 100Hz, but the phase shift at the fundamental frequency of 50Hz is close to 90°.

[0067] Clearly, the differential current signal obtained by the Rogowski coil can be restored to the original current signal after passing through a bilinear integrator. The poles of the bilinear integrator's transfer function are not at z=1, but rather in the vicinity of z=1. This makes the bilinear integrator a stable, approximate digital integrator. The location of the bilinear integrator's poles depends on the constant coefficient Kb, while the filter gain is adjusted by the constant coefficient Ka.

[0068] Part Two: Fast Convergence Design of Piecewise Successive Approximation

[0069] Thus, the bilinear integrator described above satisfies the first requirement of a stable, approximate bilinear digital integrator. The following section discusses how this invention achieves fast convergence while maintaining accuracy, and also features a simple circuit structure to save area.

[0070] As shown in Figure 5, the constant coefficient Kb affects the phase shift characteristics of the bilinear integrator. Adjusting Kb changes the pole position, causing the poles to shift. As Kb approaches 1, the poles shift to the left, and the phase shift of the bilinear integrator in the low-frequency range approaches 90°. Specifically, for the fundamental frequency of 50Hz, the relative error between the phase of the restored current signal and the original current signal decreases, which can reduce power errors in power metering calculations.

[0071] As the value of Kb gradually approaches 1, the relative phase shift error introduced gradually decreases, and its impact on the measurement results also gradually diminishes. For example, when Kb is 4095 / 4096, 16383 / 16384, and 32767 / 32768, the relative phase shift errors introduced are 0.57°, 0.14°, and 0.07°, respectively.

[0072] However, as Kb approaches 1, the relative phase shift error increases, causing the poles to shift to the left and thus increasing the settling time required by the integrator. For example, when Kb is 4095 / 4096, 16383 / 16384, and 32767 / 32768, the introduced relative phase shift errors are 0.57°, 0.14°, and 0.07°, respectively, but the settling times also become 1.5s, 8.5s, and 15s. Clearly, in power metering applications, it is necessary to simultaneously achieve high-precision metering and a relatively fast settling time throughout the metering process.

[0073] Currently, both measurement accuracy and settling time depend on the coefficient Kb. The larger Kb is, the closer it is to 1, and the closer the integrator is to an ideal integrator, the longer its settling time. ① Considering the requirement for measurement accuracy, a constant coefficient Kb needs to be increased. ② Considering the requirement for measurement settling time, a constant coefficient Kb needs to be reduced. As shown in Figure 6, the settling time for Kb parameters of 32767 / 32768 is much longer than the settling time for Kb parameters of 4095 / 4096. To address this contradiction, this invention further proposes a piecewise successive approximation fast convergence design.

[0074] By using an automatic Kb parameter switching module, Kb employs two sets of coefficients: 4095 / 4096 and 32767 / 32768. During the T1 time period, Kb = 4095 / 4096, causing the current signal to converge quickly to near a stable value. Then, during the T2 time period, Kb = 32767 / 32768, allowing the output of the bilinear integrator to gradually approach the target accuracy. This method shortens the stabilization time from 15s to 7s. While significantly reducing the measurement time, the measurement accuracy is not affected, effectively meeting the accuracy requirements while achieving rapid convergence.

[0075] The T1 time period is defined as a 10% difference between the current signal value and the stable current value. At this point, the current signal is considered to be approaching the stable range, and Kb can be switched to further bring the current signal closer to the stable current value. The T2 time period is defined as a 0.1% difference between the current signal value and the stable current value. At this point, the current signal is considered to have stabilized, and the result calculated using this signal will be close to the correct result.

[0076] Part Three: Overflow Prevention Design with Flexible Signal Frequency Adjustment

[0077] Power metering chips employ a special signal amplitude adjustment method when processing signals of different frequencies. Through the differentiator effect of a Rogowski coil, the signal amplitude increases by 20dB for every tenfold increase in frequency; correspondingly, a bilinear integrator reduces the signal amplitude by 20dB for every tenfold increase in frequency, thus maintaining signal amplitude stability. However, the gain of the bilinear integrator varies with the signal frequency, resulting in inconsistent gain effects at different frequencies. For example, as shown in Figure 5, when the signal frequency reaches 128000Hz, the gain of the bilinear integrator is 38.22dB, while at a signal frequency of 400Hz, the filter gain drops to 7.657dB. This gain variation is particularly significant in the variable bandwidth metering mode of the power metering chip; therefore, overflow prevention measures must be implemented to prevent overflow errors in the calculation results due to changes in filter gain, thereby affecting metering accuracy.

[0078] To address this issue, the power metering chip incorporates an automatic adjustment mechanism for the constant coefficient Ka. By adjusting the Ka value of the multiplier M2 in the bilinear integrator, the data size is adjusted to prevent overflow, ensuring that the restored current signal does not exceed the chip's maximum range. Specifically, based on the different frequencies of the input signal, the chip can automatically perform shift operations and adjust the Ka value to effectively handle filter gain fluctuations caused by frequency variations. Through this dynamic adjustment, the chip ensures accurate power metering over a wide frequency range and avoids calculation errors due to gain changes. This design significantly improves the chip's flexibility, allowing for high-precision signal processing at various frequencies.

[0079] Furthermore, the constant coefficient Ka's effect on overflow prevention can be adjusted through configuration register parameter registers or configuration software. This not only offers excellent flexibility but also strong portability. Users can flexibly configure the metering bandwidth according to specific application scenarios and requirements, thereby meeting the high-precision metering needs of power signals at different frequencies. Simultaneously, due to the design's fast convergence characteristic, users can achieve accurate calculation of power signals in a short time. This design not only enhances the adaptability and application range of the power metering chip but also greatly simplifies the user's configuration operations, making the chip more competitive in practical applications.

[0080] In its specific implementation, this application provides a computer storage medium and a corresponding data processing unit. The computer storage medium is capable of storing a computer program, which, when executed by the data processing unit, can run the invention's content regarding a fast-converging Rogowski coil integrator under an energy metering chip, as well as some or all of the steps in various embodiments. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0081] Those skilled in the art will clearly understand that the technical solutions in the embodiments of the present invention can be implemented using computer programs and their corresponding general-purpose hardware platforms. Based on this understanding, the technical solutions in the embodiments of the present invention, or the parts that contribute to the prior art, can be embodied in the form of computer programs, i.e., software products. These computer program software products can be stored in a storage medium and include several instructions to cause a device containing a data processing unit (which may be a personal computer, server, microcontroller, MCU, or network device, etc.) to execute the methods described in various embodiments or certain parts of the embodiments of the present invention.

[0082] This invention provides a concept and method for a fast-converging Rogowski coil integrator under an energy metering chip. Many methods and approaches exist for implementing this technical solution; the above description is merely a preferred embodiment of the invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this invention, and these improvements and modifications should also be considered within the scope of protection of this invention. All components not explicitly stated in this embodiment can be implemented using existing technologies.

Claims

1. A fast-converging Rogowski coil integrator under an energy metering chip, wherein the energy metering chip includes a Rogowski coil, an ADC module, and an energy metering processing module connected in sequence, characterized in that, The integrator is a bilinear integrator, positioned between the ADC module and the energy metering processing module in the energy metering chip, for processing the current path; wherein... The current input to the energy metering core is differentiated through a Rogowski coil to obtain a differential current signal. This differential current signal is sampled by the ADC module and then restored to a current signal by the bilinear integrator. The energy metering processing module performs energy metering calculations on the restored current signal.

2. The Rogowski coil integrator with fast convergence under an energy metering chip according to claim 1, characterized in that, The system function of the bilinear integrator is expressed as follows: Where H(z) is the system function of the bilinear integrator, K a and K b These are the first and second constant coefficients.

3. The Rogowski coil integrator with fast convergence under an energy metering chip according to claim 2, characterized in that, The bilinear integrator includes: It has 4 registers, 2 adders, and 2 multipliers; among them, There are four registers: the first input register XD0, the second input register XD1, the intermediate result register YD1, and the output result register Y. The first adder S1 is used to calculate the sum of the first input register XD0 and the second input register XD1, and the second adder S2 is used to calculate the sum of the output of the first multiplier M1 and the output of the second multiplier M2; The second multiplier M2 is used to calculate the intermediate result register YD1 and the second constant coefficient K. b The product, the first multiplier M1 is used by the first adder S1 and the first constant coefficient K a The product; First constant coefficient K a The coefficients of the first multiplier M1 are given, and the second constant coefficient K is given. b These are the coefficients of the second multiplier M2.

4. A Rogowski coil integrator with fast convergence under an energy metering chip according to claim 3, characterized in that, The bilinear integrator further includes: The second constant coefficient parameter switching module is used to set the second constant coefficient K in different time periods. b .

5. A Rogowski coil integrator with fast convergence under an energy metering chip according to claim 4, characterized in that, The second constant coefficient K is set according to time period. b Specifically, it includes: Set K within the preset T1 time period. b This allows the current signal to converge quickly to a stable value, and then K is set within the preset time period T2. b This allows the output of the bilinear integrator to approach the target accuracy.

6. A Rogowski coil integrator with fast convergence under an energy metering chip according to claim 5, characterized in that, The second constant coefficient K is set according to time period. b Specifically, it includes: T1 time period setting K b =4095 / 4096; T2 time period setting K b =32767 / 32768.

7. A Rogowski coil integrator with fast convergence under an energy metering chip according to claim 3, characterized in that, The bilinear integrator further includes: The first constant coefficient parameter adjustment module is used to adjust the first constant coefficient K according to the frequency of the input signal. a The value of .

8. A Rogowski coil integrator with fast convergence under an energy metering chip according to claim 7, characterized in that, The first constant coefficient K is adjusted according to the frequency of the input signal. a The value is determined by adjusting the first constant coefficient K. a The value of is such that the restored current signal does not exceed the chip's maximum range.

9. A Rogowski coil integrator with fast convergence under an energy metering chip according to claim 5, characterized in that, The preset T1 time period is the time interval in which the error between the current signal and the stable signal is ≥10%.

10. A Rogowski coil integrator with fast convergence under an energy metering chip according to claim 5, characterized in that, The preset T2 time period is the time interval that satisfies the condition that the error between the current signal and the stable signal is ≤10% (0.1%).

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