Non-interruptive switching system and delay adjustment method
The seamless switching system integrates buffer memory and adjustment units to equalize delays across transmission paths, addressing high device costs and communication interruptions, achieving efficient and cost-effective delay adjustment and seamless switching.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2026-04-02
AI Technical Summary
Existing technologies face challenges in simultaneously achieving delay adjustment and seamless switching in communication networks without causing communication interruptions, leading to high device costs due to separate requirements for delay measurement and seamless switching.
A seamless switching system that integrates a primary and secondary system buffer memory with an adjustment unit to adjust the initial clock frequency based on transmission delays across multiple paths, ensuring equal delay between active and backup transmission lines, thereby reducing device costs while maintaining seamless switching.
The system achieves cost-effective delay adjustment and seamless switching by sharing a FIFO memory for both functions, ensuring equal delays across transmission paths without interrupting communication.
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Figure JP2024034211_02042026_PF_FP_ABST
Abstract
Description
Seamless switching system and delay adjustment method
[0001] The present disclosure relates to a seamless switching system and a delay adjustment method.
[0002] In recent years, in the fields of entertainment including e-sports, culture and art, remote working, education, telemedicine, and securities trading, with the diversification of user usage purposes, it is required that the delays between each base in a communication network connecting multiple remote locations be the same. Especially in telemedicine and securities trading, in addition to delay equalization, high reliability without communication interruption is required.
[0003] Patent Document 1 describes a delay adjustment technique related to equalizing the delays between each base. Patent Documents 2 and 3 describe a seamless switching technique without communication interruption.
[0004] International Publication No. 2022 / 070249, Patent No. 5795673, Patent No. 5610985
[0005] There is no device that simultaneously realizes the delay adjustment technique of Patent Document 1 and the seamless switching techniques of Patent Documents 2 and 3. To simultaneously realize the delay adjustment technique and the seamless switching technique, it may be considered to combine the delay adjustment function block and the seamless switching function block in series, but in this case, the cost becomes high.
[0006] It may also be considered to improve efficiency by integrating the delay adjustment function block and the seamless switching function block. However, since the delay measurement of the seamless switching technique and the delay measurement of the delay adjustment technique have different requirements, the delay insertion method when sharing a FIFO memory becomes an issue.
[0007] The present disclosure has been made in view of the above circumstances, and an object of the present disclosure is to provide a technology capable of reducing the device cost while realizing the delay adjustment technique and the seamless switching technique.
[0008] To achieve the above objective, one aspect of the present disclosure is a seamless switching system comprising: a first transmission device located at a second location that receives a signal transmitted from a first location; and a second transmission device located at the second location that receives a signal transmitted from a third location, wherein the first and second transmission devices each include a seamless switching unit that seamlessly switches between a signal transmitted via an active transmission line and a signal transmitted via a backup transmission line, and the seamless switching unit is: The system includes a primary system buffer memory for writing signals for the primary transmission line, a secondary system buffer memory for writing signals for the secondary transmission line, and an adjustment unit for adjusting the initial value of at least one clock frequency of the primary system buffer memory and the secondary system buffer memory based on a first transmission delay in the primary transmission line between the first and second sites, a second transmission delay in the secondary transmission line between the first and second sites, a third transmission delay in the primary transmission line between the third and second sites, and a fourth transmission delay in the secondary transmission line between the third and second sites.
[0009] One aspect of the present disclosure is a delay adjustment method performed by a seamless switching system, the seamless switching system comprising: a first transmission device located at a second location that receives a signal transmitted from a first location; and a second transmission device located at the second location that receives a signal transmitted from a third location, the first transmission device and the second transmission device each comprising a seamless switching unit that seamlessly switches between a signal transmitted via an active transmission line and a signal transmitted via a backup transmission line, the seamless switching unit comprising: an active system buffer memory for writing the signal of the active transmission line; and a memory for writing the signal of the backup transmission line The system includes a backup buffer memory, and adjusts the initial value of at least one clock frequency of the active buffer memory and the backup buffer memory based on a first transmission delay in the active transmission line between the first and second sites, a second transmission delay in the backup transmission line between the first and second sites, a third transmission delay in the active transmission line between the third and second sites, and a fourth transmission delay in the backup transmission line between the third and second sites, and further adjusts the initial value of the clock frequency so that the delay difference between the signal read from the active buffer memory and the signal read from the backup buffer memory becomes equal.
[0010] According to this disclosure, it is possible to provide a technology that can reduce equipment costs while realizing delay adjustment technology and seamless switching technology.
[0011] Figure 1 is an overall diagram of the transmission system of this embodiment. Figure 2 is a diagram illustrating the first calculation method. Figure 3A shows the change in delay when the clock frequency is reduced. Figure 3B shows the change in delay when the clock frequency is increased. Figure 4 is a diagram illustrating the image of the delay amount. Figure 5 is a flowchart of the delay adjustment process. Figure 6 is a diagram of the transmission device of a comparative example. Figure 7 is an example of hardware configuration.
[0012] Embodiments of this disclosure will be described below with reference to the drawings. In the drawings, the same parts are denoted by the same reference numerals and their descriptions are omitted.
[0013] Figure 1 is an overall configuration diagram showing an example of the transmission system (non-interruptible switching system) of this embodiment. The illustrated transmission system comprises a transmission device 1A located at site A (first site), a transmission device 1B located at site B (third site), and a transmission device 1Z1 (first transmission device) and a transmission device 1Z2 (second transmission device) located at site Z (second site).
[0014] The transmission device 1A at site A and the transmission device 1Z1 at site Z are communicated with each other via redundant transmission lines 81 and 82. The redundant transmission lines 81 and 82 include the primary transmission line 81 and the backup transmission line 82. For example, the transmission device 1A at site A transmits a signal to the transmission device 1Z1 at site Z via transmission lines 81 and 82, and the transmission device 1Z1 at site Z receives the signal transmitted from the transmission device 1A at site A.
[0015] The transmission device 1B at site B and the transmission device 1Z2 at site Z are communicated to each other via redundant transmission lines 91 and 92. The redundant transmission lines 91 and 92 include the primary transmission line 91 and the backup transmission line 92. For example, the transmission device 1B at site B transmits a signal to the transmission device 1Z2 at site Z via transmission lines 91 and 92, and the transmission device 1Z2 at site Z receives the signal transmitted from the transmission device 1B at site B.
[0016] Each of the transmission devices 1A, 1B, 1Z1, and 1Z2 in this embodiment is a device that realizes a delay adjustment function to make the delay between each site uniform (identical) and a seamless switching function that ensures high reliability.
[0017] Furthermore, in communication between transmission device 1A and transmission device 1Z1, the receiving transmission device adjusts the transmission delay difference between the active transmission line 81 and the backup transmission line 82 in order to enable seamless switching. Similarly, in communication between transmission device 1B and transmission device 1Z2, the receiving transmission device adjusts the transmission delay difference between the active transmission line 91 and the backup transmission line 92 in order to enable seamless switching.
[0018] Note that transmission devices 1A, 1B, 1Z1, and 1Z2 may also be referred to as "transmission device 1" if no distinction is made between them.
[0019] The transmission system of this embodiment may include a control device 7. The control device 7 is communicated with each transmission device 1. The control device 7 obtains the transmission delay measured by each transmission device 1 in each transmission path from each transmission device 1, and controls the initial value of the clock frequency of the FIFO memory 32 provided in each transmission device 1 so that all obtained transmission delays are equal. The control of the clock frequency will be described later.
[0020] Figure 2 shows the configurations of transmission device 1A and transmission device 1Z1 as shown in Figure 1.
[0021] The illustrated transmission device 1A comprises a measurement unit 10, a transmitting-side switching unit 20, a receiving-side switching unit 30 (non-interruptible switching unit), a receiving unit 41, and a transmitting unit 42. In this embodiment, the FIFO memory 32 provided in the receiving-side switching unit 30 is shared for both the non-interruptible switching function and the delay adjustment function that ensures uniform delays between each location, thereby reducing the device cost. The other transmission devices 1B, 1Z1, and 1Z2 are similar to the transmission device 1A.
[0022] Here, the transmission device 1A is described as the transmitting device and the transmission device 1Z1 as the receiving device. If the transmission device 1A is a transmitting device that only transmits, it does not need to have a receiving-side switching unit 30. Similarly, if the transmission device 1Z1 is a receiving device that only receives, it does not need to have a measuring unit 10 and a transmitting-side switching unit 20. The same applies to the transmission devices 1B and 1Z2 as to the transmission devices 1A and 1Z1.
[0023] The measurement unit 10 measures the transmission delay of the active transmission line 81 and the backup transmission line 82 between site A (first site) and site Z (second site). The measurement unit 10 transmits the measured transmission delay to the control device 7. Transmission delay means transmission time. Here, the measurement unit 10 may perform delay measurement using DM (Delay Measurement) of ODU (Optical channel Data Unit) overhead as defined by OTN (Optical Transport Network). In addition, the measurement unit 10 measures the time it takes to loop back (round trip) the receiving transmission device 1Z1 during delay measurement and calculates half of the loopback time as the transmission delay.
[0024] Similarly, the measurement unit 10 (not shown) of the transmission device 1B at site B measures the transmission delays of the active transmission line 91 and the backup transmission line 92 between site B (third site) and site Z (second site). The transmission device 1B transmits the measured transmission delays to the control device 7.
[0025] In the example shown in Figure 2, the transmitting devices 1A and 1B measure the transmission delay of each transmission path. However, the transmitting devices 1Z1 and 1Z2 at the receiving Z site may also measure the transmission delay of each transmission path and transmit the measured transmission delay to the control device 7.
[0026] The control device 7 acquires the transmission delay of the active transmission line 81 and the backup transmission line 82 between site A and site Z, as measured by the transmission device 1A, and also acquires the transmission delay of the active transmission line 91 and the backup transmission line 92 between site B and site Z, as measured by the transmission device 1B.
[0027] The control device 7 calculates the delay differences to be set in the respective active FIFO memories 32 and backup FIFO memories 32 of transmission devices 1Z1 and 1Z2, based on the measured transmission delays, so that the first transmission delay in the active transmission line 81 between site A and site Z, the second transmission delay in the backup transmission line between site A and site Z, the third transmission delay in the active transmission line 91 between site B and site Z, and the fourth transmission delay in the backup transmission line 82 between site B and site Z are equal. The calculation of the delay differences will be described later.
[0028] The control device 7 then sets the calculated delay differences in the corresponding FIFO memory 32 as initial values to absorb the transmission delay differences between locations. Specifically, the control device 7 transmits control signals to the clock adjustment units 33 of the corresponding transmission devices 1Z1 and 1Z2 to set the calculated delay differences, and controls the transmission delay using the FIFO memory 32. By intentionally raising or lowering the clock frequency of the FIFO memory 32, it is possible to adjust the delay time while maintaining signal communication. For example, if the read clock frequency is set higher than the write clock frequency, the usage of the FIFO memory 32 gradually decreases, thus shortening the delay time. Conversely, if the read clock frequency is set lower than the write clock frequency, the usage of the FIFO memory 32 gradually increases, thus lengthening the delay time.
[0029] The control device 7 sets the clock frequency corresponding to each delay difference in the clock adjustment unit 33 of the receiving side switching unit 30 of the transmission devices 1Z1 and 1Z2, and similarly sets the clock frequency corresponding to each delay difference in the clock adjustment unit 33 of the receiving side switching unit 30 of the transmission devices 1A and 1B.
[0030] The measurement accuracy of the transmission delay by the measurement unit 10 is such that, in the case of a system where the transmission and reception timings of one frame differ at the beginning or end, an error of ±1 frame of OTN occurs. For this reason, the delay difference using the transmission delay measured by the measurement unit 10 cannot be directly used as the delay difference for seamless switching.
[0031] In this embodiment, the transmission delay between each site is measured in advance, the delay difference for each transmission path is calculated based on the measured transmission delay, and this delay difference is set as the initial value in the clock adjustment unit 33 of the receiving-side switching unit 30, which performs seamless switching. As a result, the transmission device 1 of this embodiment can achieve delay adjustment to equalize the delay between each site using the FIFO memory 32 of the receiving-side switching unit 30, without having to separately provide a FIFO memory 32 for a delay adjustment function to equalize the delay between each site.
[0032] The transmitting-side switching unit 20 comprises a duplication unit 21 and two transmitting units 22 (Tx: Transmitter). The duplication unit 21 duplicates the signal received by the receiving unit 41 to make it redundant. One transmitting unit 22 transmits one of the signals duplicated by the duplication unit 21 to the transmission device 1Z1 via the active transmission line 81. The other transmitting unit 22 transmits the other signal duplicated by the duplication unit 21 to the transmission device 1Z1 via the backup transmission line 82. In this embodiment, an OTN frame is used as the signal transmitted by the transmission device 1A.
[0033] The receiving-side switching unit 30 seamlessly switches between signals transmitted via the active transmission line 81 and signals transmitted via the backup transmission line 82. Specifically, the receiving-side switching unit 30 detects the header of the OTN frame, detects the delay difference between the active transmission line 81 and the backup transmission line 82, and absorbs this delay difference in the FIFO memory 32 to achieve seamless switching.
[0034] This explanation will use the receiver switching unit 30 of the transmission device 1Z1. The receiver switching unit 30 shown in the figure comprises a receiver 31 (Rx), a FIFO memory 32, a clock adjustment unit 33 (adjustment unit), an overhead monitor 34 (OH Monitor), a delay difference detection unit 35, and a selection unit 36.
[0035] The FIFO memory 32 includes an active system FIFO memory 32 (active system buffer memory) for writing signals for the active transmission line, and a backup system FIFO memory 32 (backup system buffer memory) for writing signals for the backup transmission line.
[0036] Each receiving unit 31 receives OTN frames (signals) transmitted from the transmission device 1A via the active transmission line 81 or the backup transmission line 82, regenerates the clock of the received OTN frame, and inputs the received OTN frame into the FIFO memory 32. The regenerated clock is used as the write clock for the FIFO memory 32 and is also input to the clock adjustment unit 33. The clock adjustment unit 33 changes the clock frequency based on control information from the delay difference detection unit 35. Specifically, the clock adjustment unit 33 adjusts the initial value of at least one clock frequency of the active FIFO memory 32 and the backup FIFO memory 32 based on the first transmission delay in the active transmission line between the first and second sites, the second transmission delay in the backup transmission line between the first and second sites, the third transmission delay in the active transmission line between the third and second sites, and the fourth transmission delay in the backup transmission line between the third and second sites.
[0037] For example, as shown in Figure 3A, if the clock frequency is intentionally reduced by 1 ppm over a certain time range, the read clock of the FIFO memory 32 becomes slower than the write clock, thus increasing the delay time. Conversely, as shown in Figure 3B, if the clock frequency is intentionally increased by 1 ppm over a certain time range, the read clock of the FIFO memory 32 becomes faster than the write clock, thus decreasing the delay time.
[0038] The delay difference detection unit 35 continuously or discretely changes the clock frequency within a range that does not affect the received OTN frame. The clock frequency is also kept within the ODU clock deviation specified in Recommendation G.709. Furthermore, intentionally changing the clock frequency prevents overflow or underflow of the FIFO memory 32. The amount of intentional clock frequency change can be any value within a range that does not affect the received OTN frame. Increasing the amount of change allows the desired delay time to be set more quickly.
[0039] The overhead monitor 34 monitors the OTN frames output from the FIFO memory 32. Specifically, the overhead monitor 34 outputs the sequence number set in the ODU overhead of the OTN frame output from the FIFO memory 32 to the delay difference detection unit 35. The overhead monitor 34 also outputs the OTN frame output from the FIFO memory 32 to the selection unit 36.
[0040] The delay difference detection unit 35 receives a sequence number from each overhead monitor 34 and detects the time difference (time difference) between receiving the same sequence number as the delay difference between the active transmission line 81 and the backup transmission line 82. The delay difference detection unit 35 then controls the clock frequency of the clock adjustment unit 33 so that the delay difference is eliminated. That is, the delay difference detection unit 35 outputs a control signal to the clock adjustment unit 33 to control the clock frequency. The clock adjustment unit 33 increases or decreases the clock frequency according to the control signal. Specifically, the clock adjustment unit 33 further adjusts the initial value of the clock frequency so that the delay difference between the signal read from the active system's FIFO memory 32 and the signal read from the backup system's FIFO memory 32 becomes equal.
[0041] In this way, the overhead monitor 34 and the delay difference detection unit 35 measure the delay difference between the OTN frame (signal) arriving via the active transmission line 81 and the OTN frame arriving via the backup transmission line 82, and change the clock frequency of the clock adjustment unit 33 so that the arrival times of the two systems match (so that the delay difference disappears). As a result, the receiving side switching unit 30 can adjust the delay difference between the active system OTN frame and the backup system OTN frame on a frame-by-frame basis, enabling seamless switching between the active and backup systems.
[0042] The selection unit 36 selects one of the OTN frames input from the two overhead monitors 34 and outputs it to the transmission unit 42 (Tx: Transmitter).
[0043] Figure 4 is a diagram showing an image of the delay amount adjusted using the FIFO memory 32. The delay amount 51 is the delay amount adjusted by the FIFO memory into which the signal transmitted through the active transmission path 81 between Site A and Site Z is input. The delay amount 52 is the delay amount adjusted by the FIFO memory into which the signal transmitted through the standby transmission path 82 between Site A and Site Z is input. The delay amount 53 is the delay amount adjusted by the FIFO memory into which the signal transmitted through the active transmission path 91 between Site B and Site Z is input. The delay amount 54 is the delay amount adjusted by the FIFO memory into which the signal transmitted through the standby transmission path 92 between Site B and Site Z is input.
[0044] Each of the delay amounts 51 to 54 includes the transmission delays Aw, Ap, Bw, and Bp measured by the measuring unit 10. Further, each of the delay amounts 51 to 54 includes delay differences ΔAw1, ΔAp1, ΔBw1, and ΔBp1 for absorbing the difference in the transmission delays. The delay difference is the delay amount inserted so that the delay amounts between the respective sites become the same. That is, each delay difference is set according to the largest transmission delay Bp. For this reason, 0 is set for the delay difference ΔBp.
[0045] In the example shown in FIG. 2, the delay difference ΔAw1 is set as the initial value of the clock frequency of the active FIFO memory 32 of the transmission devices 1Z1 and 1A. The delay difference ΔAp1 is set as the initial value of the clock frequency of the standby FIFO memory 32 of the transmission devices 1Z1 and 1A. The delay difference ΔBw1 is set as the initial value of the clock frequency of the active FIFO memory 32 of the transmission devices 1Z2 and 1B. The delay difference ΔBp1 is set as the initial value of the clock frequency of the standby FIFO memory 32 of the transmission devices 1Z2 and 1B.
[0046] Each of the delay amounts 51 to 54 includes delay differences ΔAw2, ΔAp2, ΔBw2, and ΔBp2 for seamless switching. The ΔAw2 for seamless switching of the delay amount 51 and the ΔAp2 for seamless switching of the delay amount 52 are delay amounts inserted to absorb the delay differences detected by the delay difference detection unit 35 in order to seamlessly switch between the signals of the active system and the standby system. The ΔBw2 for seamless switching of the delay amount 53 and the ΔBp2 for seamless switching of the delay amount 54 are delay amounts inserted to absorb the delay differences detected by the delay difference detection unit 35 in order to seamlessly switch between the signals of the active system and the standby system.
[0047] FIG. 5 is a flowchart showing an example of the delay adjustment process performed by the transmission system of the present embodiment.
[0048] The measurement unit 10 of the transmission device 1A and the measurement unit 10 of the transmission device 1B measure the transmission delay between each site and transmit the measured transmission delay to the control device 7 (S11). In the example shown in FIGS. 1 and 2, the measurement unit 10 of the transmission device 1A measures the transmission delays of the active system transmission line 81 and the standby system transmission line 82 between site A and site Z, respectively. The measurement unit 10 of the transmission device 1B measures the transmission delays of the active system transmission line 91 and the standby system transmission line 92 between site B and site Z, respectively.
[0049] Based on the transmission delays measured in S11, the control device 7 calculates each delay difference (S12). The delay differences calculated here are delay amounts (delay time (ms)) for absorbing the differences in transmission delays between each site.
[0050] The control device 7 sets each delay difference calculated in S12 as an initial value to the clock frequency of the clock adjustment unit 33 of the corresponding FIFO memory 32 (S13). Note that the control device 7 sets each delay difference to the clock adjustment units 33 of the transmission devices 1Z1 and 1Z2, and also sets each delay difference to the clock adjustment units 33 of the transmission devices 1A and 1B in the same manner.
[0051] With the clock frequency of the delay difference set as the initial value in each clock adjustment unit 33, transmission device 1A transmits a signal to transmission device 1Z1. As a result, the receiving side switching unit 30 of transmission device 1Z1 operates to adjust the delay difference between the active system and the backup system in one-frame units so that they become the same delay (S14). Similarly, transmission device 1B transmits a signal to transmission device 1Z2. As a result, the receiving side switching unit 30 of transmission device 1Z2 operates to adjust the delay difference between the active system and the backup system in one-frame units so that they become the same delay (S14).
[0052] The seamless switching system of this embodiment described above comprises a first transmission device 1Z1 located at a second location that receives signals transmitted from a first location, and a second transmission device 1Z2 located at the second location that receives signals transmitted from a third location. The first transmission device 1Z1 and the second transmission device 1Z2 each include a seamless switching unit 30 that seamlessly switches between signals transmitted via the active transmission line and signals transmitted via the backup transmission line. The seamless switching unit 30 is used to write the signals of the active transmission line. The system includes a FIFO memory 32, a backup FIFO memory 32 for writing signals of the backup transmission line, and a clock adjustment unit 33 that adjusts the initial value of at least one clock frequency of the active FIFO memory 32 and the backup FIFO memory 32 based on a first transmission delay in the active transmission line between the first and second sites, a second transmission delay in the backup transmission line between the first and second sites, a third transmission delay in the active transmission line between the third and second sites, and a fourth transmission delay in the backup transmission line between the third and second sites.
[0053] The delay adjustment method of this embodiment is a delay adjustment method performed by a seamless switching system, the seamless switching system comprising a first transmission device 1Z1 located at a second location that receives a signal transmitted from a first location, and a second transmission device 1Z2 located at the second location that receives a signal transmitted from a third location, the first transmission device 1Z1 and the second transmission device 1Z2 each comprising a seamless switching unit 30 that seamlessly switches between a signal transmitted via the active transmission line and a signal transmitted via the backup transmission line, the seamless switching unit 30 is, The system includes an active FIFO memory 32 for writing signals from the active transmission line and a backup FIFO memory 32 for writing signals from the backup transmission line. The system adjusts the initial value of at least one clock frequency of the active FIFO memory 32 and the backup FIFO memory 32 based on a first transmission delay in the active transmission line between the first and second sites, a second transmission delay in the backup transmission line between the first and second sites, a third transmission delay in the active transmission line between the third and second sites, and a fourth transmission delay in the backup transmission line between the third and second sites. The system further adjusts the initial value of the clock frequency so that the delay difference between the signal read from the active FIFO memory 32 and the signal read from the backup FIFO memory 32 is equal.
[0054] In this embodiment, the FIFO memory 32 of the receiving-side switching unit 30 is used as a shared memory for a delay adjustment function that equalizes the delay between each site and a seamless switching function, and the initial value of the clock frequency of the FIFO memory 32 corresponding to the delay difference between each site is adjusted. By using the FIFO memory 32 in this state and operating the seamless switching function of the receiving-side switching unit 30, the transmission device 1 of this embodiment can realize a delay adjustment function that equalizes the delay between each site and a seamless switching function.
[0055] Furthermore, the transmission device 1 of this embodiment can reduce device costs by sharing the FIFO memory 32 for both the delay adjustment function and the seamless switching function.
[0056] Figure 6 shows a comparative example transmission device. The illustrated transmission device combines a delay adjustment unit 40A and a receiver-side switching unit 30A (non-interruptible switching unit) in series. In this case, it is necessary to provide a FIFO memory in both the delay adjustment unit 40A and the receiver-side switching unit 30A, which increases the device cost. In contrast, in this embodiment, the device cost can be reduced by sharing the FIFO memory.
[0057] The transmission devices 1A, 1B, 1Z1, and 1Z2 described above can use, for example, a general-purpose computer system as shown in Figure 7. The illustrated computer system comprises a CPU (Central Processing Unit, processor) 901, memory 902, storage 903 (HDD: Hard Disk Drive, SSD: Solid State Drive), communication device 904, input device 905, and output device 906. The memory 902 and storage 903 are storage devices. In this computer system, each function of the transmission device is realized when the CPU 901 executes a predetermined program loaded onto the memory 902.
[0058] Furthermore, the transmission device may be implemented on a single computer or on multiple computers. The transmission device may also be a virtual machine implemented on a computer. The transmission device's program can be stored on computer-readable recording media such as HDDs, SSDs, USB (Universal Serial Bus) memory, CDs (Compact Discs), and DVDs (Digital Versatile Discs), or distributed over a network. Computer-readable recording media are, for example, non-transitory recording media.
[0059] This disclosure is not limited to the embodiments described above, and numerous modifications are possible within the scope of its essence.
[0060] 1A, 1B, 1Z1, 1Z2: Transmission device 10: Measurement unit 20: Transmitter-side switching unit 21: Copying unit 22: Transmitter unit 30: Receiver-side switching unit (uninterrupted switching unit) 31: Receiver unit 32: FIFO memory 32 (active buffer memory, backup buffer memory) 33: Clock adjustment unit 34: Overhead monitor 35: Delay difference detection unit 36: Selection unit 41: Receiver unit 42: Transmitter unit
Claims
1. A seamless switching system comprising: a first transmission device located at a second location that receives signals transmitted from a first location; and a second transmission device located at the second location that receives signals transmitted from a third location, wherein the first and second transmission devices each include a seamless switching unit that seamlessly switches between signals transmitted via an active transmission line and signals transmitted via a backup transmission line, the seamless switching unit comprising: an active buffer memory for writing signals from the active transmission line; a backup buffer memory for writing signals from the backup transmission line; and an adjustment unit that adjusts the initial value of at least one clock frequency of the active buffer memory and the backup buffer memory based on a first transmission delay in the active transmission line between the first and second locations, a second transmission delay in the backup transmission line between the first and second locations, a third transmission delay in the active transmission line between the third and second locations, and a fourth transmission delay in the backup transmission line between the third and second locations.
2. The seamless switching system according to claim 1, wherein the adjustment unit further adjusts the initial value of the clock frequency so that the delay difference between the signal read from the active buffer memory and the signal read from the backup buffer memory becomes equal.
3. The uninterrupted switching system according to claim 1, wherein the first transmission device comprises a first measuring unit for measuring the transmission delay of the active transmission line and the backup transmission line between the first site and the second site, and the second transmission device comprises a second measuring unit for measuring the transmission delay of the active transmission line and the backup transmission line between the third site and the second site.
4. A delay adjustment method performed by a seamless switching system, wherein the seamless switching system comprises: a first transmission device located at a second location that receives a signal transmitted from a first location; and a second transmission device located at the second location that receives a signal transmitted from a third location; the first transmission device and the second transmission device each include a seamless switching unit that seamlessly switches between a signal transmitted via an active transmission line and a signal transmitted via a backup transmission line; the seamless switching unit includes: an active system buffer memory for writing signals from the active transmission line; and a backup system buffer memory for writing signals from the backup transmission line. A delay adjustment method comprising adjusting the initial value of at least one clock frequency of the active buffer memory and the backup buffer memory based on a first transmission delay in the active transmission line between the first and second sites, a second transmission delay in the backup transmission line between the first and second sites, a third transmission delay in the active transmission line between the third and second sites, and a fourth transmission delay in the backup transmission line between the third and second sites, and further adjusting the initial value of the clock frequency so that the delay difference between the signal read from the active buffer memory and the signal read from the backup buffer memory becomes equal.
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