Optoelectronic semiconductor device and semiconductor device

Abstract

OPTOELECTRONIC SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE An optoelectronic semiconductor device (20) comprises a semiconductor layer stack (105) comprising a first semiconductor layer (110) of a first conductivity type, a second semiconductor layer (120) of a second conductivity type and an active zone (115) arranged between the first semiconductor layer (110) and the second semiconductor layer (120). The optoelectronic semiconductor device (20) further comprises a contact element (150) for electrically connecting the first semiconductor layer (110). The contact element (150) comprises a silver layer (151), a diffusion barrier layer (152), and a metal oxide layer (153). The metal oxide (153) layer is different from the diffusion barrier layer (152). The silver layer (151), the diffusion barrier layer (152) and the metal oxide layer (153) are arranged to form a conductive layer stack (154), wherein the diffusion barrier (152) layer is arranged between the silver layer (151) and the metal oxide layer (153) and the silver layer (151) is arranged on a side facing the first semiconductor layer (110). (Fig. 1A)

Description

[0001] OPTOELECTRONIC SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

[0002] Due to their high conductivity, silver films are employed for forming electric contacts in a variety of semiconductor devices . Ef forts are taken to improve the quality of silver films .

[0003] SUMMARY

[0004] It is an obj ect of the present invention to provide an improved semiconductor device and an improved optoelectronic semiconductor device .

[0005] According to embodiments , the above obj ect is achieved by the claimed matter according to the independent claims . Further developments are defined in the dependent claims .

[0006] According to embodiments , an optoelectronic semiconductor device comprises a semiconductor layer stack comprising a first semiconductor layer of a first conductivity type , a second semiconductor layer of a second conductivity type and an active zone arranged between the first semiconductor layer and the second semiconductor layer . The optoelectronic semiconductor device further comprises a contact element for electrically connecting the first semiconductor layer . The contact element comprises a silver layer, a di f fusion barrier layer, and a metal oxide layer . The metal oxide layer is di f ferent from the di f fusion barrier layer . The silver layer, the di f fusion barrier layer and the metal oxide layer are arranged to form a conductive layer stack, wherein the di f fusion barrier layer is arranged between the silver layer and the metal oxide layer and the silver layer is arranged on a side facing the first semiconductor layer . The optoelectronic semiconductor device may further comprise a first current spreading layer arranged adjacent to the first semiconductor layer, wherein the silver layer is arranged directly adjacent to the first current spreading layer.

[0007] According to embodiments, at least in sections, the metal oxide layer implements a terminal layer of the conductive layer stack.

[0008] For example, the diffusion barrier layer may be selected from WTi, Ti, Pt, ZnO, or nickel.

[0009] For example, the metal oxide layer may be selected from ITO, ZnO, IZO, and nickel oxide.

[0010] According to embodiments, the diffusion barrier layer comprises WTi, and the metal oxide layer comprises ITO.

[0011] According to further embodiments, a semiconductor device comprises a first semiconductor layer and a conductive layer stack. The conductive layer stack comprises a silver layer, a diffusion barrier layer, and a metal oxide layer, the metal oxide layer being different from the diffusion barrier layer. The diffusion barrier layer is arranged between the silver layer and the metal oxide layer and the silver layer is arranged on a side facing the first semiconductor layer.

[0012] For example, at least in sections, the metal oxide layer implements a terminal layer of the conductive layer stack.

[0013] According to embodiments, the diffusion barrier layer is selected from WTi, Ti, Pt, ZnO, or nickel. By way of example , the metal oxide layer is selected from ITO, ZnO, I ZO, and nickel oxide .

[0014] According to embodiments , the di f fusion barrier layer comprises WTi , and the metal oxide layer comprises ITO .

[0015] For example , the conductive layer stack is a component of a contact element .

[0016] According to further embodiments , the conductive layer stack is a component of a mirror .

[0017] BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this speci fication . The drawings illustrate the embodiments of the present invention and together with the description serve to explain the principles . Other embodiments of the invention and many of the intended advantages will be readily appreciated, as they become better understood by reference to the following detailed description . The elements of the drawings are not necessarily to scale relative to each other . Like reference numbers designate corresponding similar parts .

[0019] Fig . 1A shows a cross-sectional view of an optoelectronic semiconductor device according to embodiments .

[0020] Fig . IB shows a top view of the optoelectronic semiconductor device .

[0021] Fig . 1C shows a further cross-sectional view of the optoelectronic semiconductor device . Fig. 2 shows a schematic cross-sectional view of a semiconductor device according to embodiments.

[0022] DETAILED DESCRIPTION

[0023] In the following detailed description reference is made to the accompanying drawings, which form a part hereof and in which are illustrated by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology such as "top", "bottom", "front", "back", "over", "on", "above", "leading", "trailing" etc. is used with reference to the orientation of the Figures being described. Since components of embodiments of the invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope defined by the claims .

[0024] The description of the embodiments is not limiting. In particular, elements of the embodiments described hereinafter may be combined with elements of different embodiments.

[0025] The terms "wafer" or "semiconductor substrate" used in the following description may include any semiconductor-based structure that has a semiconductor surface. Wafer and structure are to be understood to include doped and undoped semiconductors, epitaxial semiconductor layers, e.g. supported by a base semiconductor foundation, and other semiconductor structures. For example, a layer of a first semiconductor material may be grown on a growth substrate of a second semiconductor material. According to further embodiments, the growth substrate may be an insulating substrate such as a sapphire substrate . Depending on the purpose of use , the semiconductor may be based on a direct or an indirect semiconductor material . Examples of semiconductor materials particularly suitable for generation of electromagnetic radiation comprise nitride-compound semiconductors , by which e . g . ultraviolet or blue light or longer wavelength light may be generated, such as GaN, InGaN, AIN, AlGaN, AlGalnN, phosphide-compound semiconductors , by which e . g . green or longer wavelength light may be generated such as GaAsP, AlGalnP, GaP, AlGaP, as well as further semiconductor materials including AlGaAs , SiC, ZnSe , GaAs , ZnO, Ga2Os, diamond, hexagonal BN und combinations of these materials . Further examples of semiconductor materials may as well be silicon, silicon-germanium and germanium . The stoichiometric ratio of the compound semiconductor materials may vary . In the context of the present speci fication, the term " semiconductor" further encompasses organic semiconductor materials .

[0026] The term " substrate" generally refers to semiconductor substrates , conductive or insulating substrates .

[0027] The term "vertical" as used in this speci fication intends to describe an orientation which is arranged perpendicular to the first surface of a substrate or semiconductor body .

[0028] The terms " lateral" and "hori zontal" as used in thi s speci fication intends to describe an orientation parallel to a first surface of a substrate or semiconductor body . This can be for instance the surface of a wafer or a die .

[0029] As employed within the present disclosure , the term " layer" also comprises a set of several sub-layers forming the layer, unless otherwise speci fied . Fig. 1A is a cross-sectional view of a portion of an optoelectronic semiconductor device 20 according to embodiments. The cross-sectional view may be taken between IT and IT' , as is also indicated in Fig. IB. The optoelectronic semiconductor device 20 comprises a semiconductor layer stack 105. For example, the semiconductor layer stack 105 may be configured to generate or absorb electromagnetic radiation. The semiconductor layer stack comprises a first semiconductor layer 110 of a first conductivity type, e.g. p-type, an active zone 115 and a second semiconductor layer 120 of a second conductivity type, e.g. n-type. The active zone 115 is arranged between the first semiconductor layer 110 and the second semiconductor layer 120.

[0030] The active zone may, for example, comprise a pn junction, a double heterostructure, a single quantum well structure (SQW, single quantum well) or a multiple quantum well structure (MQW, multi quantum well) for generating radiation. The term "quantum well structure" does not imply any particular meaning here with regard to the dimensionality of the quantization. Therefore it includes, among other things, quantum wells, quantum wires and quantum dots as well as any combination of these layers.

[0031] The optoelectronic semiconductor device 20 further comprises a contact element 150 for electrically connecting the first semiconductor layer 110. The contact element 150 comprises a silver layer 151, a diffusion barrier layer 152 and a metal oxide layer 153. The silver layer 151, the diffusion barrier layer 152 and the metal oxide layer 153 are arranged to form a conductive layer stack 154. The diffusion barrier layer 152 is arranged between the silver layer 151 and the metal oxide layer 153. The silver layer 151 is arranged on a side facing the first semiconductor layer 110.

[0032] For example, the semiconductor layers may comprise gallium nitride and may be configured to emit electromagnetic radiation in a UV range. The semiconductor layer stack 105 may have a thickness of more than 3 pm, e.g. more than 4 pm. The semiconductor layer stack 105 may be arranged over a substrate 100. For example, the substrate 100 may be a growth substrate. According to embodiments, the substrate 100 may be a sapphire substrate. The sapphire substrate may have a thickness of more than 100 pm, e.g. 1000 pm. According to examples, the diffusion barrier layer may comprise WTi, Ti, Pt, ZnO, or nickel. For example, also ITO (indium tin oxide) may be employed as a diffusion barrier layer 152. The metal oxide layer 153 may comprise ITO, ZnO, IZO (indium zinc oxide) or nickel oxide. When ITO is employed as the metal oxide layer 153, the diffusion barrier layer 152 comprises a material different from ITO. Likewise, when ZnO is employed as the metal oxide layer 153, the diffusion barrier layer 152 comprises a material different from ZnO. As a result, the conductive layer stack comprises three layers of a different composition and / or material. As a specific example, the diffusion barrier layer 152 may comprise WTi, and the metal oxide layer 153 may comprise ITO. According to embodiments, the silver layer 151 may consist of silver and does not comprise an alloy.

[0033] For example, a thickness of the silver layer 151 may be larger than 50 nm. For example, the thickness of the silver layer 151 may be smaller than 300 nm. A thickness of the diffusion barrier layer 152 is approximately larger than 5 nm. The thickness of the diffusion barrier layer 152 may be smaller than 100 nm. Moreover, the thickness of the metal oxide layer 153 i s more than 5 nm . For example , the thickness of the metal oxide layer 153 may be less than 350 nm . A total thickness of the conductive layer stack 154 may be approximately larger than 50 nm . For example , the total thickness of the conductive layer stack 154 may be smaller than 450 nm .

[0034] For example , as is also illustrated in Fig . 1A, a mirror 122 may be arranged over a first main surface 107 of the semiconductor layer stack 105 . An opening 125 is formed in the mirror 122 . The opening 125 extends in a vertical direction from the first main surface 123 of the mirror 122 to a second surface 124 of the mirror 122 . The first main surface 123 of the mirror 122 is remote from the semiconductor layer stack 105 . The mirror is arranged between a hori zontal layer portion of the conductive layer stack 154 and the semiconductor layer stack 105 . An insulating passivation layer 137 may be arranged between a silver layer 151 and the mirror 122 .

[0035] For example , the mirror 122 may comprise an alternating sequence of dielectric layers having comparatively high and low refractive indices . An alternating sequence of dielectric layers may form a DBR ("distributed Bragg reflector" ) mirror . A layer thickness may be X / 4 , wherein X denotes the wavelength of emitted electromagnetic radiation in the respective medium . A dielectric mirror may comprise , for example , 2-50 dielectric layers . Typically, a thickness of the single layers may be 30- 90 nm, e . g . approximately 50 nm . The mirror 122 may, for example , comprise one or two or more layers having a thickness greater than 180 nm, for example , greater than 200 nm. Accordingly, the dielectric layers of the mirror 122 may be insulating and may have a high reflectivity .

[0036] The optoelectronic semiconductor device 20 may further comprise a current spreading layer 132 that may be arranged in contact with the first semiconductor layer 110. The current spreading layer 132 may comprise a conductive material, for example, a transparent conductive oxide such as ITO. Due to the presence of the current spreading layer 132, the current distribution and thus, the brightness of light emission may be made more uniform.

[0037] As is illustrated in Fig. 1A, the conductive layer stack 154 may be arranged over the first main surface 123 of the mirror 122. Optionally, a second passivation layer 137 may be arranged between the mirror 122 and the conductive layer stack 154. For example, a material of the second passivation layer may comprise AI2O3. The silver layer 151 is arranged between the diffusion barrier layer 152 and the mirror 122, for example, between the diffusion barrier layer 152 and the second passivation layer 137. The silver layer 151 is arranged directly adjacent to the diffusion barrier layer 152. Further, the diffusion barrier layer 152 is arranged directly ad acent to the metal oxide layer 153. The layers of the conductive layer stack 154 also are arranged within the opening 125. For example, they may be formed as conformal layers in the opening 125.

[0038] Optionally, a top passivation layer 133 may be arranged over the conductive layer stack 154. For example, a material of the top passivation layer 133 may comprise AI2O3 or another insulating material.

[0039] For example, in a region, where the conductive layer stack 154 forms a contact element 150 for electrically connecting the first semiconductor layer 110, for example, in a region where the conductive layer stack 154 is arranged in the opening 125, the metal oxide layer 153 may form a terminal of the conductive layer stack 154. The feature, "forms a terminal of the conductive layer stack 154" is intended to mean that no further conductive layer is arranged on a side of the metal oxide layer remote from the di f fusion barrier layer 152 and is in contact with the metal oxide layer 153 . In other words , the metal oxide layer 153 may form a cap layer, at least in sections .

[0040] It has been shown that this speci fic arrangement of conductive layers prevents migration from Ag within the optoelectronic semiconductor device . In particular, it has been shown that when this speci fic sequence of layers is formed, a modi fication of the work function at the interfaces between the layers of the conductive layer stack 154 is changed so that migration of silver may be suppressed . As a result , a degradation of the optoelectronic semiconductor device may be prevented in an ef ficient manner .

[0041] As is illustrated in Fig . 1A, the contact element 150 is configured to electrically contact the first semiconductor layer 110 , optionally via the first current spreading layer 132 . The optoelectronic semiconductor device 20 further comprises a second contact element 121 for electrically contacting the second semiconductor layer 120 .

[0042] According to further embodiments , the conductive layer stack 154 described above may implement a mirror for reflecting electromagnetic radiation . According to further embodiments , the conductive layer stack 154 may implement a component di f ferent from a mirror or a contact element . Therefore , further embodiments are directed to an optoelectronic semiconductor device 20 comprising a semiconductor layer stack 105 comprising a first semiconductor layer 110 of a first conductivity type , a second semiconductor layer 120 of a second conductivity type and an active zone 115 arranged between the first semiconductor layer 110 and the second semiconductor layer 120. The optoelectronic semiconductor device 20 further comprises a conductive layer stack 154 comprising a silver layer 151, a diffusion barrier layer 152, and a metal oxide layer 153, the metal oxide layer 153 being different from the diffusion barrier layer 152, wherein the diffusion barrier layer 152 is arranged between the silver layer 151 and the metal oxide layer 153 and the silver layer 151 is arranged on a side facing the first semiconductor layer 110.

[0043] Fig. IB shows a schematic top view of a pixel 25 of the optoelectronic semiconductor device 20 according to embodiments. As is illustrated, the semiconductor layer stack may e.g. be patterned to have a rectangular or approximately rectangular shape. At the corners of the rectangle, the contact elements 150 are arranged. For example, a second contact element 121 for electrically contacting the second semiconductor layer may be arranged outside the pixel 25. As is clearly to be understood, different configurations are possible .

[0044] Fig. 1C shows a vertical cross-sectional view of the optoelectronic semiconductor device 20 according to embodiments. The cross-sectional view of Fig. 1C is taken between I and I' , as is also illustrated in Fig. IB. The optoelectronic semiconductor device 20 comprises similar elements as the semiconductor device illustrated in Fig. 1A. The substrate 100 has been removed from a surface of the second semiconductor layer 120. For example, electromagnetic radiation 15 generated within the active zone 115 may be emitted via a first main surface 119 of the second semiconductor layer 120. Fig. 2 show a cross-sectional view of a general semiconductor device 10 according to embodiments. The semiconductor device 10 illustrated in Fig. 2 comprises a first semiconductor layer of a first conductivity type and a conductive layer stack 154. The conductive layer stack 154 comprises a silver layer 151, a diffusion barrier layer 152 and a metal oxide layer 153. The diffusion barrier layer 152 is arranged between the silver layer 151 and the metal oxide layer 153. The silver layer 151 is arranged on a side facing the first semiconductor layer 110. The silver layer 151 is arranged directly adjacent to the diffusion barrier layer 152. Further, the diffusion barrier layer 152 is arranged directly adjacent to the metal oxide layer 153.

[0045] In a similar manner as has been discussed above, the metal oxide layer 153 may implement a terminal layer of the conductive layer stack 154.

[0046] The materials, compositions and thicknesses of the diffusion barrier layer 152 and of the metal oxide layer 153 are as discussed above. For example, the first semiconductor layer 110 may be of a first conductivity type, e.g. n-type or p- type. The conductive layer stack 154 may implement an electrical contact to the first semiconductor layer 110. For example, a first passivation layer 136 may be arranged between the first semiconductor layer 110 and the conductive layer stack 154. Moreover, a top passivation layer 133 may be arranged over the metal oxide layer 153. For example, the first passivation layer 136 and the top passivation layer 133 may comprise AI2O3.

[0047] According to further embodiments, the conductive layer stack 154 may implement a mirror 156 for reflecting electromagnetic radiation. According to further embodiments, the conductive layer stack 154 may implement a component different from a mirror or a contact element. The semiconductor device 10 may implement an arbitrary semiconductor device, comprising transistors, diodes and other semiconductor elements.

[0048] As has been described, due to the specific layer sequence of the conductive layer stack comprising a silver layer, a diffusion barrier layer and a metal oxide layer, wherein the metal oxide layer implements a top layer and the silver layer is arranged adjacent to the semiconductor layer, migration or clustering of silver particles may be efficiently suppressed. In particular, after processes in wet media, e.g. solvent media, migration of silver particles may be suppressed. Further, the generation of silver voids within e.g. via openings may be suppressed. As a result, chip defects may be reduced and the chip quality may be improved. As a further effect, the reflectance of the silver layer may be improved resulting in an increased chip brightness. Further, a thickness of the diffusion barrier layer 152 may be reduced in comparison to previous concepts. Due to the specific layer sequence, the work function at the interface between the respective layers may be modified resulting in a trapping of silver particles and an improved diffusion barrier. As a further effect, the operation voltage may be reduced and a small current may be achieved.

[0049] While embodiments of the invention have been described above, it is obvious that further embodiments may be implemented. For example, further embodiments may comprise any subcombination of features recited in the claims or any subcombination of elements described in the examples given above. Accordingly, this spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein . LIST OF REFERENCES semiconductor device electromagnetic radiation optoelectronic semiconductor device pixel substrate semiconductor layer stack first main surface of semiconductor layer stack first semiconductor layer first dielectric layer second dielectric layer active zone first main surface of second semiconductor layer second semiconductor layer second contact element mirror first main surface of mirror second surface of mirror opening first current spreading layer top passivation layer first passivation layer second passivation layer contact element silver layer di f fusion barrier layer metal oxide layer conductive layer stack second contact element mirror

Claims

CLAIMS1. An optoelectronic semiconductor device (20) comprising: a semiconductor layer stack (105) comprising a first semiconductor layer (110) of a first conductivity type, a second semiconductor layer (120) of a second conductivity type and an active zone (115) arranged between the first semiconductor layer (110) and the second semiconductor layer (120) ; and a contact element (150) for electrically connecting the first semiconductor layer (110) , the contact element (150) comprising : a silver layer (151) ; a diffusion barrier layer (152) ; and a metal oxide layer (153) , the metal oxide (153) layer being different from the diffusion barrier layer (152) , wherein the silver layer (151) , the diffusion barrier layer (152) and the metal oxide layer (153) are arranged to form a conductive layer stack (154) , wherein the diffusion barrier (152) layer is arranged between the silver layer (151) and the metal oxide layer (153) and the silver layer (151) is arranged on a side facing the first semiconductor layer (110) .

2. The optoelectronic semiconductor device (20) according to claim 1, further comprising a first current spreading layer (132) arranged adjacent to the first semiconductor layer (110) , wherein the silver layer (151) is arranged directly adjacent to the first current spreading layer (132) .

3. The optoelectronic semiconductor device (20) according to claim 1 or 2, wherein at least in sections the metal oxide layer (153) implements a terminal layer of the conductive layer stack (154) .

4. The optoelectronic semiconductor device (20) according to any of claims 1 to 3, wherein the diffusion barrier layer (152) is selected from WTi, Ti, Pt, ZnO, or nickel.

5. The optoelectronic semiconductor device (20) according to any of claims 1 to 4, wherein the metal oxide layer (153) is selected from ITO, ZnO, IZO, and nickel oxide.

6. The optoelectronic semiconductor device (20) according to any of the preceding claims, wherein the diffusion barrier (152) layer comprises WTi, and the metal oxide layer (153) comprises ITO.

7. A semiconductor device (10) comprising a first semiconductor layer (100) and a conductive layer stack (154) , the conductive layer stack (154) comprising: a silver layer (151) ; a diffusion barrier layer (152) ; and a metal oxide layer (153) , the metal oxide layer (153) being different from the diffusion barrier layer (152) , wherein the diffusion barrier layer (152) is arranged between the silver layer (151) and the metal oxide layer (153) and the silver layer (151) is arranged on a side facing the first semiconductor layer (110) .

8. The semiconductor device (10) according to claim 1, wherein at least in sections the metal oxide layer (153) implements a terminal layer of the conductive layer stack (154) .

9. The semiconductor device (10) according to claim 7 or 8, wherein the diffusion barrier layer (152) is selected from WTi, Ti, Pt, ZnO, or nickel.

10. The semiconductor device (10) according to any of claims 7 to 9, wherein the metal oxide layer (153) is selected from ITO, ZnO, IZO, and nickel oxide.

11. The semiconductor device (10) according to any of claims 7 to 10, wherein the diffusion barrier layer (152) comprises WTi, and the metal oxide layer (153) comprises ITO.

12. The semiconductor device (10) according to any of claims 7 to 11, wherein the conductive layer stack (154) is a component of a contact element (150) .

13. The semiconductor device (10) according to any of claims 7 to 11, wherein the conductive layer stack (154) is a component of a mirror.

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