Semiconductor device and power conversion device

Abstract

This semiconductor device according to the present disclosure is provided with an insulating substrate having an insulating layer, a circuit pattern provided on the upper surface of the insulating layer, and a back surface pattern provided on the back surface of the insulating layer, a semiconductor chip provided on the circuit pattern, a sealing member covering the insulating substrate and the semiconductor chip, a cooler, and a bonding member bonding together the back surface pattern and the upper surface of the cooler. In a planar view, corner portions of the bonding member are chamfered.

Description

Semiconductor device and power conversion device

[0001] The present disclosure relates to a semiconductor device and a power conversion device.

[0002] Patent Document 1 discloses a ceramic circuit board having a first conductor layer on a first surface of a ceramic substrate and a second conductor layer on a second surface of the ceramic substrate, a semiconductor element mounted on the first conductor layer, and a heat sink. The heat sink has a third surface and a fourth surface, and the second conductor layer and the third surface are joined via a joining layer. Fins are provided on the fourth surface of the heat sink, and a refrigerant flow path housing is fixed to the heat sink so as to enclose the fins.

[0003] WO2015 / 033515

[0004] In Patent Document 1, in order to relieve the stress applied to the joining layer between the heat sink and the second conductor layer, convex portions and a plurality of stepped portions are formed on the heat sink. Therefore, there is a possibility that miniaturization of the semiconductor device becomes difficult. In particular, when a plurality of ceramic circuit boards are joined to one heat sink, it is necessary to form convex portions and a plurality of steps for each joining layer, and there is a possibility that the semiconductor device becomes large-sized.

[0005] An object of the present disclosure is to obtain a semiconductor device and a power conversion device capable of relieving stress applied to a joining material and miniaturizing the semiconductor device.

[0006] The semiconductor device according to the present disclosure includes an insulating substrate having an insulating layer, a circuit pattern provided on an upper surface of the insulating layer, and a back surface pattern provided on a back surface of the insulating layer, a semiconductor chip provided on the circuit pattern, a sealing material covering the insulating substrate and the semiconductor chip, a cooler, and a joining material joining the back surface pattern and an upper surface of the cooler. In plan view, corners of the joining material are chamfered.

[0007] In the semiconductor device according to the present disclosure, since the corners of the joining material are chamfered, the stress applied to the joining material can be relieved. Further, since a complicated structure on the surface of the cooler is not required to relieve the stress, the semiconductor device can be miniaturized.

[0008] This is a cross-sectional view of a semiconductor device according to Embodiment 1. This is a plan view of a cooler and bonding material according to Embodiment 1. This is a plan view of a cooler and bonding material according to a first modified example of Embodiment 1. This is a cross-sectional view showing a semiconductor device according to a second modified example of Embodiment 1 that is not fastened to a water jacket. This is a cross-sectional view showing a semiconductor device according to a second modified example of Embodiment 1 that is fastened to a water jacket. This is a cross-sectional view showing a state where the temperature has been lowered from the state in Figure 5. This is a cross-sectional view of a semiconductor module according to Embodiment 2. This is a bottom view of a semiconductor module according to Embodiment 2. This is a cross-sectional view of a semiconductor module according to a modified example of Embodiment 2. This is a cross-sectional view of a semiconductor device according to Embodiment 3. This is a bottom view of a semiconductor device according to Embodiment 3. This is a plan view of a cooler and bonding material according to Embodiment 3. This is a plan view of a cooler and bonding material according to Embodiment 4. This is a plan view of a cooler and bonding material according to a first modified example of Embodiment 4. This is a plan view of a cooler and bonding material according to a second modified example of Embodiment 4. This is a plan view of a cooler and bonding material according to Embodiment 5. This is a cross-sectional view of a semiconductor device according to Embodiment 5. This is a plan view of a cooler and bonding material according to a first modified example of Embodiment 5. This is a plan view of a cooler and bonding material according to a second modified example of Embodiment 5. This is a cross-sectional view of a semiconductor device according to Embodiment 6. This is a cross-sectional view of a semiconductor device according to Embodiment 7. This is a block diagram showing the configuration of a power conversion system according to Embodiment 8.

[0009] The semiconductor devices and power converters according to each embodiment will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repetition of the description may be omitted.

[0010] Embodiment 1. Figure 1 is a cross-sectional view of a semiconductor device 100 according to Embodiment 1. The semiconductor device 100 comprises a semiconductor module 10 and a cooler 40. The cooler 40 is made of aluminum, copper, or the like. The cooler 40 is also called a heat sink. The cooler 40 and the semiconductor module 10 are joined together with a bonding material 30. The cooler 40 is fastened to a water jacket 50, which is a cooling mechanism, at a plurality of fastening parts 42. The cooler 40 and the water jacket 50 are screwed together with screws 44. An O-ring 46 is installed between the cooler 40 and the water jacket 50. In order to improve output, a plurality of semiconductor modules 10 may be installed on the cooler 40.

[0011] The semiconductor module 10 comprises an insulating substrate, a semiconductor chip 14, a sealing material 20 covering the insulating substrate and the semiconductor chip 14, and terminals 16 and 17 exposed from the sealing material 20. The insulating substrate has an insulating layer 11, a circuit pattern 12 provided on the upper surface of the insulating layer 11, and a back surface pattern 13 provided on the back surface of the insulating layer 11. The insulating layer 11 is, for example, a ceramic insulating layer. The semiconductor chip 14 is provided on the circuit pattern 12. The back surface pattern 13 is exposed from the sealing material 20. The back surface pattern 13 and the upper surface of the cooler 40 are joined with a bonding material 30.

[0012] The semiconductor chip 14 and the circuit pattern 12 are joined together with an internal bonding material 15 such as solder or silver. The terminal 16 is joined to the semiconductor chip 14 via the internal bonding material 15. The terminal 17 is connected to the semiconductor chip via wiring 18 such as aluminum wire. Terminals 16 and 17 may also be connected to the circuit pattern 12. The surfaces of terminals 16 and 17 may be plated with Ni, Sn, or the like. Generally, a resin material such as epoxy is used for the encapsulating material 20.

[0013] Figure 2 is a plan view of the cooler 40 and bonding material 30 according to Embodiment 1. Figure 3 is a plan view of the cooler 40 and bonding material 30a according to a first modified example of Embodiment 1. Note that Figure 1 is a cross-sectional view taken along the dashed line A-A' in Figures 2 and 3. In plan view, the corners of the bonding materials 30 and 30a are chamfered. In the example in Figure 2, the corners of the bonding material 30 are rounded. In the example in Figure 3, the corners of the bonding material 30a are rounded. Note that in Figures 2 and 3, the mounting area 31 of the semiconductor chip 14 is indicated by a frame.

[0014] Furthermore, chamfering is not limited to the state in which the joining material 30 is processed by cutting. As will be explained in the embodiments below, for example, a state in which the joining material has spread out in the shape shown in Figures 2 and 3 is also included in the chamfered state.

[0015] Next, the effects of this embodiment will be explained using a semiconductor device 100a, in which a plurality of semiconductor modules 10 are provided on a cooler 40a, as an example. The same effects can be obtained in semiconductor device 100 as well. Figure 4 is a cross-sectional view showing a semiconductor device 100a according to the second modification of Embodiment 1 in a state where it is not fastened to the water jacket 50a. Figure 5 is a cross-sectional view showing a semiconductor device 100a according to the second modification of Embodiment 1 in a state where it is fastened to the water jacket 50a.

[0016] When fastening to the water jacket 50a, a reaction force is generated from the water jacket 50a toward the cooler 40a, causing a change in the curvature of the cooler 40a. As a result, stress is generated in the joining material 30 perpendicular to the joint surface, as shown by arrow A1. Furthermore, if a temperature swing occurs after fastening, stress will also be generated at the ends of the joining material 30.

[0017] Figure 6 is a cross-sectional view showing the state after the temperature has been lowered from the state shown in Figure 5. Specifically, Figure 6 shows an example of the state when the temperature of the semiconductor device 100a is lowered from the state shown in Figure 5, in which Al material is used for the water jacket 50a and Cu material is used for the cooler 40a. As the amount of warping change of the cooler 40a increases, greater vertical stress is generated at the end of the bonding material 30 than in the state shown in Figure 5. In addition, as shown by arrow A2, horizontal stress is also generated with respect to the bonding surface.

[0018] Stresses in both the vertical and horizontal directions can cause cracks in the joint member 30, potentially reducing its reliability and lifespan. To alleviate stress in both directions, it is effective to form rounded or chamfered edges at the ends of the joint member 30. Specifically, vertical stress can be addressed by mitigating stress concentration at the ends of the joint member 30. Horizontal stress can be addressed by reducing shear stress through a shorter distance L1 from end to end of the joint member 30, as shown in Figures 2 and 3.

[0019] In this embodiment, both vertical and horizontal stresses applied to the bonding material 30 can be relieved. Therefore, reliability life can be improved. Furthermore, complex structures on the surface of the cooler 40 are not required to relieve stress. As a result, the semiconductor device 100 can be miniaturized. In addition, the bonding material 30 can be made thinner due to the stress relief effect. Therefore, heat generated from the semiconductor chip 14 when the semiconductor device 100 is in operation can be efficiently dissipated. Consequently, miniaturization and high density of the semiconductor device 100 can be achieved.

[0020] The R or C size of the joining materials 30 and 30a is effective even if it is around 2 mm. In other words, in a plan view, the corners of the joining material 30 are chamfered with an R chamfer so that the radius is 2 mm or more. In other words, it is R2 or more. Also, in a plan view, the corners of the joining material 30a are chamfered with a C chamfer of 2 mm or more. In other words, the length of the side cut off from the joining material 30a is 2 mm or more, or in other words, C2 or more.

[0021] The above-described effects can also be obtained by reducing the thickness of the bonding material 30 to 1 / 20 or less of the distance L1 from end to end of the bonding material 30, that is, the length of the diagonal of the bonding material 30. Therefore, the decrease in heat dissipation caused by increasing the thickness of the bonding material 30 can be suppressed.

[0022] Furthermore, it is preferable that the chamfered portion of the bonding material 30 does not overlap with the semiconductor chip 14 in a plan view. By ensuring that the chamfered portion of the corners of the bonding material 30 does not overlap with the mounting area 31 of the semiconductor chip, a decrease in heat dissipation can be prevented. Consequently, it becomes easier to improve the lifespan and miniaturize the semiconductor device 100.

[0023] In configurations where the curvature of the cooler 40 changes significantly before and after fastening to the water jacket 50, easing vertical stress in particular has a significant effect on improving lifespan. Furthermore, when a resin with a high modulus of elasticity, such as epoxy resin, is used as the sealing material 20, the stress-relaxing effect on vertical stress becomes apparent. As a result, the reliability of the semiconductor device 100 can be improved. In addition, by using copper, which has a high thermal conductivity, for the cooler 40, heat can be dissipated efficiently. Therefore, it becomes possible to miniaturize the semiconductor device 100 and improve its power density.

[0024] Furthermore, in order to suppress the stress perpendicular to the joint material 30, it is important to suppress the amount of warping deformation of the cooler 40a before and after fastening to the water jacket 50. To suppress the amount of warping deformation, it is effective to control the amount of warping H of the bottom surface of the cooler 40a between the fastening parts 42 and the thickness T of the cooler 40a. The larger the amount of warping H, or the thinner the thickness T, the greater the amount of warping change of the cooler 40a. Also, while the heat dissipation performance decreases as the thickness T of the cooler 40a increases, the lifespan of the joint material 30 can be improved. For this reason, the thickness T of the cooler 40a should be at least 5 times the amount of warping H of the cooler 40a between the multiple fastening parts 42 when the cooler 40a is not fastened to the water jacket 50. In other words, by T / H ≥ 5, the stress relaxation effect can be obtained without reducing the heat dissipation performance.

[0025] Furthermore, the flatness of the cooler 40a when it is not fastened to the water jacket 50 should be 500 μm or less. If the flatness of the cooler 40a increases, it may become difficult to stably form the bonding material 30. However, by keeping the flatness at around 500 μm or less, the bonding material 30 can be stably formed. In addition, the amount of warping change of the cooler 40a during fastening can be suppressed, making it easier to obtain the effect of stress relaxation. Therefore, the lifespan of the bonding material 30 can be improved.

[0026] Furthermore, the fastening pitch L, that is, the distance between multiple fastening points 42, also affects the amount of warping change. The longer the fastening pitch L, the greater the amount of warping change. For this reason, by shortening L and increasing T, the vertical stress on the joint material 30 can be relieved. Specifically, the thickness T of the cooler 40a should be at least 0.02 times the distance L between the multiple fastening points. In other words, the stress relief effect can be obtained by setting T / L ≥ 0.02.

[0027] The structure of the semiconductor device 100 is not limited to that shown in Figure 1-6. For example, the number of semiconductor modules 10 mounted on a single cooler 40 can be one or more. By mounting multiple semiconductor modules 10, the power density of the semiconductor device 100 is improved, thereby enhancing the miniaturization effect of the semiconductor device 100.

[0028] Furthermore, the number and type of semiconductor chips 14 mounted on the semiconductor module 10 can be changed as appropriate. The semiconductor chips 14 may be formed from wide-bandgap semiconductors. Wide-bandgap semiconductors include silicon carbide, gallium nitride-based materials, or diamond. By using low-loss materials such as SiC as the material for the semiconductor chips 14, the semiconductor device 100 can be further miniaturized and made more densely packed.

[0029] An RC-IGBT (Reverse Conducting Insulated Gate Bipolar Transistor) may be used as the semiconductor chip 14. By using an RC-IGBT, the number of chips can be reduced, and the semiconductor module 10 can be further miniaturized. As a result, the semiconductor device 100 can be miniaturized.

[0030] The modifications described above can be appropriately applied to the semiconductor device and power converter according to the following embodiments. Since the semiconductor device and power converter according to the following embodiments have many similarities with Embodiment 1, the explanation will focus on the differences from Embodiment 1.

[0031] Embodiment 2. Figure 7 is a cross-sectional view of the semiconductor module 10b according to Embodiment 2. Figure 8 is a bottom view of the semiconductor module 10b according to Embodiment 2. The sealing material 20b has an opening 21 that exposes the bonding surface with the cooler 40 from the back surface pattern 13. In plan view, the corners of the opening 21 are chamfered. The other configurations are the same as those of Embodiment 1.

[0032] Figure 9 is a cross-sectional view of a modified semiconductor module 10c according to Embodiment 2. The shape of the back surface pattern 13c when the semiconductor module 10c is viewed from the bottom is the same as the shape of the portion of the back surface pattern 13 exposed from the opening 21 shown in Figure 8. In the semiconductor module 10c, the bonding surface of the back surface pattern 13c with the cooler 40 is chamfered in a plan view. Although Figure 8 shows a structure in which the corners are rounded, the corners may also be rounded.

[0033] When solder is used as the bonding material 30, for example, the bonding material 30 spreads wet on the bonding surfaces of the back patterns 13 and 13c. As shown in Figure 7-9, in this embodiment, the bonding surfaces of the back patterns 13 and 13c that come into contact with the bonding material 30 are chamfered. This makes it easy to create a chamfered shape for the corners of the bonding material 30. Thus, in this embodiment, the shape of the bonding material 30 in Embodiment 1 can be easily realized. This is especially feasible when solder is used as the bonding material 30. Furthermore, according to the structure in Figure 7, the adhesion between the sealing material 20b and the back pattern 13 can be improved, thereby improving the reliability of the semiconductor device 100 against temperature and humidity stress.

[0034] Furthermore, as shown in Figure 7, a step R1 may be formed in the portion of the back surface pattern 13 that is covered by the sealing material 20b. In order to improve the reliability of the semiconductor module 10b, it is important to prevent internal delamination due to stress from temperature and humidity. Therefore, as shown in Figures 7 and 9, a step R1 may be provided in the circuit pattern to suppress delamination between the sealing material 20b, 20 and the circuit pattern. The chamfering of the bonding material 30 reduces the stress near the bonding material 30. By combining this with the delamination prevention effect of the step R1, the reliability of the semiconductor device with respect to temperature and humidity can be greatly improved.

[0035] Embodiment 3. Figure 10 is a cross-sectional view of the semiconductor device 100d according to Embodiment 3. Figure 11 is a bottom view of the semiconductor device 100d according to Embodiment 3. Figure 12 is a plan view of the cooler 40d and bonding material 30d according to Embodiment 3. The sealing material 20d has a projection 22d that protrudes toward the cooler 40d. The projection 22d can stabilize the thickness of the bonding material 30d.

[0036] Furthermore, a fitting portion is formed on the upper surface of the cooler 40d that engages with the sealing material 20d. Specifically, the sealing material 20d has a projection 23d. Also, a hole 48d is formed in the cooler 40d. The projection 23d and the hole 48d engage. This allows the back surface pattern 13 and the joining material 30d to be aligned. The other configurations are the same as those of the second embodiment. According to this embodiment, misalignment between the back surface pattern 13 and the joining material 30d can be suppressed, and good chamfered and rounded edges can be formed at the corners of the joining material 30e. Note that either the projection 22d or the fitting portion may be provided, but only one of them may be provided.

[0037] Embodiment 4. Figure 13 is a plan view of the cooler 40d and bonding material 30e according to Embodiment 4. A resist 52e may be provided on the upper surface of the cooler 40d along the chamfered portion of the bonding material 30e. The other configurations are the same as those of Embodiment 3. When solder is used for the bonding material 30e, the resist 52e suppresses the wetting and spreading of solder onto the cooler 40d during solder melting. Therefore, a desired chamfered or rounded surface can be formed at the corners of the bonding material 30e.

[0038] Furthermore, the shape of the resist 52e in this embodiment and the shape of the bonding surface of the back surface pattern 13c in Embodiment 2 may be combined. Also, instead of chamfering the corners of the bonding surface of the back surface pattern 13c as in Embodiment 2, the corners of the bonding material 30e may be chamfered using only the resist 52e. In addition, it is preferable that the resist 52e be provided between the hole 48d, which is the fitting portion, and the bonding material 30e.

[0039] Figure 14 is a plan view of the cooler 40d and bonding material 30e according to the first modification of Embodiment 4. Figure 15 is a plan view of the cooler 40d and bonding material 30e according to the second modification of Embodiment 4. In Figure 13, the resist 52e is provided locally near the corners of the bonding material 30e. In contrast, as shown in resists 52f and 52g, the resist may surround the bonding material 30e. This further stabilizes the shape of the bonding material 30e.

[0040] Embodiment 5. Figure 16 is a plan view of the cooler 40h and bonding material 30h according to Embodiment 5. Figure 17 is a cross-sectional view of the semiconductor device 100h according to Embodiment 5. Note that Figure 16 shows the cross-section along the dashed line A-A' in Figure 17. A groove 54h is formed on the upper surface of the cooler 40h between the fastening portion 42 and the bonding material 30h. The other configurations are the same as those of Embodiment 1.

[0041] By forming a groove 54h between the fastening portion 42 and the joining material 30h in the cooler 40h, stress relief on the joining material 30h becomes possible. When the curvature of the cooler 40h changes, the portion where the groove 54h, which has relatively less rigidity, is formed deforms significantly. Therefore, the amount of curvature change near the joining material 30h can be suppressed, and the vertical stress applied to the joining material 30h can be reduced.

[0042] Furthermore, as shown in Figure 16, the groove 54h does not necessarily have to be formed between the multiple bonding materials 30h. This reduces the additional space required for the groove 54h, allowing for miniaturization of the semiconductor device 100h.

[0043] FIG. 18 is a plan view of the cooler 40i and the bonding material 30i according to the first modification of Embodiment 5. The groove 54i may be formed along the chamfered portion of the bonding material 30i. Thereby, the effect of stress relaxation can be enhanced. Also, the groove 54i may be provided only between the fastening portion 42 and the bonding material 30i.

[0044] FIG. 19 is a plan view of the cooler 40j and the bonding material 30j according to the second modification of Embodiment 5. In the second modification, in addition to the structure of FIG. 18, a resist 52j is provided between the groove 54j and the bonding material 30j. Thereby, the chamfered bonding material 30j can be stably formed. Therefore, the semiconductor device can have a longer lifespan.

[0045] Embodiment 6. FIG. 20 is a cross-sectional view of the semiconductor device 100k according to Embodiment 6. In the present embodiment, in the semiconductor module 10k, the difference from Embodiment 1 is that a recess 24k is formed on the upper surface of the sealing material 20k. Other configurations are the same as those of Embodiment 1. The recess 24k makes the sealing material 20k thinner. For this reason, the rigidity of the semiconductor module 10k decreases. Therefore, when thermal stress occurs in the semiconductor device 100k, the semiconductor module 10k easily follows the deformation of the cooler 40. Therefore, the vertical stress applied to the bonding material 30 between the cooler 40 and the semiconductor module 10k can be relaxed.

[0046] Embodiment 7. FIG. 21 is a cross-sectional view of the semiconductor device 100l according to Embodiment 7. In Embodiments 1-6, an example where the cooling mechanism to which the cooler 40 is fastened is the water jacket 50 has been described. However, it is not limited to this. As shown in FIG. 21, the cooling mechanism may be the air-cooling fins 70l. In this case, the back surface of the cooler 40l is flat. Also, a heat dissipation material 56l such as grease or a heat dissipation sheet is provided between the cooler 40l and the air-cooling fins 70l. Note that using the water jacket 50 as the cooling mechanism provides higher cooling performance.

[0047] Embodiment 8. In this embodiment, an example in which the semiconductor device 100 of Embodiment 1 is applied to a power conversion device 200 which is a three-phase inverter will be described. Note that the power conversion device 200 to which the semiconductor device 100 is applied is not limited to a specific power conversion device 200. Also, any of the semiconductor devices of Embodiments 1-7 may be applied to the power conversion device 200.

[0048] FIG. 22 is a block diagram showing the configuration of a power conversion system to which the semiconductor device 100 is applied. The power conversion system is composed of a power source 400, a power conversion device 200, and a load 300. The power source 400 is a DC power source and supplies DC power to the power conversion device 200. The power source 400 can be composed of various things. The power source 400 can be composed of, for example, a DC system, a solar cell, or a storage battery. The power source 400 may be composed of a rectifier circuit connected to an AC system, or an AC / DC converter. Also, the power source 400 may be composed of a DC / DC converter that converts DC power output from a DC system into predetermined power.

[0049] The power conversion device 200 is a three-phase inverter connected between the power source 400 and the load 300. The power conversion device 200 converts the DC power supplied from the power source 400 into AC power and supplies the AC power to the load 300. The main conversion circuit 201 has the semiconductor device 100. The main conversion circuit 201 converts the input DC power into AC power and outputs it. The drive circuit 202 outputs a drive signal for driving each switching element of the semiconductor device 100 included in the main conversion circuit 201 to the semiconductor device 100. The control circuit 203 outputs a control signal for controlling the drive circuit 202 to the drive circuit 202.

[0050] The load 300 is a three-phase motor driven by the AC power supplied from the power conversion device 200. Note that the load 300 is not limited to a specific application and may be a motor mounted on various electrical devices. The load 300 is used, for example, as a motor for a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, or an air conditioner.

[0051] The details of the power converter 200 are described below. The main conversion circuit 201 includes switching elements and freewheeling diodes (not shown). The main conversion circuit 201 converts the DC power supplied from the power supply 400 into AC power by the switching of the switching elements and supplies it to the load 300. There are various specific circuit configurations for the main conversion circuit 201. The main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes antiparallel to each of the switching elements.

[0052] Each switching element in the main conversion circuit 201 is fitted with a semiconductor device according to any of the embodiments 1 to 7 described above. The six switching elements are connected in series in pairs to form upper and lower arms. Each upper and lower arm constitutes one of the U-phase, V-phase, or W-phase of a full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0053] The drive circuit 202 generates drive signals to drive the switching elements of the main conversion circuit 201 and supplies them to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, the drive circuit 202 outputs drive signals to turn on the switching elements and drive signals to turn off the switching elements to the control electrodes of each switching element, according to the control signals from the control circuit 203, which will be described later. When the switching element is kept in the ON state, the drive signal is a voltage signal above the threshold voltage of the switching element, i.e., an ON signal. When the switching element is kept in the OFF state, the drive signal is a voltage signal below the threshold voltage of the switching element, i.e., an OFF signal.

[0054] The control circuit 203 controls the switching elements of the main converter circuit 201 so that the desired power is supplied to the load 300. Specifically, the control circuit 203 calculates the on-time for each switching element of the main converter circuit 201 to be in the ON state based on the power to be supplied to the load 300. For example, the main converter circuit 201 can be controlled by PWM (Pulse Width Modulation) control, which modulates the on-time of the switching elements according to the voltage to be output. The control circuit 203 then outputs a control signal to the drive circuit 202 so that an ON signal is output to the switching elements that should be in the ON state at each point in time, and an OFF signal is output to the switching elements that should be in the OFF state. The drive circuit 202 outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element according to this control signal.

[0055] In the power converter 200 according to this embodiment, the semiconductor device according to Embodiments 1-7 is used as the switching element of the main conversion circuit 201, which allows for miniaturization of the power converter 200.

[0056] In this embodiment, an example of applying the semiconductor device 100 to a two-level three-phase inverter has been described, but the semiconductor device 100 can be applied to various power conversion devices 200. For example, the power conversion device 200 may be a three-level or multi-level power conversion device. Also, when supplying power to a single-phase load, the semiconductor device 100 may be applied to a single-phase inverter. Furthermore, when supplying power to a DC load, the semiconductor device 100 can also be applied to a DC / DC converter or an AC / DC converter.

[0057] Furthermore, the power converter 200 to which the semiconductor device 100 is applied is not limited to cases where the load 300 is an electric motor. The power converter 200 can also be used, for example, as a power supply for an electrical discharge machine, a laser processing machine, an induction cooker, or a non-contact power supply system. In addition, the power converter 200 can also be used as a power conditioner for a solar power generation system, an energy storage system, etc.

[0058] The technical features described in each embodiment may be used in combination as appropriate.

[0059] 10, 10b, 10c, 10k Semiconductor module, 11 Insulating layer, 12 Circuit pattern, 13, 13c Back pattern, 14 Semiconductor chip, 15 Internal bonding material, 16, 17 Terminals, 18 Wiring, 20, 20b, 20d, 20k Sealing material, 21 Opening, 22d Protrusion, 23d Protrusion, 24k Recess, 30, 30a, 30d, 30e, 30h, 30i, 30j Bonding material, 31 Mounting area, 40, 40a, 40d, 40h, 40i, 40j, 40l Cooler, 42 Fastening part, 44 Screw, 46 O-ring, 48d Hole, 50, 50a Water jacket, 52e, 52f, 52g, 52j Resist, 54h, 54i, 54j Groove, 56l Heat dissipation material, 70L; Air cooling fins, 100, 100A, 100D, 100H, 100K, 100L; Semiconductor device, 200; Power converter, 201; Main conversion circuit, 202; Drive circuit, 203; Control circuit, 300; Load, 400; Power supply

Claims

1. A semiconductor device comprising: an insulating substrate having an insulating layer, a circuit pattern provided on the upper surface of the insulating layer, and a back surface pattern provided on the back surface of the insulating layer; a semiconductor chip provided on the circuit pattern; a sealing material covering the insulating substrate and the semiconductor chip; a cooler; and a bonding material joining the back surface pattern and the upper surface of the cooler, wherein the corners of the bonding material are chamfered in a plan view.

2. The semiconductor device according to claim 1, characterized in that, in a plan view, the surface of the back surface pattern that is in contact with the cooler is chamfered.

3. The semiconductor device according to claim 1, characterized in that the sealing material has an opening formed therein that exposes the surface of the back surface pattern that is in contact with the cooler, and the corners of the opening are chamfered in a plan view.

4. The semiconductor device according to claim 1 or 2, characterized in that a resist is provided on the upper surface of the cooler along the chamfered portion of the bonding material.

5. The semiconductor device according to claim 4, characterized in that the resist surrounds the bonding material.

6. The semiconductor device according to claim 4 or 5, characterized in that a fitting portion for fitting with the sealing material is formed on the upper surface of the cooler, and the resist is provided between the fitting portion and the bonding material.

7. The semiconductor device according to claim 4 or 5, characterized in that the cooler is fastened to a cooling mechanism at a fastening portion, a groove is formed on the upper surface of the cooler between the fastening portion and the bonding material, and the resist is provided between the groove and the bonding material.

8. The semiconductor device according to any one of claims 1 to 3, characterized in that the cooler is fastened to a cooling mechanism at a fastening portion, and a groove is formed on the upper surface of the cooler between the fastening portion and the joining material.

9. The semiconductor device according to claim 8, characterized in that the groove is formed along the chamfered portion of the bonding material.

10. The semiconductor device according to claim 8 or 9, wherein the bonding material comprises a plurality of bonding materials, and the groove is not formed between the plurality of bonding materials.

11. The semiconductor device according to any one of claims 1 to 10, characterized in that a step is formed in the portion of the back surface pattern that is covered by the sealing material.

12. The semiconductor device according to any one of claims 1 to 11, characterized in that the sealing material has protrusions that project toward the cooler.

13. The semiconductor device according to any one of claims 1 to 12, characterized in that a fitting portion for fitting with the sealing material is formed on the upper surface of the cooler.

14. The semiconductor device according to any one of claims 1 to 13, characterized in that a recess is formed on the upper surface of the sealing material.

15. The semiconductor device according to any one of claims 1 to 14, characterized in that the corners of the bonding material are chamfered by 2 mm or more in a plan view.

16. The semiconductor device according to any one of claims 1 to 14, characterized in that the corners of the bonding material are chamfered with a radius of 2 mm or more in a plan view.

17. The semiconductor device according to any one of claims 1 to 16, characterized in that the thickness of the bonding material is 1 / 20 or less of the length of the diagonal of the bonding material.

18. The semiconductor device according to any one of claims 1 to 17, characterized in that, in a plan view, the chamfered portion of the bonding material does not overlap with the semiconductor chip.

19. The semiconductor device according to any one of claims 1 to 18, wherein the cooler is fastened to a cooling mechanism at a plurality of fastening points, and the thickness of the cooler is five times or more the amount of warping of the cooler between the plurality of fastening points when the cooler is not fastened to the cooling mechanism.

20. The semiconductor device according to any one of claims 1 to 19, characterized in that the cooler is fastened to a cooling mechanism, and the flatness of the cooler when the cooler is not fastened to the cooling mechanism is 500 μm or less.

21. The semiconductor device according to any one of claims 1 to 20, characterized in that the cooler is fastened to a cooling mechanism at a plurality of fastening points, and the thickness of the cooler is 0.02 times or more the distance between the plurality of fastening points.

22. The semiconductor device according to any one of claims 1 to 21, characterized in that the semiconductor chip is formed of a wide-bandgap semiconductor.

23. The semiconductor device according to claim 22, characterized in that the wide bandgap semiconductor is silicon carbide, gallium nitride-based material, or diamond.

24. A power conversion device comprising: a main conversion circuit configured to convert and output input power, having a semiconductor device according to any one of claims 1 to 23; a drive circuit configured to output a drive signal to drive the semiconductor device; and a control circuit configured to output a control signal to control the drive circuit.

Images