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On-chip eye diagram monitoring circuit based on two-dimensional asymmetric variable mask in high-speed serial communication

A high-speed serial and monitoring circuit technology, applied in the direction of electrical components, communication channel monitoring, transmission system, etc., can solve problems such as errors

Active Publication Date: 2019-11-22
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] For the traditional EOM implementation, in the set rectangular template, the reference voltage and sampling clock are symmetrical about the center, while the eye generated by the actual data Figure 1 Generally, it is asymmetrical, and there is a certain error between the waveform diagram superimposed by the symmetrical rectangular template and the actual eye diagram.

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  • On-chip eye diagram monitoring circuit based on two-dimensional asymmetric variable mask in high-speed serial communication
  • On-chip eye diagram monitoring circuit based on two-dimensional asymmetric variable mask in high-speed serial communication
  • On-chip eye diagram monitoring circuit based on two-dimensional asymmetric variable mask in high-speed serial communication

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Embodiment Construction

[0025] The preferred embodiments will be described in detail below in conjunction with the accompanying drawings. It should be emphasized that the following description is only exemplary and not intended to limit the scope of the invention and its application.

[0026] The implementation of the rectangle template is as follows image 3 shown. In the rectangular template, the reference voltage V on the vertical axis H and V L On the basis of the common-mode voltage, change downwards and upwards in different increments, while maintaining the reference voltage V H and V L Under the same condition, the two-phase sampling clock on the horizontal axis is first moved to the middle of 1UI, and the sampling clock is changed to the left and right respectively, so that it can generate a template with asymmetrical horizontal and vertical axes. When the data is given, different rectangular templates correspond to their corresponding bit error rates, and the final eye diagram waveform ...

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Abstract

The invention relates to an on-chip eye-opening monitor circuit based on a two-dimensional asymmetrical variable template in high speed serial communication and belongs to the technical field of an integrated circuit. According to an EOM provided by the invention, reference voltages of a vertical axis can be adjusted through two ways of DACs, sampling clocks of a horizontal axis can be adjusted through two ways of PIs, and asymmetrical reference templates is realized, so a finally formed asymmetrical eye diagram approaches to the measurement condition of a practical eye diagram. Moreover, through increase of the number of templates, the precision of the finally formed eye diagram is improved. CML circuits are employed for voltage comparison and sampling circuits of the circuit and CMOS circuits are employed for logic operation and frequency division, so a low power consumption purpose is realized.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, and relates to an eye diagram monitoring circuit integrated on a chip based on a two-dimensional asymmetrical variable template in high-speed serial communication and a main circuit of a receiver. Background technique [0002] The eye diagram is one of the important performance indicators in the physical layer test of high-speed serial communication, and is the core of analyzing the signal integrity of high-speed links. Eye height and eye width are usually used to measure the quality of the eye diagram. The larger the eye diagram is opened in the vertical and horizontal directions, the better the signal quality. [0003] In the wired communication system, the transmission of high-speed serial data in the channel will be affected by the attenuation of the high-frequency component of the signal by the channel and the signal reflection caused by the discontinuity of the channel imp...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B1/16H04B17/30
Inventor 王自强栾文焕袁帅张春王志华
Owner TSINGHUA UNIV