A kind of anti-sulfurization chip resistor and its manufacturing method

By using multi-layer protective structure and high palladium electrode materials in chip resistors, the problem of sulfide intrusion in the prior art is solved, and efficient anti-sulfurization performance and low cost-effectiveness in harsh environments are achieved.

CN111341509BActive Publication Date: 2025-03-18YAGEO ELECTRONICS CHINA CO LTD
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Patent Information

Application Number
CN202010193567.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-03-18
Publication Date
2025-03-18
Estimated Expiration
2040-03-18

AI Technical Summary

Technical Problem

Under the harsh conditions such as high temperature, high humidity and oil boiling, the nickel alloy, nickel and tin electroplating layer and the protective layer are insufficiently bonded to the protective layer, resulting in sulfides being easily invaded and product failure.

Method used

A resistive vulcanization chip resistor design is adopted, including a ceramic substrate, a back electrode, a front electrode, a resistive layer, a multi-layer protective layer and a vacuum coating layer. The sealed protection area is formed by overlapping nickel and tin, and a high palladium electrode material is used to protect vulcanization erosion.

Benefits of technology

It effectively resists vulcanization and erosion under harsh conditions such as high temperature, high humidity and oil boiling, improves weather resistance, and achieves multiple protection effects through low-cost high-palladium electrode materials.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses an anti-sulfurization chip resistor and a manufacturing method thereof, wherein the anti-sulfurization chip resistor comprises a substrate, two front electrodes, two back electrodes, a resistance layer, a first protective layer, a second protective layer, two auxiliary electrode layers, two vacuum coating layers and two electroplating layers. The resistance layer is arranged directly on the substrate, the first protective layer is on the resistance layer; the second protective layer is above the first protective layer; the two auxiliary electrode layers are respectively arranged on the two front electrodes, and the two auxiliary electrode layers are respectively connected to the second protective layers on the same side; each vacuum coating layer is located on the side of the substrate; the two electroplating layers are respectively arranged on the two sides of the substrate, and the front and back sides close to the sides. The structure is firm and has strong sealing properties, which can effectively avoid the formation of interface gaps under hot and cold shocks; it can effectively resist sulfurization erosion under harsh conditions such as high temperature, high humidity and oil boiling, and has stronger weather resistance.
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Description

Technical Field

[0001] The present invention relates to the technical field of chip resistors, and in particular to an anti-sulfurization chip resistor and a manufacturing method thereof. Background Art

[0002] Traditional chip resistors generally include: a substrate, a pair of front electrodes at both ends of the upper surface of the substrate, a resistor body bridging the front electrodes, a protective layer covering the resistor body and the surface electrodes, a pair of back electrodes at both ends of the lower surface of the substrate, and a pair of end electrodes arranged on both sides of the substrate in the length direction and bridging the front electrode and the back electrode. A nickel-plated layer and a tin-plated layer are arranged on the surface of the front electrode, the end electrode and the back electrode, and the nickel-plated layer and the tin-plated layer together constitute the substrate electrode layer of the resistor.

[0003] Conventional chip resistor anti-sulfurization methods are to cover the front electrode with a nickel alloy barrier layer, or to cover the junction of the front electrode and the protective layer with a nickel-tin electroplating layer, both of which can achieve a certain degree of anti-sulfurization requirements. However, as the anti-sulfurization requirements continue to increase, such as exposure to high temperature, high humidity, oil boiling and other rigorous test aging processes, the bonding between the nickel alloy, nickel and tin electroplating layer and the protective layer is obviously insufficient, and interface gaps are likely to appear at the overlap, allowing sulfides to easily invade along this interface and cause product failure.

[0004] Therefore, in view of the above-mentioned technical problems, it is necessary to provide a new technical solution. Summary of the invention

[0005] In order to solve the technical problems existing in the prior art, the present invention provides an anti-sulfurization chip resistor and a manufacturing method thereof. The specific technical scheme is as follows:

[0006] An anti-sulfurization chip resistor of the present invention comprises:

[0007] A substrate having a front surface, a back surface and side surfaces;

[0008] Back electrodes are arranged on the back surface of the substrate at intervals;

[0009] Front electrodes are arranged at intervals on the front surface of the substrate;

[0010] A resistance layer, which is arranged on the front surface of the substrate;

[0011] A first protective layer, which covers the resistance layer, and two opposite sides of the first protective layer are respectively connected to the front electrode;

[0012] A second protective layer, which covers the first protective layer, and two opposite sides of the second protective layer are respectively connected to the front electrode;

[0013] Auxiliary electrode layers are respectively arranged on the two front electrodes, and the auxiliary electrode layers overlap with the second protective layers on the same side;

[0014] A vacuum coating layer, which is symmetrically arranged on the side of the substrate, each vacuum coating layer extends downward from the top of the auxiliary electrode layer to the back electrode, and the vacuum coating layer covers the side of the substrate;

[0015] The electroplating layers are symmetrically covered on the vacuum coating layers, and each electroplating layer extends downward from the top of the auxiliary electrode layer to the back electrode, and the electroplating layer covers the back electrode and is connected to the substrate.

[0016] Furthermore, the first protective layer, the second protective layer, the auxiliary electrode layer and the nickel and tin deposited after electroplating in the electroplating layer overlap to form a first protective area.

[0017] Furthermore, the front electrode is made of high-palladium electrode material.

[0018] Furthermore, the first protective layer is a glass layer;

[0019] The second protective layer is a resin layer.

[0020] Furthermore, the auxiliary electrode layer is a resin-type conductive material.

[0021] Furthermore, the substrate is a ceramic substrate.

[0022] A method for manufacturing an anti-sulfurization chip resistor comprises the following steps:

[0023] S1. Providing a substrate, wherein the substrate has a front surface, a back surface and a side surface;

[0024] S2. A back electrode is disposed on the back surface of the substrate, wherein the back electrodes are disposed on the back surface of the substrate at intervals, and each back electrode has an outer side surface;

[0025] S3. Two front electrodes are provided on the front surface of the substrate, the front electrodes are spaced apart, and each front electrode has an outer side surface;

[0026] S4. forming a resistor layer in the middle region of the front surface of the substrate, wherein two opposite sides of the resistor layer are respectively connected to the front electrode;

[0027] S5. Disposing a first protective layer above the resistor layer, wherein two opposite sides of the first protective layer are respectively connected to the front electrode;

[0028] S6. Disposing a second protective layer above the first protective layer, the second protective layer covers the first protective layer, and two opposite sides of the second protective layer are respectively connected to the front electrode;

[0029] S7. Disposing two auxiliary electrode layers on the two front electrodes respectively, wherein the auxiliary electrode layers overlap with the second protective layer on the same side respectively;

[0030] S8. The vacuum coating layers are symmetrically arranged on the side of the substrate, each vacuum coating layer extends downward from the top of the auxiliary electrode layer to the back electrode, and the vacuum coating layer covers the side of the ceramic substrate;

[0031] S9. symmetrically cover the two electroplating layers on the vacuum coating layer respectively, each electroplating layer extends downward from above the front electrode and the auxiliary electrode layer to the back electrode, and the electroplating layer covers the back electrode and is connected to the substrate.

[0032] Further, in step S2, two back electrodes are formed on the back surface of the substrate by screen printing;

[0033] In step S3, two front electrodes are formed on the front surface of the substrate by screen printing;

[0034] In step S4, a resistor layer is formed on the front surface of the substrate by screen printing;

[0035] In step S5, a first protective layer is formed on the resistor layer by screen printing;

[0036] In step S6, a second protective layer is formed on the first protective layer by screen printing.

[0037] Further, in step S8, under vacuum conditions, nickel-chromium alloy is electroplated on both sides of the substrate to form a vacuum coating layer;

[0038] In step S9, nickel and tin are electroplated on the outer sides of the auxiliary electrode layer, the back electrode and the vacuum coating layer to form an electroplated layer.

[0039] Furthermore, the first protective layer, the second protective layer, the auxiliary electrode layer and the nickel and tin deposited after electroplating in the electroplating layer overlap to form a first protective area.

[0040] The anti-sulfurization chip resistor and the manufacturing method thereof of the present invention have the following beneficial effects:

[0041] 1. The anti-sulfur structure is strong in sealing and can effectively avoid the formation of interface gaps under hot and cold shocks; it can effectively resist sulfide erosion under harsh conditions such as high temperature, high humidity and oil boiling, and has stronger weather resistance.

[0042] Second, the high-palladium electrode material is combined with the structure to form multiple protections against sulfidation corrosion. There is no need to use electrode paste with a palladium content of more than 30%, or expensive metal materials such as gold paste, foil paste, or a mixture thereof, thus achieving low-cost benefits.

[0043] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the technical solution of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0045] Figure 1 is a schematic diagram of the structure of the anti-sulfurization chip resistor provided in this embodiment;

[0046] Figure 2 It is a schematic flow chart of the method for manufacturing the anti-sulfurization chip resistor of the present invention.

[0047] Among them, 1-back electrode, 2-front electrode, 3-resistance layer, 4-first protective layer, 5-second protective layer, 6-auxiliary electrode layer, 7-vacuum coating layer, 8-electroplating layer, 9-first protection area, 10-substrate. DETAILED DESCRIPTION

[0048] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar components or components having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0049] In the description of the present invention, it should be understood that the terms "upper", "lower", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In the description of the present invention, "plurality" means two or more, unless otherwise clearly and specifically defined.

[0050] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two components or the interaction relationship between two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0051] Example

[0052] See also Figure 1 and Figure 2 , Figure 1 It is a schematic diagram of the structure of the anti-sulfurization chip resistor; Figure 2 It is a schematic flow chart of the method for manufacturing the anti-sulfurization chip resistor of the present invention.

[0053] The substrate 10 is a ceramic substrate; the substrate 10 has a front surface, a back surface and two side surfaces;

[0054] In this document, “inner side” refers to a direction close to the middle region of the substrate, and “outer side” refers to a direction away from the middle region of the substrate;

[0055] Two back electrodes 1 are arranged on the back surface of the substrate 10, the back electrodes 1 are spaced apart and not connected to each other, and each back electrode 1 has an inner side and an outer side; the back electrode slurry is printed on the back surface of the substrate 10 by screen printing technology, and the back electrode is formed after drying.

[0056] Two front electrodes 2 are arranged on the front surface of the substrate 10, the front electrodes 2 are spaced apart and not connected to each other, and each front electrode 2 has an outer side and an inner side; the front electrode slurry is printed on the front surface of the substrate 10 by screen printing technology, and the front electrode 2 is formed after drying.

[0057] The front electrode 2 and the back electrode 1 are sintered at 850 degrees Celsius to burn off the high molecular organic matter, form a glass phase, and firmly attach the conductive material such as silver palladium to the substrate 10.

[0058] A resistor layer 3 is formed in an intermediate area on the front surface of the substrate 10; a resistor paste is printed between the inner side surfaces of the two front electrodes 2 using screen printing technology, and two opposite sides of the resistor layer 3 are respectively connected to the front electrodes 2; the resistor layer is subjected to a sintering process at 850 degrees Celsius, and the high molecular organic matter in the resistor layer 3 is volatilized and carbonized to form a glass phase, thereby solidifying the semiconductor material on the substrate 10.

[0059] A first protective layer 4 is arranged above the resistor layer 3, the first protective layer 4 covers the resistor layer 3, and the two opposite sides of the first protective layer 4 are respectively connected to the front electrode 2; the glass paste is covered on the upper surface of the resistor layer 3 and the two edges of the resistor layer 3 by screen printing technology; the first protective layer 4 is subjected to a sintering process at 600 to 620 degrees Celsius to volatilize and carbonize the high molecular organic matter in the first protective layer 4, and the paste of the first protective layer 4 is vitrified to form a glass layer above the resistor layer 3 and the front electrode 2 at the edge of the resistor layer 3 to protect the covered area; the cutting groove edge of the resistor is prevented from collapsing during the laser trimming process, thereby increasing the moisture resistance and insulation performance of the resistor, the anti-sulfurization corrosion performance of the conductor, etc.;

[0060] The resistance value of the resistor layer is trimmed by laser cutting to adjust the discrete resistance value to the target resistance value range.

[0061] A second protective layer 5 is arranged above the first protective layer 4 , and the second protective layer 5 covers part of the front electrode 2 ; a resin insulating material is covered above the first protective layer 4 by using screen printing technology.

[0062] The two auxiliary electrode layers 6 are respectively arranged on the two front electrodes 2, and the two auxiliary electrode layers 6 are respectively connected to the second protective layer 5 on the same side; a layer of resin-type conductive material is covered on the edges of the front electrode 2 and the second protective layer 5 to protect the electrodes, and the surface of the auxiliary electrode layer 6 is covered with nickel and tin after electroplating to protect the auxiliary materials while meeting the size requirements of the front terminal.

[0063] A layer of white material is printed on the upper surface of the outermost second protective layer 5 to mark the resistance value.

[0064] The outermost second protective layer 5, the auxiliary electrode layer 6 and the white material are cured at 200 degrees Celsius to form a strong structure and meet the requirements of wear resistance and weather resistance.

[0065] The printed resistors are folded into strips by mechanical force and placed neatly and orderly in the jig.

[0066] The vacuum coating layer 7 is symmetrically arranged on the side of the substrate 10, and each vacuum coating layer 7 extends downward from the top of the auxiliary electrode layer to the back electrode 2, and the vacuum coating layer 7 covers the side of the substrate 10; the side terminals of the resistors arranged in the fixture are plated with nickel-chromium alloy, or a similar series of conductive materials, or alloy materials under vacuum conditions to connect the front electrode 2 with the back electrode 1 to form side terminals.

[0067] Through mechanical force, the strip resistors with nickel-chromium alloy plated on the sides are folded into granular units.

[0068] Two electroplating layers 8 are respectively arranged on the two sides of the substrate 10, and the electroplating layers 8 respectively cover the auxiliary electrode layer 6, the back electrode 2, the vacuum coating layer 7 and part of the second protective layer 5; nickel and tin layers are respectively deposited under the auxiliary electrode layer 6 above the front plate surface and the back electrode 2 on the back plate surface.

[0069] A nickel-tin layer is deposited by screen printing of the first protective layer 4 , screen printing of the second protective layer 5 , auxiliary electrode layer 6 and terminal electroplating to form a first protective area 9 for dense protection of the front electrode 2 .

[0070] The back electrode 1 is attached to the back surface of the substrate 10, the outer end surface is connected to the vacuum coating layer 7, and the front surface and the electroplating layer 8 together form the back electrode;

[0071] The front electrode 2 is attached to the front surface of the substrate 10, and the outer end surface is connected to the vacuum coating layer 7. The top is covered with a resistor layer 3, a first protective layer 4, a second protective layer 5 and an auxiliary electrode layer 6 in sequence.

[0072] The inner side of the front electrode 2 overlaps with the resistance layer 3 to form impedance; the inner side of the front electrode 2 overlaps with the first protective layer 4 and the second protective layer 5, and the resistance layer 3, the first protective layer 4 and the second protective layer 5 form a sealed protection for the electrode in the covered area, and the first protective layer 4 blocks the influence of moisture carrying sulfide substances in harsh environments;

[0073] The resin conductive material of the auxiliary electrode layer 6 has a strong bonding force with the resin insulation of the second protective layer 5 , and can undergo plastic deformation in hot and cold environments without forming interface gaps, thereby providing effective sealing protection for the front electrode 2 .

[0074] After sintering, the palladium in the high-palladium electrode material will form a barrier sulfide layer on the surface of the silver layer. The high-palladium material curbs the chain chemical reaction and achieves a multiple protection effect.

[0075] The beneficial effects of the present invention are: 1. The anti-sulfur structure is strong in sealing and can effectively avoid the formation of interface gaps under hot and cold shocks; it can effectively resist sulfide erosion under harsh conditions such as high temperature, high humidity and oil boiling, and has stronger weather resistance.

[0076] Second, the high-palladium electrode material is combined with the structure to form multiple protections against sulfidation corrosion. There is no need to use electrode paste with a palladium content of more than 30%, or expensive metal materials such as gold paste, foil paste, or a mixture thereof, thus achieving low-cost benefits.

[0077] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

[0078] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify and vary the above embodiments within the scope of the present invention.

Claims

1. A sulfur-resistant chip resistor, characterized in that: include: A substrate (10) having a front surface, a back surface and side surfaces; Back electrodes (1) are arranged at intervals on the back surface of the substrate (10); Front electrodes (2) are arranged at intervals on the front surface of the substrate (10); A resistance layer (3) disposed on the front surface of the substrate (10); A first protective layer (4) covering the resistance layer (3), and two opposite sides of the first protective layer (4) are respectively connected to the front electrode (2); A second protective layer (5) covering the first protective layer (4), and two opposite sides of the second protective layer (5) are respectively connected to the front electrode (2); Auxiliary electrode layers (6) are respectively arranged on the two front electrodes (2), and the auxiliary electrode layers (6) overlap with the second protective layers (5) on the same side; A vacuum coating layer (7) symmetrically arranged on the side of the substrate (10), each vacuum coating layer (7) extending downward from the top of the auxiliary electrode layer (6) to the back electrode (1), and the vacuum coating layer (7) covers the side of the substrate (10); The electroplating layers (8) are symmetrically covered on the vacuum coating layers (7), and each electroplating layer (8) extends downward from the top of the auxiliary electrode layer (6) to the back electrode (1), and the electroplating layer (8) covers the back electrode and is connected to the substrate (10).

2. The anti-sulfurization chip resistor according to claim 1, characterized in that: The nickel and tin deposited after electroplating on the first protective layer (4), the second protective layer (5), the auxiliary electrode layer (6) and the electroplating layer (8) overlap to form a first protective area (9).

3. The anti-sulfurization chip resistor according to claim 1, characterized in that: The front electrode (2) is made of high-palladium electrode material.

4. The anti-sulfurization chip resistor according to claim 1, characterized in that: The first protective layer (4) is a glass layer; The second protective layer (5) is a resin layer.

5. The anti-sulfurization chip resistor according to claim 1, characterized in that: The auxiliary electrode layer (6) is a resin-type conductive material.

6. The anti-sulfurization chip resistor according to claim 1, characterized in that: The substrate (10) is a ceramic substrate.

7. A method for manufacturing an anti-sulfurization chip resistor, characterized in that: It includes the following steps: S1. Providing a substrate (10), wherein the substrate (10) has a front surface, a back surface and a side surface; S2. A back electrode (1) is arranged on the back surface of the substrate (10), wherein the back electrodes (1) are arranged at intervals on the back surface of the substrate (10), and each back electrode (1) has an outer side surface; S3. Two front electrodes (2) are arranged on the front surface of the substrate (10), the front electrodes (2) are spaced apart, and each front electrode (2) has an outer side surface; S4. forming a resistor layer (3) in the middle area of ​​the front surface of the substrate (10), wherein two opposite sides of the resistor layer (3) are respectively connected to the front electrode (2); S5. A first protective layer (4) is provided above the resistor layer (3), wherein two opposite sides of the first protective layer (4) are respectively connected to the front electrode (2); S6. Arranging a second protective layer (5) above the first protective layer (4), wherein the second protective layer (5) covers the first protective layer (4), and two opposite sides of the second protective layer are respectively connected to the front electrode (2); S7. Disposing two auxiliary electrode layers (6) on the two front electrodes (2), respectively, wherein the auxiliary electrode layers (6) overlap with the second protective layer (5) on the same side; S8. The vacuum coating layers (7) are symmetrically arranged on the side surfaces of the substrate (10), each vacuum coating layer (7) extends downward from the top of the auxiliary electrode layer (6) to the back electrode (1), and the vacuum coating layers (7) cover the side surfaces of the substrate (10); S9. Two electroplating layers (8) are symmetrically covered on the vacuum coating layer (7), each electroplating layer (8) extends downward from above the front electrode (2) and the auxiliary electrode layer (6) to the back electrode (1), and the electroplating layer covers the back electrode and is connected to the substrate.

8. The method for manufacturing a sulfur-resistant chip resistor according to claim 6, wherein: In step S2, two back electrodes (1) are formed on the back surface of the substrate (10) by screen printing; In step S3, two front electrodes (2) are formed on the front surface of the substrate (10) by screen printing; In step S4, a resistor layer (3) is formed on the front surface of the substrate (10) by screen printing; In step S5, a first protective layer (4) is formed on the resistor layer (3) by screen printing; In step S6, a second protective layer (5) is formed on the first protective layer (4) by screen printing.

9. The method for manufacturing a sulfur-resistant chip resistor according to claim 6, wherein: In step S8, under vacuum conditions, nickel-chromium alloy is electroplated on both sides of the substrate (10) to form a vacuum coating layer (7); In step S9, nickel and tin are electroplated on the outer sides of the auxiliary electrode layer (6), the back electrode (1) and the vacuum coating layer (7) to form an electroplated layer (8).

10. The method for manufacturing a sulfur-resistant chip resistor according to claim 6, wherein: The nickel and tin deposited after electroplating on the first protective layer (4), the second protective layer (5), the auxiliary electrode layer (6) and the electroplating layer (8) overlap to form a first protective area (9).

Citation Information

Patent Citations

  • Anti-vulcanization chip resistor

    CN211788403U