High vacuum ultra-low temperature semiconductor wafer rapid cooling platform

Abstract

The present invention provides a high vacuum ultra-low temperature semiconductor wafer rapid cooling platform; this platform can cool a semiconductor wafer with a diameter of 300 mm from room temperature to -120°C within 15 to 30 seconds. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform is composed of a high vacuum ultra-low temperature cavity and a self-cascade low temperature refrigeration medium circulation closed-circuit system; the self-cascade low temperature refrigeration medium circulation closed-circuit system includes a refrigeration medium circulation pipe and an ultra-low temperature cooling plate, the ultra-low temperature cooling plate and the semiconductor wafer electrostatic chuck are arranged in the high vacuum ultra-low temperature cooling chamber, the semiconductor wafer electrostatic chuck is arranged on the upper side of the ultra-low temperature cooling plate, a coil channel is opened on the ultra-low temperature cooling plate, metal indium is wrapped between the refrigeration medium circulation pipe and the side wall of the coil channel, the refrigeration medium circulation pipe is used for the flow of refrigeration medium, and the two ends of the refrigeration medium circulation pipe extend out of the high vacuum ultra-low temperature cavity respectively, and the refrigeration medium circulation pipe is passed through the refrigeration medium circulation pipe. The platform minimizes the loss of mixed refrigeration medium during transmission, greatly improving the energy efficiency ratio of the entire system.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor manufacturing and processing, and relates to a high-vacuum ultra-low temperature semiconductor wafer rapid cooling platform, which can cool a semiconductor wafer with a diameter of 300 mm from room temperature to internal cooling to -120°C within 15 to 30 seconds. The platform is suitable for ion implantation equipment and other semiconductor process equipment under high-vacuum ultra-low temperature process conditions. Background Art

[0002] Semiconductor devices have been developing towards miniaturization for a long time. According to Moore's Law, the number of semiconductor devices integrated per unit area of ​​an integrated circuit chip will double every 18 months. As semiconductor devices become smaller, most of the internal structures of semiconductor devices will inevitably shrink in proportion. At present, the key dimensions of semiconductor devices have reached the nanometer or deep nanometer level. How to manufacture ultra-shallow junctions and abrupt junctions in semiconductor devices, and how to more completely repair the ion implantation end-of-range defects (EOR Damage) in the semiconductor device manufacturing process have become the key to improving the performance of complementary metal oxide semiconductors. Existing theoretical research shows that in order to solve the above technical problems, it is generally necessary to amorphize the wafer surface.

[0003] Amorphization processing technology generally uses carbon, germanium and other atoms with no electrical properties but certain energy to disrupt the original crystal structure of single crystal silicon on the surface of the wafer, so that the single crystal silicon becomes amorphous (α-Si). Ion implantation is one of the technologies that has been widely used in semiconductor manufacturing in recent years to make single crystal silicon amorphous. Its principle is to ionize certain electrically neutral atoms or molecules, and then inject the required ion beam into the substrate material (such as wafer) at a certain angle with a certain energy and dosage. The incident ions will undergo a series of physical or chemical reactions with the substrate, thereby causing changes in the composition, structure and properties of the substrate surface, thereby turning the single crystal silicon into an amorphous state.

[0004] At present, ion implantation often uses room temperature ion implantation technology. The ambient temperature during implantation is generally around 20°C. As the ion implantation proceeds, the implanted ions will collide with the silicon atoms on the surface of the wafer, destroying the original crystal structure of the silicon on the surface of the wafer and causing damage to the crystal structure. However, since the collision causes the substrate temperature to rise, most of the damage will be repaired as the ion implantation proceeds. This is similar to the rapid annealing phenomenon after ion implantation, but it is a dynamic process, so it can be called dynamic annealing. Because of the dynamic annealing phenomenon during room temperature ion implantation, room temperature ion implantation cannot form the required amorphous layer on the wafer surface. In order to obtain the required good amorphous layer or a good amorphous state on the wafer surface, a new type of semiconductor wafer rapid cooling platform is urgently needed. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a high-vacuum ultra-low-temperature semiconductor wafer rapid cooling platform, which can cool a semiconductor wafer with a diameter of 300 mm from room temperature to -120°C within 15 to 30 seconds. The high-vacuum ultra-low-temperature semiconductor wafer rapid cooling platform is combined with an ion implanter, and ultra-low-temperature ion implantation technology is used to manufacture ultra-shallow junctions and sudden junctions, and the defects at the end of the ion implantation range are more completely repaired.

[0006] In order to solve the above technical problems, the present invention provides a high vacuum ultra-low temperature semiconductor wafer rapid cooling platform;

[0007] At least it includes a high vacuum ultra-low temperature cavity and a self-cascade low-temperature refrigeration medium circulation closed-circuit system; the self-cascade low-temperature refrigeration medium circulation closed-circuit system includes a refrigeration medium circulation pipe and an ultra-low temperature cooling plate, the ultra-low temperature cooling plate and the semiconductor wafer electrostatic suction cup are arranged in the high vacuum ultra-low temperature cooling chamber, the semiconductor wafer electrostatic suction cup is arranged on the upper side of the ultra-low temperature cooling plate, and a coil channel for accommodating the refrigeration medium circulation pipe is opened on the ultra-low temperature cooling plate. The refrigeration medium circulation pipe is arranged in the coil channel, and metal indium is wrapped between the refrigeration medium circulation pipe and the side wall of the coil channel. The refrigeration medium circulation pipe is used for the flow of refrigeration medium, and the two ends of the refrigeration medium circulation pipe extend out of the high vacuum ultra-low temperature cavity respectively. The refrigeration medium circulation pipe is filled with refrigeration medium. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform can cool a semiconductor wafer with a diameter of 300 mm from room temperature to -120°C within 15 to 30 seconds.

[0008] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, an observation window is provided on the side wall of the high vacuum ultra-low temperature chamber;

[0009] It also includes an optical camera, which is fixed on the outside of the high vacuum ultra-low temperature cavity, and the lens of the optical camera is aimed at the observation window.

[0010] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, a plurality of LED polarized light source introduction windows are provided on the side wall of the high vacuum ultra-low temperature cavity, and the plurality of LED polarized light source introduction windows are symmetrically distributed on the side wall of the high vacuum ultra-low temperature cavity.

[0011] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, the refrigerant circulating in the refrigerant circulation pipe is a mixed refrigerant, which uses R290 and R744 with a ratio of 60-80%:20-40%.

[0012] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, an ultra-low temperature reflector panel is fixed inside the high vacuum ultra-low temperature cooling chamber, and an ultra-low temperature insulating pad is provided between the ultra-low temperature reflector panel and the ultra-low temperature cooling flat plate.

[0013] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, the side walls of the high vacuum ultra-low temperature cavity are respectively provided with a refrigerant inlet and a refrigerant outlet which are connected to the high vacuum ultra-low temperature cooling chamber, and the outer side wall of the high vacuum ultra-low temperature cavity outside the refrigerant inlet and the refrigerant outlet is provided with a multi-layer hollow thin-walled stainless steel bellows, and the multi-layer hollow thin-walled stainless steel bellows are respectively mounted on both ends of the refrigerant circulation pipe.

[0014] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, the side wall of the high vacuum ultra-low temperature cavity is also provided with at least one spare opening, and the outer side wall of the high vacuum ultra-low temperature cavity outside the spare opening is provided with multiple layers of hollow thin-walled stainless steel bellows.

[0015] As the preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, the refrigerant circulation tube is a copper tube disk, and the ultra-low temperature cooling plate is made of aluminum alloy;

[0016] The molten indium is used to fix the refrigerant circulation tube in the coil channel of the ultra-low temperature cooling plate.

[0017] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, the outer wall of the high vacuum ultra-low temperature chamber is provided with a process gas access flange matched with the air inlet pipe, and the end of the air inlet pipe is matched with the process gas access flange and extends into the high vacuum ultra-low temperature cooling chamber;

[0018] The outer wall of the high vacuum ultra-low temperature chamber is provided with an electrode access flange for accessing a driving power supply electrode of a semiconductor wafer electrostatic chuck;

[0019] The outer wall of the high vacuum ultra-low temperature chamber is provided with a thermocouple access flange for thermocouple access. The thermocouple adopts T-type thermocouple and is equipped with two groups, one group is connected to the side of the semiconductor wafer electrostatic chuck, and the other group is connected to the ultra-low temperature cooling plate, which is used to monitor the temperature of the semiconductor wafer electrostatic chuck and the ultra-low temperature cooling plate.

[0020] As a preferred embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, the process gas is dry nitrogen, argon or helium.

[0021] The beneficial technical effects of this high vacuum ultra-low temperature semiconductor wafer rapid cooling platform are as follows:

[0022] 1. This high vacuum ultra-low temperature semiconductor wafer rapid cooling platform is an ultra-low temperature wafer cooling device, which effectively suppresses dynamic annealing during ion implantation, making it impossible for atoms in the interstitial position to return to the lattice replacement position in time, so that the number of amorphous packages increases and the range gradually expands. Finally, the boundaries of all amorphous packages are connected together to form a complete amorphous layer;

[0023] 2. This high vacuum ultra-low temperature semiconductor wafer rapid cooling platform is combined with an ion implanter to achieve ultra-low temperature ion implantation, which in turn forms a thicker amorphous layer. The thicker amorphous layer reduces the cross-flow of the ion beam tail, so that the damage caused by the wafer is more distributed in the amorphous area, and less damage is introduced in the crystal area outside the amorphous-crystalline interface;

[0024] 3. The amorphous silicon generated under low temperature conditions using this high vacuum ultra-low temperature semiconductor wafer rapid cooling platform can not only suppress the channeling effect during subsequent ion implantation, but also facilitate the formation of ultra-shallow junctions and abrupt junctions, and can also limit the damage caused by subsequent ion implantation to the amorphous layer, thus making it easy to repair.

[0025] 4. Using this high vacuum ultra-low temperature semiconductor wafer rapid cooling platform can effectively suppress the transient enhanced diffusion effect (TED) of boron-doped atoms in low temperature ion implanted carbon, germanium, fluorine and other elements.

[0026] 5. Experimental results show that the lower the temperature during ion implantation, the greater the degree to which dynamic annealing is suppressed. This high vacuum ultra-low temperature semiconductor wafer rapid cooling platform achieves: when the temperature during ion implantation can be gradually reduced from room temperature to -100°C, it can be clearly found in the processed wafer that the thickness of the amorphous silicon layer gradually increases, the roughness of the amorphous-crystalline interface is significantly reduced, and the residual flocculent islands in the amorphous layer gradually disappear as the temperature decreases. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a front view of an embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform.

[0028] Figure 2 yes Figure 1 Section view along AA.

[0029] Figure 3 It is a top view of an embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform.

[0030] Figure 4 It is a bottom view of the lower cover plate in the embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform.

[0031] Figure 5 yes Figure 2 Enlarged view of part B.

[0032] Figure 6 It is a principle block diagram of the use status of the embodiment of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform. DETAILED DESCRIPTION

[0033] like Figures 1 to 5 Shown

[0034] The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform 1C comprises a high vacuum ultra-low temperature chamber 1, a self-cascade low temperature refrigeration medium circulation closed-circuit system 3, and an optical camera 2.

[0035] The high vacuum ultra-low temperature chamber 1 is used for low temperature cooling of semiconductor wafers. The high vacuum ultra-low temperature chamber 1 includes an upper cover plate 11, a lower cover plate 12 and a cavity 13. The upper cover plate 11, the lower cover plate 12 and the cavity 13 are combined and the three constitute a closed high vacuum ultra-low temperature cooling chamber 14. Fluororubber seals are used between the upper cover plate 11, the lower cover plate 12 and the cavity 13. All the screws inside the high vacuum ultra-low temperature chamber 1 are vacuum screws to ensure that the gas molecules between the screws and the threads can be removed when the vacuum molecular pump or the cryogenic pump is pumping air, so as to quickly reach the ultimate vacuum value of the system. An ultra-low temperature reflector panel 15 is fixed inside the high vacuum ultra-low temperature cooling chamber 14.

[0036] An observation window 11a is provided at the center of the upper cover plate 11 of the high vacuum ultra-low temperature chamber 1. The observation window 11a is provided with transparent optical glass. The upper cover plate 11 is also provided with two LED polarized light source introduction ports 11b. The LED polarized light source introduction ports 11b are also provided with transparent optical glass. The two LED polarized light source introduction ports 11b are evenly distributed around the observation window 11a, so that the working conditions inside the high vacuum ultra-low temperature chamber 1 can be clearly observed at any time. The upper cover plate 11 is also provided with two other windows for installing a low-temperature optical measurement system to monitor the temperature of the wafer after cooling in real time.

[0037] The lower cover plate 12 is provided with a refrigerant inlet 12a, a refrigerant outlet 12b, an air inlet 12c, a thermocouple access port 12d, an electrode access port 12e and three spare ports 12f which are communicated with the high vacuum ultra-low temperature cooling chamber 14.

[0038] A process gas access flange 12g matching with the air inlet pipe 4 is provided at the position of the lower cover plate 12 corresponding to the air inlet port 12c. One end of the air inlet pipe 4 matches with the process gas access flange 12g and extends into the high vacuum ultra-low temperature chamber 1. The other end of the air inlet pipe 4 can be filled with process gas, which is dry nitrogen (the same technical effect can be achieved by using dry argon or helium as the process gas). A flow meter 41 is provided on the air inlet pipe 4, and the flow rate of the filled process gas can be controlled by the flow meter 41.

[0039] The cooling of the wafer can be accelerated by utilizing the energy exchange of the gas molecules of the process gas from the hot end to the cold end. The semiconductor wafer to be cooled is placed on the semiconductor wafer electrostatic chuck 33, and after the semiconductor wafer electrostatic chuck driving power is set to the adsorption state, the semiconductor wafer is adsorbed on the electrostatic chuck and cooled. After the process gas is filled, the process gas diffuses between the wafer and the electrostatic chuck 33 through the already cooled semiconductor wafer electrostatic chuck 33, realizing the energy exchange of the gas molecules from the hot end of the wafer to the cold end of the electrostatic chuck 33 to achieve the purpose of rapid cooling of the wafer.

[0040] When the wafer is cooled to a set ultra-low temperature state, the driving power of the semiconductor wafer electrostatic chuck 33 is switched to a desorption state, and the flow rate of the process gas is increased at the same time. The process gas blows the wafer away from the contact surface of the semiconductor wafer electrostatic chuck 33 and floats it, thereby separating the wafer from the semiconductor wafer electrostatic chuck 33.

[0041] An electrode access flange 12h for accessing the driving power electrode of the semiconductor wafer electrostatic chuck 33 is provided at a position corresponding to the electrode access port 12e of the lower cover plate 12.

[0042] A thermocouple access flange 12j for thermocouple access is provided at the position corresponding to the thermocouple access port 12d of the lower cover plate 12. The thermocouple adopts a T-type thermocouple and is equipped with two groups, one group is connected to the side of the semiconductor wafer electrostatic suction cup 33, and the other group is connected to the ultra-low temperature cooling plate 32, which is used to monitor the temperature of the semiconductor wafer electrostatic suction cup 33 and the ultra-low temperature cooling plate 32.

[0043] The outer wall of the high vacuum ultra-low temperature chamber 1 outside the refrigerant inlet 12a and the refrigerant outlet 12b of the lower cover plate 12 is provided with a multi-layer hollow thin-walled stainless steel bellows 12k, and the multi-layer hollow thin-walled stainless steel bellows 12k are respectively mounted on both ends of the refrigerant circulation pipe 31, and the outer wall of the high vacuum ultra-low temperature chamber 1 outside the spare port 12f is also provided with a multi-layer hollow thin-walled stainless steel bellows 12k.

[0044] The upper end of the multi-layer hollow thin-walled stainless steel bellows 12k is welded and fixed to the high vacuum ultra-low temperature cavity 1 to ensure complete sealing without leakage. The multi-layer hollow thin-walled stainless steel bellows 12k is used to realize the input and output of the self-cascade refrigerant (-145°C) to the ultra-low temperature cooling plate 32 under high vacuum conditions, so that the transmission loss of the self-cascade refrigerant from the atmospheric state to the high vacuum state is minimized. Since the temperature difference between the refrigerant circulation pipe 31 and the wall of the high vacuum ultra-low temperature cooling chamber 14 is 150°C, connecting the multi-layer hollow thin-walled stainless steel bellows 12k to the high vacuum ultra-low temperature cavity 1 will not cause a large amount of cold loss and frost in the high vacuum ultra-low temperature cavity 1. The multi-layer hollow thin-walled stainless steel bellows 12k can reduce the cold loss to 1%, greatly improving the energy efficiency ratio of the system.

[0045] The optical camera 2 is fixed on the upper cover plate 11 of the high vacuum ultra-low temperature chamber 1 through a camera bracket 21. The optical camera 2 is fixed on the outside of the high vacuum ultra-low temperature chamber 1. The optical camera 2 is equipped with a wide-angle lens (104.9°x 86.2x118°), a 12-megapixel camera, and a wavelength modulation imaging device. The lens of the optical camera 2 is aimed at the observation window 11a.

[0046] The optical camera 2 can monitor the position of the wafer and the morphology of the wafer surface during ultra-low temperature ion implantation in real time. During ion implantation, the surface temperature of the wafer under high vacuum is (-120°C), and the minimum operating temperature of the wide-angle lens under atmosphere is (-20°C). The multi-wavelength polarized light LED lighting system with a specific angle between the wafer and the wide-angle lens achieves the purpose of pressure resistance, heat insulation, and wavelength modulation imaging.

[0047] The self-cascade low-temperature refrigeration medium circulation closed-loop system 3 comprises a refrigeration medium circulation pipe 31 , an ultra-low temperature cooling plate 32 and a semiconductor wafer electrostatic chuck 33 .

[0048] The ultra-low temperature cooling plate 32 and the semiconductor wafer electrostatic suction cup 33 are arranged in the high vacuum ultra-low temperature cooling chamber 14 of the high vacuum ultra-low temperature cavity 1. The ultra-low temperature cooling plate 32 is located on the upper side of the ultra-low temperature reflector panel 15. The ultra-low temperature cooling plate 32 is fixed on the lower cover plate 12 of the high vacuum ultra-low temperature cavity 1 by a support 15b. Both ends of the support 15b are provided with low temperature insulation pads to isolate heat transfer.

[0049] Because the high vacuum ultra-low temperature chamber 1 is in an ultra-high vacuum state, there is no residual water vapor and other impurities, so the ultra-low temperature cooling plate 32 will not absorb water molecules to form frost and ice due to the low temperature. The ultra-low temperature cooling plate 32 fixing support 15b is equipped with low temperature resistant insulation pads 15a above and below to isolate the heat transfer between the ultra-low temperature cooling plate 32 and the lower cover plate 12 of the high vacuum ultra-low temperature chamber 1.

[0050] The refrigerant circulation pipe 31 is a copper tube coil, the ultra-low temperature cooling plate 32 is made of aluminum alloy, the lower end surface of the ultra-low temperature cooling plate 32 is provided with a groove 32a that fits the refrigerant circulation pipe 31, and the inner space of the groove 32a constitutes a coil channel. The semiconductor wafer electrostatic suction cup 33 is arranged on the upper side of the ultra-low temperature cooling plate 32, and the ultra-low temperature cooling plate 32 is provided with a coil channel for accommodating the refrigerant circulation pipe 31. The refrigerant circulation pipe 31 is arranged to cooperate with the coil channel, and metal indium 34 is wrapped between the refrigerant circulation pipe 31 and the side wall of the coil channel. The specific operation is as follows:

[0051] The refrigerant circulation tube 31 is fixed in the groove 32a of the ultra-low temperature cooling plate 32 using molten indium 34, so that good heat transfer is formed between the refrigerant circulation tube 31 and the ultra-low temperature cooling plate 32, and deformation of the ultra-low temperature cooling plate 32 caused by thermal expansion and contraction is prevented.

[0052] The self-cascaded refrigerant introduced through the refrigerant circulation pipe 31 takes away the heat of the ultra-low temperature cooling plate 32, so that the semiconductor wafer electrostatic chuck 33 attached thereto is also cooled to the working temperature.

[0053] The refrigerant is flowed in the refrigerant circulation pipe 31 and both ends of the refrigerant circulation pipe 31 extend out of the high vacuum ultra-low temperature chamber 1 respectively. The refrigerant flowing in the refrigerant circulation pipe 31 is a mixed refrigerant. The mixed refrigerant adopts R290 and R744 with a ratio of 60%:40% (R290 and R744 with a ratio of 70%:30%, or R290 and R744 with a ratio of 80%:20%, which can also achieve the technical effect to be achieved in this embodiment); the ultra-low temperature (-120°C) ion injection function is realized, so that the COP energy efficiency ratio of the system is optimized.

[0054] Because the high vacuum ultra-low temperature chamber 1 is in an ultra-high vacuum state, there is no residual water vapor and other impurities, so the ultra-low temperature cooling platform will not adsorb water molecules to form frost and ice due to the low temperature.

[0055] like Figure 6 The schematic diagram of the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform embodiment is shown in the working state.

[0056] When in use, the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform 1C is installed in an ultra-low temperature semiconductor wafer cooling system, which is composed of a four-stage self-cascading system 1A, a mixed refrigerant closed-loop control device 1B and the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform 1C.

[0057] The self-cascade refrigeration system 1A can achieve a temperature below -120°C. The multi-layer hollow thin-walled stainless steel bellows 12k are used to input and output the mixed refrigerant (-145°C) to the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform 1C under high vacuum conditions, thereby minimizing the transmission loss of the mixed refrigerant from the atmospheric state to the high vacuum state. The refrigeration system has high reliability and long service life.

[0058] Since the temperature difference between the refrigerant circulation pipe 31 and the wall of the high vacuum ultra-low temperature chamber 1 is 150°C, connecting the refrigerant circulation pipe 31 to the wall of the high vacuum ultra-low temperature chamber 1 will cause a large amount of cold loss and frost on the wall of the high vacuum ultra-low temperature chamber 1. The multi-layer hollow thin-walled stainless steel bellows 12k can reduce the cold loss to 1%, greatly improving the energy efficiency ratio of the system.

[0059] The mixed refrigerant closed-loop control device 1B is mainly used to achieve stable control of the refrigeration temperature at -120°C ± 0.2°C.

[0060] In addition, the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform 1C is also provided with a low temperature optical temperature measurement system to monitor the temperature of the wafer after cooling in real time.

[0061] The above is only one embodiment of the present invention. It should be pointed out that a person skilled in the art may make several modifications and improvements without departing from the principle of the present invention, and these should also be regarded as falling within the scope of protection of the present invention.

Claims

1. A high vacuum ultra-low temperature semiconductor wafer rapid cooling platform, Its characteristics are: At least includes a high vacuum ultra-low temperature cavity and a self-cascade low temperature refrigeration medium circulation closed-circuit system; the self-cascade low temperature refrigeration medium circulation closed-circuit system includes a refrigeration medium circulation pipe and an ultra-low temperature cooling plate, the ultra-low temperature cooling plate and the semiconductor wafer electrostatic chuck are arranged in the high vacuum ultra-low temperature cooling chamber, the semiconductor wafer electrostatic chuck is arranged on the upper side of the ultra-low temperature cooling plate, the ultra-low temperature cooling plate is provided with a coil channel for accommodating the refrigeration medium circulation pipe, the refrigeration medium circulation pipe is arranged in the coil channel, metal indium is wrapped between the refrigeration medium circulation pipe and the side wall of the coil channel, the refrigeration medium circulation pipe is provided with refrigeration medium, and both ends of the refrigeration medium circulation pipe extend out of the high vacuum ultra-low temperature cavity respectively, and the refrigeration medium circulation pipe is provided with refrigeration medium, and the high vacuum ultra-low temperature semiconductor wafer rapid cooling platform can cool a semiconductor wafer with a diameter of 300 mm from room temperature to -120°C within 15 to 30 seconds; The refrigerant circulating in the refrigerant circulation pipe is a mixed refrigerant, which uses R290 and R744 with a ratio of 60-80%:20-40%; An ultra-low temperature reflector panel is fixed inside the high vacuum ultra-low temperature cooling chamber, and an ultra-low temperature insulating pad is provided between the ultra-low temperature reflector panel and the ultra-low temperature cooling plate; The side walls of the high vacuum ultra-low temperature cavity are respectively provided with a refrigerant inlet and a refrigerant outlet which are communicated with the high vacuum ultra-low temperature cooling chamber. The outer side wall of the high vacuum ultra-low temperature cavity outside the refrigerant inlet and the refrigerant outlet is provided with a multi-layer hollow thin-wall stainless steel bellows, which are respectively mounted on both ends of the refrigerant circulation pipe.

2. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform according to claim 1, Its characteristics are: An observation window is arranged on the side wall of the high vacuum ultra-low temperature cavity; an optical camera is also included, which is fixed on the outside of the high vacuum ultra-low temperature cavity, and the lens of the optical camera is aimed at the wafer through the observation window.

3. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform according to claim 2, Its characteristics are: A plurality of LED polarized light source introduction windows are arranged on the side wall of the high vacuum ultra-low temperature cavity, and the plurality of LED polarized light source introduction windows are symmetrically distributed on the side wall of the high vacuum ultra-low temperature cavity.

4. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform according to claim 1, Its characteristics are: The side wall of the high vacuum ultra-low temperature cavity is also provided with at least one spare opening, and the outer side wall of the high vacuum ultra-low temperature cavity outside the spare opening is provided with multi-layer hollow thin-wall stainless steel bellows.

5. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform according to claim 1, Its characteristics are: The refrigerant circulation pipe is a copper tube coil, and the ultra-low temperature cooling plate is made of aluminum alloy; molten indium is used to fix the refrigerant circulation pipe in the coil channel of the ultra-low temperature cooling plate.

6. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform according to claim 1, Its characteristics are: The outer wall of the high vacuum ultra-low temperature chamber is provided with a process gas access flange matched with the air inlet pipe, and the end of the air inlet pipe is matched with the process gas access flange and extends into the electrostatic chuck; The outer wall of the high vacuum ultra-low temperature chamber is provided with an electrode access flange for accessing a driving power supply electrode of a semiconductor wafer electrostatic chuck; The semiconductor wafer electrostatic chuck is connected to the flange and the electrostatic chuck driving power supply outside the high vacuum ultra-low temperature chamber through an insulated wire and an electrode; The outer wall of the high vacuum ultra-low temperature chamber is provided with a thermocouple access flange for thermocouple access. The thermocouple adopts T-type thermocouple and is equipped with two groups, one group is connected to the side of the semiconductor wafer electrostatic chuck, and the other group is connected to the ultra-low temperature cooling plate, which is used to monitor the temperature of the semiconductor wafer electrostatic chuck and the ultra-low temperature cooling plate.

7. The high vacuum ultra-low temperature semiconductor wafer rapid cooling platform according to claim 6, Its characteristics are: The process gas is dry nitrogen, argon or helium.

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