A broadband receiver and frequency calibration method thereof

Abstract

The present disclosure provides a broadband receiver and a frequency calibration method thereof. The broadband receiver includes: a down-conversion mixing module arranged in the down-conversion section of the broadband receiver; it includes: a first multi-phase filter block, which is arranged to convert a pair of differential signals from a low noise amplifier into four orthogonal radio frequency signals with phases increasing by 90 degrees in sequence and pass them to a mixer group; a second multi-phase filter block, which is arranged to convert a pair of differential signals from an oscillator into four orthogonal local oscillator signals with phases increasing by 90 degrees in sequence and pass them to a mixer group; a mixer group, which is arranged to mix four orthogonal radio frequency signals with four orthogonal local oscillator signals to generate an intermediate frequency signal and pass it to the intermediate frequency part of the receiver. The present disclosure also provides a corresponding frequency calibration method. The broadband receiver provided in some embodiments of the present disclosure can reduce power consumption while maintaining a high image rejection ratio after switching the operating frequency.

Description

Technical Field

[0001] The present disclosure relates to the technical field of radio frequency receivers, and in particular to a broadband receiver and a frequency calibration method thereof. Background Art

[0002] The function of the RF receiver is to receive, convert and amplify the RF signal with low noise, and to amplify the RF signal with variable amplitude to a fixed intermediate frequency level after automatic gain control. It is an important module that affects the performance of the RF system.

[0003] Existing receiver structures include superheterodyne, zero intermediate frequency and low intermediate frequency. With the evolution and development of technology, zero intermediate frequency and low intermediate frequency structures have gradually become mainstream due to their simple structure, few off-chip components and low cost. Modern wireless communication standards and modulation technologies generally use orthogonal modulation. Therefore, whether for zero intermediate frequency or low intermediate frequency structure, an orthogonal receiver structure with two orthogonal mixers is required, which has I and Q paths. The orthogonal receiver structure allows signal information to be recovered from overlapping signal channel sidebands by combining I and Q channel information. The RF input signal cannot provide I and Q channel signals separately, so I and Q mixers are required, which are driven by 0° and 90° local oscillator (LO) signals to realize the IQ output of the intermediate frequency. The traditional way to implement orthogonal signals is to divide the differential output of the oscillator working at twice or four times the frequency by two or four times. Both the high-frequency oscillator and the divider circuit require additional power consumption.

[0004] With the growth of wireless communication technology, it has been gradually applied to mobile terminals such as the Internet of Things, smart wearable devices, and smart homes. The realization of low-power receivers is extremely critical to the realization of various efficient wireless terminal systems. At present, the main research direction of low-power receivers is to reduce the operating voltage and current of the receiver's low-noise amplifier, mixer, filter, oscillator and other modules. Considering factors such as cost, the chip process of the Internet of Things and wearable devices has progressed slowly, limiting the reduction of voltage and current. In addition, under different RF signal powers, the power consumption of the low-noise amplifier and filter can be dynamically adjusted, and in the case of large signals, the low-noise amplifier can be bypassed without current. However, the power consumption of the oscillator and divider is fixed and cannot be changed dynamically. Therefore, it is necessary to innovate the receiver structure to further reduce power consumption.

[0005] For example, in the prior art, patent CN101651462A proposes a dual-orthogonal Hartley image suppression receiver, which belongs to the receiver RF front-end structure, that is, an orthogonal receiver without a frequency divider. The structure includes: an orthogonal signal generator, four mixers, two adders, a subtractor, a 90-degree phase shifter and two low-pass filters, the I signal output end of the orthogonal signal generator is connected to the input end of the first mixer and the second mixer, the Q signal output end of the orthogonal signal generator is connected to the input end of the third mixer and the fourth mixer, the output ends of the first mixer and the third mixer are both connected to the input end of the first adder, the output end of the first adder is connected in series with the first low-pass filter and then connected to the input end of the second adder, the output ends of the second mixer and the fourth mixer are both connected to the input end of the subtractor, and the output end of the subtractor is connected in series with the second low-pass filter and the 90-degree phase shifter in sequence and then connected to the input end of the second adder. Wherein, both the signal path and the local oscillator path use polyphase filters to generate orthogonal signals, realizing a dual-orthogonal receiver. However, the orthogonal signals generated by the polyphase filter can only achieve good orthogonality at a frequency of 1 / (2π*R*C). When the resistance and capacitance deviate from the ideal parameters and the operating frequency of the receiver deviates from 1 / (2π*R*C), the orthogonality of the polyphase filter output deteriorates rapidly. For example, taking a 2.5GHz polyphase filter as an example, when the frequency shifts from 100M to 2.4GHz, the image rejection ratio deteriorates rapidly from 66dBc to about 34dBc. When the frequency deviates more, the image rejection ratio will be worse. In addition, even if the designed circuit only works at a specific frequency, the polyphase filter is also designed for a specific frequency, and the deterioration of the image rejection ratio caused by the error of the manufacturing process, temperature and other effects cannot be avoided. Therefore, an uncalibrated polyphase filter cannot be used to generate RF orthogonal signals or local oscillators, and cannot guarantee a sufficient image rejection ratio.

[0006] Therefore, the prior art still needs to be improved and enhanced. Summary of the invention

[0007] In order to solve at least one of the above problems and one or more of other potential problems, the present disclosure proposes a wideband receiver and a frequency calibration method thereof, which can greatly save the power consumption of the receiver. At the same time, the calibration function and the calibration method ensure that the orthogonal receiver can maintain a high image suppression ratio when working in a wideband.

[0008] In a first aspect of the present disclosure, a broadband receiver is provided, the broadband receiver comprising: a down-conversion mixer module arranged in a down-conversion section of the broadband receiver; the down-conversion mixer module comprising: a first multi-phase filter block arranged to convert a pair of differential signals from a low noise amplifier into four orthogonal radio frequency signals with phases increasing by 90 degrees in sequence and transmit the signals to a mixer group; a second multi-phase filter block arranged to convert a pair of differential signals from an oscillator into four orthogonal local oscillator signals with phases increasing by 90 degrees in sequence and transmit the signals to the mixer group; the mixer group arranged to convert the four orthogonal local oscillator signals into four orthogonal local oscillator signals with phases increasing by 90 degrees in sequence and transmit the signals to the mixer group; The radio frequency signal is mixed with the above-mentioned four orthogonal local oscillator signals to generate an intermediate frequency signal and transmit it to the intermediate frequency part of the above-mentioned broadband receiver; the above-mentioned mixer group includes a first mixer, a second mixer, a third mixer, and a fourth mixer; the above-mentioned broadband receiver is also provided with a delay detection and adjustment module, and the above-mentioned delay detection and adjustment module detects the orthogonality of any two signals with similar phases among the four orthogonal local oscillator signals output by the above-mentioned second multi-phase filtering block; when it is detected that the above-mentioned any two signals with similar phases are not orthogonal, the above-mentioned second multi-phase filtering block is adjusted to make the above-mentioned any two signals with similar phases orthogonal.

[0009] Further, in some embodiments, the first multi-phase filtering block includes a first multi-phase filter; the first multi-phase filter is configured to receive a pair of differential RF signals output by the low-noise amplifier, and the first multi-phase filter is configured to output the four orthogonal RF signals as a first RF signal, a second RF signal, a third RF signal, and a fourth RF signal having the same amplitude and frequency, wherein when the first RF signal is set to a 0-degree phase RF signal, the second RF signal is set to a 180-degree phase RF signal, the third RF signal is set to a 90-degree phase RF signal, and the fourth RF signal is set to a 270-degree phase RF signal.

[0010] Further, in some embodiments, the first RF signal is configured to be transmitted to the first mixer and the second mixer; the second RF signal is configured to be transmitted to the first mixer and the second mixer; the third RF signal is configured to be transmitted to the third mixer and the fourth mixer; and the fourth RF signal is configured to be transmitted to the third mixer and the fourth mixer.

[0011] Further, in some embodiments, the second multi-phase filtering block includes a second multi-phase filter; the second multi-phase filter is configured to receive a pair of differential signals output by the oscillator, and the second multi-phase filter is configured to output the four orthogonal signals of a first sinusoidal signal, a second sinusoidal signal, a third sinusoidal signal, and a fourth sinusoidal signal having the same amplitude and frequency, wherein when the first sinusoidal signal is set to a 0-degree phase sinusoidal signal, the second sinusoidal signal is set to a 180-degree phase sinusoidal signal, the third sinusoidal signal is set to a 90-degree phase sinusoidal signal, and the fourth sinusoidal signal is set to a 270-degree phase sinusoidal signal.

[0012] Furthermore, in some embodiments, the second multi-phase filtering block also includes a buffer and a 25% duty cycle local oscillator generator; the buffer is configured to convert the sinusoidal signal from the second multi-phase filter into a corresponding square wave signal; the 25% duty cycle local oscillator generator is configured to convert the square wave signal from the buffer into the four orthogonal local oscillator signals with a corresponding 25% duty cycle; the four orthogonal local oscillator signals include a first local oscillator signal, a second local oscillator signal, a third local oscillator signal, and a fourth local oscillator signal.

[0013] Further, in some embodiments, the first local oscillator signal is configured to be transmitted to the first mixer and the third mixer; the second local oscillator signal is configured to be transmitted to the first mixer and the third mixer; the third local oscillator signal is configured to be transmitted to the second mixer and the fourth mixer; and the fourth local oscillator signal is configured to be transmitted to the second mixer and the fourth mixer.

[0014] Further, in some embodiments, the delay detection and adjustment module includes: a positive narrow pulse detection module, which is configured to pass the first local oscillator signal and the third local oscillator signal output by the 25% duty cycle local oscillator generator to an AND gate; when the positive narrow pulse detection module detects a positive narrow pulse signal, the phase delay between the third local oscillator signal and the first local oscillator signal is increased so that the output of the AND gate changes from the positive narrow pulse signal to 0 and remains 0.

[0015] Furthermore, in some embodiments, the delay detection and adjustment module includes: a negative narrow pulse detection module, which is configured to pass the second local oscillator signal and the fourth local oscillator signal output by the 25% duty cycle local oscillator generator to an OR gate; when the negative narrow pulse detection module detects a negative narrow pulse signal, the phase delay between the fourth local oscillator signal and the second local oscillator signal is reduced so that the output of the OR gate changes from the negative narrow pulse signal to a 50% duty cycle signal.

[0016] Further, in some embodiments, the method of increasing the phase delay between the third local oscillator signal and the first local oscillator signal includes: increasing the capacitance value of the capacitor array of the second multi-phase filter and / or increasing the resistance value of the resistor array of the second multi-phase filter.

[0017] Further, in some embodiments, the method of reducing the phase delay between the fourth local oscillator signal and the second local oscillator signal includes: reducing the capacitance value of the capacitor array of the second multi-phase filter and / or reducing the resistance value of the resistor array of the second multi-phase filter.

[0018] In a second aspect of the present disclosure, a frequency calibration method for a broadband receiver is also provided, and the calibration method includes: setting the capacitance value of the first capacitor array and the resistance value of the first resistor array of the above-mentioned first multi-phase filter, and setting the capacitance value of the second capacitor array and the resistance value of the second resistor array of the above-mentioned second multi-phase filter; when the above-mentioned positive narrow pulse detection module detects a positive narrow pulse signal, increasing the capacitance value of the above-mentioned second capacitor array and / or increasing the resistance value of the above-mentioned second resistor array until the above-mentioned positive narrow pulse signal disappears; when the above-mentioned negative narrow pulse detection module detects a negative narrow pulse signal, reducing the capacitance value of the above-mentioned second capacitor array and / or reducing the resistance value of the above-mentioned second resistor array until the above-mentioned negative narrow pulse signal disappears; when the above-mentioned positive narrow pulse signal and the above-mentioned negative narrow pulse signal disappear, assigning the capacitance value of the above-mentioned second capacitor array to the capacitance of the above-mentioned first capacitor array, and / or assigning the resistance value of the second resistor array to the resistance of the first resistor array.

[0019] Compared with the prior art, the present disclosure has the following beneficial effects.

[0020] (1) In some embodiments, the frequency divider and the double frequency oscillator in the wideband receiver are eliminated, thereby saving the power consumption of the frequency divider and the double frequency oscillator, thereby reducing the overall power consumption of the wideband receiver.

[0021] (2) Furthermore, in some embodiments, the same frequency oscillation signal is converted into four orthogonal local oscillation signals with phases increasing by 90 degrees in sequence through the multi-phase filtering block, and then fed to the corresponding mixers to achieve orthogonal mixing. Relying on its orthogonal receiving structure, the interference of the image signal is filtered out, a sufficiently good image suppression ratio is achieved, and then good information reception of the signal is achieved.

[0022] (3) Furthermore, in some embodiments, by setting a positive narrow pulse detection module, the overlap of the first local oscillator signal and the third local oscillator signal can be detected and corrected, and the capacitance value and / or resistance value of the capacitor array of the corresponding multi-phase filter can be increased to increase their mutual delay; correspondingly, by a negative narrow pulse detection module, the interval between the first local oscillator signal and the third local oscillator signal can be detected and corrected, and the capacitance value and / or resistance value of the capacitor array of the corresponding multi-phase filter can be reduced to reduce their mutual delay, thereby obtaining a calibrated multi-phase filter, so as to realize that the broadband receiver of the present invention can have a sufficiently good image suppression ratio at a broadband operating frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings, in which:

[0024] Figure 1 A diagram showing a wideband receiver according to an embodiment of the present disclosure;

[0025] Figure 2 A structural diagram of a polyphase filter according to an embodiment of the present disclosure is shown;

[0026] Figure 3 A diagram showing another wideband receiver according to an embodiment of the present disclosure;

[0027] Figure 4 A diagram showing yet another wideband receiver according to an embodiment of the present disclosure;

[0028] Figure 5 A diagram showing yet another wideband receiver according to an embodiment of the present disclosure;

[0029] Figure 6 A structural diagram of another polyphase filter according to an embodiment of the present disclosure is shown;

[0030] Figure 7 A flowchart showing a wideband receiver frequency calibration method according to an embodiment of the present disclosure is shown; and

[0031] In the various drawings, the same or corresponding reference numerals denote the same or corresponding parts. DETAILED DESCRIPTION

[0032] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein. On the contrary, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0033] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0034] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0035] Generally, in a receiver, the power consumption of a frequency multiplier oscillator and a frequency divider cannot be adjusted dynamically, and is the part with the largest power consumption of a radio frequency receiver. Therefore, by designing and canceling the frequency multiplier oscillator and the frequency divider, the power consumption of the receiver can be effectively saved. For example, in some embodiments of the present disclosure, a multiphase filter is used to implement the corresponding function, and the power consumption of the receiver is reduced. However, when such an adjustment is made in the down-conversion section of the receiver, when the receiver operates under different temperature conditions, or when the operating frequency of the receiver changes, then, if the corresponding multiphase filter is not calibrated, it is impossible to ensure that the receiver guarantees a sufficiently good image suppression ratio and realizes normal information reception of the signal. The change of the two originally orthogonal signals is generally that the phase delay exceeds 90 degrees (for example, it is manifested as an interval between the original two waveforms) or is less than 90 degrees (it is manifested as an overlap between the original two waveforms). Therefore, the detection and calibration process needs to find the above-mentioned overlap or interval, and adjust it to be neither overlapping nor spaced, and then realize the orthogonality of the waveform, and then ensure a sufficiently good image suppression ratio, and realize the normal information reception of the signal. It should be noted that the above description of the present disclosure is only for the convenience of understanding by ordinary technicians in the field, and should not be used as the basic (initial) understanding of the wideband receiver and its frequency calibration method of the present disclosure by ordinary technicians in the field. The technical solution of the present disclosure will be gradually explained in conjunction with the accompanying drawings.

[0036] Figure 1 FIG. 1 is a diagram showing a broadband receiver according to an embodiment of the present disclosure. Figure 1 In an exemplary embodiment, for a zero intermediate frequency or low intermediate frequency receiver structure, for example, as shown in the figure, the receiver 100 includes a low noise amplifier (LNA) 110, a mixer 120, a filter 130, an analog-to-digital converter 140, and an oscillator 150 and a frequency divider 160 for providing a down-converted local oscillator; further, the frequency divider 160 provides two local oscillator signals with a phase difference of 90° (orthogonal) to the IQ two-way, respectively, to achieve orthogonal down-conversion; further, in order to achieve two orthogonal LO (Local Oscillator, LO), the oscillator 150 is required to work at a frequency doubled or quadrupled of the carrier frequency, and then outputs four LOs of 0°, 90°, 180° and 270° through a frequency divider of two or four, and gives them to the dual orthogonal differential mixer 120. Unfortunately, however, the power consumption of the frequency multiplier oscillator 150 and the frequency divider 160 cannot be dynamically adjusted, and is the part with the largest power consumption of the RF receiver 100. Therefore, in Figure 1 In the exemplary embodiment, the phase error of the orthogonal local oscillator output by the frequency divider 160 is the most important factor in determining the orthogonality of the IQ two-way. Accordingly, the local oscillator phase error is generally determined by the layout drawing method and the random error of the device. Preferably, the mismatch improvement can be reduced by optimizing the layout drawing method.

[0037] It should be noted that Figure 1 In the receiver 100 of the exemplary embodiment, the antenna 170 is used to receive an external signal. The antenna 170 is connected to the input end of the low noise amplifier (LNA) 110. The low noise amplifier (LNA) 110 generally outputs two differential signals and transmits them to the upper and lower mixers 120 shown in the figure respectively. Obviously, through the frequency multiplier oscillator 150 and the frequency divider 160, the frequency divider 160 provides two local oscillator signals with a phase difference of 90° (orthogonal) to the IQ and Q paths respectively, and gives them to the upper and lower mixers 120. As shown in the figure, the signal is transmitted from the mixer 120 to the filter 130, and then transmitted to the analog-to-digital converter 140 via the filter 130. Of course, the receiving end after the analog-to-digital converter 140 (for example, it can be a receiving digital signal baseband processing module) is not the focus of the present disclosure and is therefore not shown.

[0038] In contrast, in one example, for an image frequency suppression circuit, it includes an analog dual quadrature mixer device, the signal inputs of the analog dual quadrature mixer device for in-phase signals and quadrature phase signals are connected to an input circuit in a signal path, and the oscillator inputs of the analog dual quadrature mixer device for in-phase oscillator signals and quadrature phase oscillator signals are connected to a local oscillator device, the analog dual quadrature mixer device has an analog adder-amplifier device, the analog dual quadrature mixer device has a plurality of transistor pairs, wherein in each case, the two transistors of each transistor pair are connected to the same load resistor to add the signals applied to the control inputs of the two transistors, and the control inputs of the two transistors are connected downstream of the outputs of the analog dual quadrature mixer device, and has a multi-stage analog polyphase filter, the input of which is connected to the output of the adder-amplifier device. However, the polyphase filter in this example is used as an intermediate frequency filter to filter out negative frequency image signals with a phase sequence of 270°, 180°, 90°, 0° (inverse phase sequence), which has certain problems.

[0039] To solve the above problem, in a further preferred embodiment, the polyphase filter can convert the signal within a specific frequency range into four orthogonal signals of 0°, 90°, 180° and 270°. The polyphase filter structure can be as follows: Figure 2 As shown. Accordingly, the optimization Figure 1 Example embodiment, can be obtained Figure 3 The receiver 200 in the exemplary embodiment. That is, in order to save Figure 1 The power consumption of the frequency divider and the double frequency oscillator in the embodiment is Figure 3In the exemplary embodiment, the inventors of the present disclosure convert the same frequency oscillation signal into four orthogonal local oscillation signals of 0°, 90°, 180° and 270° through the multiphase filter 260, and give them to the IQ two-way mixer 120 to achieve orthogonal mixing. The mixer 120 uses the same local oscillation signal, and the local oscillation signal is directly derived from the oscillator 150, and the frequency of the oscillator 150 is the same as the local oscillation. Obviously, in Figure 3 In the exemplary embodiment, the framework structure is Figure 1 The frequency divider 160 in is replaced by a polyphase filter 260.

[0040] However, in Figure 3 In the exemplary embodiment, for the divider-free receiver structure, the image rejection ratio (IMRR) is also affected by the resistance and capacitance parameters of the polyphase filter 260, where the size of the resistance and capacitance is affected by parameters such as process and temperature, and cannot be solved by layout optimization. Figure 3 In the example embodiment, the image rejection ratio (IMRR) may not fully meet the requirements in some occasions and needs to be further improved.

[0041] It should be understood that the image rejection ratio (IMRR) is an important indicator of a RF receiver. In a superheterodyne receiver, the image signal can be filtered out by combining the first high intermediate frequency with an RF filter, but in a low intermediate frequency receiver, the image signal is generally also a signal in the RF passband and cannot be filtered out; in a zero intermediate frequency receiver, the image signal is the signal itself, and the positive and negative frequencies are mirror images of each other. Therefore, in a low intermediate frequency or zero intermediate frequency receiver, only the orthogonal receiving structure can filter out the interference of the image signal. The ability to filter the image signal depends on the orthogonality of the IQ two paths, that is, the difference in phase and amplitude. Figure 1 In the exemplary embodiment, the phase error of the orthogonal local oscillator output by the frequency divider 160 is the most important factor in determining the orthogonality of the IQ paths. The local oscillator phase error is generally determined by the layout drawing method and the random error of the device, and can be improved by optimizing the layout drawing method to reduce the mismatch.

[0042] To further improve Figure 3 In order to improve the image rejection ratio (IMRR) of the receiver in the exemplary embodiment, the inventors of the present disclosure proposed a more preferred receiver structure of a dual polyphase filter without a frequency divider. Figure 4A diagram of another wideband receiver according to an embodiment of the present disclosure is shown. In the illustrated example, since converting the local oscillator signal into an orthogonal local oscillator through a multiphase filter alone cannot fully meet the image rejection ratio (IMRR) requirement, the multiphase filter is further used again to convert the RF input signal into an orthogonal input; in addition, a four-way mixer is used to implement dual orthogonal down-conversion. Dual orthogonal mixing achieves a huge improvement in the image rejection ratio (IMRR) performance, while still avoiding the use of dividers and frequency multipliers, saving power consumption. Figure 4 In the exemplary embodiment, the input of the second multiphase filter 360-2 is a pair of differential signals output by the oscillator 150, for example, recorded as Vip and Vin, and then the second multiphase filter 360-2 outputs four signals, for example, which can be recorded as Vout_ip, Vout_qp, Vout_in, and Vout_qn. When the broadband receiver 300 operates at a given operating frequency, it satisfies the relationship 1 / (2π*R*C), where R is the resistance value of the multiphase filter, and C is the capacitance value of the multiphase filter. The structure of the multiphase filter can be seen in Figure 2 As shown, the four output signals of the polyphase filter have the same amplitude and are sequentially increased by 90 degrees in phase, that is, for example, Vout_ip is 0 degrees in phase, Vout_qp is 90 degrees in phase, Vout_in is 180 degrees in phase, and Vout_qn is 270 degrees in phase; it should be understood that, from the perspective of the polyphase filter structure, setting the four-way phase to increase by 90 degrees in phase and Vout_ip is 0 degrees in phase is a preset relative value, not an absolute phase value; in addition, it should be understood that when Figure 2 The polyphase filter is applied to Figure 4 In the example embodiment, the second output and the third output from top to bottom are actually interchanged to facilitate overall drawing.

[0043] exist Figure 4In an exemplary embodiment, the broadband receiver 300 includes: a down-conversion mixer module disposed in the down-conversion section of the broadband receiver; the down-conversion mixer module has a differential signal input from a low noise amplifier 110 and another pair of differential signal inputs from an oscillator 150, and then outputs to two input sources (the low noise amplifier 110 and the oscillator 150) and to the upper and lower filters 130 shown in the figure. The entire area can be regarded as a down-conversion mixer module, and the down-conversion mixer module includes: a first multi-phase filtering block (for example, the figure only includes a first multi-phase filter 360-1), and the first multi-phase filter 360-1 is configured to convert a pair of differential signals from the low noise amplifier into four orthogonal RF signals with phases increasing by 90 degrees in sequence and pass them to the mixer group 320. , wherein the mixer group 320 includes a first mixer 320-1, a second mixer 320-2, a third mixer 320-3, and a fourth mixer 320-4; a second multi-phase filter block (for example, the figure includes a second multi-phase filter 360-2, a buffer 380 and a 25% duty cycle local oscillator generator 390), the second multi-phase filter block is configured to convert a pair of differential signals from the oscillator 150 into four orthogonal local oscillator signals with phases increasing by 90 degrees in sequence and pass them to the above-mentioned mixer group 320; the above-mentioned mixer group is configured to mix the four orthogonal RF signals with the four orthogonal local oscillator signals to generate an intermediate frequency signal and pass it to the intermediate frequency part of the broadband receiver 300, such as the downstream filter 130, the analog-to-digital converter 140 and the further back end of the signal transmission.

[0044] Further, in Figure 4In an exemplary embodiment, the first multi-phase filter 360-1 is configured to receive a pair of differential RF signals output by the low noise amplifier 110, and the first multi-phase filter 360-1 is configured to output four orthogonal RF signals, namely, a first RF signal, a second RF signal, a third RF signal, and a fourth RF signal having the same amplitude and frequency, wherein when the first RF signal is set to a 0-degree phase RF signal, the second RF signal is set to a 180-degree phase RF signal, the third RF signal is set to a 90-degree phase RF signal, and the fourth RF signal is set to a 270-degree phase RF signal. Correspondingly, the second multi-phase filter 360-2 is configured to receive a pair of differential signals output by the oscillator 150, and the second multi-phase filter 360-2 outputs four orthogonal signals, namely, a first sinusoidal signal, a second sinusoidal signal, a third sinusoidal signal, and a fourth sinusoidal signal with the same amplitude and frequency, wherein when the above-mentioned first sinusoidal signal is set to a 0-degree phase sinusoidal signal, the above-mentioned second sinusoidal signal is set to a 180-degree phase sinusoidal signal, the above-mentioned third sinusoidal signal is set to a 90-degree phase sinusoidal signal, and the above-mentioned fourth sinusoidal signal is set to a 270-degree phase sinusoidal signal. Obviously, as shown in the illustrated embodiment, the second multi-phase filtering block also includes a buffer 380 and a 25% duty cycle local oscillator generator 390; the buffer 380 is configured to convert a sinusoidal signal (for example, a signal waveform is a sine wave) from the second multi-phase filter 360-2 into a corresponding square wave signal; the 25% duty cycle local oscillator generator 390 is configured to convert the square wave signal from the buffer 380 into four orthogonal local oscillator signals with a corresponding duty cycle of 25%; the four orthogonal local oscillator signals (25% duty cycle) include a first local oscillator signal, a second local oscillator signal, a third local oscillator signal, and a fourth local oscillator signal, wherein the first local oscillator signal is a corresponding 0 degree phase as shown in the figure, the second local oscillator signal is a 180 degree phase as shown in the figure, the third local oscillator signal is a 90 degree phase as shown in the figure, and the fourth local oscillator signal is a 270 degree phase as shown in the figure. The corresponding signal and mixer connection relationship is that the first local oscillator signal is set to be transmitted to the first mixer 320-1 and the third mixer 320-3 (the third from the top to the bottom) shown in the figure; the second local oscillator signal is set to be transmitted to the first mixer 320-1 and the third mixer 320-3; the third local oscillator signal is set to be transmitted to the second mixer 320-2 and the fourth mixer 320-4; the fourth local oscillator signal is set to be transmitted to the second mixer 320-2 and the fourth mixer 320-4. Correspondingly, the first RF signal is set to be transmitted to the first mixer 320-1 and the second mixer 320-2; the second RF signal is set to be transmitted to the first mixer 320-1 and the second mixer 320-2; the third RF signal is set to be transmitted to the third mixer 320-3 and the fourth mixer 320-4; the fourth RF signal is set to be transmitted to the third mixer 320-3 and the fourth mixer 320-4.

[0045] Furthermore, the polyphase filter can only maintain a perfect image rejection ratio at the corresponding operating frequency. When it deviates from the operating frequency, the image rejection ratio will deteriorate rapidly. This will further lead to one or more of the following problems: for example, 1) when the resistance and capacitance of the polyphase filter change due to manufacturing deviations, the image rejection ratio will deteriorate; for example, 2) when the wideband receiver is working, when the frequency of the wideband receiver (when changing the operating frequency) deviates from the operating frequency of the polyphase filter, the image rejection ratio will deteriorate; for example, 3) when the temperature changes and the resistance and capacitance of the polyphase filter change, the image rejection ratio will deteriorate.

[0046] Therefore, the present disclosure also proposes Figure 4 The broadband receiver in the embodiment is calibrated to achieve stable operation of the receiver and ensure the image suppression ratio.

[0047] In particular, when the operating frequency of the receiver changes and a significant change in the circuit temperature is detected, the calibration work will be triggered, that is, the polyphase filter calibration. The calibration is achieved by adjusting the capacitor array (and / or resistor array) in the polyphase filter. The capacitor array (or resistor array) can adopt a binary scheme, and its structure can refer to Figure 6 .

[0048] Figure 5 FIG. 1 is a diagram showing another broadband receiver according to an embodiment of the present disclosure. In this example embodiment, Figure 4 On the basis of the embodiment, a calibration block (i.e., a delay detection and alignment block) is additionally added. In some embodiments, the delay detection and adjustment module detects the orthogonality of any two signals with similar phases among the four signals output by the second multi-phase filter block; when it is detected that the signals with similar phases are not orthogonal, the second multi-phase filter block is adjusted so that the signals with similar phases are orthogonal. It should be noted that in a more preferred embodiment, the delay detection and adjustment module detects the four signals simultaneously according to the four signals output by the second multi-phase filter block, and determines the orthogonality of any two signals with similar phases; when it is detected that the signals with similar phases are not orthogonal, the second multi-phase filter block is adjusted so that the signals with similar phases are orthogonal; it should be understood that the simultaneous detection of the four signals, rather than just detecting any one to three of them, is to balance the load of the four outputs, and to ensure its effective operation (outputting four balanced output signals to the outside) during detection. Of course, it should be understood that in theory, detecting any two of the above four output signals can be used to determine the orthogonality of the four output signals. For load balancing reasons, the four signals can be detected at the same time and the orthogonality detection results can be obtained more quickly.

[0049] Specifically, in some embodiments, the first local oscillator signal (set to 0 phase as shown in the figure) output by the 25% duty cycle local oscillator generator 390 is electrically connected to the first input terminal of the AND gate 471, and the first local oscillator signal (set to 90 phase as shown in the figure) is electrically connected to the second input terminal of the AND gate 471, and the output terminal of the AND gate is detected, for example, by the positive narrow pulse detection module 472. Further, when the positive narrow pulse detection module 472 detects the positive narrow pulse signal, it indicates that there is a waveform overlap between the first local oscillator signal and the second local oscillator signal of the adjacent phase. Therefore, the phase delay between the third local oscillator signal and the first local oscillator signal is increased (for example, the phase difference is adjusted from 85 degrees to 90 degrees) so that the output of the AND gate changes from the positive narrow pulse signal to 0 and remains 0 (that is, the orthogonal 90 degree phase difference is always maintained). Correspondingly, the third local oscillator signal (set to a phase of 180 as shown in the figure) output by the 25% duty cycle local oscillator generator 390 is electrically connected to the first input terminal of the OR gate 475, and the fourth local oscillator signal (set to a phase of 270 as shown in the figure) is electrically connected to the second input terminal of the OR gate 475, and the output terminal of the OR gate is detected, for example, by the negative narrow pulse detection module 476. Further, when the negative narrow pulse detection module 476 detects a negative narrow pulse signal, it indicates that there is a waveform interval between the third local oscillator signal and the fourth local oscillator signal of the adjacent phase (i.e., they are not closely following each other). Therefore, the phase delay between the fourth local oscillator signal and the third local oscillator signal is reduced (for example, the phase difference is adjusted from 95 degrees to 90 degrees) so that the output of the OR gate changes from a negative narrow pulse signal to a 50% duty cycle signal (in the case of close following, two 25% duty cycle waveforms become 50% duty cycle waveforms). It should be noted that in a preferred embodiment, two adjacent local oscillator signals among the four outputs (for example, the first local oscillator signal and the second local oscillator signal as described above) are output to AND gate 471, and the remaining two adjacent local oscillator signals among the four outputs (for example, the third local oscillator signal and the fourth local oscillator signal as described above) are output to OR gate 475. In this way, the four signals are simultaneously led out to the load of the detection section, which can ensure that the original broadband receiver can perform detection and calibration in the working state and maintain load balance. It should be understood that if the load balance problem is not considered, that is, it is assumed that the led-out line has no load, then, in this case, any two adjacent phases of the four signals can be selected and simultaneously passed to AND gate 471 and OR gate 475 for positive narrow pulse detection (detection of waveform overlap) and negative narrow pulse detection (detection of waveform interval). In addition, if Figure 5In the exemplary embodiment, the detection section can use the temperature detection and frequency selection module 479 as a condition for starting the detection, that is, when the temperature changes or the operating frequency of the receiver changes, the first multi-phase filter 460-1 and the second multi-phase filter 460-2 need to be recalibrated. In the figure, when the logic control module 478 receives the calibration trigger command of the module 479, it starts to confirm the detection results of the positive narrow pulse detection module 472 and the negative narrow pulse detection module 476, and adjusts the capacitance or resistance of the first multi-phase filter 460-1 and the second multi-phase filter 460-2 accordingly. It should be noted that in Figure 5 In the example embodiment, the first polyphase filter 460 - 1 and the second polyphase filter 460 - 2 are depicted as polyphase filters with adjustable outputs.

[0050] In order to further illustrate the adjustment process and internal structure of the above-mentioned polyphase filter, Figure 6 A structural diagram of an adjustable multiphase filter according to an embodiment of the present disclosure is shown. In this example embodiment, the multiphase filter adjustment is mainly implemented by four-way adjustable capacitors, and one implementation of the adjustable capacitors can be implemented by multi-way capacitors with switches in parallel. It should be noted that in other embodiments, the multiphase filter adjustment can also be implemented by four-way adjustable resistors, and one implementation of the adjustable resistors can be implemented by multi-way resistors with switches in parallel. It should also be noted that in other embodiments, the multiphase filter adjustment can also be implemented simultaneously by four-way adjustable capacitors and adjustable resistors. It should be understood that in the illustrated implementation, the capacitor or resistor adjusts the value of the original capacitor or resistor by means of a multi-way switch plus a parallel capacitor or resistor, and adjusts between preset values ​​in a modular manner.

[0051] For the above-mentioned wideband receiver with calibration function, Figure 7A calibration method 500 according to an embodiment of the present disclosure is shown. The calibration method 500 is based on the above-mentioned broadband receiver with calibration function, and the method 500 includes the following steps: step 520, setting the capacitance value of the first capacitor array and the resistance value of the first resistor array of the first multi-phase filter; and the capacitance value of the second capacitor array and the resistance value of the second resistor array of the second multi-phase filter; step 540, when the positive narrow pulse detection module detects a positive narrow pulse signal, increasing the capacitance value of the second capacitor array, and / or increasing the resistance value of the second resistor array until the positive narrow pulse signal disappears; step 560, when the negative narrow pulse detection module detects a negative narrow pulse signal, reducing the capacitance value of the second capacitor array and / or reducing the resistance value of the second resistor array until the negative narrow pulse signal disappears; step 580, when the positive narrow pulse signal and the negative narrow pulse signal disappear, assigning the capacitance value of the second capacitor array to the capacitance of the first capacitor array; and / or assigning the resistance value of the second resistor array to the resistance of the first resistor array. It should be understood that the upper assignment may be performed when the above-mentioned capacitance or resistance changes (ie, overwriting the original set value); if the corresponding capacitance value or resistance value of the second multi-phase filter is not adjusted, there is no need to overwrite the original set value.

[0052] In some embodiments, the calibration method also includes: step S1, setting the initial value of the multi-phase filter capacitor array; step S2, giving the 0 degree and 90 degree square wave local oscillator signals output by the 25% duty cycle generating circuit to the AND gate, and giving the 180 degree and 270 degree square wave local oscillator signals to the OR gate. It should be noted that, ideally, the AND gate output is always 0, and the OR gate output is a 50% duty cycle signal; step S3, when the frequency of the multi-phase filter deviates from the required operating frequency, corresponding narrow pulses will appear in the AND gate and the OR gate; step S4, when a positive narrow pulse is detected, it means that the 90° local oscillator signal is ahead, the multi-phase filter delay is insufficient, and the frequency is high, so it is necessary to increase the capacitance (and / or resistance); when a negative narrow pulse is detected, it means that the 270° local oscillator signal is lagging, the multi-phase filter delay is large, the frequency is low, and it is necessary to reduce the capacitance (and / or resistance); step S5, when the positive narrow pulse or the negative narrow pulse disappears, it means that the capacitor array (and / or resistor array) has been adjusted to a more appropriate value, and the calibration is completed at this time; step S6, the calibration value of the capacitor array (and / or resistor array) is assigned to the RF multi-phase filter and the local oscillator multi-phase filter at the same time, and the circuit can start receiving signals.

[0053] It should be understood that the frequencies of the local oscillator signal and the RF signal are basically close, for example, one is 1 GHz and the other is 1.01 GHz. Therefore, the two polyphase filters are the same. We only need to calibrate the local oscillator polyphase filter (i.e., the second polyphase filter) and then assign the calibration value to the RF polyphase filter (i.e., the first polyphase filter) to achieve simultaneous calibration of the two polyphase filters.

[0054] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

[0055] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A broadband receiver, characterized in that: include: A down-conversion mixing module arranged in a down-conversion section of the broadband receiver; The down-conversion mixing module comprises: A first polyphase filter block is configured to convert a pair of differential signals from a low noise amplifier into four orthogonal radio frequency signals with phases increasing by 90 degrees and transmit the signals to a mixer group; A second multiphase filter block is configured to convert a pair of differential signals from the oscillator into four orthogonal local oscillator signals with phases increasing by 90 degrees and transmit them to the mixer group; The mixer group includes a first mixer, a second mixer, a third mixer, and a fourth mixer, and the mixer group is configured to mix the four orthogonal radio frequency signals with the four orthogonal local oscillator signals to generate an intermediate frequency signal and transmit the intermediate frequency signal to the intermediate frequency part of the broadband receiver; The broadband receiver is further provided with a delay detection and adjustment module, which detects the orthogonality of any two signals with similar phases among the four orthogonal local oscillator signals output by the second polyphase filter block; when it is detected that the any two signals with similar phases are not orthogonal, the second polyphase filter block is adjusted to make the any two signals with similar phases orthogonal; The first polyphase filtering block includes: a first polyphase filter; The first polyphase filter is configured to receive a pair of differential RF signals output by the low noise amplifier, and the first polyphase filter is configured to output four orthogonal RF signals as a first RF signal, a second RF signal, a third RF signal, and a fourth RF signal having the same amplitude and frequency, wherein when the first RF signal is set to a 0-degree phase RF signal, the second RF signal is set to a 180-degree phase RF signal, the third RF signal is set to a 90-degree phase RF signal, and the fourth RF signal is set to a 270-degree phase RF signal; The first radio frequency signal is arranged to be transmitted to the first mixer and the second mixer; The second radio frequency signal is configured to be transmitted to the first mixer and the second mixer; The third radio frequency signal is configured to be transmitted to the third mixer and the fourth mixer; The fourth radio frequency signal is configured to be transmitted to the third mixer and the fourth mixer; The second polyphase filtering block includes: a second polyphase filter; The second multiphase filter is configured to receive a pair of differential signals output by the oscillator, and the second multiphase filter is configured to output four orthogonal signals, namely, a first sinusoidal signal, a second sinusoidal signal, a third sinusoidal signal, and a fourth sinusoidal signal having the same amplitude and frequency, wherein when the first sinusoidal signal is set to a 0-degree phase sinusoidal signal, the second sinusoidal signal is set to a 180-degree phase sinusoidal signal, the third sinusoidal signal is set to a 90-degree phase sinusoidal signal, and the fourth sinusoidal signal is set to a 270-degree phase sinusoidal signal; The second multiphase filter block also includes: a buffer, a 25% duty cycle local oscillator generator; The buffer is configured to convert the sinusoidal signal from the second polyphase filter into a corresponding square wave signal; The 25% duty cycle local oscillator generator is configured to convert the square wave signal from the buffer into the four orthogonal local oscillator signals with corresponding 25% duty cycles; The four orthogonal local oscillator signals include a first local oscillator signal, a second local oscillator signal, a third local oscillator signal, and a fourth local oscillator signal; The first local oscillator signal is configured to be transmitted to the first mixer and the third mixer; The second local oscillator signal is configured to be transmitted to the first mixer and the third mixer; The third local oscillator signal is configured to be transmitted to the second mixer and the fourth mixer; The fourth local oscillator signal is configured to be transmitted to the second mixer and the fourth mixer; The delay detection and adjustment module includes: a positive narrow pulse detection module, The positive narrow pulse detection module is configured to transmit the first local oscillator signal and the third local oscillator signal output by the 25% duty cycle local oscillator generator to an AND gate; When the positive narrow pulse detection module detects a positive narrow pulse signal, the phase delay between the third local oscillation signal and the first local oscillation signal is increased so that the AND gate output changes from the positive narrow pulse signal to 0 and remains 0.

2. The broadband receiver according to claim 1, characterized in that The delay detection and adjustment module also includes: a negative narrow pulse detection module, The negative narrow pulse detection module is configured to transmit the second local oscillator signal and the fourth local oscillator signal output by the 25% duty cycle local oscillator generator to an OR gate; When the negative narrow pulse detection module detects a negative narrow pulse signal, the phase delay between the fourth local oscillator signal and the second local oscillator signal is reduced so that the output of the OR gate changes from the negative narrow pulse signal to a 50% duty cycle signal.

3. The broadband receiver according to claim 2, characterized in that The method for increasing the phase delay between the third local oscillator signal and the first local oscillator signal includes: increasing the capacitance value of the capacitor array of the second polyphase filter and / or increasing the resistance value of the resistor array of the second polyphase filter.

4. The broadband receiver according to claim 2, characterized in that The method for reducing the phase delay between the fourth local oscillator signal and the second local oscillator signal includes: reducing the capacitance value of the capacitor array of the second polyphase filter and / or reducing the resistance value of the resistor array of the second polyphase filter.

5. A calibration method for a wideband receiver as claimed in any one of claims 2 to 4, characterized in that: include: Setting the capacitance value of the first capacitor array and the resistance value of the first resistor array of the first polyphase filter and setting the capacitance value of the second capacitor array and the resistance value of the second resistor array of the second polyphase filter; When the positive narrow pulse detection module detects a positive narrow pulse signal, the capacitance value of the second capacitor array is increased and / or the resistance value of the second resistor array is increased until the positive narrow pulse signal disappears; When the negative narrow pulse detection module detects a negative narrow pulse signal, the capacitance value of the second capacitor array and / or the resistance value of the second resistor array are reduced until the negative narrow pulse signal disappears; When the positive narrow pulse signal and the negative narrow pulse signal disappear, assigning the capacitance value of the second capacitor array to the capacitance of the first capacitor array; And / or assigning the resistance value of the second resistor array to the resistance of the first resistor array.

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