Energy consumption sensing task scheduling method under reliability constraint
Through two-stage task replication strategy and DPM technology, the challenges of reliability and power consumption optimization in heterogeneous multi-core processors are solved, efficient task scheduling and power consumption optimization of the system are achieved, ensuring the reliability and low power consumption of the system. balance.
Patent Information
- Application Number
- CN202411423474.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-12
- Publication Date
- 2025-01-14
AI Technical Summary
In heterogeneous multi-core processors, there are challenges between optimization reliability and low power consumption. The existing task scheduling algorithms will introduce excessive task replication when meeting reliability requirements, resulting in waste of resources, making it difficult to achieve effective joint optimization of the system.
A two-stage task replication strategy and dynamic voltage frequency regulation (DPM) technology are proposed. By building a task, energy consumption and reliability model, task priority is determined, and task replication is carried out based on the actual reliability value of the system to ensure that the system meets reliability Reduce redundant tasks under the premise of sexual requirements, and use DPM technology to switch to sleep mode when the processor is idle to reduce power consumption.
It realizes significantly reducing task redundancy while meeting system reliability requirements, optimizes system power consumption, and has high practicality and feasibility, and realizes joint optimization scheduling of heterogeneous multi-core systems with low power consumption.
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Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of heterogeneous multi-core system application, and specifically relates to an energy consumption-aware task scheduling method under reliability constraints. Background Art
[0002] The development of processor architecture is one of the important directions in the computer field. It has evolved from a single core to a multi-core, and finally realized a heterogeneous multi-core architecture. Heterogeneous multi-core processors have diverse functions and characteristics. Compared with single-core processors and homogeneous multi-core processors, heterogeneous multi-core processors can adapt to diverse application requirements. They can allocate tasks to the most suitable core for processing according to their characteristics, thereby achieving optimized execution of tasks and improving the overall efficiency and performance of the system.
[0003] With the continuous advancement of semiconductor technology and the sharp increase in computing needs, heterogeneous multi-core processors have become an important part of modern computer systems. In this context, the reliability and low-power design of heterogeneous multi-core processors have become a hot topic of research. In heterogeneous multi-core processors, reliability refers to the ability of the system to maintain a good operating state under various workloads and environmental conditions, while energy optimization refers to maintaining good performance while minimizing power consumption.
[0004] At present, the joint optimization of reliability and energy consumption has become one of the focuses of research on heterogeneous multi-core processor systems. However, there are challenges and trade-offs between optimizing reliability and low power consumption in heterogeneous multi-core processors. In heterogeneous multi-core processors, it is not easy to consider reliability and low power consumption at the same time. Because generally speaking, improving the reliability of the system often requires increasing the redundancy of the system, which will lead to additional power consumption. For example, adding redundant computing units or storage units to the system. However, this will lead to an increase in the overall power consumption of the system because additional hardware resources are required to achieve redundant backup. On the other hand, in order to reduce power consumption, dynamic voltage and frequency scaling (DVFS) technology can be used to reduce the operating frequency and voltage of the processor. However, reducing voltage and frequency may cause the system to fail to meet performance requirements under high load, increase the probability of transient failures in the system, and thus reduce the reliability of the system.
[0005] In the system design process, if there are multiple optimization goals (such as real-time performance, energy consumption, reliability, thermal design power TDP, etc.), one of the optimization goals is usually selected as the primary constraint, and the other optimization goals are selected as secondary goals, so as to maximize the value of the secondary goals while satisfying the primary constraints. This approach can help to strike a balance between different goals and ensure that the system is in the best possible state under the primary constraints. For the joint optimization problem of reliability and energy consumption at the task scheduling level, considering that the execution success rate of tasks in any system cannot reach 100%, a system reliability requirement R is usually set. req , when the actual reliability value of the system R sys The system is considered reliable only when it is not less than the system reliability requirement. The MaxRe algorithm and the RR algorithm are two classic task scheduling algorithms with reliability constraints. Both algorithms set the system reliability R sys It is converted into a subtask reliability problem to meet the system reliability requirements. However, in order to meet the system reliability requirements, the two algorithms will perform excessive task duplication processes, thereby introducing a large amount of redundancy and causing waste of system resources. Summary of the invention
[0006] In view of the shortcomings of the prior art, the present invention proposes an energy consumption-aware task scheduling method under reliability constraints, which includes:
[0007] S1: Build a heterogeneous multi-core system model, including task model, energy consumption model and reliability model;
[0008] S2: Determine the execution priority of tasks based on the heterogeneous multi-core system model;
[0009] S3: Perform the first phase of task replication on the task to ensure that the reliability value of each subtask is higher than the system reliability requirement and obtain the initial number of task replicas;
[0010] S4: If the actual system reliability value is less than the system reliability requirement, perform the second stage of task replication on the task to obtain the final number of task copies; otherwise, execute step S5;
[0011] S5: All task copies are assigned to the corresponding processor cores according to the execution priority of the tasks, and then according to the use conditions of the DPM technology, that is, if the processor idle time is greater than the critical time, the processor core is switched from idle mode to sleep mode to reduce power consumption.
[0012] Preferably, the task model includes: introducing a directed acyclic graph DAG to represent periodic parallel real-time tasks with priority constraints, and using a triple G = (N, W, E) to represent DAG tasks with priority constraints; where N = {n1, n2, ..., nM} is the task set, M is the number of tasks in the task set, n M represents the Mth subtask of the DAG, W is an M×U matrix, U represents the number of processor cores, and the element w in the matrix i,p Indicates that the task n i In processor core c p The worst execution time on the task; E is an M×M matrix, which represents the communication time set between tasks with constraints. The elements in the matrix are represented by e i,j It means that the i-th subtask n i and the jth subtask n j The communication overhead generated, if two tasks are assigned to the same processor core, the communication overhead between them is 0.
[0013] Preferably, the energy consumption model includes: each core of the processor can run in working mode, idle mode and sleep mode; when the processor core runs in working mode, the total power consumption p total It is expressed as:
[0014] p total =p s +λ(ρc eff V 2 f+p ind )
[0015] Among them, p s represents static power consumption, λ represents coefficient, c eff represents the average switch capacitance, V represents the operating voltage, f represents the operating current, and p ind Indicates power consumption that is independent of speed;
[0016] When the processor is in an idle state without executing any task, the critical time t for the processor to switch from the idle state to the sleep state crit It is expressed as:
[0017]
[0018] Among them, E sw Represents the switching overhead.
[0019] Preferably, the reliability model includes:
[0020] Single task node n i In processor core c p Reliability R i,p It is expressed as:
[0021]
[0022] Among them, λ p Indicates processor core cp Constant failure rate per unit time, w i,p Represents task n i In processor core c p Worst execution time on ;
[0023] After task duplication, task n with multiple backup tasks i Reliability R(n i ) is expressed as:
[0024]
[0025] Among them, R(n x i,p ) represents task n i The xth copy of the task is on processor core c p The reliability of the execution, num i Represents task n i number of copies;
[0026] System reliability R sys It is expressed as:
[0027]
[0028] Where M represents the number of tasks in the task set.
[0029] Preferably, the calculation formula for determining the execution priority of a task is:
[0030]
[0031] Among them, rank u (n i ) represents task n i The execution priority of Represents task n i The average of the worst execution times across all processor cores, e i,j Represents task n i and task n j The communication overhead generated, suc(n i ) represents n i The direct successor task, rank u (n j ) represents task n j The execution priority of
[0032] Preferably, the process of performing the first stage of task duplication on the task includes:
[0033] S31: Calculate the reliability value of the current subtask on all processor cores and mark all processor cores as not being mapped and used;
[0034] S32: copy the current task and recalculate the reliability value of the current task, select the processor core that generates the maximum reliability value and is not mapped and used as the core for task mapping, and mark the processor core as mapped and used, until the reliability value of the current task is greater than the system reliability requirement, and obtain the minimum redundancy number of the current task;
[0035] S33: Each task of the system executes steps S31-S32 to obtain the initial number of task copies.
[0036] Preferably, the process of performing the second-stage task replication on the task includes:
[0037] S41: Each task selects the processor core that generates the maximum reliability value from the remaining processor cores that are not mapped and used as the pre-selected processor core; calculates the updated task reliability value R'(n i );
[0038] S42: For each task, the task reliability value R(n i ) and the updated task reliability value R'(n i ) Recalculate the system reliability value R i sys ;
[0039] S43: Select the task with the largest system reliability value for replication, and map the new task copy obtained by replication to the pre-selected processor core of the task;
[0040] S44: R'(n i ) is assigned to R(n i ), the maximum system reliability value R i sys The system reliability value R assigned to the current system sys ;
[0041] S45: Repeat steps S41-S44 until R sys >R req , get the final number of task copies; where R req Indicates system reliability requirements.
[0042] Furthermore, the formula for recalculating the system reliability value is expressed as:
[0043]
[0044] Among them, R(n j ) represents the task n before the update j The task reliability value of M represents the number of tasks in the task set.
[0045] The beneficial effects of the present invention are as follows: the task scheduling method proposed in the present invention adopts a two-stage task replication strategy to ensure that a smaller task redundancy is generated in the system and at the same time meet the reliability requirements of the system. Finally, the DPM technology is introduced to optimize the energy consumption of the system. Through a reasonable task replication strategy, the method enables the system to significantly reduce redundant tasks in the system and effectively optimize the power consumption of the system while meeting the reliability requirements of the system, and has high practicality and feasibility. The present invention realizes the joint optimization scheduling of reliability and low power consumption of heterogeneous multi-core systems, and has broad application prospects in heterogeneous multi-core systems. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] Figure 1 The scheduling method of the present invention is executed as a structural diagram;
[0047] Figure 2 It is a simple DAG task graph listed in the present invention;
[0048] Figure 3 This is a flow chart of the task replication mechanism in the first phase of the present invention;
[0049] Figure 4 This is a flow chart of the task replication mechanism in the second stage of the present invention;
[0050] Figure 5 Assign results to the task of the present invention;
[0051] Figure 6 For the present invention Figure 5 The distribution results can be used as a slack block example of DPM technology. DETAILED DESCRIPTION
[0052] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0053] The present invention proposes an energy-aware task scheduling method under reliability constraints. Figure 1 As shown, the method includes:
[0054] S1: Build a heterogeneous multi-core system model, including task model, energy consumption model and reliability model.
[0055] Model the heterogeneous multi-core system and establish the task model, power consumption model and reliability model; specifically:
[0056] Build the task model:
[0057] In the embodiment of the present invention, a directed acyclic graph (DAG) is introduced to represent periodic parallel real-time tasks with priority constraints. The present invention uses a triple G = (N, W, E) to represent DAG tasks with priority constraints, where N = {n1, n2, ..., n M} is the task set, M is the number of tasks in the task set, and each task node n i ∈N represents a subtask of DAG. W is an M×U matrix, where U represents the number of processor cores and the elements w in the matrix i,p Indicates that the task n i In processor core c p The worst case execution time (WCET) on the same task is obviously due to the heterogeneity of heterogeneous multi-core. i The WCET on different processor cores may be different. E is an M×M matrix representing the communication time set between tasks with constraints. The elements in the matrix are represented by e i,j Indicates that n i and n j The communication overhead generated, where n j is called n i The direct successor of i Yes j The direct predecessor of i,j Occurs between different processor cores. If two tasks are assigned to the same processor core, the communication overhead between them is e i,j =0.
[0058] Figure 2 It represents a simple DAG application with 10 tasks. The nodes in the figure represent subtasks in the DAG task set, and the weight of the directed edge represents the communication overhead between two tasks with constraints. The following Table 1 shows the WCET information of the subtasks in the DAG application on three heterogeneous cores (c1, c2, c3).
[0059] Table 1 Execution time of tasks on different cores
[0060]
[0061]
[0062] Building an energy consumption model:
[0063] Each core of the processor can run in working mode, idle mode and sleep mode. When the processor core runs in working mode, its total power consumption is p total From the static power consumption p s and dynamic power consumption pd Composition, total power consumption p total It can be expressed as:
[0064] p total =p s +p d (1)
[0065] Among them, the static power consumption p s Determined by the leakage current, dynamic power consumption p d Determined by system activity consumption, specifically, dynamic power consumption is determined by the speed-related power consumption p dep and speed-independent power consumption p ind Composition, namely:
[0066] p d =p dep +p ind (2) The total power consumption p total It can be further expressed as:
[0067] p total =p s +λ(p dep +p ind ) (3)
[0068] =p s +λ(ρc eff V 2 f+p ind )
[0069] Where λ represents the coefficient. When λ=0, there is no task running on the processor. When λ=1, there is a task running on the processor. eff is the average switch capacitance, V and f are the operating voltage and operating current, respectively.
[0070] When the processor is in an idle state without executing any tasks, DPM technology can be used to put the processor into a sleep state. In the sleep state, the main goal of the processor is to minimize power consumption while maintaining the ability to respond to the system as quickly as possible, consuming only a small amount of static power. However, there is a switching overhead E when the processor switches from the idle state to the sleep state. sw ,The switching overhead mainly involves context saving and recovery, some hardware status changes, etc., so there is a critical time t crit , the critical time can be expressed as:
[0071]
[0072] Among them, p s is the idle state power consumption, i.e., static power consumption. The time required for switching the processor state can be ignored. When the processor idle time period is greater than t critThe idle time period of the processor is named as slack block, and the DPM technology can be used to put the processor into sleep state to reduce power consumption.
[0073] Build a reliability model:
[0074] For the reliability model, transient faults and permanent faults are two common types of faults in the processor system. Once a permanent fault occurs, it cannot be recovered by itself and needs to be repaired by hardware replacement. The probability of permanent faults is extremely small. Transient faults are temporary faults with relatively small impact on the overall system. The occurrence of transient faults follows the Poisson distribution. Single task node n i In processor core c p The execution frequency f max When executing, task n i The reliability can be expressed as:
[0075]
[0076] Among them, λ p Indicates processor core c p Constant failure rate per unit time, w i,p Represents task n i In processor core c p The WCET value on .
[0077] If the system uses task replication technology to ensure the reliability of task execution, then task n i In addition to the original task itself, there will be multiple backup tasks. Define task n i The number of copies of task n i The sum of the number of tasks itself and all its backup tasks, so task n i A collection of copies The number of elements in the set n 1 i is the original task n i itself, and the other elements in the set are the original tasks n i Backup task, task n i The number of copies is num i , the number of backup tasks is num i -1.
[0078] Task i A collection of copies As long as one of the replica tasks is successfully executed, then task n is considered i Successfully executed without failure. So there are multiple backup tasks n i The reliability calculation formula is updated as follows:
[0079]
[0080] Among them, R(n x i,p ) represents task n i The xth copy of the task is on processor core c p reliability.
[0081] The execution of each task in the system is independent of each other, and the probability of transient failures is also independent of each other. The reliability of the entire system depends on the probability of successful execution of each node task. Assuming that there are M tasks in the system, the reliability of the system is R sys It can be expressed as:
[0082]
[0083] The system redundancy is the sum of the number of copies of all subtasks. The system redundancy formula can be expressed as:
[0084]
[0085] S2: Determine the execution priority of tasks based on the heterogeneous multi-core system model.
[0086] In a heterogeneous multi-core system, due to the heterogeneous nature of the task execution time difference on different cores, the task allocation scheme directly affects the result of task scheduling. u The value is used to determine the execution priority of the task. i The execution priority is symbolized by rank u (n i ) indicates that its calculation method is as follows:
[0087]
[0088] Among them, rank u (n i ) represents task n i The execution priority of n j n i The direct successor task, suc(n i ) represents n i The direct successor task, rank u (n j ) represents task n j The execution priority of Represents task n i The average WCET value on all processor cores is calculated as follows:
[0089]
[0090] rank u The value starts at the bottom of the DAG graph and calculates the rank of each task node layer by layer. u Value until the entry node. Task n i rank u The larger the value, the higher the priority of the task, that is, the task is assigned to the core first.
[0091] Each original task may have no backup task or multiple backup tasks, that is, task n i The number of copies may be one (the original task itself) or multiple. The specific number of copies of each original task needs to be determined according to the replication strategy.
[0092] If task n i There are multiple backup tasks, task n i A collection of copies The priority of each task in is the same, that is, Therefore, when allocating tasks, the set S ni Each task is assigned consecutively, and the original task n is usually assigned first. i , and then assign the corresponding backup tasks. According to rank(n i ) can be calculated by Figure 2 Rank of the task node u The values are shown in Table 2.
[0093] Table 2 Task rank u value
[0094]
[0095] S3: Perform the first phase of task replication on the task to ensure that the reliability value of each subtask is higher than the system reliability requirement and obtain the initial number of task copies.
[0096] The task replication mechanism in the first phase is designed to ensure that the reliability value of each subtask is higher than the system reliability requirement, because the reliability value of each subtask is less than 1, that is, R(n i )<1; therefore, if R(n i )<R req , then R sys =R(n1)…R(n M )∠R(n i ), that is, R sys Must be less than R req , does not meet the system reliability requirements.
[0097] Since task n iThe reliability values of tasks executed on different processors vary. The core idea of the task replication mechanism in the first phase is to make each subtask replica set The replicas in iteratively map to the core that produces the largest reliability value until the task reliability value meets the system reliability requirements. The first phase task replication mechanism flow chart is as follows Figure 3 The specific steps are as follows:
[0098] S31: Calculate the reliability value of the current subtask on all processor cores according to formula (5) and mark all processor cores as not being mapped and used.
[0099] S32: copy the current task and recalculate the reliability value of the current task according to formula (6), select the processor core that generates the maximum reliability value and is not mapped as the core for task mapping, and mark the processor core as mapped, until the reliability value of the current task is greater than the system reliability requirement, that is, R(n i )>R req , get the minimum redundancy number of the current task.
[0100] S33: Each task of the system executes steps S31-S32 to obtain the initial number of task copies.
[0101] Next, we will introduce the first-stage task replication mechanism through an example. Taking Figure (2) as an example, ten original tasks are assigned to three processor cores. Assume that the three processor cores have a constant failure rate per unit time of λ1=0.001, λ2=0.0015, λ3=0.002, and the system reliability requirement is R req =0.942. According to formula (5), the reliability value R of each task on each processor core can be calculated: i,p As shown in Table 3, the bold font indicates that the reliability value of the task under this processor core is the largest.
[0102] Table 3 Reliability values of tasks on three processor cores
[0103]
[0104] According to the execution priority of the tasks in Table 2, task n1 is assigned first. Since the reliability value of task n1 on processor core c1 is the largest, the first task copy of task n1 is assigned to processor core c1. At this time, the reliability value of task n1 is the reliability value of its first task copy assigned to c1. The reliability value of task n1 is R(n1)=R 1,1 =0.98609754, satisfying R(n1)>R req, then the task replication of task n1 in the first stage is completed, and the redundancy number of task n1 is 1. Follow the same steps to replicate the copy tasks of ten tasks and select the mapped processor cores. The processor core selected for each task and the corresponding reliability value are highlighted in bold in Table 3, and finally the system task redundancy number NUM is obtained. sys =10, according to formula (7), the reliability of the current system is R sys =0.89092057.
[0105] From this example, we can see that the number of copies of each task in the first phase of the task replication mechanism is 1, and there is no additional task replication. This is normal because in general, the reliability value of a single task on different processors is greater than the system reliability requirement, and the reliability value of each task only needs to be executed once to ensure it.
[0106] S4: If the actual system reliability value is less than the system reliability requirement, perform the second phase of task replication on the task to obtain the final number of task copies; otherwise, execute step S5.
[0107] If the actual reliability value of the system is not less than the system reliability requirement, the initial number of task copies obtained by copying the tasks in the first phase is the final number of task copies.
[0108] If the actual reliability value of the system is less than the system reliability requirement, for example, although the reliability value of each subtask satisfies R(n i )>R req , but the reliability R of the current system in the example sys =0.89092057, which is far lower than the system reliability requirement of 0.942, and then the second stage task replication mechanism is started.
[0109] In the first phase of task replication, only the reliability R(n i ) exceeds the reliability requirement R of the system req is not enough. In order to improve the overall reliability of the system to meet the reliability requirements of the system, more backup tasks must be additionally replicated in the system. However, this additional task replication process is a complex task because choosing which tasks to replicate and which processor cores to map them to will result in different system reliability values. Therefore, it is crucial to develop a reasonable task replication strategy.
[0110] In the second phase of task replication, when a task n i When a new copy task is copied and a processor core is selected for execution, task n i The number of copies l = num i +1, task n iThe updated reliability formula is as follows:
[0111]
[0112] When task n i After the reliability value is updated, the system reliability R sys It is also updated accordingly. The updated system reliability formula is as follows:
[0113]
[0114] The core idea of the second-stage task replication mechanism is to select the task that generates the maximum system reliability value and the corresponding mapped processor core based on the first-stage task replication until the system reliability requirements are met. The flowchart of the second-stage task replication mechanism is as follows: Figure 4 The specific steps are as follows:
[0115] S41: Each task selects the processor core that generates the maximum reliability value from the remaining processor cores that are not mapped and used as the pre-selected processor core; calculates the updated task reliability value R'(n i ).
[0116] The reliability of the task is R(n i ) needs to be updated, and the updated reliability R'(n i ).
[0117] S42: For each task, the task reliability value R(n i ) and the updated task reliability value R'(n i ) Recalculate the system reliability value R i sys .
[0118] According to formula (12), the updated system reliability R is calculated i sys ,Each task will produce an updated system reliability value.
[0119] S43: Select the task with the largest system reliability value for replication, and map the new task copy obtained by replication to the pre-selected processor core of the task.
[0120] M original tasks are calculated to obtain M system reliability values. After the M original tasks are mapped to the corresponding pre-replicated processor cores, R is defined i sys =max{R 1 sys ,R 2 sys ,...,RM sys}, copy the task with maximum reliability, in which case the pre-selected processor core of the task is the processor core actually selected by the task.
[0121] S44: R'(n i ) is assigned to R(n i ), the maximum system reliability value R i sys The system reliability value R assigned to the current system sys .
[0122] S45: Repeat steps S41-S44 until R sys >R req , and update the system task redundancy NUM sys , that is, the final number of task copies is obtained; where R req Indicates system reliability requirements.
[0123] Next, we will introduce the second-stage task replication mechanism through an example. The second-stage task replication mechanism is carried out after the first-stage task replication mechanism ends. Assuming that the constant failure rate per unit time of the three processor cores is λ1=0.001, λ2=0.0015, λ3=0.002, and the system reliability requirement is R req =0.942, these parameter values are the same as those in the first stage.
[0124] According to the second stage, step S41 is executed, each task needs to select the processor core that generates the maximum reliability value R on the remaining processor cores that are not mapped. i,p The processor core is the pre-selected processor core. Since the task model in Figure (2) has ten task nodes, it needs to be iterated ten times. First, for task n1, since the processor core p1 has been marked and used in the first stage, the new copy task of task n1 can only be mapped to c2 and c3. According to Table 3, the execution reliability R of the task on c3 i,3 The maximum value is the processor core pre-selected by the new copy task of task n1, so the processor core pre-selected by task n1 is c3. According to formula (11), the updated reliability of task n1 is calculated as R'(n1)=0.99975199. Then, in step S42, the updated system reliability R' is calculated according to formula (12). sys =0.90325711. At this point, the pre-copy process of task n1 is completed, that is, the new copy task of task n1 is pre-mapped on the processor core c3. In the same way, the remaining tasks are processed and the corresponding R' is obtained. sys After all ten tasks have pre-selected the corresponding preprocessor cores, the first round of task replication is completed. According to step S43, R i sys=max{R 1 sys ,R 2 sys ,...,R M sys ,}=R 9 sys =0.9068, that is, the task actually selected for replication in the first round is n9, and is mapped on processor core c2. According to step S44, R i sys Assign to R sys , and get the updated system reliability R sys =0.9068, system redundancy NUM sys =11. Step S45: After the first round, repeat the above steps until R sys >R req In the fourth round, the new copy of task n2 is mapped to processor core c2, and the maximum R' is obtained in this round. sys , at this time the system reliability R sys =0.9430, meeting the system reliability requirement R req =0.942, which proves that after the task replication is completed, the system is considered reliable. At the same time, the system redundancy NUM sys = 14. Each task pre-selects a processor core c p and the corresponding updated system reliability R' sys As shown in Table 4, the boldface in the table indicates the processor cores mapped by each round of new replica tasks and the corresponding updated system reliability values. At this point, the second phase of the task replication mechanism steps is completed.
[0125] Table 4 Example of the second stage task replication mechanism
[0126]
[0127] Table 5 Figure 2 The task allocation results of the task model in which this method is applied. Each row records the processor core that each task finally chooses to map, the corresponding reliability value, and the number of task replicas. The bold font indicates the reliability value corresponding to the processor core that the task finally chooses to map.
[0128] Table 5 Reliability values of tasks on three processor cores
[0129]
[0130]
[0131] Furthermore, according to the data in Table 5, the copies of all tasks are allocated to the corresponding processor cores, such as Figure 5 The task allocation mechanism of the present invention is based on the reliability constraint condition. Figure 5 It can be seen that the distribution of tasks among cores is uneven. This is because the constant failure rates of different processor cores and the WCET values of tasks among different cores are different. According to formula (1), it can be calculated that the reliability values of tasks on different cores are also different, which makes the tasks preferentially select the processor core with the largest reliability value.
[0132] S5: All task copies are assigned to the corresponding processor cores according to the execution priority of the tasks, and then according to the use conditions of the DPM technology, that is, if the processor idle time is greater than the critical time, the processor core is switched from idle mode to sleep mode to reduce power consumption.
[0133] Due to the reliability constraint, the mapping of tasks to processors is directional, resulting in a small number of tasks executed on processor cores c2 and c3 in the task allocation result, and a longer idle time, that is, a longer processor slack block duration. Since the processor still consumes a certain amount of energy when it is idle, the DPM technology can be used to switch the processor to sleep mode to reduce power consumption. It can be seen from the energy consumption model of the present invention that when the slack block duration t slack >t crit When the slack block is in operation, the DPM technology is used to reduce power consumption until the next task arrives and the slack duration ends. At the same time, the processor switches to the working mode to execute the next task. Figure 6 Shown as dotted box.
[0134] The above embodiments further illustrate the purpose, technical solutions and advantages of the present invention in detail. It should be understood that the above embodiments are only preferred implementation modes of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made to the present invention within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. An energy-aware task scheduling method under reliability constraints, characterized in that: include: S1: Build a heterogeneous multi-core system model, including task model, energy consumption model and reliability model; S2: Determine the execution priority of tasks based on the heterogeneous multi-core system model; S3: Perform the first phase of task replication on the task to ensure that the reliability value of each subtask is higher than the system reliability requirement and obtain the initial number of task replicas; S4: If the actual system reliability value is less than the system reliability requirement, perform the second stage of task replication on the task to obtain the final number of task copies; otherwise, execute step S5; S5: All task copies are assigned to the corresponding processor cores according to the execution priority of the tasks, and then according to the use conditions of the DPM technology, that is, if the processor idle time is greater than the critical time, the processor core is switched from idle mode to sleep mode to reduce power consumption.
2. The energy consumption-aware task scheduling method under reliability constraints according to claim 1 is characterized in that: The task model includes: introducing a directed acyclic graph DAG to represent periodic parallel real-time tasks with priority constraints, and using a triple G=(N, W, E) to represent DAG tasks with priority constraints; where N={n1, n2, ..., n M } is the task set, M is the number of tasks in the task set, n M represents the Mth subtask of the DAG, W is an M×U matrix, U represents the number of processor cores, and the element w in the matrix i,p Indicates that the task n i In processor core c p The worst execution time on the task; E is an M×M matrix, which represents the communication time set between tasks with constraints. The elements in the matrix are represented by e i,j It means that the i-th subtask n i and the jth subtask n j The communication overhead generated, if two tasks are assigned to the same processor core, the communication overhead between them is 0.
3. The energy consumption-aware task scheduling method under reliability constraints according to claim 1 is characterized in that: The energy consumption model includes: each core of the processor can run in working mode, idle mode and sleep mode; when the processor core runs in working mode, the total power consumption p total It is expressed as: p total =p s +λ(ρc eff V 2 f+p ind ) Among them, p s represents static power consumption, λ represents coefficient, c eff represents the average switch capacitance, V represents the operating voltage, f represents the operating current, and p ind Indicates power consumption independent of speed; When the processor is in an idle state without executing any task, the critical time t for the processor to switch from the idle state to the sleep state crit It is expressed as: Among them, E sw Represents the switching overhead.
4. The energy consumption-aware task scheduling method under reliability constraints according to claim 1 is characterized in that: The reliability model includes: Single task node n i In processor core c p Reliability R i,p It is expressed as: Among them, λ p Indicates processor core c p Constant failure rate per unit time, w i,p Represents task n i In processor core c p Worst execution time on ; After task duplication, task n with multiple backup tasks i Reliability R(n i ) is expressed as: Among them, R(n x i,p ) represents task n i The xth copy of the task is on processor core c p The reliability of the execution, num i Represents task n i number of copies; System reliability R sys It is expressed as: Where M represents the number of tasks in the task set.
5. The energy consumption-aware task scheduling method under reliability constraints according to claim 1 is characterized in that: The calculation formula for determining the execution priority of a task is: Among them, rank u (n i ) represents task n i The execution priority of Represents task n i The average of the worst execution times across all processor cores, e i,j Represents task n i and task n j The communication overhead generated, suc(n i ) represents n i The direct successor task, rank u (n j ) represents task n j The execution priority of 6. The energy consumption-aware task scheduling method under reliability constraints according to claim 1 is characterized in that: The process of performing the first phase of task replication on a task includes: S31: Calculate the reliability value of the current subtask on all processor cores and mark all processor cores as not being mapped and used; S32: copy the current task and recalculate the reliability value of the current task, select the processor core that generates the maximum reliability value and is not mapped and used as the core for task mapping, and mark the processor core as mapped and used, until the reliability value of the current task is greater than the system reliability requirement, and obtain the minimum redundancy number of the current task; S33: Each task of the system executes steps S31-S32 to obtain the initial number of task copies.
7. The energy consumption-aware task scheduling method under reliability constraints according to claim 1 is characterized in that: The process of performing the second phase of task replication on a task includes: S41: Each task selects the processor core that generates the maximum reliability value from the remaining processor cores that are not mapped and used as the pre-selected processor core; calculates the updated task reliability value R'(n i ); S42: For each task, the task reliability value R(n i ) and the updated task reliability value R'(n i ) Recalculate the system reliability value R i sys ; S43: Select the task with the largest system reliability value for replication, and map the new task copy obtained by replication to the pre-selected processor core of the task; S44: R'(n i ) is assigned to R(n i ), the maximum system reliability value R i sys The system reliability value R assigned to the current system sys ; S45: Repeat steps S41-S44 until R sys >R req , get the final number of task copies; where R req Indicates system reliability requirements.
8. The energy consumption-aware task scheduling method under reliability constraints according to claim 7 is characterized in that: The formula for recalculating the system reliability value is expressed as: Among them, R(n j ) represents the task n before the update j The task reliability value of M represents the number of tasks in the task set.
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Task scheduling method capable of realizing energy consumption sensing under reliability constraints
WO2026076990A1