Image processing device based on 3UVPX

Abstract

The invention relates to an image processing device based on 3UVPX. The image processing device comprises a 3UVPX standard case shell, a power supply module, a control calculation module, a video conversion module and a backboard, the power supply module, the control calculation module and the video conversion module are all 3UVPX standard daughter boards; the backboard is a printed circuit board, and the daughter board is connected with the printed circuit board through a VPX connector. According to the invention, multiple paths of 3G-SDI / HD-SDI video data can be accessed, processing such as correction, cutting, rotation and data superposition can be carried out on a single-path image, splicing processing and the like can be carried out on multiple paths of images, data interaction can be carried out by accessing buses such as Ethernet, PCIE (Peripheral Component Interconnect Express) and a CAN (Controller Area Network) bus, and mutual conversion of ETH, Flexray, USB (Universal Serial Bus), a CAN bus, a serial port, RS485 and the like can be realized. Universalization and standardization of a board card module in the device are achieved, and the reliability, maintainability and interchangeability of the system are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of image processing, and in particular relates to an image processing device based on 3UVPX. Background Art

[0002] At present, the localization, unmanned and intelligentization of special vehicles and unmanned equipment are becoming increasingly higher, and the requirements for the functions and performance of the camera components of the perception system are gradually increasing. The acquisition and processing of traditional analog cameras are gradually transitioning to more anti-interference and higher-definition digital cameras. The high-definition digital cameras used in the unmanned equipment processed by the image processing device are mostly SDI, CameraLink, GMSL and other interface cameras, which perform real-time image acquisition, compression processing, network streaming processing, target recognition and real-time conversion of multiple bus data, and realize the execution control of unmanned equipment or related execution components through corresponding image information processing.

[0003] At present, most cameras used in special vehicles and unmanned equipment are SDI cameras, while the mainstream on-board image processing devices currently use MIPI, LVDS, HDMI and other interfaces as video data input, and a few use ETH and other interfaces as video data input. In addition, the computing power and processing capabilities of image processing chips are relatively weak, and there are certain risks in processing the data conversion of multiple full HD videos. These shortcomings are all caused by the performance of the hardware itself. Summary of the invention

[0004] The present invention provides an image processing device based on 3UVPX, which solves the shortcomings of the current technology and can access multiple channels of 3G-SDI / HD-SDI video data, perform correction, cropping, rotation, data superposition and other processing on a single channel image, and perform splicing processing on multiple channels of images.

[0005] In order to solve the above technical problems, the present invention provides an image processing device based on 3UVPX, which is characterized by comprising a power module, a control calculation module, a video conversion module and a backplane; the power module provides a standard power supply for the whole machine, converts the external input power supply into an internal standard power supply to power other modules, and reports the status information through a CAN bus; the control calculation module performs video recognition, data superposition processing, image enhancement processing, bus protocol conversion, video output display, and network video streaming, outputs the video to the backplane through ETH, HDMI and CVBS, realizes data transmission and control through CAN, FlexRay and ETH buses, and receives data from the video conversion module through PCIE and MIPI; the video conversion module collects SDI video, and performs correction, cropping, rotation, and data superposition processing, converts the input SDI video into a MIPI / PCIE protocol, and processes and outputs it to the control calculation module through a MIPI circuit and a PCIE circuit.

[0006] Beneficial effects: The present invention can access multiple channels of 3G-SDI / HD-SDI video data, perform correction, cropping, rotation, data superposition and other processing on single-channel images, perform splicing processing on multiple channels of images, and can access Ethernet, PCIE, CAN bus and other buses for data interaction, and can realize mutual conversion between ETH, Flexray bus, USB bus, CAN bus, serial port, RS485 and other buses. The generalization and standardization of the board module inside the device are realized, and the reliability, maintainability and interchangeability of the system are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 The internal structure diagram of the present invention is

[0008] Figure 2 The block diagram for the control calculation module

[0009] Figure 3 Block diagram of the video conversion module. DETAILED DESCRIPTION

[0010] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below.

[0011] The present invention proposes a 3UVPX-based image processing device, comprising a 3UVPX standard chassis shell, a power module, a control calculation module, a video conversion module and a backplane;

[0012] The power module, control calculation module and video conversion module are all 3UVPX standard daughter boards; the backplane is a printed circuit board, and the daughter board and the printed circuit board are connected with a VPX connector.

[0013] The power module provides 3.3V, 5V, and 12V standard power for the whole machine, converts the external input 26±4VDC into internal standard power to power other modules, and reports the status information through the CAN bus. The control and calculation module performs video recognition, data overlay processing, image enhancement processing, bus protocol conversion, video output display, network video streaming, outputs the video to the backplane through ETH, HDMI, and CVBS, realizes data transmission and control through CAN, FlexRay, ETH and other buses, and receives data from the video conversion module through PCIE and MIPI. The video conversion module collects SDI video, and performs correction, cropping, rotation, and data overlay processing. It converts the input SDI video into MIPI / PCIE protocol and processes and outputs it to the control and calculation module through MIPI circuit and PCIE circuit.

[0014] In this technical solution, the power module is powered by a 9-36V DC power supply, performs filtering and performs voltage conversion on the daughter board, converting it into isolated 12V, 5V, 3.3V and other voltages, and can detect the total output voltage, load current and heating status of the conversion circuit in real time, and report the corresponding circuit status information and alarms through the CAN bus.

[0015] The control computing module includes a main processor, a power conversion module, a coprocessor, an RS485 communication circuit, a MIPI input circuit, a CVBS output circuit, an HDMI output circuit, an audio output circuit, a USB3.0&2.0 processing circuit, a Gigabit Ethernet processing circuit, a PCIE circuit, a CAN isolation circuit, a serial port circuit, a Flexray processing circuit and a VPX connector;

[0016] VPX connectors include VPX1-P0 connector, VPX1-P1 connector, and VPX1-P2 connector;

[0017] In the control and calculation module, the input 12V power supply enters the power conversion module through the VPX1-P0 connector, thereby generating 5V, 3.3V, 1.8V and other power supplies to power all circuits of the entire board.

[0018] The RS485 bus is connected to the RS485 communication circuit of the control computing module through the VPX1-P0 connector and the bus data is transmitted to the main processor; the 8-channel MIPI video information is connected to the MIPI input circuit through the VPX1-P1 connector, EMI processing is performed and connected to the main processor to realize the image acquisition function; the main processor outputs the processed video information through the CVBS output circuit and the HDMI output circuit through the VPX1-P1 connector for display;

[0019] The main processor converts the audio information required for the video through the HDMI output circuit and the audio output circuit, and then outputs it for playback through the VPX1-P1 connector; the USB bus, Gigabit / 100M Ethernet, and PCIE bus can be accessed through the VPX1-P2 connector and bus protection is achieved through the USB3.0&2.0 processing circuit, Gigabit Ethernet processing circuit, and PCIE circuit, and data interaction is achieved with the main processor; the CAN bus, Flexray bus, and serial port information are accessed through the VPX1-P2 connector and isolated and protected through the CAN isolation circuit, Flexray processing circuit, and serial port circuit, and connected to the coprocessor for data interaction; the coprocessor realizes data interaction between the main processor and the coprocessor through the internal SPI bus, and interacts with each other through the data processing of their respective bus interfaces. The main processor can also process the video and generate corresponding control / alarm information, which is sent down to the CAN bus, Flexray bus, serial port, and other buses through the coprocessor.

[0020] The video conversion module includes an FPGA processor for video signal conversion, a power conversion module, a coprocessor, an RS485 isolation conversion circuit, a MIPI output circuit, a USB3.0&2.0 processing circuit, a Gigabit Ethernet processing circuit, a PCIE circuit, an SDI input circuit, an HDMI output circuit, an FPGA debugging circuit, a CAN isolation circuit, an IIC communication circuit, a serial port circuit, and a VPX connector; the VPX connector includes a VPX2-P0 connector, a VPX2-P1 connector, and a VPX2-P2 connector.

[0021] The video conversion module uses a 12V power supply, which enters the power conversion module through the VPX2-P0 connector, thereby generating 5V, 3.3V, 1.8V and other power supplies to power all circuits of the video conversion module.

[0022] The IIC bus accesses the IIC communication circuit through the VPX2-P0 connector and transmits the bus data to the FPGA processor;

[0023] 8-channel SDI video information is connected to the SDI input circuit through the VPX2-P1 connector, EMI processing is performed and connected to the FPGA processor to realize the image acquisition function;

[0024] The FPGA processor outputs the processed video information through the corresponding 8-way MIPI output circuit and / or one-way HDMI output circuit, and displays the video information through the VPX2-P1 connector; the FPGA processor converts the video and performs correction, cropping, rotation, data overlay and other processing as needed, and processes and outputs it through the Gigabit Ethernet processing circuit and PCIE circuit, and then outputs it through the VPX2-P2 connector; USB bus, Gigabit / 100M Ethernet, and PCIE bus data can be accessed through the VPX1-P2 connector and implemented through the USB3.0&2.0 processing circuit, Gigabit Ethernet processing circuit, and PCIE circuit Bus protection and data interaction with FPGA processor; CAN bus, RS485 bus, serial and other information can be accessed through the VPX2-P2 connector and isolated and protected through CAN isolation circuit, RS485 isolation conversion circuit and serial port circuit to access the coprocessor for data interaction; the coprocessor can realize data interaction between the main processor and the coprocessor through the internal SPI bus, and can interact with each other on the bus interface data processing they own, and the FPGA processor can also process the video and generate the corresponding control / feedback information, which is sent down to the CAN bus, RS485 bus, serial port and other buses through the coprocessor.

[0025] The present invention adopts purely domestically produced chips to build an SDI to MIPI conversion circuit, thereby realizing the conversion of multi-channel SDI video signals into MIPI.

[0026] Control information and key data information can be processed and superimposed in real time through bus interfaces such as CAN bus, ETH, PCIE, etc., and output in real time through interfaces such as MIPI, PCIE, ETH, etc.

[0027] The number of input video channels and splicing processing channels can be flexibly configured according to the application scenario, and the original video can be quickly subjected to distortion correction, rotation and cropping, which greatly improves the decoupling capability of each module within the system.

[0028] The main processor and coprocessor use SPI bus to realize mutual conversion between ETH, FlexRay bus, USB bus, CAN bus, serial port, RS485 and other buses.

[0029] Through various interface buses, key data information can be processed in real time and superimposed on the image and output in real time through HDMI, Ethernet, CVBS and other interfaces.

[0030] By collecting image data for target recognition and obstacle distance judgment, etc., the corresponding control information is generated to control the target device through various bus interfaces.

[0031] The power module can monitor the load and working status of each module in real time, perform power limiting output and overcurrent and overload protection in a timely manner, and report the status based on actual power consumption.

[0032] The advantages of the present invention are:

[0033] 1. The core processing device has simple connection logic, high integration, low cost, good consistency, and can support multi-channel SDI video input, multi-type bus access and multi-type communication bus conversion, so it has good promotion and use value.

[0034] 2. It can improve the effective intervention of control information, conveniently complete the processing and output of control information, data information and images at the front end, and effectively alleviate the pressure of back-end image processing.

[0035] 3. The modular design of the internal functional boards makes the device flexibly applicable to various functional scenarios. The boards can be quickly replaced inside the machine for configuration upgrades. On the other hand, the standardized design of the whole machine makes the device more maintainable.

[0036] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. An image processing device based on 3UVPX, characterized in that: It includes a power module, a control and calculation module, a video conversion module and a backplane; the power module provides standard power for the whole machine, converts the external input power into an internal standard power supply to power other modules, and reports the status information through the CAN bus; the control and calculation module performs video recognition, data overlay processing, image enhancement processing, bus protocol conversion, video output display, network video streaming, outputs the video to the backplane through ETH, HDMI and CVBS, realizes data transmission and control through CAN, FlexRay and ETH buses, and receives data from the video conversion module through PCIE and MIPI; the video conversion module collects SDI video, and performs correction, cropping, rotation and data overlay processing, converts the input SDI video into MIPI / PCIE protocol, and processes and outputs it to the control and calculation module through MIPI circuit and PCIE circuit.

2. The image processing device based on 3UVPX according to claim 1, characterized in that: The power module, control computing module, video conversion module and backplane are arranged in a 3UVPX standard chassis shell.

3. The image processing device based on 3UVPX according to claim 1, characterized in that: The power module, control calculation module and video conversion module are all 3UVPX standard daughter boards; the backplane is a printed circuit board, and the daughter board and the printed circuit board are connected with a VPX connector.

4. The image processing device based on 3UVPX according to claim 1, characterized in that: The video conversion module includes an FPGA processor, a power conversion module, a coprocessor, an RS485 isolation conversion circuit, a MIPI output circuit, a USB3.0&2.0 processing circuit, a Gigabit Ethernet processing circuit, a PCIE circuit, an SDI input circuit, an HDMI output circuit, a CAN isolation circuit, an IIC communication circuit, a serial port circuit, and a VPX connector; the VPX connector includes a VPX2-P0 connector, a VPX2-P1 connector, and a VPX2-P2 connector.

5. The image processing device based on 3UVPX according to claim 4, characterized in that: The video conversion module uses a 12V power supply.

6. The image processing device based on 3UVPX according to claim 4, characterized in that: The power supply enters the power conversion module through the VPX-P0 connector, thereby generating power to provide power for all circuits of the entire board; the IIC bus data is connected to the IIC communication circuit through the VPX-P0 connector for signal conversion and then transmitted to the FPGA processor; the SDI video information is connected to the SDI input circuit through the VPX-P1 connector, EMI processing is performed and connected to the FPGA processor to realize the image acquisition function; the FPGA processor outputs the processed video information through the VPX-P1 connector through the corresponding 8-way MIPI output circuit and / or one-way HDMI output circuit; the FPGA processor converts the video information as needed and performs correction, cropping, rotation, data superposition and other processing, and transmits it through the Gigabit Ethernet processing circuit , PCIE circuits are converted and output through the VPX-P2 connector; USB bus, Gigabit / 100M Ethernet, and PCIE bus data are connected through the VPX-P2 connector and are protected by the corresponding USB3.0&2.0 processing circuits, Gigabit Ethernet processing circuits, and PCIE circuits, and data interaction is achieved with the FPGA processor; CAN bus, RS485 bus, and serial port information are connected through the VPX-P2 connector and are isolated and protected by the CAN isolation circuit, RS485 processing circuit, and serial port circuit, and are connected to the coprocessor for data interaction; the coprocessor realizes data interaction between the FPGA processor and the coprocessor through the internal SPI bus, and interacts with each other through the bus interface data processing they each have.

7. The image processing device based on 3UVPX according to claim 6, characterized in that: After the FPGA processor processes the video, it generates corresponding control / feedback information and sends it to the CAN bus, RS485 bus, and serial bus through the coprocessor.

8. The image processing device based on 3UVPX according to claim 1, characterized in that: The control computing module includes a main processor, a power conversion module, a coprocessor, an RS485 communication circuit, a MIPI input circuit, a CVBS output circuit, an HDMI output circuit, an audio output circuit, a USB3.0&2.0 processing circuit, a Gigabit Ethernet processing circuit, a PCIE circuit, a CAN isolation circuit, a serial port circuit, a Flexray processing circuit and a VPX connector; the VPX connector includes a VPX1-P0 connector, a VPX1-P1 connector and a VPX1-P2 connector.

9. The image processing device based on 3UVPX according to claim 8, characterized in that: In the control and calculation module, the input power enters the power conversion module through the VPX1-P0 connector and generates power for all circuits of the control and calculation module; The RS485 bus accesses the RS485 communication circuit of the control computing module through the VPX1-P0 connector and transmits the bus data to the main processor; Multi-channel MIPI video information is connected to the MIPI input circuit through the VPX1-P1 connector, EMI processing is performed and connected to the main processor to realize the image acquisition function; the main processor outputs the processed video information through the CVBS output circuit and the HDMI output circuit through the VPX1-P1 connector for display; The main processor converts the audio information required for the video through the HDMI output circuit and the audio output circuit, and then outputs it for playback through the VPX1-P1 connector; the USB bus, Gigabit / 100M Ethernet, and PCIE bus can be accessed through the VPX1-P2 connector and the bus protection is realized through the USB3.0&2.0 processing circuit, Gigabit Ethernet processing circuit, and PCIE circuit, and data interaction is realized with the main processor; the CAN bus, Flexray bus, and serial port information are accessed through the VPX1-P2 connector and isolated and protected through the CAN isolation circuit, Flexray processing circuit, and serial port circuit, and connected to the coprocessor for data interaction; the coprocessor realizes data interaction between the main processor and the coprocessor through the internal SPI bus, and interacts with each other through the bus interface data processing they each have.

10. The image processing device based on 3UVPX according to claim 9, characterized in that: After processing the video, the main processor generates corresponding control / alarm information and sends it to the CAN bus, Flexray bus, and serial bus through the coprocessor.

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