Multi-mode simulator signal generation method based on FPGA (Field Programmable Gate Array)
Through the multi-mode simulator signal generation method based on FPGA, the problem that the existing technology is difficult to simulate complex electromagnetic environment signals is solved, and signal simulation in high-frequency band and multi-signal modes is realized, which improves the system's electronic countermeasure ability and combat performance in complex electromagnetic environments.
Patent Information
- Application Number
- CN202411646513.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-02-25
AI Technical Summary
Existing electromagnetic environment simulation technology is difficult to effectively simulate complex high-frequency band, multi-style, and high-density electromagnetic environment signals, resulting in insufficient electronic countermeasures in the system in complex electromagnetic environments.
The multi-mode analog signal generation method based on FPGA is adopted to generate I/Q signals through FPGA, and combined with hardware such as digital analog converters (DACs) and phase accumulators to generate multiple mode signals, including conventional radars, narrowband radars, ultra-wideband radars, and enemy-enemies identification signals.
It realizes high-frequency band, multi-signal mode, multi-directional, high-density dynamic and empty signal simulation, improves signal stability, reliability and anti-interference, and is suitable for complex electromagnetic environment battlefields and improves the combat performance of the system.
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Figure CN119519717A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of electromagnetic interference, and in particular to a method for generating signals of a multi-mode simulator based on an FPGA. Background Art
[0002] With the increasing application of electromagnetics in the military field, the battlefield electromagnetic environment has become extremely complex. New characteristics have emerged in the electromagnetic environment under the conditions of the information battlefield: electromagnetic confrontation has given rise to electronic warfare, the electromagnetic environment has become complicated, command and control has been interfered, and the overall combat capability of the system has declined. In order to cope with the new electronic confrontation in this complex electromagnetic environment, the use of multi-mode simulators to generate targeted electromagnetic environments can enhance the electronic confrontation capabilities of the system for building complex electromagnetic environments and effectively improve the overall combat capability of the system.
[0003] In view of the current development of domestic electromagnetic environment construction technology, the main products are based on simulating VHF / UHF / L band communication signals, generating simulated conventional pulses, pulse compression, pulse Doppler, frequency agility, repetition frequency difference and other radar signals, and can also generate CW / FW / ASK / FSK / BPSK and other analog and digital communication signals. However, these are the simulation of a single or a few communication signals. In the real battlefield environment, the simulation and emulation of high-frequency, multi-style, and high-density electromagnetic environment signals have put forward higher requirements. Summary of the invention
[0004] In order to solve the above problems, the present invention provides a method for generating multi-mode simulator signals based on FPGA, comprising the following steps: S1. The user sends an analog signal generation instruction to the FPGA through the platform software; S2. The FPGA generates an I / Q signal and transmits the generated I / Q signal to a digital-to-analog converter to convert it into an analog signal; S3. The analog signal is processed and the processed analog signal is output.
[0005] Furthermore, the S2 step specifically includes the following sub-steps: S21. FPGA generates I / Q signals; S22. The I / Q signals are transmitted to the phase accumulator for phase linear accumulation to obtain phase codes; S23. Addressing is performed through a waveform lookup table; S24. A step waveform is obtained through a digital-to-analog converter; S25. A continuous waveform is formed through a low-pass filter LPF.
[0006] Furthermore, a reference clock signal needs to be input when executing step S22 and step S24.
[0007] Furthermore, the method also includes a pulse data coding signal generation step: generating a pulse data coding signal file through platform software, and parsing through FPGA to generate a corresponding pulse data coding signal and output it synchronously with the analog signal.
[0008] Furthermore, the signal processing in step S3 specifically includes: signal filtering, signal amplification, and signal attenuation.
[0009] Furthermore, the processed analog signal output in the step S3 specifically includes: conventional radar signals, narrowband radar and ultra-wideband radar signals, friend-or-foe identification signals IFF, linear frequency modulation signals LFM, binary digital keying modulation signals BPSK, pulse amplitude modulation signals, pulse position modulation signals PPM, and MSK signals.
[0010] The present invention provides a method for generating a multi-mode simulator signal based on FPGA, which has the following beneficial effects: The present invention uses the FPGA+DAC hardware platform to realize the generation method of multiple mode signals, which has good adaptability, scalability and flexibility, and can realize the design of multiple mode signal pulse coding in FPGA. The signal simulator with high instantaneous, wide frequency band, multi-signal mode, multi-directional, high-density dynamic space can effectively improve the stability, high reliability and anti-interference of the signal, and is widely used in battlefields with complex electromagnetic environments to improve the combat performance of the system. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0012] Figure 1 A flow chart of the method provided by the present invention; Figure 2 The present invention provides a flowchart of the method. DETAILED DESCRIPTION
[0013] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.
[0014] The following is a detailed description of the implementation method of the present invention in conjunction with the accompanying drawings. Only some embodiments are described, not all embodiments. For the purpose of clarity, representations and descriptions that are not related to the present invention are omitted in the drawings and descriptions.
[0015] In order to have a clearer understanding of the technical features, purposes and beneficial effects of the present invention, the technical solution of the present invention is now described in detail below. Obviously, the implementation cases described are part of the embodiments of the present invention, not all of the embodiments, and cannot be understood as limiting the scope of the implementation of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work belong to the protection scope of the present invention.
[0016] Signal simulation is mainly implemented in the logic circuit in FPGA: First, construct the DDS core control logic to realize the signal carrier waveform output, which is used to control the DAC (digital analog converter) to produce different carriers. Second, realize different pulse generation circuits, which can realize the encoding of conventional radar, narrowband radar and ultra-wideband radar signals, friend-or-foe identification signal IFF, linear frequency modulation LFM, binary digital keying modulation BPSK, pulse amplitude modulation signal, pulse position modulation signal (PPM), MSK signal and other signals through platform software reconstruction, and realize different signal pulse carrier signal output.
[0017] like Figure 1 , Figure 2 As shown, the present invention provides a method for generating multi-mode simulator signals based on FPGA, comprising the following steps: S1. The user sends an analog signal generation instruction to the FPGA through the platform software; S2. The FPGA generates an I / Q signal and transmits the generated I / Q signal to a digital-to-analog converter to convert it into an analog signal; S3. The analog signal is processed and then the processed analog signal is output.
[0018] The S2 step specifically includes the following sub-steps: S21. FPGA generates I / Q signals; S22. I / Q signals are passed into the phase accumulator for phase linear accumulation to obtain phase codes; S23. Addressing is performed through a waveform lookup table; S24. Step waveforms are obtained through a digital-to-analog converter; S25. Continuous waveforms are formed through a low-pass filter LPF. The reference clock signal needs to be input when executing both S22 and S24.
[0019] Under the action of the reference clock, the phase accumulator performs phase linear accumulation of the frequency control word to obtain the phase code. According to the effective bit, the waveform lookup table of different signals of conventional radar, narrowband radar and ultra-wideband radar signals, IFF, LFM, BPSK, Pulse Amplitude Modulation, Pulse Position Modulation (PPM), and MSK signals is addressed, and the corresponding amplitude value is output. Finally, the step wave is obtained through DAC, and finally the continuous waveform is obtained through LPF smoothing filtering. In this way, different frequency control words can be used to switch the frequency of different conventional radar, narrowband radar and ultra-wideband radar signals, IFF, LFM, BPSK, Pulse Amplitude Modulation, Pulse Position Modulation (PPM), and MSK signal carriers.
[0020] It also includes a pulse data coding signal generation step: generating a pulse data coding signal file through platform software, and parsing through FPGA to generate a corresponding pulse data coding signal and output it synchronously with the analog signal.
[0021] The implementation method of pulse data coded signal is mainly based on the definition of pulses, and the pulse width PW, the distance between the pulse front edge and the next pulse front edge, the pulse carrier frequency RF and the pulse repetition characteristics are written into the pulse file. Different pulse data coded signal files (including conventional radar, narrowband radar and ultra-wideband radar signals, IFF, linear frequency modulation LFM, binary digital keying modulation BPSK, pulse amplitude modulation signal, pulse position modulation signal (PPM), MSK signal) are produced by platform software and sent to FPGA for analysis to generate pulse sequences with different time domain characteristics. The frequency control word corresponding to the pulse sequence is output in parallel and synchronously for controlling the DDS core logic.
[0022] The processed analog signals output in step S3 specifically include: conventional radar signals, narrowband radar and ultra-wideband radar signals, friend-or-foe identification signals IFF, linear frequency modulation signals LFM, binary digital keying modulation signals BPSK, pulse amplitude modulation signals, pulse position modulation signals PPM, and MSK signals.
[0023] The signal processing in step S3 specifically includes: signal filtering, signal amplification, and signal attenuation. In view of the different operating frequency bands of conventional radar, narrowband radar, and ultra-wideband radar signals, IFF, linear frequency modulation LFM, binary digital keying modulation BPSK, pulse amplitude modulation signal, pulse position modulation signal (PPM), MSK signal, etc., in order to improve the quality of the output signal and filter out clutter components such as image frequency, the signal needs to be shaped and adjusted through the amplification and filtering circuit and the attenuation circuit to output high-quality signals.
[0024] The present invention uses the FPGA+DAC hardware platform to realize the generation method of multiple mode signals, which has good adaptability, scalability and flexibility, and can realize the design of multiple mode signal pulse coding in FPGA. The signal simulator with high instantaneous, wide frequency band, multi-signal mode, multi-directional, high-density dynamic space can effectively improve the stability, high reliability and anti-interference of the signal, and is widely used in battlefields with complex electromagnetic environments to improve the combat performance of the system.
[0025] The above is only a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the form disclosed herein, and should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be modified within the scope of the concept described herein through the above teachings or the technology or knowledge of the relevant field. The changes and modifications made by those skilled in the art shall not deviate from the spirit and scope of the present invention, and shall be within the scope of protection of the claims attached to the present invention.
Claims
1. A method for generating signals based on a multi-mode simulator of FPGA, characterized in that: The following steps are involved: S1. The user sends an analog signal generation instruction to the FPGA through the platform software; S2.FPGA generates I / Q signals and transmits the generated I / Q signals to a digital-to-analog converter to convert them into analog signals; S3. Process the analog signal and output the processed analog signal.
2. The FPGA-based multi-mode simulator signal generation method according to claim 1, characterized in that: The S2 step specifically includes the following sub-steps: S21.FPGA generates I / Q signals; S22. The I / Q signal is transmitted to the phase accumulator for phase linear accumulation to obtain a phase code; S23. Addressing through a waveform lookup table; S24. Obtaining a step wave through a digital-to-analog converter; S25. Form a continuous waveform through a low-pass filter LPF.
3. The FPGA-based multi-mode simulator signal generation method according to claim 2, characterized in that: When the steps S22 and S24 are executed, a reference clock signal needs to be input.
4. The FPGA-based multi-mode simulator signal generation method according to claim 1, characterized in that: It also includes a pulse data coding signal generation step: generating a pulse data coding signal file through platform software, and parsing through FPGA to generate a corresponding pulse data coding signal and output it synchronously with the analog signal.
5. The FPGA-based multi-mode simulator signal generation method according to claim 1, characterized in that: The signal processing in step S3 specifically includes: signal filtering, signal amplification, and signal attenuation.
6. The FPGA-based multi-mode simulator signal generation method according to claim 1, characterized in that: The processed analog signal output in the step S3 specifically includes: conventional radar signals, narrowband radar and ultra-wideband radar signals, friend-or-foe identification signals IFF, linear frequency modulation signals LFM, binary digital keying modulation signals BPSK, pulse amplitude modulation signals, pulse position modulation signals PPM, and MSK signals.
