TSV (Through Silicon Via) after-bonding detection circuit based on positive feedback

Abstract

The invention discloses a TSV (Through Silicon Via) after-bonding detection circuit based on positive feedback. The TSV after-bonding detection circuit comprises a transmission gate switch array, cross coupling pair transistors, a reset module, a test capacitor, a parasitic elimination module, a resistor array and a receiving buffer. The positive feedback characteristic of the cross coupling pair transistors is utilized, the comparison process is accelerated, the detection sensitivity is improved, the time required by the detection process is greatly shortened, and the detection circuit is simple in structure; the hole resistance RTSV and the leakage resistance Rleakage of the TSV to be detected are compared through the resistor array, and effective detection of hole faults and leakage faults is achieved; through switching of the transmission gate switch array, the cross coupling pair transistor can be equivalent to a current source, and effective detection of a bridging fault and an open-circuit fault is realized by using the test capacitor and the receiving buffer.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip detection, and in particular relates to a TSV post-bonding detection circuit based on positive feedback. Background Art

[0002] In recent years, due to the limitations of physical conditions, it is difficult for traditional two-dimensional integrated circuits based on planar technology to improve chip performance through scaling technology, and Moore's Law is gradually becoming invalid. Three-dimensional integrated circuits are considered to be a promising technology route. This technology integrates more circuits in the same area by vertically connecting multiple chips, increasing chip density, improving signal transmission speed, and reducing power consumption. However, the through-silicon vias that connect each chip are prone to defects. Even though three-dimensional integrated circuit manufacturing technology has made great progress, the detection of through-silicon via defects is still an important challenge facing the semiconductor industry. Through-silicon via detection can be divided into two categories: pre-bonding detection and post-bonding detection.

[0003] TSV (Through Silicon Via) technology is a key technology for three-dimensional integrated circuits. This technology integrates more circuits in the same area by vertically connecting multiple chips, increasing chip density, improving signal transmission speed, and reducing power consumption. The TSV process is not yet mature and is prone to various faults and defects in production. TSV testing can be divided into pre-bonding testing and post-bonding testing. Regardless of whether pre-bonding TSV testing is performed, post-bonding TSV testing is essential.

[0004] The existing problems with post-bonding TSV detection mainly focus on the limited types of fault detection, the long detection time, and the complex detection circuit structure. Summary of the invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a TSV post-bonding detection circuit based on positive feedback. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] The present invention provides a TSV post-bonding detection circuit based on positive feedback, comprising:

[0007] Transmission gate switch array, cross-coupled pair, reset module, test capacitor, parasitic elimination module, resistor array, receiving buffer; among them,

[0008] The transmission gate switch array is used to control the switching of the transmission gate switches inside the array so that the TSV post-bonding detection circuit is in a bridge fault detection stage, an open fault detection stage, a void fault detection stage or a leakage fault detection stage in sequence, to perform fault detection on the TSV to be tested, and to determine whether the TSV to be tested has a fault;

[0009] The cross-coupled transistors are used to correspond to the void resistance R of the TSV to be tested in the void fault detection stage or the leakage fault detection stage. TSV Or leakage resistance R leakage and compare with each resistor in the resistor array to obtain the corresponding void fault degree or leakage fault degree; wherein the cross-coupled pair utilizes its own positive feedback characteristics to accelerate the comparison process; in the open circuit fault detection stage or the bridge fault detection stage, it acts as a current source to charge the test capacitor;

[0010] The reset module is used to reset the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage;

[0011] The parasitic elimination module is used to eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array;

[0012] The receiving buffer is used to monitor the voltage on the test capacitor in the open circuit fault detection stage or the bridge fault detection stage to realize the detection of the open circuit fault and the bridge fault.

[0013] In one embodiment of the present invention, a cross-coupled pair of tubes comprises:

[0014] MOS tube MP1 and MOS tube MP2; wherein,

[0015] The source of the MOS transistor MP1 is connected to the power supply voltage VDD, the gate is connected to the drain of the MOS transistor MP2, and the drain is connected to the preset node of the TSV to be tested;

[0016] The source of the MOS transistor MP2 is connected to the source of the MOS transistor MP1 , the gate is connected to the drain of the MOS transistor MP1 , and the drain is connected to a preset node of the resistor array.

[0017] In one embodiment of the present invention, a transmission gate switch array comprises:

[0018] transmission gate switch SWx, transmission gate switch SWy, transmission gate switch SWz, a first combination array and a second combination array; wherein,

[0019] The first end of the transmission gate switch SWx is connected to the second end of the first combination array, and the second end is grounded;

[0020] The first end of the transmission gate switch SWy is connected to the first end of the transmission gate switch SWx, and the second end is connected to the input end of the receiving buffer;

[0021] The first end of the transmission gate switch SWz is connected to the external control signal CTRL, and the second end is connected to the first control end of the reset module;

[0022] The first combination array includes: n transmission gate switches SW1_1-SWn_1 and n transmission gate switches SW1_2-SWn_2; wherein,

[0023] For n transmission gate switches SW1_1-SWn_1, the first ends of the transmission gate switches are connected to each other, as the first end of the first combination array is connected to the preset node of the TSV to be tested, and the second end is connected to the first end of the corresponding TSV to be tested;

[0024] For n transmission gate switches SW1_2-SWn_2, the first end of each transmission gate switch is connected to the second end of the corresponding TSV to be tested, and the second ends are connected to each other to serve as the second end of the first combination array;

[0025] The second combination array includes m transmission gate switches SW1-SWm; wherein,

[0026] For m transmission gate switches SW1-SWm, a first end of each transmission gate switch is connected to a preset node of the resistor array, and a second end is connected to a corresponding resistor in the resistor array;

[0027] Both m and n are positive integers.

[0028] In one embodiment of the present invention, the transmission gate switch array controls the switching of the transmission gate switches inside itself, so that the TSV post-bonding detection circuit is in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage in sequence, including:

[0029] The transmission gate switch array controls the transmission gate switches SWi_1, SW1_2-SWi-1_2, SWi+1_2-SWn_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage;

[0030] The transmission gate switch array controls the transmission gate switches SWi_1, SWi_2 and SWy to be turned on, and connects the i-th TSV to be tested, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage;

[0031] The transmission gate switch array controls the transmission gate switches SWi_1, SWi_2 and SWx to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWj in sequence, respectively connects the resistors R1-Rj in the resistor array, and puts the TSV post-bonding detection circuit in the void fault detection stage;

[0032] The transmission gate switch array controls the transmission gate switch SWi_1 to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWk in sequence, and connects the resistors R1-Rk in the resistor array, so that the detection circuit is in the leakage fault detection stage after TSV bonding; i∈[1,n], j∈[1,m], k∈[1,m], Rj represents the resistor in the resistors R1-Rm that meets the void fault detection condition, and Rk represents the resistor in the resistors R1-Rm that meets the leakage fault detection condition.

[0033] In one embodiment of the present invention, the reset module includes:

[0034] MOS tube MN1 and MOS tube MN2; wherein,

[0035] The source of the MOS transistor MN1 is grounded, the gate is connected to the second end of the transmission gate switch SWz as the first control end of the reset module, and the drain is connected to the preset node of the TSV to be tested;

[0036] The source of the MOS transistor MN2 is grounded, the gate is connected to the first end of the transmission gate switch SWz as the second control end of the reset module, and the drain is connected to a preset node of the resistor array.

[0037] In one embodiment of the present invention, the test capacitor includes a capacitor C2; a first end of the capacitor C2 is connected to the input end of the receiving buffer, and a second end of the capacitor C2 is grounded.

[0038] In one embodiment of the present invention, the parasitic elimination module includes: a capacitor C1 and a capacitor C3; wherein,

[0039] The first end of the capacitor C1 is connected to a preset node of the TSV to be tested, and the second end is grounded;

[0040] A first end of the capacitor C3 is connected to a preset node of the resistor array, and a second end is grounded;

[0041] The capacitance values ​​of the capacitor C1 and the capacitor C3 are equal.

[0042] In one embodiment of the present invention, the resistor array includes: m resistors R1-Rm; wherein the first end of each resistor is respectively connected to the second end of the corresponding transmission gate switch SW1-SWm, and the second end is grounded;

[0043] The resistance values ​​of the m resistors R1 -Rm are set according to a preset resistance step.

[0044] In one embodiment of the present invention, the equivalent electrical model of the TSV to be tested includes:

[0045] Fault-free TSV equivalent electrical model, void fault TSV equivalent electrical model, open fault TSV equivalent electrical model, leakage fault TSV equivalent electrical model, bridge fault TSV equivalent electrical model; among them,

[0046] The fault-free TSV equivalent electrical model includes a capacitor C TSV ;

[0047] The TSV equivalent electrical model of the void fault includes: a grounded capacitor C F , grounded capacitor C B and the void equivalent resistance R TSV ; Capacitor C F and capacitor C B The two capacitors are connected at the normalized position x, and there is a void fault at the normalized position x, x∈[0,1], where x=0 means the void fault occurs at the top of the TSV, x=0.5 means the void fault occurs at the midpoint of the TSV, and x=1 means the void fault occurs at the bottom of the TSV. F The capacitance value is the capacitance C TSV The capacitance C is x times the capacitance value. B The capacitance value is the capacitance C TSV The capacitance value is (1-x) times, and the void equivalent resistance R TSV Located at normalized position x;

[0048] The open circuit fault TSV equivalent electrical model includes: a grounded capacitor C F1 and the grounded capacitor C B1 ; Capacitor C F1 and capacitor C B1 The two capacitors are connected at the normalized position y, and there is an open circuit fault at the normalized position y, y∈[0,1], where y=0 means the open circuit fault occurs at the top of the TSV, y=0.5 means the open circuit fault occurs at the midpoint of the TSV, and y=1 means the open circuit fault occurs at the bottom of the TSV. F1 The capacitance value is y times the capacitance value of capacitor CTSV. B1 The capacitance value is the capacitance C TSV (1-y) times the capacitance value; when an open circuit fault occurs, the capacitor C F1 is the load capacitance, capacitance C B1 Not working;

[0049] The leakage fault TSV equivalent electrical model includes: a grounded resistance R leakage and the grounded capacitor C TSV1 The resistor R leakage and capacitor C TSV1 Parallel connection;

[0050] The bridge fault TSV equivalent electrical model includes: the bridge resistance R between adjacent TSVs BRI and the capacitance C of each adjacent TSV to ground TSV2 , C TSV3 ;

[0051] Among them, the capacitor C TSV1 , C TSV2 and C TSV3 The capacitance values ​​are the same as the capacitance C in the equivalent electrical model of the fault-free TSV. TSV The capacitance values ​​are equal.

[0052] In one embodiment of the present invention, the TSV post-bonding detection circuit performs fault detection on the TSV to be tested in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage to determine whether the TSV to be tested has a fault, including:

[0053] In the bridge fault detection stage, when the output signal of the receiving buffer is at a high level, the TSV to be tested has a bridge fault;

[0054] In the open circuit fault detection stage, when the output signal of the receiving buffer is at a low level, the TSV to be tested has an open circuit fault;

[0055] In the void fault detection stage, the void resistance R of the TSV to be tested is TSV Compared with each resistor in the resistor array, the void resistance R TSV The resistance range is: TSV If the resistance value range is greater than the preset void reference value, then the TSV to be tested has a void fault;

[0056] In the leakage fault detection stage, the leakage resistance R leakage Compare with each resistor in the resistor array to obtain the leakage resistance R leakage Resistance range, if the leakage resistance R leakage If the resistance value range of is less than the preset leakage reference value, the TSV to be tested has a leakage fault.

[0057] Beneficial effects of the present invention:

[0058] In the solution provided by the present invention, the positive feedback characteristics of the cross-coupling pair are utilized to accelerate the comparison process and improve the detection sensitivity, the time required for the detection process is greatly reduced, and the detection circuit structure is simple; the resistor array is used to measure the void resistance R of the TSV to be tested. TSV and leakage resistor R leakageBy comparison, effective detection of void faults and leakage faults can be achieved; by switching the transmission gate switch array, the cross-coupled tube can be equivalent to a current source, and the test capacitor and receiving buffer can be used to effectively detect the bridge fault and open circuit fault. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 A schematic diagram of the structure of a TSV post-bonding detection circuit based on positive feedback provided by an embodiment of the present invention;

[0060] Figure 2 A schematic diagram of the structure of an equivalent electrical model of TSV provided by an embodiment of the present invention;

[0061] Figure 3 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback provided by an embodiment of the present invention in a bridge fault detection stage;

[0062] Figure 4 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback in an open circuit fault detection stage provided by an embodiment of the present invention;

[0063] Figure 5 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback in a void fault detection stage provided by an embodiment of the present invention;

[0064] Figure 6 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback in a leakage fault detection stage provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0065] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0066] In order to effectively detect bridge faults, open circuit faults, void faults and leakage faults, an embodiment of the present invention provides a TSV (Through Silicon Via) post-bonding detection circuit based on positive feedback, such as Figure 1 As shown, this may include:

[0067] Transmission gate switch array, cross-coupled pair, reset module, test capacitor, parasitic elimination module, resistor array, receiving buffer; among them,

[0068] The transmission gate switch array is used to control the switching of the transmission gate switches inside the array so that the TSV post-bonding detection circuit is in a bridge fault detection stage, an open fault detection stage, a void fault detection stage or a leakage fault detection stage in sequence, so as to perform fault detection on the TSV to be tested and determine whether the TSV to be tested has a fault;

[0069] The cross-coupled pair is used to detect the void resistance R of the TSV to be tested during the void fault detection phase or the leakage fault detection phase. TSV Or leakage resistance R leakage The test capacitor is compared with each resistor in the resistor array to obtain the corresponding void fault degree or leakage fault degree; wherein the cross-coupled pair utilizes its own positive feedback characteristics to accelerate the comparison process; in the open circuit fault detection stage or the bridge fault detection stage, it acts as a current source to charge the test capacitor;

[0070] The reset module is used to reset the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage;

[0071] The parasitic elimination module is used to eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array;

[0072] The receiving buffer is used to monitor the voltage on the test capacitor in the open circuit fault detection stage or the bridge fault detection stage to detect the open circuit fault and the bridge fault.

[0073] The embodiment of the present invention utilizes the positive feedback characteristics of the cross-coupling pair to accelerate the comparison process and improve the detection sensitivity. The time required for the detection process is greatly reduced, and the detection circuit structure is simple. The resistor array is used to measure the void resistance R of the TSV to be tested. TSV and leakage resistor R leakage By comparison, effective detection of void faults and leakage faults can be achieved; by switching the transmission gate switch array, the cross-coupled tube can be equivalent to a current source, and the test capacitor and receiving buffer can be used to effectively detect the bridge fault and open circuit fault.

[0074] Specifically, the equivalent electrical model of the TSV to be tested may include:

[0075] Fault-free TSV equivalent electrical model, void fault TSV equivalent electrical model, open fault TSV equivalent electrical model, leakage fault TSV equivalent electrical model, bridge fault TSV equivalent electrical model; such as Figure 2 As shown in (a) to (e),

[0076] For the equivalent electrical model of a fault-free TSV, see Figure 2(a) in the figure can include a grounded capacitor C TSV ;

[0077] For the equivalent electrical model of void fault TSV, please refer to Figure 2 (b) in the figure may include: a grounded capacitor C F , grounded capacitor C B and the void equivalent resistance R TSV ; Capacitor C F and capacitor C B The two capacitors are connected at the normalized position x, and there is a void fault at the normalized position x, x∈[0,1], where x=0 means the void fault occurs at the top of the TSV, x=0.5 means the void fault occurs at the midpoint of the TSV, and x=1 means the void fault occurs at the bottom of the TSV. F The capacitance value is the capacitance C TSV The capacitance C is x times the capacitance value. B The capacitance value is the capacitance C TSV The capacitance value is (1-x) times, and the void equivalent resistance R TSV Located at normalized position x;

[0078] For the equivalent electrical model of TSV open circuit failure, see Figure 2 (c) in the figure may include: a grounded capacitor C F1 and the grounded capacitor C B1 ; Capacitor C F1 and capacitor C B1 The two capacitors are connected at the normalized position y, and there is an open circuit fault at the normalized position y, y∈[0,1], where y=0 means the open circuit fault occurs at the top of the TSV, y=0.5 means the open circuit fault occurs at the midpoint of the TSV, and y=1 means the open circuit fault occurs at the bottom of the TSV. F1 The capacitance value is y times the capacitance value of capacitor CTSV. B1 The capacitance value is the capacitance C TSV (1-y) times the capacitance value; when an open circuit fault occurs, the capacitor C F1 is the load capacitance, capacitance C B1 Not working;

[0079] For the equivalent electrical model of leakage fault TSV, see Figure 2 (d) in the figure may include: grounding resistance R leakage and the grounded capacitor C TSV1 ; Resistance R leakage and capacitor C TSV1 Parallel connection;

[0080] For the equivalent electrical model of TSV with bridge fault, see Figure 2(e) may include: a bridge resistor R between adjacent TSVs BR1 and the capacitance C of each adjacent TSV to ground TSV2 , C TSV3 ;

[0081] Among them, the capacitor C TSV1 , C TSV2 and C TSV3 The capacitance values ​​are the same as the capacitance C in the equivalent electrical model of the fault-free TSV. TSV The capacitance values ​​are equal.

[0082] As can be understood, for the fault-free TSV equivalent circuit, since the TSV equivalent resistance is very small, the fault-free TSV is modeled as a single capacitor, see Figure 2 As shown in (a) of FIG. 1 ; for the equivalent electrical model of void fault TSV, see Figure 2 As shown in (b), there is a void fault at the normalized position x, and the void fault equivalent resistance R TSV Divide the TVS equivalent capacitance into two parts, and make the top capacitor C F The capacitance value is defined as x times the capacitance C TSV The capacitance value of the bottom capacitor C B The capacitance value is defined as (1-x) times the capacitance C TSV The capacitance value of the TSV can be obtained by normalizing the position x to clearly obtain the location where the void fault occurs, where x = 0 means that the void fault occurs at the top of the TSV, x = 0.5 means that the void fault occurs at the midpoint of the TSV, and x = 1 means that the void fault occurs at the bottom of the TSV. For the open fault TSV equivalent electrical model, an open fault occurs when the open fault completely cuts off the TSV path. Figure 2 (c) shows an open fault at the normalized position y. The open fault splits the TSV equivalent capacitance into two parts, with the top capacitance C F1 The capacitance value is defined as y times the capacitance C TSV The capacitance value of the bottom capacitor C B1 The capacitance value is defined as (1-y) times the capacitance C TSV By normalizing the position y, the position where the open circuit fault occurs can be clearly obtained, where y = 0 means that the open circuit fault occurs at the top of the TSV, y = 0.5 means that the open circuit fault occurs at the midpoint of the TSV, and y = 1 means that the open circuit fault occurs at the bottom of the TSV. When an open circuit fault occurs, the capacitance C B1 Isolated by an open fault, only capacitor C F1 Can work as a load; Figure 2 (d) shows a leakage fault caused by a pinhole or crack. The characteristic of a leakage fault is that there is a leakage path between the TSV and the substrate. The leakage resistance can be expressed by the resistor Rleakage It means that the size of the leakage resistance depends only on the entire leakage area and has nothing to do with the location where the leakage fault occurs. The larger the leakage area, the more serious the leakage fault, and the smaller the leakage resistance; Figure 2 (e) shows a fault caused by a wrong connection between adjacent TSVs. The bridge resistor can be R BRI express.

[0083] For ease of understanding, various modules of the TSV post-bonding detection circuit based on positive feedback proposed in the embodiment of the present invention are introduced in detail below.

[0084] Cross-coupled pairs

[0085] Cross-coupled pairs, such as Figure 1 As shown, this may include:

[0086] MOS tube MP1 and MOS tube MP2; wherein,

[0087] The source of the MOS tube MP1 is connected to the power supply voltage VDD, the gate is connected to the drain of the MOS tube MP2, and the drain is connected to the preset node of the TSV to be tested;

[0088] The source of the MOS transistor MP2 is connected to the source of the MOS transistor MP1 , the gate is connected to the drain of the MOS transistor MP1 , and the drain is connected to a preset node of the resistor array.

[0089] Specifically, the cross-coupled pair will measure the void resistance R of the TSV to be tested during the void fault detection phase. TSV and each resistor in the resistor array to obtain the corresponding void fault degree; in the leakage fault detection stage, the leakage resistance R leakage The cross-coupled pair of tubes utilizes its own positive feedback characteristics to accelerate the comparison process; in the open circuit fault detection stage or the bridge fault detection stage, it acts as a current source to charge the test capacitor.

[0090] Transmission Gate Switch Array

[0091] Transmission gate switch arrays, such as Figure 1 As shown, this may include:

[0092] transmission gate switch SWx, transmission gate switch SWy, transmission gate switch SWz, a first combination array and a second combination array; wherein,

[0093] A first end of the transmission gate switch SWx is connected to a second end of the first combination array, and a second end is grounded;

[0094] A first end of the transmission gate switch SWy is connected to a first end of the transmission gate switch SWx, and a second end is connected to an input end of the receiving buffer;

[0095] A first end of the transmission gate switch SWz is connected to the external control signal CTRL, and a second end is connected to the first control end of the reset module;

[0096] The first combination array includes: n transmission gate switches SW1_1-SWn_1 and n transmission gate switches SW1_2-SWn_2; wherein,

[0097] For n transmission gate switches SW1_1-SWn_1, the first ends of the transmission gate switches are connected to each other, as the first end of the first combination array is connected to the preset node of the TSV to be tested, and the second end is connected to the first end of the corresponding TSV to be tested;

[0098] For n transmission gate switches SW1_2-SWn_2, the first end of each transmission gate switch is connected to the second end of the corresponding TSV to be tested, and the second ends are connected to each other to serve as the second end of the first combination array;

[0099] The second combination array includes m transmission gate switches SW1-SWm; wherein,

[0100] For m transmission gate switches SW1-SWm, a first end of each transmission gate switch is connected to a preset node of the resistor array, and a second end is connected to a corresponding resistor in the resistor array;

[0101] Both m and n are positive integers.

[0102] The transmission gate switch array controls the switching of the transmission gate switches inside itself, so that the TSV post-bonding detection circuit is in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage in sequence, which may include:

[0103] The transmission gate switch array controls the transmission gate switches SWi_1, SW1_2-SWi-1_2, SWi+1_2-SWn_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage; it can be understood that SWi_1 represents the i-th switch SWi_1 among the n transmission gate switches SW1_1-SWn_1, SW1_2-SWi-1_2 represents the n transmission gate switches SW1_2-SWi-1_2, and SWi+1_2-SWn_2 represents the n transmission gate switches SWi+1_2-SWn_2;

[0104] The transmission gate switch array connects the i-th TSV to be tested by controlling the transmission gate switches SWi_1, SWi_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage; SWi_2 represents the i-th switch SWi_2 among the n transmission gate switches SW1_2-SWn_2;

[0105] The transmission gate switch array controls the transmission gate switches SWi_1, SWi_2 and SWx to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWj in sequence, respectively, and connects the resistors R1-Rj in the resistor array respectively, so that the TSV post-bonding detection circuit is in the void fault detection stage; SWj represents the j-th switch SWj among the n transmission gate switches SW1-SWn;

[0106] The transmission gate switch array controls the transmission gate switch SWi_1 to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWk in turn, connects the resistors R1-Rk in the resistor array, and puts the TSV bonding detection circuit in the leakage fault detection stage; i∈[1,n], j∈[1,m], k∈[1,m], Rj represents the resistors in the resistors R1-Rm that meet the void fault detection conditions, and Rk represents the resistors in the resistors R1-Rm that meet the leakage fault detection conditions. It can be understood that the resistor that meets the void fault detection conditions is the voltage V of the preset node of the resistor array in the void fault detection stage. R The corresponding resistance when it becomes a high level during the comparison process; the resistance that meets the leakage fault detection condition is the voltage V of the preset node of the resistor array during the leakage fault detection stage. R The corresponding resistance when it goes high during the comparison process.

[0107] In order to facilitate the understanding of the detection process, the detection process of the TSV post-bonding detection circuit is explained by taking the fifth TSV to be tested as an example; when the fifth TSV to be tested is tested, that is, when i=5, the transmission gate switch array controls the transmission gate switches SW5_1, SW1_2-SW4_2, SW6_2-SWn_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage, and the bridge fault is detected; the transmission gate switch array controls the transmission gate switches SW5_1, SW5_2 and SWy to be turned on, and the fifth TSV to be tested is connected, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage, and the open circuit fault is detected. Detection; the transmission gate switch array controls the transmission gate switches SW5_1, SW5_2 and SWx to be turned on, connects the fifth TSV to be tested, turns on the transmission gate switches SW1-SWj in turn, connects the resistors R1-Rj in the resistor array, so that the TSV post-bonding detection circuit is in the void fault detection stage, and the void fault is detected; the transmission gate switch array controls the transmission gate switch SW5_1 to be turned on, connects the fifth TSV to be tested, turns on the transmission gate switches SW1-SWk in turn, connects the resistors R1-Rk in the resistor array, so that the TSV post-bonding detection circuit is in the leakage fault detection stage, and the leakage fault is detected.

[0108] Reset module

[0109] Reset module, such as Figure 1 As shown, this may include:

[0110] MOS tube MN1 and MOS tube MN2; wherein,

[0111] The source of the MOS tube MN1 is grounded, the gate is connected to the second end of the transmission gate switch SWz as the first control end of the reset module, and the drain is connected to the preset node of the TSV to be tested;

[0112] The source of the MOS transistor MN2 is grounded, the gate is connected to the first end of the transmission gate switch SWz as the second control end of the reset module, and the drain is connected to a preset node of the resistor array.

[0113] The reset module resets the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection stage, the open fault detection stage, the void fault detection stage or the leakage fault detection stage.

[0114] Test capacitor

[0115] The test capacitor may include a capacitor C2; a first end of the capacitor C2 is connected to the input end of the receiving buffer, and a second end of the capacitor C2 is grounded.

[0116] Eliminate parasitic modules such as Figure 1 As shown, it may include: capacitor C1 and capacitor C3; wherein,

[0117] A first end of the capacitor C1 is connected to a preset node of the TSV to be tested, and a second end is grounded;

[0118] A first end of the capacitor C3 is connected to a preset node of the resistor array, and a second end thereof is grounded;

[0119] The capacitance values ​​of capacitor C1 and capacitor C3 are equal.

[0120] The parasitic elimination module can largely eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array.

[0121] Resistor Array

[0122] Resistor arrays, such as Figure 1 As shown, it may include: m resistors R1-Rm; wherein the first end of each resistor is respectively connected to the second end of the corresponding transmission gate switch SW1-SWm, and the second end is grounded;

[0123] The resistance values ​​of the m resistors R1 -Rm are set according to a preset resistance step.

[0124] The resistor array can be used to compare the resistance values ​​of the TSV to be tested; the preset resistance step size can be specifically designed according to the needs of the user and is not limited here.

[0125] Receive Buffer

[0126] The input end of the receiving buffer is connected to the first end of the test capacitor, and the output end outputs a signal A.

[0127] The receiving buffer monitors the voltage on the test capacitor in the open circuit fault detection stage or the bridge fault detection stage to detect the open circuit fault and the bridge fault.

[0128] The TSV post-bonding detection circuit performs fault detection on the TSV to be tested in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage to determine whether the TSV to be tested has a fault, including:

[0129] In the bridge fault detection phase, when the output signal of the receiving buffer is at a high level, the TSV to be tested has a bridge fault;

[0130] In the open circuit fault detection stage, when the output signal of the receiving buffer is at a low level, the TSV to be tested has an open circuit fault;

[0131] In the void fault detection stage, the void resistance R TSV Compare with each resistor in the resistor array to get the void resistance R TSV The resistance range is: TSV If the resistance value range is greater than the preset void reference value, then the TSV to be tested has a void fault;

[0132] In the leakage fault detection stage, the leakage resistance R leakage Compare with each resistor in the resistor array to get the leakage resistance R leakage Resistance range, if the leakage resistance R leakage If the resistance value range of the tested TSV is smaller than the preset leakage reference value, a leakage fault exists in the tested TSV.

[0133] For the bridge fault detection stage, the path diagram of the detection circuit in the bridge fault detection stage can be found in Figure 3, SWi_1 in the transmission gate switch array connects the i-th TSV to be tested to the detection circuit; SW1_2 to SWi-1_2, SWi+1_2 to SWn_2, SWy are turned on, and the second ends of all TSVs to be tested except the i-th TSV to be tested are connected to the test capacitor C2. SWz is turned on, so that the external control signal CTRL can control the reset MOS transistor MN1. When the external control signal CTRL is at a high level, the reset MOS transistors MN1 and MN2 are turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R After being pulled down to 0, SWz is disconnected. At this time, MP1 acts as a current source to charge the test capacitor C2. If the voltage on the test capacitor C2 cannot be increased and the receiving buffer output signal A cannot become a high level, there is no bridging fault; if the receiving buffer output signal A becomes a high level, there is a bridging fault.

[0134] It can be understood that for the open circuit fault detection stage, the path diagram of the detection circuit in the open circuit fault detection stage can be found in Figure 4 , SWi_1 and SWi_2 in the transmission gate switch array are turned on, connecting the i-th TSV to be tested to the detection circuit; SWy is turned on, connecting the second end of the i-th TSV to be tested to the test capacitor C2. SWz is turned on, so that the external control signal CTRL can control the reset MOS transistor MN1. When the external control signal CTRL is at a high level, the reset MOS transistors MN1 and MN2 are turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R After being pulled down to 0, SWz is disconnected. At this time, MP1 acts as a current source to charge the test capacitor C2. If the voltage on the test capacitor C2 cannot be increased and the receiving buffer output signal A cannot become a high level, an open circuit fault exists; if the receiving buffer output signal A becomes a high level, there is no open circuit fault.

[0135] For the void fault detection stage, the path diagram of the detection circuit in the void fault detection stage can be found in Figure 5 , SWi_1 and SWi_2 in the transmission gate switch array are turned on, connecting the i-th TSV to be tested to the detection circuit; SWx is turned on, connecting the second end of the i-th TSV to be tested to the ground; SWz is turned on, so that the external control signal CTRL can control the reset MOS transistor MN1. When the external control signal CTRL is at a high level, the reset MOS transistors MN1 and MN2 reset the voltage V TSV and the voltage V at the preset node of the resistor array R Pull down to 0, the external control signal CTRL becomes low level. If R TSVGreater than R in the resistor array 1 Due to the positive feedback process of the cross-coupling to the tube itself, the voltage V TSV The voltage V at the preset node of the resistor array rises to near VDD. R Keep the potential close to 0; at this time, the reset MOS tube is turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R Pull down to 0 and enter R TSV The next resistor R 2 The comparison process continues until the voltage V at the preset node of the resistor array reaches R During the comparison process, it becomes high level, and R TSV The resistance value range, R TSV The larger the resistance value range, the more serious the voiding failure.

[0136] For the leakage fault detection stage, the path diagram of the detection circuit in the leakage fault detection stage can be found in Figure 6 , SWi_1 in the transmission gate switch array is turned on, connecting the i-th TSV to be tested to the detection circuit; SWz is turned on, so that the external control signal CTRL can control the reset MOS transistor MN1. When the external control signal CTRL is at a high level, the reset MOS transistors MN1 and MN2 will reset the voltage V TSV and the voltage V at the preset node of the resistor array R After being pulled down to 0, the external control signal CTRL becomes low level. leakage Greater than R in the resistor array 1 Due to the positive feedback process of the cross-coupling to the tube itself, the voltage V TSV The voltage V at the preset node of the resistor array rises to near VDD. R Keep the potential close to 0; at this time, the reset MOS tube is turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R Pull down to 0 and enter R leakage The next resistor R 2 The comparison process continues until the voltage V at the preset node of the resistor array reaches R During the comparison process, it becomes high level, and R leakage The resistance value range, R leakage The smaller the resistance value range, the more serious the leakage fault. The specific values ​​of the preset void reference value and the preset leakage reference value can be set by the user according to their own requirements and are not limited here.

[0137] The embodiment of the present invention utilizes the positive feedback characteristics of the cross-coupling pair to accelerate the comparison process and improve the detection sensitivity. The time required for the detection process is greatly reduced, and the detection circuit structure is simple. The resistor array is used to measure the void resistance R of the TSV to be tested. TSV and leakage resistor R leakage By comparison, effective detection of void faults and leakage faults can be achieved; by switching the transmission gate switch array, the cross-coupled tube can be equivalent to a current source, and the test capacitor and receiving buffer can be used to effectively detect the bridge fault and open circuit fault.

[0138] It should be noted that in the description of the present invention, it should be understood that the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0139] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A TSV post-bonding detection circuit based on positive feedback, characterized in that: include: Transmission gate switch array, cross-coupled pair, reset module, test capacitor, parasitic elimination module, resistor array, receiving buffer; among them, The transmission gate switch array is used to control the switching of the transmission gate switches inside the array so that the TSV post-bonding detection circuit is in a bridge fault detection stage, an open fault detection stage, a void fault detection stage or a leakage fault detection stage in sequence, to perform fault detection on the TSV to be tested, and to determine whether the TSV to be tested has a fault; The cross-coupled transistors are used to correspond to the void resistance R of the TSV to be tested in the void fault detection stage or the leakage fault detection stage. TSV Or leakage resistance R leakage and compare with each resistor in the resistor array to obtain the corresponding void fault degree or leakage fault degree; wherein the cross-coupled pair utilizes its own positive feedback characteristics to accelerate the comparison process; in the open circuit fault detection stage or the bridge fault detection stage, it acts as a current source to charge the test capacitor; The reset module is used to reset the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage; The parasitic elimination module is used to eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array; The receiving buffer is used to monitor the voltage on the test capacitor in the open circuit fault detection stage or the bridge fault detection stage to realize the detection of the open circuit fault and the bridge fault.

2. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The cross-coupled pair of tubes comprises: MOS tube MP1 and MOS tube MP2; wherein, The source of the MOS transistor MP1 is connected to the power supply voltage VDD, the gate is connected to the drain of the MOS transistor MP2, and the drain is connected to the preset node of the TSV to be tested; The source of the MOS transistor MP2 is connected to the source of the MOS transistor MP1 , the gate is connected to the drain of the MOS transistor MP1 , and the drain is connected to a preset node of the resistor array.

3. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The transmission gate switch array comprises: transmission gate switch SWx, transmission gate switch SWy, transmission gate switch SWz, a first combination array and a second combination array; wherein, The first end of the transmission gate switch SWx is connected to the second end of the first combination array, and the second end is grounded; The first end of the transmission gate switch SWy is connected to the first end of the transmission gate switch SWx, and the second end is connected to the input end of the receiving buffer; The first end of the transmission gate switch SWz is connected to the external control signal CTRL, and the second end is connected to the first control end of the reset module; The first combination array includes: n transmission gate switches SW1_1-SWn_1 and n transmission gate switches SW1_2-SWn_2; wherein, For n transmission gate switches SW1_1-SWn_1, the first ends of the transmission gate switches are connected to each other, as the first end of the first combination array is connected to the preset node of the TSV to be tested, and the second end is connected to the first end of the corresponding TSV to be tested; For n transmission gate switches SW1_2-SWn_2, the first end of each transmission gate switch is connected to the second end of the corresponding TSV to be tested, and the second ends are connected to each other to serve as the second end of the first combination array; The second combination array includes m transmission gate switches SW1-SWm; wherein, For m transmission gate switches SW1-SWm, a first end of each transmission gate switch is connected to a preset node of the resistor array, and a second end is connected to a corresponding resistor in the resistor array; Both m and n are positive integers.

4. The TSV post-bonding detection circuit based on positive feedback according to claim 3, characterized in that: The transmission gate switch array controls the switching of the transmission gate switches inside itself, so that the TSV post-bonding detection circuit is in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage in sequence, including: The transmission gate switch array controls the transmission gate switches SWi_1, SW1_2-SWi-1_2, SWi+1_2-SWn_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage; The transmission gate switch array controls the transmission gate switches SWi_1, SWi_2 and SWy to be turned on, and connects the i-th TSV to be tested, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage; The transmission gate switch array controls the transmission gate switches SWi_1, SWi_2 and SWx to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWj in sequence, respectively connects the resistors R1-Rj in the resistor array, and puts the TSV post-bonding detection circuit in the void fault detection stage; The transmission gate switch array controls the transmission gate switch SWi_1 to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWk in sequence, and connects the resistors R1-Rk in the resistor array, so that the detection circuit is in the leakage fault detection stage after TSV bonding; i∈[1,n], j∈[1,m], k∈[1,m], Rj represents the resistor in the resistors R1-Rm that meets the void fault detection condition, and Rk represents the resistor in the resistors R1-Rm that meets the leakage fault detection condition.

5. The TSV post-bonding detection circuit based on positive feedback according to claim 3, characterized in that: The reset module comprises: MOS tube MN1 and MOS tube MN2; wherein, The source of the MOS transistor MN1 is grounded, the gate is connected to the second end of the transmission gate switch SWz as the first control end of the reset module, and the drain is connected to the preset node of the TSV to be tested; The source of the MOS transistor MN2 is grounded, the gate is connected to the first end of the transmission gate switch SWz as the second control end of the reset module, and the drain is connected to a preset node of the resistor array.

6. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The test capacitor includes a capacitor C2; a first end of the capacitor C2 is connected to the input end of the receiving buffer, and a second end of the capacitor C2 is grounded.

7. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The parasitic elimination module includes: capacitor C1 and capacitor C3; wherein, The first end of the capacitor C1 is connected to a preset node of the TSV to be tested, and the second end is grounded; A first end of the capacitor C3 is connected to a preset node of the resistor array, and a second end is grounded; The capacitance values ​​of the capacitor C1 and the capacitor C3 are equal.

8. The TSV post-bonding detection circuit based on positive feedback according to claim 3, characterized in that: The resistor array includes: m resistors R1-Rm; wherein the first end of each resistor is respectively connected to the second end of the corresponding transmission gate switch SW1-SWm, and the second end is grounded; The resistance values ​​of the m resistors R1 -Rm are set according to a preset resistance step.

9. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The equivalent electrical model of the TSV to be tested includes: Fault-free TSV equivalent electrical model, void fault TSV equivalent electrical model, open fault TSV equivalent electrical model, leakage fault TSV equivalent electrical model, bridge fault TSV equivalent electrical model; among them, The fault-free TSV equivalent electrical model includes a capacitor C TSV ; The TSV equivalent electrical model of the void fault includes: a grounded capacitor C F , grounded capacitor C B and the void equivalent resistance R TSV ; Capacitor C F and capacitor C B The two capacitors are connected at the normalized position x, and there is a void fault at the normalized position x, x∈[0,1], where x=0 means the void fault occurs at the top of the TSV, x=0.5 means the void fault occurs at the midpoint of the TSV, and x=1 means the void fault occurs at the bottom of the TSV. F The capacitance value is the capacitance C TSV The capacitance C is x times the capacitance value. B The capacitance value is the capacitance C TSV The capacitance value is (1-x) times, and the void equivalent resistance R TSV Located at normalized position x; The open circuit fault TSV equivalent electrical model includes: a grounded capacitor C F1 and the grounded capacitor C B1 ; Capacitor C F1 and capacitor C B1 The two capacitors are connected at the normalized position y, and there is an open circuit fault at the normalized position y, y∈[0,1], where y=0 means the open circuit fault occurs at the top of the TSV, y=0.5 means the open circuit fault occurs at the midpoint of the TSV, and y=1 means the open circuit fault occurs at the bottom of the TSV. F1 The capacitance value is y times the capacitance value of capacitor CTSV. B1 The capacitance value is the capacitance C TSV (1-y) times the capacitance value; when an open circuit fault occurs, the capacitor C F1 is the load capacitance, capacitance C B1 Not working; The leakage fault TSV equivalent electrical model includes: a grounded resistance R leakage and the grounded capacitor C TSV1 The resistor R leakage and capacitor C TSV1 Parallel connection; The bridge fault TSV equivalent electrical model includes: the bridge resistance R between adjacent TSVs BRI and the capacitance C of each adjacent TSV to ground TSV2 , C TSV3 ; Among them, the capacitor C TSV1 , C TSV2 and C TSV3 The capacitance values ​​are the same as the capacitance C in the equivalent electrical model of the fault-free TSV. TSV The capacitance values ​​are equal.

10. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The TSV post-bonding detection circuit performs fault detection on the TSV to be tested in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage to determine whether the TSV to be tested has a fault, including: In the bridge fault detection stage, when the output signal of the receiving buffer is at a high level, the TSV to be tested has a bridge fault; In the open circuit fault detection stage, when the output signal of the receiving buffer is at a low level, the TSV to be tested has an open circuit fault; In the void fault detection stage, the void resistance R TSV Compared with each resistor in the resistor array, the void resistance R TSV The resistance range is: TSV If the resistance value range is greater than the preset void reference value, then the TSV to be tested has a void fault; In the leakage fault detection stage, the leakage resistance R leakage Compare with each resistor in the resistor array to obtain the leakage resistance R leakage Resistance range, if the leakage resistance R leakage If the resistance value range of is less than the preset leakage reference value, the TSV to be tested has a leakage fault.

Images