Manufacturing method of avalanche high-voltage silicon stack

Abstract

The invention relates to the technical field of semiconductor devices, in particular to a manufacturing method of an avalanche high-voltage silicon stack, and the method comprises the steps: randomly obtaining a diode distribution vector and a doping concentration vector according to the range of the working voltage of the avalanche high-voltage silicon stack and the number of sub-modules; simulating avalanche high-voltage silicon stacks by the aid of simulation software to obtain simulation qualified vectors, silicon stack power and voltage distribution vectors; calculating a simulation qualified rate; obtaining a voltage adaptation degree of each voltage distribution vector; obtaining a high voltage weight, and carrying out weighted summation on the voltage adaptation degree to obtain a high voltage tolerance degree; and obtaining a voltage-sharing effect evaluation value, and obtaining a final manufacturing scheme of the avalanche high-voltage silicon stack by adopting an optimization algorithm. The invention aims to balance the divided voltage between the diodes in the silicon stack, improve the voltage distribution uniformity, improve the tolerance to high voltage, and reduce the Zener breakdown risk.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a method for manufacturing an avalanche high-voltage silicon stack. Background Art

[0002] High-voltage silicon stack is a silicon high-frequency high-voltage rectifier diode, which is widely used in various types of irradiation accelerator equipment and vacuum microwave devices such as traveling wave tubes and klystrons to provide the required 10kV to 5MV DC high voltage. The interior of the high-voltage silicon stack is composed of several silicon high-frequency diodes connected in series, and the outside is packaged with high-frequency ceramics. Therefore, the high-voltage silicon stack has the advantages of small size, light weight, high mechanical strength, and easy use. Among them, the series-connected silicon high-frequency rectifier diodes can rectify high-voltage current and output DC high voltage electricity.

[0003] High-voltage silicon stacks are affected by changes in temperature and humidity. When used in accelerators, klystrons, and traveling wave tubes, high-voltage sparking often occurs. The resulting instantaneous high voltage causes damage to multi-stage voltage-multiplier high-voltage silicon stack devices. The main reason is that the internal diode chip does not have avalanche characteristics, causing irreversible damage when the diode is broken down. In response to this, technicians replaced the silicon high-frequency diodes in the high-voltage silicon stack with avalanche-type silicon high-voltage diodes. The avalanche breakdown characteristics of avalanche-type silicon high-voltage diodes will play a protective role in the circuit, reducing the risk of Zener breakdown of the diodes in the silicon stack, and fundamentally improving the reliability of high-voltage electrical equipment during operation.

[0004] However, when the voltage level is high, due to the influence of factors such as the capacitance to the ground and the capacitance to the high-voltage end, the voltage drop at the end of the high-voltage silicon stack is usually higher than that in the middle, which in turn causes uneven distribution of the diode voltage inside the avalanche high-voltage silicon stack and the risk of diode breakdown. Summary of the invention

[0005] In view of the above, it is necessary to provide a method for manufacturing an avalanche high-voltage silicon stack to solve the above problems.

[0006] An embodiment of the present application provides a method for manufacturing an avalanche high-voltage silicon stack, the method comprising: According to the range of the working voltage of the avalanche high-voltage silicon stack and the number of submodules, a diode distribution vector and a doping concentration vector are randomly obtained; The randomly obtained diode distribution vector and doping concentration vector are used to perform avalanche high-voltage silicon stack simulation at a preset number of voltage points using simulation software to obtain simulation qualified vectors, a preset number of silicon stack powers, and a preset number of voltage distribution vectors; according to the element values ​​in the simulation qualified vector, the voltage distribution vectors of the voltage points that work normally are selected, and the simulation qualified rate is calculated; The voltage adaptability of each voltage distribution vector is obtained according to the distribution of the maximum element value in all elements in each screened voltage distribution vector; the silicon stack power between each screened voltage point and all screened voltage points is compared to obtain the high voltage weight of each voltage point, and the voltage adaptability is weighted and summed to obtain the high voltage tolerance; Based on the simulation qualification rate and the high voltage tolerance, a voltage equalization effect evaluation value is obtained, and an optimization algorithm is used to obtain a final avalanche high-voltage silicon stack manufacturing solution.

[0007] The length of the diode distribution vector is determined by the number of submodules included in the avalanche high-voltage silicon stack; and the elements in the diode distribution vector are determined by the number of avalanche diodes in each submodule.

[0008] The two elements in the doping concentration vector are respectively determined by the minimum value and the maximum value of the working voltage of the avalanche high-voltage silicon stack.

[0009] The voltage distribution vector of the voltage point that can normally work is selected, specifically: For the simulation qualified vector, if the element value is the first preset value, it means that the corresponding voltage point can work normally.

[0010] The simulation pass rate is specifically the ratio of the number of elements in the simulation pass vector whose element value is the first preset value.

[0011] The voltage adaptability of each voltage distribution vector is specifically a negative correlation mapping result of the Z score of the maximum element value of each voltage distribution vector.

[0012] The process of obtaining the high voltage weight of each voltage point is as follows: The accumulated sum of the silicon stack power of all the screened voltage points is calculated; and the ratio of the silicon stack power of each screened voltage point to the accumulated sum is used as the high voltage weight of each voltage point.

[0013] The pressure equalization effect evaluation value is specifically: The high voltage tolerance is recorded as a, and the simulation pass rate is recorded as b; when , the specific formula of the pressure equalization effect evaluation value is: ;in, Indicates that the parameter is preset to be greater than zero; when , and a is used as the pressure equalization effect evaluation value.

[0014] Among them, the final manufacturing plan of the avalanche high-voltage silicon stack is specifically a manufacturing plan vector with the highest voltage equalization effect evaluation value after iterating the optimization algorithm; the manufacturing plan vector is composed of a diode distribution vector and a doping concentration vector.

[0015] Among them, if the highest pressure equalization effect evaluation value obtained after iterating the optimization algorithm is a negative number, all manufacturing solution vectors are judged to be unqualified.

[0016] This application has at least the following beneficial effects: In view of the risk of diode Zener breakdown caused by uneven voltage distribution of the silicon stack during the manufacturing process of the avalanche high-voltage silicon stack, the present application proposes a manufacturing method for the avalanche high-voltage silicon stack, including: firstly, obtaining the range of the working voltage and the number of sub-modules for manufacturing the avalanche high-voltage silicon stack, and using them as limiting conditions to construct a diode distribution vector and a doping concentration vector as a digital template for the manufacturing scheme; further using simulation software to perform simulation calculations on the avalanche high-voltage silicon stack model to obtain simulation qualified vectors, silicon stack power, and voltage distribution vectors, such as silicon stack simulation data; and selecting the maximum element value in each voltage distribution vector according to the distribution of all elements. The voltage distribution situation is obtained, and the voltage adaptability of each voltage distribution vector is obtained, which is helpful to obtain the data of the silicon stack when it is working normally in the silicon stack simulation data. The voltage adaptability of each manufacturing scheme is calculated according to the voltage data, and the degree of uneven voltage distribution of the avalanche high-voltage silicon stack model under different voltages is estimated; at the same time, the simulation qualification rate is calculated to characterize the completion of the model for the target manufacturing parameters; the silicon stack power during the silicon stack simulation is obtained, and the temperature change of the silicon stack is characterized by the power data, and the high voltage weight is calculated. A higher weight is given to the simulation data under high power conditions to avoid the negative temperature coefficient characteristics of the silicon stack from interfering with the high voltage resistance evaluation of the silicon stack. Finally, the voltage equalization effect evaluation value is calculated by combining the voltage adaptability, the simulation qualification rate, and the high voltage weight. The voltage equalization effect evaluation value is used as the adaptability, and the optimization algorithm is used for iteration to obtain the best manufacturing scheme vector, and the structural parameters of the manufacturing scheme vector are used to control the manufacturing of the avalanche high-voltage silicon stack; its beneficial effect is to select the silicon stack manufacturing scheme that is suitable for the target parameters and has a low risk of Zener breakdown under high voltage conditions through iteration among a variety of silicon stack manufacturing schemes. Compared with traditional high-voltage silicon stacks, the avalanche high-voltage silicon stack manufacturing method described in this embodiment uses avalanche diodes to replace ordinary high-voltage sorting diodes, thereby improving the tolerance of a single diode to high voltage; at the same time, an optimization algorithm is used to adjust the number of parallel diodes in the sub-module, thereby balancing the voltage division between the diodes inside the silicon stack, improving the uniformity of voltage distribution, and then improving the tolerance of the silicon stack to high voltage and reducing the risk of Zener breakdown. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A flow chart of a method for manufacturing an avalanche high-voltage silicon stack provided in the present application; Figure 2 A flowchart for obtaining the pressure equalization effect evaluation value provided in this application; Figure 3 Flowchart of the genetic algorithm provided for this application. DETAILED DESCRIPTION

[0018] In the description of the embodiments of the present application, words such as "exemplary", "or", "for example" and the like are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary", "or", "for example" and the like is intended to present related concepts in a concrete manner.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art in the present application. The terms used in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0020] It should also be noted that the terms "first" and "second" in this application and its drawings are used to distinguish similar objects, rather than to describe a specific order or sequence. The method disclosed in the embodiments of the present application or the method shown in the flow chart includes one or more steps for implementing the method. Without departing from the scope of protection of this application, the execution order of multiple steps can be interchanged with each other, and some steps can also be deleted.

[0021] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0022] This application proposes a method for manufacturing an avalanche high-voltage silicon stack, which is applied to the technical field of semiconductor devices. Figure 1 , the method comprises the following steps: S1: According to the operating voltage range and the number of sub-modules of the avalanche high-voltage silicon stack, the diode distribution vector and the doping concentration vector are randomly obtained.

[0023] Traditional high-voltage silicon stacks have the risk of diode breakdown due to uneven voltage distribution in the silicon stack. In this regard, this application mainly adjusts the resistance of the series diodes in the silicon stack according to the manufacturing parameters of the high-voltage silicon stack, and then adjusts the distributed voltage of the silicon stack diodes to improve the uneven voltage distribution of the silicon stack diodes.

[0024] The present application combines avalanche diodes in series and parallel to form an avalanche diode silicon stack, wherein multiple avalanche diodes are connected in parallel to form a diode submodule; multiple diode submodules are connected in series to form an avalanche high-voltage silicon stack. The present application mainly adjusts the number of parallel avalanche diodes in the diode submodule, thereby adjusting the external resistance of the diode submodule, thereby improving the uneven voltage distribution.

[0025] The present application first obtains target manufacturing parameters of an avalanche high-voltage silicon stack, further uses an electromagnetic transient program (EMTP) to perform circuit simulation, adjusts the structural parameters of the high-voltage silicon stack, so that the obtained avalanche high-voltage silicon stack meets the target manufacturing parameters, and then manufactures the avalanche high-voltage silicon stack according to the structural parameters.

[0026] The target manufacturing parameters of the avalanche high voltage silicon stack in this application include: equivalent resistance , minimum operating voltage , maximum operating voltage , number of submodules Among them, equivalent resistance, minimum operating voltage, and maximum operating voltage are common electrical characteristic parameters of avalanche high-voltage silicon stacks. The number of submodules determines the device size and high-voltage resistance of the avalanche high-voltage silicon stack. The larger the number, the larger the device size of the avalanche high-voltage silicon stack, and it can work under higher voltage conditions.

[0027] The structural parameters of the avalanche high-voltage silicon stack in this application include: the upper limit of the parallel diode of the diode submodule , the doping concentration of the avalanche diode Among them, the upper limit of parallel diodes indicates the number of avalanche diodes that can be connected in parallel in a submodule. Generally, the more parallel diodes there are, the lower the external resistance of the submodule is, and the smaller the voltage division of the submodule is; the doping concentration of the avalanche diode corresponds to the voltage operating range of the avalanche diode. The lower the doping concentration, the higher the voltage operating range, that is, the higher the starting voltage (minimum operating voltage) and voltage upper limit (maximum operating voltage) of the avalanche high-voltage silicon stack when it is used, and the stronger the ability of a single diode to withstand high voltage.

[0028] This application mainly obtains the simulation results of the avalanche high-voltage silicon stack through software simulation, obtains a manufacturing plan that meets the target manufacturing parameters, and completes the selection of manufacturing parameters for the avalanche high-voltage silicon stack. In this application, the two sets of vectors representing the structural parameters are recorded as diode distribution vectors and doping concentration vectors respectively.

[0029] Among them, the diode distribution vector is a vector with a length of N, and the value range of each element in the vector is , and is an integer. In this vector, the nth element represents the number of parallel avalanche diodes of the nth submodule; the doping concentration vector is a vector with a length of 2, the first element is the doping concentration of the N region of the PN junction, and the second element is the doping concentration of the P region of the PN junction. Generally, the lower the doping concentration, the wider the depletion region of the PN junction, the higher the minimum voltage for avalanche breakdown through the PN junction, and the higher the maximum voltage that can be tolerated, the more suitable it is for high-voltage working conditions. In particular, it is usually controlled within a very specific range. This embodiment takes to Per cubic centimeter.

[0030] This application uses an optimization algorithm to obtain the final avalanche high-voltage silicon stack manufacturing parameters. Therefore, this application randomly generates multiple diode distribution vectors and multiple doping concentration vectors, and optimizes and selects a diode distribution vector and a doping concentration vector as the final manufacturing plan.

[0031] Subsequently, a diode distribution vector and a doping concentration vector are taken as examples to determine whether they can form an excellent avalanche high-voltage silicon stack manufacturing solution.

[0032] S2: Use simulation software to perform avalanche high-voltage silicon stack simulation on a preset number of voltage points using the randomly obtained diode distribution vector and doping concentration vector to obtain a simulation qualified vector, a preset number of silicon stack powers, and a preset number of voltage distribution vectors; based on the element values ​​in the simulation qualified vector, screen the voltage distribution vectors of the voltage points that work normally, and calculate the simulation qualified rate.

[0033] First, the diode distribution vector and the doping concentration vector are connected end to end to form a vector recorded as a manufacturing plan vector. The manufacturing plan vector is used as input and the EMTP software is used for simulation. In this embodiment, the tail of the diode distribution vector is connected to the head of the doping concentration vector, and the implementer can adjust it at his own discretion.

[0034] At minimum operating voltage , maximum operating voltage Between, including and Select U=100 voltage points at equal intervals, and the EMTP software controls the voltage The simulation is performed within U voltage points, and the simulation results are a simulation qualified vector with a length of U, U silicon stack powers, and U voltage distribution vectors with a length of N.

[0035] Among them, each element in the simulation qualified vector is a qualified judgment value for each voltage point, representing whether the avalanche high-voltage silicon stack can work normally at each voltage point. If the element value is the first preset value, it means that it can work normally. If the element value is the second preset value, it means that it cannot work normally. In this embodiment, the first preset value is 1, and the second preset value is 0, wherein the first preset value is not equal to the second preset value. There are usually two situations in which it cannot work normally. The first situation is that the voltage of some avalanche diodes is too high due to excessive doping concentration or uneven voltage distribution, resulting in diode Zener breakdown and diode damage; the second situation is that the doping concentration is too low, and the low voltage cannot cause an avalanche effect in the PN junction.

[0036] Among them, the power of each silicon stack represents the power consumption of the silicon stack at the corresponding voltage.

[0037] Among them, each voltage distribution vector represents the voltage distribution of N submodules under the corresponding voltage.

[0038] In the acquired simulation data, if there is an element value equal to the second preset value in the simulation qualified vector, it means that the avalanche diode manufacturing plan is unqualified, and the avalanche diode manufactured in this way cannot meet the target manufacturing parameters. Therefore, the manufacturing plan corresponding to the simulation result is marked as unqualified.

[0039] However, in the unqualified manufacturing scheme, there are still useful simulation data for reference to assist in finding the best manufacturing scheme. Generally, the fewer the number of element values ​​in the simulation qualified vector equal to the second preset value, the closer its data is to the feasible manufacturing scheme, and the more referenceable its simulation data is. Therefore, this embodiment counts the number of elements in the simulation qualified vector whose element value is the first preset value, and divides it by the length U of the simulation qualified vector, which is recorded as the simulation qualified rate. The higher the simulation qualified rate, the more reference value the corresponding manufacturing scheme has.

[0040] S3: According to the distribution of the maximum element value in each screened voltage distribution vector among all elements, the voltage adaptability of each voltage distribution vector is obtained; the silicon stack power between each screened voltage point and all screened voltage points is compared to obtain the high voltage weight of each voltage point, and the voltage adaptability is weightedly summed to obtain the high voltage tolerance.

[0041] The voltage distribution vector represents the voltage distribution of the diodes inside the avalanche high-voltage silicon stack. This application improves the voltage distribution by adjusting the number of diodes in parallel in the submodule, thereby reducing the risk of Zener breakdown in the high-voltage silicon stack caused by uneven voltage distribution. Therefore, the more uniform the voltage distribution, the less likely it is to cause Zener breakdown. This design enables the avalanche high-voltage silicon stack to better adapt to the target manufacturing parameters during the manufacturing process.

[0042] Therefore, the voltage adaptability is calculated in this embodiment to characterize the risk of avalanche breakdown caused inside the avalanche high voltage silicon. The method is as follows: First, among the U voltage distribution vectors, the voltage distribution vectors with a qualified judgment value of 1 are selected. The remaining voltage distribution vectors are the working conditions of the silicon stack under abnormal conditions, and the data has no reference significance. Finally, E voltage distribution vectors are selected for calculation.

[0043] Furthermore, for the screened e-th voltage distribution vector, the highest voltage of the N sub-modules is obtained, and the Z score of the highest voltage is calculated. The larger the value, the more extreme the voltage distribution inside the silicon stack is. When high-voltage sparking occurs due to changes in external temperature and humidity, the instantaneous high voltage will be unevenly distributed among the sub-modules, which may cause some sub-modules to withstand higher voltages, thereby increasing the risk of Zener breakdown.

[0044] Finally, the reciprocal of the Z score is taken and recorded as the voltage adaptability of the e-th voltage distribution vector. The smaller the value, the greater the voltage adaptability, the less extreme the voltage distribution inside the silicon stack, and the smaller the risk of Zener breakdown. It should be noted that in order to prevent the denominator from being 0, a parameter greater than 0 needs to be added to the denominator. The value of this embodiment is 0.01. In particular, when all the values ​​in the voltage distribution vector are equal, there is no Z score. At this time, the voltage adaptability of the corresponding voltage distribution vector is set to 0, which means that the voltage distribution is completely balanced.

[0045] The avalanche high-voltage silicon stack in this application mainly prevents the risk of Zener breakdown caused by the instantaneous high voltage caused by the high-voltage sparking phenomenon caused by the ambient temperature and humidity. At the same time, because the heat generation of the diode is different at different voltages, the temperature change will change the depletion region width of the diode PN junction, reflecting the negative temperature coefficient characteristics, which in turn causes the silicon stack to show different electrical characteristics at different voltages. Therefore, when evaluating the avalanche high-voltage silicon stack manufacturing plan through simulation data, the differences in the electrical characteristics of the diode at different voltages should be taken into account, and a higher evaluation weight should be given to the high-voltage situation, so that the evaluation results of the plan are more in line with the actual application scenario.

[0046] Based on the proportion of the silicon stack power of each screened voltage point to all the screened voltage points, the high voltage weight of each screened voltage point is obtained: Since the difference in the voltage characteristics of the silicon stack is mainly caused by the heating of the diode, and generally the higher the voltage of the silicon stack, the greater the power consumption and the more serious the heating, this embodiment calculates the high voltage weight by the power consumption of the silicon stack in the simulation software. Here, the power of the silicon stack with E qualified judgment values ​​as the first preset value is obtained, and the power of the E silicon stacks is summed, and then the power of the e-th silicon stack is divided by the sum value to obtain the high voltage weight of the e-th voltage point.

[0047] It should be understood that the high voltage weight is obtained by normalizing the silicon stack power. The more obvious the difference between the heat generation of the silicon stack at high voltage and low voltage, the greater the difference in electrical performance of the silicon stack. Therefore, a greater reference weight is given to the high voltage part when evaluating the manufacturing solution.

[0048] The high voltage tolerance is obtained according to the voltage adaptability and high voltage weight corresponding to each voltage point: taking the high voltage weight as the weight, the corresponding voltage adaptability is weighted and summed to obtain the high voltage tolerance, which is used to characterize the working effect of the avalanche high-voltage silicon stack when facing high voltage conditions.

[0049] S4: Based on the simulation qualification rate and the high voltage tolerance, a voltage equalization effect evaluation value is obtained, and an optimization algorithm is used to obtain a final avalanche high-voltage silicon stack manufacturing solution.

[0050] The high voltage tolerance is outputted and processed through the simulation pass rate to obtain the voltage balancing effect evaluation value, which is used to characterize whether the performance reflected by the structural parameters of the high voltage silicon stack in the simulation meets the required performance: First, if the simulation pass rate is not equal to the first preset value, it means that the entire avalanche high voltage silicon stack manufacturing plan is unqualified. At this time, the high voltage tolerance is numerically processed. The specific method is: the high voltage tolerance is recorded as a, and the simulation pass rate is recorded as b. The specific formula of the voltage balancing effect evaluation value is: ;in, It indicates a parameter that is preset to be greater than zero, and in this embodiment, the value is 0.01. If the simulation pass rate is 1, the high voltage tolerance is directly used as the voltage balancing effect evaluation value.

[0051] The flow chart for obtaining the pressure equalization effect evaluation value is as follows: Figure 2 shown.

[0052] Through numerical processing, in the subsequent manufacturing solution optimization and screening process, the solution with a simulation pass rate equal to 1 will be given priority. Next, the solution with relatively higher voltage tolerance and simulation pass rate, that is, the excellent solution with a better voltage equalization effect evaluation value will be selected; through iterative screening, the best avalanche high-voltage silicon stack manufacturing solution that can withstand high voltage and meets the target manufacturing parameters will be finally selected.

[0053] This embodiment uses a genetic algorithm to iteratively screen the avalanche high-voltage silicon stack manufacturing solution. The specific process is as follows: P1 initialization: randomly generate A = 20 diode distribution vectors and A doping concentration vectors, and arrange and combine the two sets of vectors to form B = A*A manufacturing plan vectors.

[0054] P2 screening: Calculate the voltage balancing effect evaluation values ​​for B manufacturing solution vectors, arrange the manufacturing solution vectors from large to small according to the voltage balancing effect evaluation values, and select D=5 different diode distribution vectors and D different doping concentration vectors from top to bottom as the dominant vectors.

[0055] P3 crossover and mutation: The D diode distribution vectors obtained by screening are crossover and mutation, with a crossover rate of 0.2 and a mutation rate of 0.05 to obtain A diode distribution vectors; the D doping concentration vectors are also crossover and mutation to obtain A doping concentration vector, and the two groups of vectors are arranged and combined to form B manufacturing plan vectors.

[0056] P4 iteration: Return to step P2 and repeat iteration F=50 times.

[0057] P5 Obtain qualified solutions: Finally, B manufacturing solution vectors are obtained, and the manufacturing solution vector with the highest pressure equalization effect evaluation value is selected as the qualified simulation result. In particular, if the pressure equalization effect evaluation values ​​of the B manufacturing solution vectors are all negative, it means that all manufacturing solutions are unqualified solutions, and an alarm is issued. The alarm means that the number of iterations is insufficient or the target manufacturing parameters are unreasonable, and the target cannot be met through the existing industry.

[0058] It should be noted that the implementers can adjust the numbers of A, D, and F according to actual conditions, and this application does not impose any restrictions on this.

[0059] The genetic algorithm flow chart is as follows: Figure 3 shown.

[0060] The present application provides a method for manufacturing an avalanche high-voltage silicon stack, the method comprising: firstly, obtaining the range of the working voltage and the number of submodules for manufacturing the avalanche high-voltage silicon stack, and taking them as limiting conditions to construct a diode distribution vector and a doping concentration vector as a digital template for the manufacturing scheme; further using simulation software to perform simulation calculations on the avalanche high-voltage silicon stack model to obtain simulation qualified vectors, silicon stack power, and voltage distribution vectors, which are silicon stack simulation data; according to the distribution of the maximum element value in each screened voltage distribution vector among all elements, the voltage adaptability of each voltage distribution vector is obtained, which is helpful to obtain the data of the silicon stack when the silicon stack is working normally in the silicon stack simulation data, and the voltage adaptability of each manufacturing scheme is calculated according to the voltage data therein, and the degree of uneven voltage distribution exhibited by the avalanche high-voltage silicon stack model under different voltages is estimated; at the same time, the simulation qualified rate is calculated to characterize the completion of the model for the target manufacturing parameters; the silicon stack power during the silicon stack simulation is obtained, the temperature change of the silicon stack is characterized by the power data, the high voltage weight is calculated, and the simulation data under high power conditions is given a higher weight to avoid the negative temperature coefficient characteristics of the silicon stack interfering with the high voltage resistance evaluation of the silicon stack. Finally, the voltage matching degree, simulation qualification rate, and high voltage weight are combined to calculate the voltage balancing effect evaluation value. The voltage balancing effect evaluation value is used as the adaptability, and the optimization algorithm is used for iteration to obtain the best manufacturing solution vector. The structural parameters of the manufacturing solution vector are used to control the manufacturing of the avalanche high-voltage silicon stack. The beneficial effect is that a silicon stack manufacturing solution that is suitable for the target parameters and has a low risk of Zener breakdown under high voltage is selected through iteration from a variety of silicon stack manufacturing solutions. Compared with traditional high-voltage silicon stacks, the avalanche high-voltage silicon stack manufacturing method described in this embodiment uses avalanche diodes to replace ordinary high-voltage finishing diodes, which improves the tolerance of a single diode to high voltage. At the same time, the optimization algorithm is used to adjust the number of parallel diodes in the submodule, thereby balancing the voltage division between the diodes inside the silicon stack, improving the uniformity of voltage distribution, and thereby improving the tolerance of the silicon stack to high voltage and reducing the risk of Zener breakdown.

[0061] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the embodiment of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two continuous boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. In the description corresponding to the flowchart and the block diagram in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in a different order from the order disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two continuous operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or may be implemented by a combination of dedicated hardware and computer instructions.

[0062] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for manufacturing an avalanche high-voltage silicon stack, characterized in that: The method comprises the following steps: According to the range of the working voltage of the avalanche high-voltage silicon stack and the number of submodules, a diode distribution vector and a doping concentration vector are randomly obtained; The randomly obtained diode distribution vector and doping concentration vector are used to perform avalanche high-voltage silicon stack simulation at a preset number of voltage points using simulation software to obtain simulation qualified vectors, a preset number of silicon stack powers, and a preset number of voltage distribution vectors; according to the element values ​​in the simulation qualified vector, the voltage distribution vectors of the voltage points that work normally are selected, and the simulation qualified rate is calculated; The voltage adaptability of each voltage distribution vector is obtained according to the distribution of the maximum element value in all elements in each screened voltage distribution vector; the silicon stack power between each screened voltage point and all screened voltage points is compared to obtain the high voltage weight of each voltage point, and the voltage adaptability is weighted and summed to obtain the high voltage tolerance; Based on the simulation qualification rate and the high voltage tolerance, a voltage equalization effect evaluation value is obtained, and an optimization algorithm is used to obtain a final avalanche high-voltage silicon stack manufacturing solution.

2. The method for manufacturing an avalanche high-voltage silicon stack according to claim 1, characterized in that: The length of the diode distribution vector is determined by the number of submodules included in the avalanche high-voltage silicon stack; the elements in the diode distribution vector are determined by the number of avalanche diodes in each submodule.

3. The method for manufacturing an avalanche high-voltage silicon stack according to claim 1, characterized in that: The two elements in the doping concentration vector are respectively determined by the minimum value and the maximum value of the working voltage of the avalanche high-voltage silicon stack.

4. The method for manufacturing an avalanche high-voltage silicon stack according to claim 1, characterized in that: The voltage distribution vector of the voltage point that can normally work is selected, specifically: For the simulation qualified vector, if the element value is the first preset value, it means that the corresponding voltage point can work normally.

5. The method for manufacturing an avalanche high-voltage silicon stack according to claim 4, characterized in that: The simulation pass rate is specifically the proportion of the number of elements in the simulation pass vector whose element values ​​are the first preset value.

6. The method for manufacturing an avalanche high-voltage silicon stack according to claim 1, characterized in that: The voltage adaptability of each voltage distribution vector is specifically a negative correlation mapping result of the Z score of the maximum element value of each voltage distribution vector.

7. The method for manufacturing an avalanche high-voltage silicon stack according to claim 1, characterized in that: The process of obtaining the high voltage weight of each voltage point is as follows: The accumulated sum of the silicon stack power of all the screened voltage points is calculated; and the ratio of the silicon stack power of each screened voltage point to the accumulated sum is used as the high voltage weight of each voltage point.

8. The method for manufacturing an avalanche high-voltage silicon stack according to claim 1, characterized in that: The pressure equalization effect evaluation value obtained is specifically: The high voltage tolerance is recorded as a, and the simulation pass rate is recorded as b; when , the specific formula of the pressure equalization effect evaluation value is: ;in, Indicates that the parameter is preset to be greater than zero; when , and a is used as the pressure equalization effect evaluation value.

9. The method for manufacturing an avalanche high-voltage silicon stack according to claim 1, characterized in that: The final manufacturing plan of the avalanche high-voltage silicon stack is specifically a manufacturing plan vector with the highest voltage equalization effect evaluation value after iterating the optimization algorithm; the manufacturing plan vector is composed of a diode distribution vector and a doping concentration vector.

10. The method for manufacturing an avalanche high-voltage silicon stack according to claim 9, characterized in that: If the highest pressure equalization effect evaluation value obtained after iterating the optimization algorithm is negative, all manufacturing solution vectors are judged to be unqualified.

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