Multi-dimensional interface memristor
By using zero-dimensional quantum dot/two-dimensional graphene composite film structure in memristors, the problem of limited performance optimization caused by small interface areas of traditional memristors is solved, and more efficient and stable photoelectric characteristic regulation and signal performance are achieved.
Patent Information
- Application Number
- CN202410927112.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-11
- Publication Date
- 2025-03-07
AI Technical Summary
The interface area formed by the traditional memristor structure is small, resulting in limited optimization of the macro performance of interface regulation on the overall device, making it difficult to achieve stable and macroscopic visible conductance suppression.
By attaching highly self-assembled oxide quantum dots to the hydrophilized graphene film, a zero-dimensional quantum dot/two-dimensional graphene composite film is formed. As the switching material layer of the memristor, a large amount of oxide/graphene interface is introduced to amplify the interface to regulate the device's photoelectric characteristics.
By greatly improving the effective interface area and amplifying the control effect of carrier and ion defects at the interface, more efficient and stable macroscopic signal performance is achieved, and the sensitivity and stability of the device are improved.
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Figure CN119584849A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of semiconductor devices, specifically to the technical field of memristor preparation, and particularly relates to a multi-dimensional interface memristor and a preparation method thereof. Background Art
[0002] With the rapid development of the Internet of Things and artificial intelligence technology, the current processing system will cause additional time and power consumption in the process of data flow. 11 neurons and 10 15 Synapses are the key part of information transmission between neurons and the smallest unit of learning and memory in the brain. Therefore, compared with traditional architecture computing systems, imitating the behavior of human brain synapses from a physical level is a way to achieve low-power and efficient data processing. As a new type of nanostructured device, memristor is considered to be the fourth basic circuit element besides resistors, inductors and capacitors. It has a relatively simple "sandwich" structure and has good compatibility with the currently widely used CMOS process. It also has the advantages of high speed, low power consumption, easy integration, and no need for additional memory units for storing and retrieving data, so it can meet the performance requirements of the next generation of high-density information storage and high-performance computing for general-purpose electronic memory.
[0003] At present, the structure of memristors is mostly low-dimensional, and most of them use physical methods (including chemical vapor deposition, physical sputtering deposition, atomic layer deposition, etc.) to build the "oxide / electrode / oxide" structure layer by layer. The device regulation depends on the carrier transport regulation at the interface. The interface area formed by the traditional memristor structure is small, resulting in very limited optimization of the macroscopic performance of the overall device by interface regulation. For example, the limited interface charge injection has low efficiency in regulating the reduction of oxygen vacancies and interface energy barriers at the interface, and the drift is large, making it difficult for the memristor to show stable and macroscopically visible conductivity suppression. Summary of the invention
[0004] In view of the above technical problems, the present invention provides a multi-dimensional interface memristor design and a preparation method thereof, in which highly self-assembled oxide quantum dots are attached to a hydrophilic graphene film to form a zero-dimensional quantum dot / two-dimensional graphene composite film as the switching material layer of the memristor. This method can introduce a large number of oxide / graphene interfaces, thereby amplifying the regulatory effect of the interface on the optoelectronic properties of the device.
[0005] The present invention adopts the following technical solutions:
[0006] One of the technical solutions of the present invention is to provide a method for preparing a multi-dimensional interface memristor switch layer, comprising the following steps:
[0007] The graphene dispersion is subjected to a hydrophilic treatment and then subjected to a first ultrasonic dispersion; a metal oxide quantum dot dispersion is added and subjected to a second ultrasonic dispersion to load the metal oxide quantum dots onto the graphene surface, thereby obtaining a successfully loaded solution; the successfully loaded solution is plated onto the surface of a substrate using a wet coating process and dried to form a film, thereby obtaining the method for preparing the multidimensional interface memristor switch layer.
[0008] As a further preferred embodiment of the present invention, the metal oxide is SnO2 (tin dioxide), TiO2 (titanium dioxide), NiO2 (nickel dioxide), CeO2 (cerium dioxide) or IGZO (indium gallium zinc oxide).
[0009] As a further preferred embodiment of the present invention, the volume ratio of the metal oxide quantum dot dispersion to the graphene dispersion is 1:(0.5-4); the concentration of the graphene dispersion is 0.4 mg / mL; the preparation method of the metal oxide quantum dot dispersion is: in 10 mL of a concentration of 16.7 mmol·L -1 10 mL of toluene, 0.5 mL of oleic acid and 0.1 mL of tert-butylamine were added to the metal salt solution to form an oil-water interface, and the sealed reactor was heated to 200° C. to react to obtain a metal oxide original solution. 1.5 mL of the metal oxide original solution was taken, washed and centrifuged to obtain metal oxide nanocrystals, which were dispersed in 400 μL of deionized water to obtain a metal oxide quantum dot dispersion.
[0010] Preferably, the preparation method of the tin dioxide quantum dot dispersion is: in 10mL, the concentration is 16.7mmol·L -1 10 mL of toluene, 0.5 mL of oleic acid and 0.1 mL of tert-butylamine were added to the SnCl4·H2O aqueous solution to form an oil-water interface, and the sealed reactor was heated to 200°C for reaction to obtain a metal oxide original solution. 1.5 mL of the metal oxide original solution was taken, washed and centrifuged to obtain SnO2 nanocrystals, which were dispersed in 400 μL of deionized water to obtain a metal oxide quantum dot dispersion. Since graphene is hydrophobic, hydrophilic modification can enhance the hydrophilicity of graphene, thereby further improving the uniformity of graphene dispersion and attachment of oxide quantum dots in aqueous solution.
[0011] As a further preferred embodiment of the present invention, the hydrophilic modification method is to treat the graphene with ultraviolet light for 1 hour. Ultraviolet light is an important way to improve the hydrophilicity of graphene.
[0012] As a further preference of the present invention, the time of the first ultrasonic dispersion is ≥1h. The time of ultrasonic dispersion refers to the total time, and the ultrasonic dispersion process can be performed at intervals. For example, after graphene is dispersed in water, ultrasonic dispersion is first performed, then ultraviolet irradiation hydrophilization treatment is performed, and then ultrasonic dispersion is performed again. The time of ultraviolet irradiation hydrophilization treatment must be guaranteed to be more than 1h, but the time of the two ultrasonic dispersions can be conventionally regulated according to experience, as long as the total time of ultrasound is guaranteed to be more than 1h.
[0013] As a further preference of the present invention, the time of the second ultrasonic dispersion is ≥0.5h.
[0014] As a further preferred embodiment of the present invention, the specific method of drying and film formation is: treating under ultraviolet light with a wavelength of 253 nm until a dry and uniform film is formed.
[0015] According to actual needs, the present invention can be plated. Specifically, each layer uses about 5 μL of graphene dispersion solution loaded with oxide quantum dots and is treated under ultraviolet light with a wavelength of 253 nm until a dry and uniform film is formed. After the first film is dried, the second film is plated in the same way, and the steps are repeated until the coating thickness requirement is met. The coating thickness varies according to different electrode processes and is generally 50-150 nm.
[0016] As a further preferred embodiment of the present invention, the preparation method of the tin oxide (SnO2) quantum dot dispersion is as follows: in 10 mL of 16.7 mmol·L -1 Appropriate amounts of toluene (10 mL), oleic acid (0.5 mL) and tert-butylamine (0.1 mL) were added to the SnCl4·H2O aqueous solution to form an oil-water interface. The sealed reactor was heated to 200°C, and then the upper organic solution was centrifuged to obtain a pure SnO2 quantum dot dispersion.
[0017] The second technical solution of the present invention is to provide a multi-dimensional interface memristor switch layer, which is prepared by the above-mentioned preparation method and has a structure of a zero-dimensional quantum dot / two-dimensional graphene composite structure.
[0018] A third technical solution of the present invention is to provide a multi-dimensional interface memristor, wherein the switch layer of the multi-dimensional interface memristor is the switch layer mentioned above.
[0019] The present invention has the following beneficial effects:
[0020] The present invention takes advantage of the flexible interface construction of the liquid phase method to load highly self-assembled oxide quantum dots on the surface of two-dimensional thin film materials to prepare a "zero-dimensional metal oxide quantum dot / two-dimensional thin film material" thin film printing ink containing a multi-dimensional interface, which is then deposited into a uniform and dense device switch layer, thereby greatly increasing the effective interface area and amplifying the regulation effect of carrier and ion defects at the interface, thereby converting the microscopic physical mechanism into a macroscopic efficient optical and electro-resistive optimization of the device, thereby making the memristor exhibit more efficient and stable macroscopic signals.
[0021] Oxide semiconductors absorb light concentrated in the ultraviolet band due to their energy gap limitations, while graphene has obvious photoelectric responses from the ultraviolet to the infrared bands. Therefore, the introduction of the graphene layer can broaden the light response range and efficiency of the device.
[0022] The mechanism of memristor is the transmission regulation of electrons at the interface. At present, it mainly relies on the very limited interface between "electrode / dielectric layer" to regulate the resistance value, which is inefficient and has strong device instability. After the present invention loads graphene on a suitable oxide to form a heterojunction, the migration of carriers can be promoted due to the energy barrier potential difference at its interface. For example, the electron-hole pairs formed under light excitation can be effectively transmitted to form a photocurrent. At the same time, the present invention deposits the switch material layer of the memristor after attaching oxide quantum dots to a single layer of graphene film and reveals the regulatory mechanism of the oxide / graphene interface construction and optimization on the interface contact barrier, photogenerated carriers, and charge transport mechanism in the device, and explains the key regulatory mechanism for enhancing graphene electron injection into oxide. This method can introduce a large number of oxide / graphene interfaces, so it can amplify the regulatory effect of the interface on the photoelectric characteristics of the device, reduce the lower limit of light and electrical response, and improve the sensitivity and stability of the device.
[0023] The present invention is based on the optimized new structure and new principle memristor, and realizes the preparation and optimization of small arrays of devices. It confirms the application potential of memristor-like neural synapse simulation (including electrical and optical signal memory, feature information memory enhancement and forgetting functions) and reconfigurable image feature processing, and provides theoretical and technical support for its application in sensor storage and computing integration and brain-like chips. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0025] Figure 1 Schematic diagram of the multi-dimensional interface memristor structure design prepared in Example 1;
[0026] Figure 2The transmission electron microscope image of the interface of the multi-dimensional interface memristor prepared in Example 1; wherein (a) is a transmission electron microscope image of tin oxide / graphene ink; (b) is a transmission electron microscope image of the cross section of the multi-dimensional interface memristor;
[0027] Figure 3 A flow chart of the preparation of a multi-dimensional interface memristor prepared in Example 1;
[0028] Figure 4 This is an IV scan test diagram for characterizing the electrical performance of the multi-dimensional interface memristor in Example 1;
[0029] Figure 5 This is a test diagram showing the electrical control performance of the multi-dimensional interface memristor in Example 1, which shows the regulation and control of the electrical conductance enhancement / inhibition by an electrical pulse signal;
[0030] Figure 6 This is a test diagram showing the light-controlled performance of the multi-dimensional interface memristor in Example 1, which shows the control of conductivity enhancement by ultraviolet light pulses and conductivity suppression by infrared light pulses;
[0031] Figure 7 : are IV scan test diagrams of oxide quantum dot memristors; wherein a is an IV scan test diagram of pure metal oxide quantum dot memristors; b is an IV scan test diagram of a volume ratio of metal oxide quantum dot dispersion to the graphene dispersion of 4:1; c is an IV scan test diagram of a volume ratio of metal oxide quantum dot dispersion to the graphene dispersion of 2:1; d is an IV scan test diagram of a volume ratio of metal oxide quantum dot dispersion to the graphene dispersion of 1:1;
[0032] Figure 8 a is an IV scan test diagram of a multi-dimensional interface memristor (the one with the largest change in the figure is the IV test diagram under ultraviolet light); b is a schematic diagram of the light pulse of CeO2 / multi-dimensional interface memristor;
[0033] Fig. 9 (a) TEM image of BTO quantum dots in Example 5; (b) conductivity increase of BTO / graphene multidimensional interface memristor under UV light and resistance state retention test after light removal; (c) conductivity change of BTO / graphene multidimensional interface memristor under infrared light;
[0034] Fig.10 IV scan test diagram of electrode interface and multi-dimensional interface memristor;
[0035] Fig.11 This is the IV scan test diagram of the intercalation interface and multi-dimensional interface memristor. DETAILED DESCRIPTION
[0036] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as limiting the present invention, but should be understood as a more detailed description of certain aspects, features, and embodiments of the present invention.
[0037] It should be understood that the terms described in the present invention are only for describing special embodiments and are not intended to limit the present invention. In addition, for the numerical range in the present invention, it should be understood that each intermediate value between the upper and lower limits of the scope is also specifically disclosed. Each smaller range between the intermediate value in any stated value or stated range and any other stated value or intermediate value in the described range is also included in the present invention. The upper and lower limits of these smaller ranges can be independently included or excluded in the scope.
[0038] Unless otherwise indicated, all technical and scientific terms used herein have the same meanings as those generally understood by those skilled in the art. Although the present invention describes only preferred methods and materials, any methods and materials similar or equivalent to those described herein may also be used in the implementation or testing of the present invention. All documents mentioned in this specification are incorporated by reference to disclose and describe the methods and / or materials associated with the documents. In the event of a conflict with any incorporated document, the content of this specification shall prevail.
[0039] It will be apparent to those skilled in the art that various modifications and variations may be made to the specific embodiments of the present invention description without departing from the scope or spirit of the present invention. Other embodiments derived from the present invention description will be apparent to those skilled in the art. The present invention description and examples are exemplary only.
[0040] The words “include,” “including,” “have,” “contain,” etc. used in this document are open-ended terms, meaning including but not limited to.
[0041] The raw materials used in the following examples of the present invention were all obtained through conventional commercial routes.
[0042] Example 1
[0043] like Figure 3 As shown, a multi-dimensional interface memristor switch layer, the preparation method steps are as follows:
[0044] S1.16.7mmol·L in 10mL -1 Appropriate amounts of toluene (10 mL), oleic acid (0.5 mL), and tert-butylamine (0.1 mL) were added to the SnCl4·H2O aqueous solution to form an oil-water interface. The sealed reactor was heated to 200° C. to obtain a stock solution of metal oxides.
[0045] S2. Wash and centrifuge 1.5 mL of the original metal oxide solution to obtain SnO2 nanocrystals, which are dispersed in 400 μL of deionized water to obtain an oxide quantum dot dispersion solution. Disperse 0.002 g of graphene in 5 mL of deionized water, irradiate with ultraviolet light for 1 hour, and perform hydrophilic modification to obtain a graphene dispersion solution. Ultrasonicate the graphene in the solution for 1 hour, and then add the oxide quantum dot dispersion solution for further ultrasonication for 30 minutes, wherein the volume ratio of the oxide quantum dot dispersion solution to the graphene dispersion solution is 1:1. After ultrasonic treatment, the graphene is well separated into single-layer nanosheets, and the oxide quantum dots are attached to the graphene flakes to obtain a successfully loaded solution (i.e., tin oxide / graphene ink).
[0046] S3. Preparation of 2cm 2 The gold-coated silicon wafer was plated with the above-mentioned successfully loaded solution by wet coating process. The coating process adopted a layered coating method. Each layer used 5μL of graphene dispersion solution loaded with oxide quantum dots and was treated under ultraviolet light with a wavelength of 253nm until a dry and uniform film was formed. The total coating thickness was 150nm, and the SnO2 / two-dimensional thin film material was obtained.
[0047] The SnO2 / two-dimensional thin film material is used as the switching layer of the memristor, and the silicon wafer with gold-plated electrodes is used as the substrate to assemble a multi-dimensional interface memristor. The schematic diagram of the multi-dimensional interface memristor structure design prepared in this embodiment is shown in the figure. Figure 1 As shown, scanning electron microscopy images are shown in Figure 2 ;from Figure 1 and Figure 2 As can be seen in (a), the tin oxide quantum dots are evenly dispersed on the graphene film, forming countless "oxide / graphene electron transport interfaces"; Figure 2 (b) is a cross-sectional TEM image of a memristor printed with oxide / graphene ink. It can be seen that the film is uniform and dense after printing, making it very suitable for making thin film devices such as memristors and thin film transistors.
[0048] The multi-dimensional interface memristor prepared in Example 1 was subjected to IV scan test. The test results are shown in Figure 4 ,Depend on Figure 4 It can be seen that it exhibits good memristive characteristics and can complete the state transition between the high resistance state and the low resistance state at a voltage of ±3V.
[0049] The multi-dimensional interface memristor prepared in Example 1 was tested for the regulation of conductivity enhancement / inhibition by electric pulse signals. The results are shown in Figure 5 ,Depend on Figure 5 It can be seen that the multi-dimensional interface memristor has a good response, and the resistance of the electrically controlled pulse has a slow-changing characteristic.
[0050] The multi-dimensional interface memristor prepared in Example 1 was tested for conductivity enhancement by ultraviolet light pulses and conductivity suppression by infrared light pulses. The test results are shown in Figure 6 , when the device is in low resistance state, the device conductivity is slowly reduced by 830nm infrared light pulse control. The experimental results have been able to prove that it has the ability of photoinduced conductivity enhancement and conductivity suppression. In the device light-controlled memristor test, the device conductivity increased from 155.0nS to 334.2nS by ultraviolet light pulse with a wavelength of 365nm. It can be seen that the memristor of this structure has strong photoinduced conductivity enhancement ability and experience learning behavior simulation ability. At the same time, it can be seen that the multi-dimensional interface structure has a significant amplification effect and relatively good device stability.
[0051] Example 2
[0052] The only difference from Example 1 is that the volume ratio of the metal oxide quantum dot dispersion liquid to the graphene dispersion liquid is 1:2.
[0053] Example 3
[0054] The only difference from Example 1 is that the volume ratio of the metal oxide quantum dot dispersion liquid to the graphene dispersion liquid is 2:1.
[0055] like Figure 7 , a is the IV scanning test diagram of the pure metal oxide quantum dot memristor; b is the IV scanning test diagram when the volume ratio of the metal oxide quantum dot dispersion to the graphene dispersion is 4:1; c is the IV scanning test diagram when the volume ratio of the metal oxide quantum dot dispersion to the graphene dispersion is 2:1; d is the IV scanning test diagram when the volume ratio of the metal oxide quantum dot dispersion to the graphene dispersion is 1:1; after comparison, it can be concluded that when the volume ratio of the metal oxide quantum dot dispersion to the graphene dispersion is 1:1, the amplification effect of the multidimensional interface memristor is most obvious.
[0056] Example 4
[0057] The only difference from Example 1 is that the metal oxide is replaced by CeO2.
[0058] like Figure 8 , a is the IV scan test diagram of the multidimensional interface memristor (the one with the largest change in the figure is the IV test diagram under ultraviolet light); b is the light pulse schematic diagram of the CeO2 / multidimensional interface memristor. It can be seen from the figure that the device exhibits memristive characteristics, can complete the state transition between the high resistance state and the low resistance state at a voltage of ±2V, and has a good response to ultraviolet light.
[0059] Example 5
[0060] The only difference from Example 1 is that the metal oxide is replaced by BTO (BaTiO 3 ).
[0061] Fig. 9 (a) TEM image of BTO; (b) conductivity increase of BTO / graphene multidimensional interface memristor under UV light and resistance state retention test after light removal; (c) conductivity change of BTO / graphene multidimensional interface memristor under infrared light. It can be seen from the figure that the conductivity decreases slowly.
[0062] Comparative Example 1 Electrode Interface
[0063] Electrode interface preparation method: intercalation interface preparation method: wet-coat the graphene solution onto the substrate surface, dry to form a film, wet-coat SnO2 quantum dots stored in toluene onto the second layer, dry to form a film, repeat the second step, and finally irradiate with ultraviolet light for 1 hour.
[0064] Fig.10 The IV scan test diagram of the electrode interface and multi-dimensional interface memristor (the one with larger changes in the figure is the multi-dimensional interface memristor, and the one with smaller changes is the single-layer structure memristor). As can be seen from the figure, both devices show memristive characteristics and can complete the state transition between high resistance state and low resistance state under ±5V voltage. After comparing the two devices, the resistance states of the two devices are different. Under the same voltage stimulation, the current intensity of the multi-dimensional interface memristor is much greater than that of the single-layer structure memristor, indicating that the memristive performance of the multi-dimensional interface memristor is significantly better than that of the electrode interface memristor.
[0065] Comparative Example 2 Intercalation Interface
[0066] Intercalation interface preparation method: SnO2 quantum dots stored in toluene are wet-coated onto the substrate surface and dried to form a film. Graphene solution is wet-coated onto the second layer and dried to form a film. The first step is repeated and finally irradiated with ultraviolet light for 1 hour.
[0067] Fig.11 The IV scan test diagram of the intercalation interface and multidimensional interface memristor (the one with larger changes in the figure is the multidimensional interface memristor, and the one with smaller changes is the intercalation interface memristor). As can be seen from the figure, both devices show good memristive characteristics and can complete the state transition between high resistance state and low resistance state under ±5V voltage. After comparing the two devices, the resistance states of the two devices are different. Under the same voltage stimulation, the current intensity of the multidimensional interface memristor is significantly greater than that of the intercalation interface, indicating that the memristive performance of the multidimensional interface memristor is significantly better than that of the intercalation interface.
[0068] The above is only a preferred embodiment of the present invention, and each component not clearly defined in this embodiment can be implemented by prior art. For those skilled in the art, any equivalent modification and substitution of the present invention are also within the scope of the present invention. Therefore, the equalization transformation and modification made without departing from the spirit and scope of the present invention should be included in the scope of the present invention. Therefore, the protection scope of this application should be based on the protection scope of the claims.
Claims
1. A method for preparing a multi-dimensional interface memristor switch layer, characterized in that: The following steps are involved: The graphene dispersion is subjected to a hydrophilic treatment and then subjected to a first ultrasonic dispersion; a metal oxide quantum dot dispersion is added and subjected to a second ultrasonic dispersion to load the metal oxide quantum dots onto the graphene surface, thereby obtaining a successfully loaded solution; the successfully loaded solution is plated onto the surface of a substrate using a wet coating process and dried to form a film, thereby obtaining the multidimensional interface memristor switch layer.
2. The preparation method according to claim 1, characterized in that: The metal oxide is SnO2, TiO2, NiO2, CeO2 or IGZO.
3. The preparation method according to claim 1, characterized in that: The volume ratio of the metal oxide quantum dot dispersion to the graphene dispersion is 1:(0.5-4); the concentration of the graphene dispersion is 0.4 mg / mL; the preparation method of the metal oxide quantum dot dispersion is: in 10 mL of a concentration of 16.7 mmol·L -1 10 mL of toluene, 0.5 mL of oleic acid and 0.1 mL of tert-butylamine were added to the metal salt solution to form an oil-water interface, and the sealed reactor was heated to 200° C. to react to obtain a metal oxide original solution. 1.5 mL of the metal oxide original solution was taken, washed and centrifuged to obtain metal oxide nanocrystals, which were dispersed in 400 μL of deionized water to obtain a metal oxide quantum dot dispersion.
4. The preparation method according to claim 1, characterized in that: The hydrophilic modification method is to treat the graphene with ultraviolet light for a treatment time of more than 1 hour.
5. The preparation method according to claim 1, characterized in that: The time of the first ultrasonic dispersion is ≥1h.
6. The preparation method according to claim 1, characterized in that: The second ultrasonic dispersion time is ≥0.5h.
7. The preparation method according to claim 1, characterized in that: The specific method of drying and film formation is: treating under ultraviolet light with a wavelength of 253nm until a dry and uniform film is formed.
8. A multi-dimensional interface memristor switch layer prepared by the preparation method according to any one of claims 1 to 7, characterized in that: Its structure is a zero-dimensional quantum dot / two-dimensional graphene composite structure.
9. A multi-dimensional interface memristor, characterized in that: The switch layer of the multi-dimensional interface memristor adopts the switch layer described in claim 8.
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