Power device service life test method, device, equipment and storage medium

By using dual-pulse testing circuits and thermal resistance testing methods in power device life tests, the problem that existing test solutions cannot accurately simulate operating conditions is solved, and higher life test accuracy is achieved.

CN119667431APending Publication Date: 2025-03-21中国电气装备集团科学技术研究院有限公司
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Patent Information

Application Number
CN202411868710.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-17
Publication Date
2025-03-21

AI Technical Summary

Technical Problem

The existing power device life test scheme cannot accurately simulate the real working conditions of the device, resulting in low accuracy of life tests.

Method used

The dual-pulse test circuit simulates the actual working conditions of the power device to be tested, and the device is subjected to thermal resistance test after inputting continuous pulses to determine whether the device fails based on the current junction thermal resistance.

Benefits of technology

It effectively simulates the actual working conditions of the power device to be tested, accurately tests the actual life of the device, and improves the accuracy of life tests.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of power device testing, and particularly provides a power device service life testing method, device and equipment and a storage medium, and the power device service life testing method comprises the steps: opening a path between a double-pulse testing circuit and a to-be-tested power device, and inputting continuous pulses to the to-be-tested power device through the double-pulse testing circuit; in response to the fact that the number of continuous pulses input to the to-be-tested power device reaches a first preset number, a path between the double-pulse test circuit and the to-be-tested power device is turned off, and the first preset number is smaller than the maximum pulse cycle number indicated by the rated service life of the to-be-tested power device; performing thermal resistance test on the to-be-tested power device to obtain the current junction-to-case thermal resistance of the to-be-tested power device; determining whether the to-be-tested power device fails based on the current junction-to-case thermal resistance; and if yes, determining that the actual life of the to-be-tested power device does not reach the rated life. In this way, the accuracy of the service life test of the power device can be improved.
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Description

Technical Field

[0001] The present application relates to the technical field of power device testing, and in particular to a method, device, equipment and storage medium for testing the life of a power device. Background Art

[0002] Power devices (such as MOSFET or IGBT) are important components of power electronic systems and play a vital role in them. Life testing of power devices can help us understand how long the device can continue to work under specified working conditions. It plays an irreplaceable role in ensuring the performance, reliability and long-term stability of the device and is also an indispensable part of the power electronics industry.

[0003] However, the current power device life test scheme cannot accurately simulate the actual working conditions of the power device, resulting in low accuracy of the life test and failure to achieve good test results.

[0004] Therefore, how to improve the accuracy of power device life testing has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] In view of this, the present application provides a power device life test method, device, equipment and storage medium, which can improve the accuracy of power device life test.

[0006] In order to solve the above technical problems, on the one hand, the present application provides a power device life test method, which is applied to a power device life test device, wherein the power device life test device includes a control module, a double pulse test circuit connected to the control module and the power device to be tested, and the control module is used to implement the power device life test method. The power device life test method includes the following steps:

[0007] Opening a path between a double pulse test circuit and a power device to be tested so as to input continuous pulses to the power device to be tested by using the double pulse test circuit; in response to the number of continuous pulses input to the power device to be tested reaching a first preset number, closing the path between the double pulse test circuit and the power device to be tested, wherein the first preset number is less than the maximum number of pulse cycles indicated by the rated life of the power device to be tested; performing a thermal resistance test on the power device to be tested to obtain a current junction-to-case thermal resistance of the power device to be tested; determining whether the power device to be tested has failed based on the current junction-to-case thermal resistance; and if so, determining that the actual life of the power device to be tested has not reached the rated life.

[0008] According to some embodiments of the present application, the step of determining whether the power device to be tested has failed based on the current junction-to-case thermal resistance includes: obtaining the initial junction-to-case thermal resistance of the power device to be tested before the test; and determining whether the power device to be tested has failed based on a change value between the current junction-to-case thermal resistance and the initial junction-to-case thermal resistance.

[0009] According to some embodiments of the present application, the step of determining whether the power device to be tested has failed based on the change value between the current junction-to-case thermal resistance and the initial junction-to-case thermal resistance includes: determining whether the current junction-to-case thermal resistance is higher than the initial junction-to-case thermal resistance by a preset percentage; if so, determining that the power device to be tested has failed; if not, determining that the power device to be tested has not failed.

[0010] According to some embodiments of the present application, the initial junction-to-case thermal resistance is determined using the following steps: obtaining the K coefficient of the power device to be tested; using a dual-interface transient thermal resistance test method to determine the initial junction-to-case thermal resistance of the power device to be tested before testing based on the K coefficient.

[0011] According to some embodiments of the present application, the power device life test device also includes a power supply circuit connected to the control module and the gate-source terminals of the power device to be tested, and the steps of performing a thermal resistance test on the power device to be tested to obtain the current junction-to-case thermal resistance of the power device to be tested include: opening the path between the power supply circuit and the power device to be tested to input a conduction voltage to the gate-source terminals of the power device to be tested using the power supply circuit; and using a transient thermal resistance test method to test and obtain the current junction-to-case thermal resistance of the power device to be tested.

[0012] According to some embodiments of the present application, the method also includes: if it is determined based on the current junction-to-case thermal resistance that the power device to be tested has not failed, reopening the path between the double pulse test circuit and the power device to be tested, so as to use the double pulse test circuit to input continuous pulses to the power device to be tested; in response to the number of continuous pulses input to the power device to be tested reaching a second preset number, shutting off the path between the double pulse test circuit and the power device to be tested; wherein the second preset number is less than the maximum number of pulse cycles indicated by the remaining life of the power device to be tested; performing a thermal resistance test on the power device to be tested to obtain the current junction-to-case thermal resistance of the power device to be tested; and determining whether the power device to be tested has failed based on the current junction-to-case thermal resistance.

[0013] In a second aspect, an embodiment of the present application provides a power device life test device, comprising: a double pulse test circuit and a control module. The double pulse test circuit is connected to the power device to be tested, and is used to input continuous pulses to the power device to be tested when turned on; the control module is connected to the double pulse test circuit, and is used to execute the power device life test method in the above technical solution.

[0014] According to some embodiments of the present application, the power device life test device further includes: a power supply circuit connected to the gate-source terminals of the power device to be tested, and used to input a conduction voltage to the gate-source terminals of the power device to be tested when turned on. The control module is also used to connect to the power supply circuit, and when performing a thermal resistance test on the power device to be tested, open the path between the power supply circuit and the power device to be tested.

[0015] In a third aspect, an embodiment of the present application provides an electronic device, comprising: a processor; and a memory, wherein computer program instructions are stored in the memory.

[0016] Wherein, when the computer program instructions are executed by the processor, the processor executes the steps of the power device life test method as described in the above technical solution.

[0017] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the processor executes the steps of the power device life test method as described in the above technical solution.

[0018] The above technical solution of the present application has at least one of the following beneficial effects: the actual working condition of the power device to be tested is simulated by a double pulse test circuit, and when a first preset number of continuous pulses are input to the power device to be tested, a thermal resistance test is performed on the power device to be tested, so as to determine whether the power device to be tested has failed according to its current junction-to-shell thermal resistance. In this way, the actual working condition of the power device to be tested can be effectively simulated, and the actual life of the power device to be tested can be accurately tested. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of a power device life test device according to an embodiment of the present application;

[0020] Figure 2 A schematic diagram of a power device life test device according to an embodiment of the present application;

[0021] Figure 3 A flow chart of a power device life test method according to an embodiment of the present application;

[0022] Figure 4 A schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0023] The specific implementation methods of the present application will be further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present application but are not intended to limit the scope of the present application.

[0024] Power devices are an important part of power electronic systems and play a vital role in them. Life testing of power devices can help us understand how long the devices can continue to work under specified working conditions. It plays an irreplaceable role in ensuring the performance, reliability and long-term stability of the devices and is also an indispensable part of the power electronics industry.

[0025] However, the current power device life test scheme cannot accurately simulate the actual working conditions of the power device, resulting in low accuracy of the life test and failure to achieve good test results.

[0026] Therefore, how to improve the accuracy of power device life testing has become a technical problem that needs to be solved urgently.

[0027] In order to solve the above technical problems, the embodiments of the present application propose a power device life test method and a power device life test device, which simulate the actual working condition of the power device to be tested through a double pulse test circuit, and when a first preset number of continuous pulses are input to the power device to be tested, the thermal resistance test is performed on the power device to be tested, so as to determine whether it has failed according to the current junction-to-shell thermal resistance of the power device to be tested. In this way, the actual working condition of the power device to be tested can be effectively simulated, and the actual life of the power device to be tested can be accurately tested.

[0028] The following is an introduction to the power device life test device proposed in this application. Figure 1 As shown, the power device life test apparatus 100 may include a control module 101 and a double pulse test circuit 102 .

[0029] The double pulse test circuit 102 is connected to the power device to be tested, and is used to input continuous pulses to the power device to be tested when it is turned on. The control module 101 is connected to the double pulse test circuit 102, and is used to execute the power device life test method proposed in the embodiment of the present application. The specific steps of the power device life test method are described in the following embodiment and will not be described in detail here.

[0030] Generally speaking, the double pulse test circuit 102 includes a half-bridge structure, which is composed of a power device to be tested and another fixed power device. The fixed power device remains in a closed state, and the power device to be tested is used to receive a pulse signal to test its switching characteristics. It can be understood that the double pulse test circuit 102 is a conventional circuit in the field of power device testing, and will not be described or limited in detail herein.

[0031] In one embodiment, if Figure 2 As shown, the power device life test device 100 also includes a power supply circuit 103. The power supply circuit 103 is connected to the gate-source terminals of the power device to be tested, and is used to input a conduction voltage to the gate-source terminals of the power device to be tested when it is turned on. The control module 101 is also used to connect to the power supply circuit 103, and when the thermal resistance test is performed on the power device to be tested, the path between the power supply circuit 103 and the power device to be tested is opened. The specific steps of performing the thermal resistance test on the power device to be tested are described in the following embodiments, which will not be described in detail here.

[0032] The power device life test method executed by the control module 101 is described in detail below. Figure 3 The following steps are shown:

[0033] Step 110: Opening a path between the double pulse test circuit and the power device to be tested, so as to input continuous pulses to the power device to be tested by using the double pulse test circuit.

[0034] Step 120: In response to the number of consecutive pulses input to the power device under test reaching a first preset number, shutting off the path between the double pulse test circuit and the power device under test.

[0035] The first preset number is less than the maximum number of pulse cycles indicated by the rated life of the power device to be tested, wherein the rated life refers to the expected life of the power device to be tested when it leaves the factory. In one example, the rated life indicates that the power device to be tested can cycle 50,000 pulses, and the first preset number should be less than 50,000. Specifically, the first preset number can be determined based on the maximum number of pulse cycles indicated by the rated life of the power device to be tested, and its specific value can be set based on actual conditions or experience, and is not limited here.

[0036] Step 130: Perform a thermal resistance test on the power device to be tested to obtain the current junction-to-case thermal resistance of the power device to be tested.

[0037] In one embodiment, the power device life test device further includes a power supply circuit connected to the control module and the gate-source terminals of the power device to be tested. The above step 130, i.e., the step of performing a thermal resistance test on the power device to be tested and obtaining the current junction-to-case thermal resistance of the power device to be tested, may include: opening a path between the power supply circuit and the power device to be tested, so as to input a conduction voltage to the gate-source terminals of the power device to be tested by using the power supply circuit. Then, the current junction-to-case thermal resistance of the power device to be tested is obtained by testing using a transient thermal resistance test method.

[0038] Specifically, the transient thermal resistance test method can apply transient thermal power to the power device to be tested, record the temperature change of the power device to be tested over time, and then calculate the current junction-to-case thermal resistance.

[0039] In one example, a power supply circuit can be used to input a 20V on-voltage to both ends of the gate source of the power device to be tested to turn on the power device to be tested. Then a heating current is input to the power device to be tested to heat the power device to be tested. After heating for 2-3 minutes, stop inputting the heating current, and input a voltage of -6V to the power device to be tested so that the body diode of the power device to be tested is turned on. Then a test current of 50mA is input to the power device to be tested, and the forward DC resistance between the drain and source of the power device to be tested is recorded. Based on the forward DC resistance and the K coefficient, the cooling curve (i.e., the junction temperature-time curve) of the power device to be tested is determined. Finally, the thermal resistance and thermal capacitance of the power device to be tested are extracted based on the cooling curve, and a structure function curve is constructed to determine the current junction-shell thermal resistance of the power device to be tested.

[0040] It can be understood that the transient thermal resistance test method is a conventional thermal resistance test method in the field of power device testing, which is not described in detail or limited here. In other examples, other thermal resistance test methods other than the transient thermal resistance test method in the field of power device testing can also be used to perform thermal resistance tests on the power device to be tested, and the thermal resistance test method is not limited here.

[0041] Step 140: Determine whether the power device to be tested is failed based on the current junction-to-case thermal resistance.

[0042] "Failure" refers to the end of the life of the power device under test. In one embodiment, the failure of the power device under test can be determined by obtaining the initial junction-to-case thermal resistance of the power device under test before the test, and then determining whether the power device under test has failed based on the change value between the current junction-to-case thermal resistance and the initial junction-to-case thermal resistance.

[0043] In one example, it can be determined whether the current junction-to-case thermal resistance is higher than the initial junction-to-case thermal resistance by a preset percentage. If the current junction-to-case thermal resistance is higher than the initial junction-to-case thermal resistance by a preset percentage, it is determined that the power device to be tested has failed. If the current junction-to-case thermal resistance is not higher than the initial junction-to-case thermal resistance by a preset percentage, it is determined that the power device to be tested has not failed. Specifically, the preset percentage is generally 20%, that is, when the current junction-to-case thermal resistance is 20% higher than the initial junction-to-case thermal resistance, it means that the power device to be tested has failed. It can be understood that the specific value of the preset percentage can be set according to actual conditions and is not limited here.

[0044] In one embodiment, the initial junction-to-case thermal resistance is determined by the following steps: obtaining the K coefficient of the power device to be tested, and then using a dual-interface transient thermal resistance test method to determine the initial junction-to-case thermal resistance of the power device to be tested before the test based on the K coefficient.

[0045] The K factor is used to characterize the relationship between the junction temperature of the device and the device voltage. Before executing the above-mentioned power device life test method, the K factor of the power device to be tested can be tested by a conventional K factor measurement method in the technical field. Specifically, the voltage drop generated by the body diode of the power device to be tested when a small signal current passes through the body diode at different junction temperatures can be tested to generate the K factor of the power device to be tested. The K factor measurement method is not limited or detailed here.

[0046] In one example, a dual-interface transient thermal resistance test method is to obtain a structure function curve of a power device to be tested by testing under two conditions: dry method (direct contact, i.e., no thermal grease is applied to the bottom of the power device to be tested) and wet method (i.e., thermal grease is evenly applied to the bottom of the power device to be tested). The thermal resistance at the separation point of the two structure function curves is then determined as the initial junction-to-case thermal resistance of the power device to be tested.

[0047] In one example, the step of testing and obtaining the structure function curve of the power device to be tested includes: using a power supply circuit to input a 20V on-voltage to both ends of the gate source of the power device to be tested to turn on the power device to be tested. Then input a heating current to the power device to be tested to heat the power device to be tested. After heating for 2-3 minutes, stop inputting the heating current, and input a voltage of -6V to the power device to be tested so that the body diode of the power device to be tested is turned on. Then input a test current of 50mA to the power device to be tested, and record the measured forward DC resistance between the drain and source of the power device to be tested. Based on the forward DC resistance and the K coefficient, determine to obtain the cooling curve (junction temperature-time curve) of the power device to be tested. Finally, extract the thermal resistance and thermal capacitance of the power device to be tested based on the cooling curve to form a structure function curve.

[0048] Step 150: If the power device under test fails, it is determined that the actual life of the power device under test does not reach the rated life.

[0049] If the power device under test fails, it means that the actual life of the power device under test has not reached the rated life, and the life test can be terminated at this time.

[0050] In one embodiment, the power device life test method also includes: if it is determined based on the current junction-to-case thermal resistance that the power device to be tested has not failed, then reopening the path between the double pulse test circuit and the power device to be tested, thereby continuing to input continuous pulses into the power device to be tested to test the life of the power device to be tested again, and repeating this process back and forth, the accuracy of the life test of the power device to be tested can be further improved.

[0051] Specifically, if it is determined based on the current junction-to-case thermal resistance that the power device to be tested has not failed, the path between the double pulse test circuit and the power device to be tested can be reopened to input continuous pulses to the power device to be tested using the double pulse test circuit. Then, in response to the number of continuous pulses input to the power device to be tested reaching a second preset number, the path between the double pulse test circuit and the power device to be tested is shut off. A thermal resistance test is performed on the power device to obtain the current junction-to-case thermal resistance of the power device to be tested, and whether the power device to be tested has failed is determined based on the current junction-to-case thermal resistance.

[0052] The second preset number is less than the maximum number of pulse cycles indicated by the remaining life of the power device to be tested. In one example, the maximum number of pulse cycles indicated by the remaining life can be determined based on the first preset number and the maximum number of pulse cycles indicated by the rated life. For example, the rated life indicates that the power device to be tested can cycle 50,000 pulses, the first preset number is 40,000 times, and after 40,000 consecutive pulses are input, the power device to be tested has not failed, indicating that the maximum number of pulse cycles indicated by its remaining life is 10,000 times.

[0053] An embodiment of the present application also provides an electronic device, which includes a processor and a memory, wherein the memory stores at least one instruction or at least one program, and the at least one instruction or the at least one program is loaded and executed by the processor to implement a power device life test method as provided in the above method embodiment.

[0054] The memory can be used to store software programs and modules. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, application programs required for functions, etc.; the data storage area can store data created according to the use of the device, etc. In addition, the memory can include a high-speed random access memory and can also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices. Accordingly, the memory can also include a memory controller to provide the processor with access to the memory.

[0055] In a specific embodiment, Figure 4 A schematic diagram of the structure of an electronic device for implementing the embodiment of the present application is shown. The electronic device may be a computer terminal, a mobile terminal or other device. The electronic device may also participate in or include the power device life test device provided in the embodiment of the present application.

[0056] like Figure 4As shown, an embodiment of the present application provides an electronic device 400, including: a processor 401 and a memory 402, in which computer program instructions are stored, wherein when the computer program instructions are executed by the processor, the processor 401 executes the power device life test method described in the above embodiment.

[0057] Furthermore, if Figure 4 As shown, the electronic device 400 further includes a network interface 403 , an input device 404 , a hard disk 405 , and a display device 406 .

[0058] The above-mentioned interfaces and devices can be interconnected through a bus architecture. The bus architecture can be a bus and bridge that can include any number of interconnected buses. Specifically, one or more central processing units (CPUs) represented by processor 401 and various circuits of one or more memories represented by memory 402 are connected together. The bus architecture can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits together. It can be understood that the bus architecture is used to achieve connection and communication between these components. In addition to the data bus, the bus architecture also includes a power bus, a control bus, and a status signal bus, which are all well known in the art, so they are not described in detail herein.

[0059] The network interface 403 can be connected to a network (such as the Internet, a local area network, etc.), obtain relevant data from the network, and save it in the hard disk 405.

[0060] The input device 404 can receive various instructions input by the operator and send them to the processor 401 for execution. The input device 404 can include a keyboard or a pointing device, such as a mouse, a trackball, a touch pad or a touch screen.

[0061] The display device 406 can display the result obtained by the processor 401 executing the instruction.

[0062] The memory 402 is used to store programs and data necessary for the operation of the operating system, as well as data such as intermediate results during the calculation process of the processor 401.

[0063] It is understood that the memory 402 in the embodiment of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM) or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. The memory 402 of the apparatus and method described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0064] In some implementations, the memory 402 stores the following elements, executable modules or data structures, or a subset thereof, or an extended set thereof: an operating system 4021 and an application 4022 .

[0065] The operating system 4021 includes various system programs, such as a framework layer, a core library layer, a driver layer, etc., which are used to implement various basic services and process hardware-based tasks. The application 4022 includes various application programs, such as a browser, etc., which are used to implement various application services. The program for implementing the method of the embodiment of the present application can be included in the application 4022.

[0066] The processor 401 executes the power device life test method described in the above embodiment when calling and executing the application program and data stored in the memory 402, specifically, the program or instruction stored in the application program 4022.

[0067] The method disclosed in the above embodiment of the present application can be applied to the processor 401, or implemented by the processor 401. The processor 401 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit or software instructions in the processor 401. The above-mentioned processor 401 can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a readily available programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, and can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware decoding processor to execute, or the hardware and software modules in the decoding processor are combined and executed. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 402, and the processor 401 reads the information in the memory 402 and completes the steps of the above method in combination with its hardware.

[0068] It is understood that the embodiments described herein can be implemented in hardware, software, firmware, middleware, microcode or a combination thereof. For hardware implementation, the processing unit can be implemented in one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), general purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described in the present application or a combination thereof.

[0069] For software implementation, the techniques described herein can be implemented by modules (e.g., procedures, functions, etc.) that perform the functions described herein. The software code can be stored in a memory and executed by a processor. The memory can be implemented in the processor or outside the processor.

[0070] In addition, an embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the processor executes the power device life test method as described in the above embodiment.

[0071] In the several embodiments provided in the present application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0072] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may be physically included separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0073] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform some steps of the sending and receiving method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, referred to as ROM), random access memory (RandomAccess Memory, referred to as RAM), disk or optical disk and other media that can store program codes.

[0074] The above is a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles described in the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A power device life test method, characterized in that: Applicable to a power device life test device, wherein the power device life test device comprises a control module, and a double pulse test circuit connected to the control module and the power device to be tested, the control module is used to implement the power device life test method, and the power device life test method comprises the following steps: Opening a path between the double pulse test circuit and the power device to be tested, so as to input continuous pulses to the power device to be tested by using the double pulse test circuit; In response to the number of consecutive pulses input to the power device under test reaching a first preset number, shutting off the path between the double pulse test circuit and the power device under test, wherein the first preset number is less than the maximum number of pulse cycles indicated by the rated life of the power device under test; Performing a thermal resistance test on the power device to be tested to obtain a current junction-to-case thermal resistance of the power device to be tested; Determining whether the power device to be tested has failed based on the current junction-to-case thermal resistance; If so, it is determined that the actual life of the power device to be tested does not reach the rated life.

2. The power device life test method according to claim 1, characterized in that: The step of determining whether the power device to be tested has failed based on the current junction-to-case thermal resistance comprises: Obtaining the initial junction-to-case thermal resistance of the power device to be tested before testing; Whether the power device to be tested fails is determined based on a change value between the current junction-to-case thermal resistance and the initial junction-to-case thermal resistance.

3. The power device life test method according to claim 2, characterized in that: The step of determining whether the power device to be tested has failed based on the change value between the current junction-to-case thermal resistance and the initial junction-to-case thermal resistance comprises: determining whether the current junction-to-case thermal resistance is higher than the initial junction-to-case thermal resistance by a preset percentage; If yes, it is determined that the power device to be tested has failed; If not, it is determined that the power device to be tested has not failed.

4. The power device life test method according to claim 2, characterized in that: The initial junction-to-case thermal resistance is determined using the following steps: Obtaining the K factor of the power device to be tested; The dual-interface transient thermal resistance test method is used to determine the initial junction-to-case thermal resistance of the power device to be tested before the test based on the K factor.

5. The power device life test method according to claim 1, characterized in that: The power device life test device further includes a power supply circuit connected to the control module and the gate-source terminals of the power device to be tested. The step of performing a thermal resistance test on the power device to be tested to obtain a current junction-to-case thermal resistance of the power device to be tested includes: Opening a path between the power supply circuit and the power device to be tested, so as to input a conduction voltage to both ends of the gate and source of the power device to be tested by using the power supply circuit; The current junction-to-case thermal resistance of the power device to be tested is obtained by using a transient thermal resistance test method.

6. The power device life test method according to claim 1, characterized in that: The method further comprises: If it is determined based on the current junction-to-case thermal resistance that the power device to be tested has not failed, reopening the path between the double pulse test circuit and the power device to be tested to input continuous pulses to the power device to be tested using the double pulse test circuit; In response to the number of consecutive pulses input to the power device under test reaching a second preset number, shutting off the path between the double pulse test circuit and the power device under test; wherein the second preset number is less than the maximum number of pulse cycles indicated by the remaining life of the power device under test; Performing a thermal resistance test on the power device to be tested to obtain a current junction-to-case thermal resistance of the power device to be tested; Determine whether the power device to be tested fails based on the current junction-to-case thermal resistance.

7. A power device life test device, characterized in that: include: A double pulse test circuit is connected to the power device to be tested and is used to input continuous pulses to the power device to be tested when turned on; A control module is connected to the double pulse test circuit and is used to execute the power device life test method according to any one of claims 1 to 6.

8. The power device life test device according to claim 7, characterized in that: Also includes: A power supply circuit connected to both ends of the gate and source of the power device to be tested, and used to input a conduction voltage to both ends of the gate and source of the power device to be tested when turned on; The control module is also used to connect with the power supply circuit, and to open the path between the power supply circuit and the power device to be tested when performing a thermal resistance test on the power device to be tested.

9. An electronic device, characterized in that: include: processor; and a memory having computer program instructions stored therein, Wherein, when the computer program instructions are executed by the processor, the processor is enabled to execute the power device life test method according to any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the processor executes the power device life test method according to any one of claims 1 to 6.