Frequency superposition pulse circuit based on avalanche transistor, generator and control method

Abstract

The invention belongs to the technical field of pulse power, and particularly discloses a frequency superposition pulse circuit based on an avalanche transistor, a generator and a control method. According to the frequency superposition pulse circuit, the frequency superposition pulse circuit is composed of the multiple pulse units, the finally output repetition frequency pulse is composed of the outputs of the multiple pulse units, superposition on the frequency is achieved, and the pulse repetition frequency can be improved while the pulse amplitude can be effectively guaranteed. The pulse repetition frequency of a single pulse unit can be effectively reduced while the purpose of high repetition frequency output is achieved, the problem that the repetition frequency of output pulses of a single Marx circuit based on an avalanche transistor is insufficient is solved, meanwhile, the problem that the avalanche transistor and a resistor in the single pulse unit generate heat under high repetition frequency pulses can be effectively relieved, and the pulse repetition frequency of the single pulse unit can be effectively reduced. And thermal damage of the device under high repetition frequency pulses is avoided. The n isolation diodes in the same pulse unit are connected in series, so that the output end of the whole pulse unit generates high voltage, an isolation effect is achieved, and false triggering of m pulse units is avoided.

Description

Technical Field

[0001] The present application belongs to the field of pulse power technology, and more specifically, relates to a frequency superposition pulse circuit, a generator and a control method based on an avalanche transistor. Background Art

[0002] High-amplitude, fast-edge pulse power technology is widely used in fields such as plasma generation and ultra-wideband. As the core switching element in pulse power systems, power semiconductor devices' static and dynamic characteristics determine the output performance of pulse power systems. Characteristics such as static withstand voltage, on-resistance, and voltage drop are key parameters for power semiconductors as pulse switching elements.

[0003] As an ultra-high-speed, fast-edge semiconductor pulse power device used in nanosecond and picosecond pulse power systems, avalanche transistors have a series of excellent characteristics such as high speed and high reliability. In order to meet the demand for higher output amplitudes, multiple avalanche transistors are usually connected in series, in parallel, or to form a Marx circuit to build a pulse circuit. Among them, the traditional Marx circuit based on avalanche transistors has the base of the first-stage device triggered by an external signal to turn on. The avalanche transistors in the subsequent stages short-circuit the emitter and the base, and are triggered by a voltage ramp. The device will overvoltage-break down and turn on due to the overshoot of the collector-emitter voltage. Due to the small overall size of the avalanche transistor device, the Marx circuit composed of it has good integration and is easy to trigger and control. It can generate pulses with amplitudes far higher than the power supply voltage. Therefore, it has been widely used by scholars at home and abroad.

[0004] However, the Marx circuit, composed of avalanche transistors, is a capacitive energy storage system. Its pulse repetition frequency is controlled by the capacitor's charging time constant. Furthermore, Marx circuits exhibit output saturation. Therefore, while increasing the capacitance to increase the output amplitude, there's no way to simultaneously reduce the charging time constant and thus increase the pulse repetition frequency. Reducing the charging time constant by reducing the current-limiting resistor or capacitor value not only increases the resistor's rated power but also reduces the pulse amplitude. Therefore, increasing the output amplitude of a single Marx circuit doesn't effectively increase its pulse repetition frequency. Fundamentally addressing the pulse repetition frequency of a single avalanche transistor-based Marx circuit is a critical issue. Summary of the Invention

[0005] In view of the defects of the prior art, the purpose of this application is to provide a frequency superposition pulse circuit, generator and control method based on avalanche transistor, aiming to solve the problem of pulse repetition frequency of a single avalanche transistor-based Marx circuit.

[0006] In the first aspect, the present application relates to a frequency superposition pulse circuit based on an avalanche transistor, comprising a plurality of pulse units, a plurality of isolation diodes and a load resistor; the output end of each pulse unit is connected to the cathode of the corresponding isolation diode and then connected in parallel with the same load resistor; the anodes of all isolation diodes are connected to the high-voltage end of the load resistor; the pulse unit is composed of multiple stages of Marx circuits in parallel, and each stage of the Marx circuit includes an avalanche transistor, a capacitor, a current-limiting resistor and an isolation diode; in each pulse unit, the base of the avalanche transistor of the first-stage Marx circuit is used to connect to the high-voltage end of an external signal generator, and the emitter is used to connect to the ground end of the signal generator; the emitter and base of the avalanche transistor of the subsequent stage are short-circuited, and the cathode of the isolation diode is connected to the anode of the isolation diode of the previous stage.

[0007] Preferably, in each Marx circuit, one end of the capacitor is connected to the positive electrode of the isolation diode to form a series structure of the capacitor and the isolation diode, the collector of the avalanche transistor is connected to the other end of the capacitor, the emitter is connected to the cathode of the isolation diode, the low voltage end of the current limiting resistor is connected to the collector of the avalanche transistor, and the high voltage end is used to connect to an external DC voltage source.

[0008] It should be noted that the overall topological structure is composed of electronic components, and the entire device has the advantages of miniaturization and integration.

[0009] Preferably, in different levels of Marx circuits in the same pulse unit, the avalanche transistors, current-limiting resistors, capacitors and isolation diodes are of the same model.

[0010] Preferably, the avalanche transistors, current limiting resistors, capacitors and isolation diodes of different pulse units are of the same model.

[0011] Preferably, the number of pulse units and isolation diodes is the same, ranging from 1 to 6.

[0012] In the second aspect, the present application relates to a frequency superposition pulse generator based on an avalanche transistor, comprising a frequency superposition pulse circuit, a DC voltage source and a signal generator as described in the first aspect; the DC voltage source is respectively connected to multiple pulse units for power supply, so that the avalanche transistor of the first-stage Marx circuit in each pulse unit is in a critical avalanche state; the signal generator is used to generate trigger signals in sequence according to a time sequence, control each pulse unit to be triggered at different times, and form a frequency superposition pulse on the same load resistor.

[0013] Preferably, the pulse repetition frequency of the frequency superposition pulse is , the pulse generation interval is , m is the number of pulse units.

[0014] Preferably, the signal generator is a square wave signal source.

[0015] Preferably, the frequency superposition pulse generator can output a repetition rate of 200 kHz, a pulse amplitude of up to 0.8 kV, an output current of up to 16 A on the 50Ω load side, and a rise time of 3 ns.

[0016] On the third aspect, the present application relates to a control method for a frequency superposition pulse generator based on an avalanche transistor, which first sends a trigger signal to the first pulse unit alone to control its triggering; and then sends a trigger signal to the next pulse unit in turn at the same pulse interval to control each pulse unit to be triggered at the same pulse interval.

[0017] In a fourth aspect, the present application relates to a computer-readable storage medium storing a computer program. When the computer program runs on a processor, the processor executes the method described in the third aspect.

[0018] In a fifth aspect, the present application relates to a computer program product. When the computer program product runs on a processor, the processor executes the method described in the third aspect.

[0019] It can be understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.

[0020] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the existing technologies: (1) This application proposes a frequency superposition pulse circuit based on an avalanche transistor, which is composed of multiple pulse units. The repetition frequency pulse finally output is composed of the output of multiple pulse units, realizing frequency superposition, which can effectively ensure the pulse amplitude while increasing the pulse repetition frequency. While achieving the purpose of high repetition rate output, it can effectively reduce the pulse repetition frequency of a single pulse unit, solving the problem of insufficient repetition frequency of the output pulse of a single Marx circuit based on an avalanche transistor. At the same time, it can also effectively alleviate the heating problem of the avalanche transistor and resistor in a single pulse unit under high repetition rate pulses, avoiding thermal damage to the device under high repetition rate pulses.

[0021] (2) This application proposes a frequency superposition pulse circuit based on an avalanche transistor. N isolation diodes in the same pulse unit are connected in series, so that a high voltage is generated at the output end of the entire pulse unit, which plays an isolation role and avoids the false triggering of m pulse units. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of the topology of a frequency superposition pulse generator based on an avalanche transistor provided in an embodiment of the present application.

[0023] Figure 2This is a working principle diagram of a frequency superposition pulse generator based on an avalanche transistor provided in an embodiment of the present application.

[0024] Figure 3 This is a structural diagram of a frequency superposition pulse generator based on an avalanche transistor provided in an embodiment of the present application in the simulation software PSpice.

[0025] Figure 4 This is a pulse waveform diagram generated by a single pulse unit in a frequency superposition pulse generator based on an avalanche transistor provided in an embodiment of the present application.

[0026] Figure 5 This is a diagram of the simulation results of the repetition rate pulse generated by a single pulse unit provided in an embodiment of the present application.

[0027] Figure 6 This is a diagram of the simulation results of a repetitive frequency pulse formed by frequency superposition of the pulses generated by all pulse units provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0029] Expressions such as "include" and "may include" used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as "include" and / or "have" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components, or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0030] The term "and / or" in this application describes an association relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, or B exists alone. The symbol " / " in this application indicates that the associated objects are in an "or" relationship, for example, A / B means A or B.

[0031] In the specification and claims of this application, the terms "first" and "second" are used to distinguish different objects, rather than to describe a specific order of objects. For example, "first response message" and "second response message" are used to distinguish different response messages, rather than to describe a specific order of response messages.

[0032] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0033] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more, for example, multiple processing units means two or more processing units, etc.; multiple elements means two or more elements, etc.

[0034] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0035] In the first aspect, the present application relates to a frequency superposition pulse circuit based on an avalanche transistor, comprising a plurality of pulse units, a plurality of isolation diodes and a load resistor; the output end of each pulse unit is connected to the cathode of the corresponding isolation diode and then connected in parallel with the same load resistor; the anodes of all isolation diodes are connected to the high-voltage end of the load resistor; the pulse unit is composed of multiple stages of Marx circuits in parallel, and each stage of the Marx circuit includes an avalanche transistor, a capacitor, a current-limiting resistor and an isolation diode; in each pulse unit, the base of the avalanche transistor of the first-stage Marx circuit is used to connect to the high-voltage end of an external signal generator, and the emitter is used to connect to the ground end of the signal generator; the emitter and base of the avalanche transistor of the subsequent stage are short-circuited, and the cathode of the isolation diode is connected to the anode of the isolation diode of the previous stage.

[0036] Preferably, in each Marx circuit, one end of the capacitor is connected to the positive electrode of the isolation diode to form a series structure of the capacitor and the isolation diode, the collector of the avalanche transistor is connected to the other end of the capacitor, the emitter is connected to the cathode of the isolation diode, the low voltage end of the current limiting resistor is connected to the collector of the avalanche transistor, and the high voltage end is used to connect to an external DC voltage source.

[0037] It should be noted that the overall topological structure is composed of electronic components, and the entire device has the advantages of miniaturization and integration.

[0038] Preferably, in different levels of Marx circuits in the same pulse unit, the avalanche transistors, current-limiting resistors, capacitors and isolation diodes are of the same model.

[0039] Preferably, the avalanche transistors, current limiting resistors, capacitors and isolation diodes of different pulse units are of the same model.

[0040] Preferably, the number of pulse units and isolation diodes is the same, ranging from 1 to 6.

[0041] In the second aspect, the present application relates to a frequency superposition pulse generator based on an avalanche transistor, comprising a frequency superposition pulse circuit, a DC voltage source and a signal generator as described in the first aspect; the DC voltage source is respectively connected to multiple pulse units for power supply, so that the avalanche transistor of the first-stage Marx circuit in each pulse unit is in a critical avalanche state; the signal generator is used to generate trigger signals in sequence according to a time sequence, control each pulse unit to be triggered at different times, and form a frequency superposition pulse on the same load resistor.

[0042] Preferably, the pulse repetition frequency of the frequency superposition pulse is , the pulse generation interval is , m is the number of pulse units.

[0043] Preferably, the signal generator is a square wave signal source.

[0044] Preferably, the frequency superposition pulse generator can output a repetition rate of 200 kHz, a pulse amplitude of up to 0.8 kV, an output current of up to 16 A on the 50Ω load side, and a rise time of 3 ns.

[0045] On the third aspect, the present application relates to a control method for a frequency superposition pulse generator based on an avalanche transistor, which first sends a trigger signal to the first pulse unit alone to control its triggering; and then sends a trigger signal to the next pulse unit in turn at the same pulse interval to control each pulse unit to be triggered at the same pulse interval.

[0046] Example like Figure 1 As shown, this embodiment provides a frequency superposition pulse generator based on an avalanche transistor, including m pulse units 1-m connected to the same load resistor RL, and the multiple pulse units are isolated by diodes D1-Dm.

[0047] Specifically, the output pulses of each pulse unit are connected to the same load resistor RL after being isolated by diodes D1 to Dm, with the anode of the diode connected to the load resistor and the cathode connected to the output end of the pulse unit.

[0048] Preferably, the m pulse units are powered by the same direct current voltage source DC and connected to the same ground line.

[0049] Each pulse unit i is composed of an n-stage Marx circuit consisting of avalanche transistors. Each Marx circuit j includes avalanche transistor Qi,j, capacitor Ci,j, current-limiting resistor Ri,j, and isolation diode Di,j. Among them, capacitor Ci,j and diode Di,j are connected in series and then in parallel with transistor Qi,j. Then, current-limiting resistor Ri,j is connected to form a single-stage Marx circuit. The base of the first-stage transistor Qi,1 is connected to the drive signal Ti.

[0050] The anode of the last-stage diode Di,n of each pulse unit i is connected to the isolation diode Di and then to the load resistor RL. The diodes Di,1 to Di,n are connected in series, and the load resistor RL is connected in parallel with the series structure of the diodes Di,1 to Di,n.

[0051] The transistor Qi,j of each stage in each pulse unit i is connected in series with a current-limiting resistor Ri,j and then connected in parallel with a DC voltage source DC.

[0052] A single pulse unit i is triggered by a driver Ti, which turns on the avalanche transistor Qi,1 in the first stage, discharges the capacitor Ci,1 and generates a negative pulse on the diode Di,1, thereby turning on the avalanche transistor Qi,2 in the second stage due to overvoltage, and discharges the capacitors Ci,1 and Ci,2 in series, triggering the transistors to turn on step by step. When the transistors Qi,1 to Qi,n are turned on step by step, the Ci,1 to Ci,n are discharged in series and form a single pulse on RL.

[0053] By utilizing the frequency superposition topology of the present application, on the basis of controlling multiple drivers T1~Tm to generate trigger signals in a timing sequence, multiple pulse units 1~m generate output pulses in sequence and form frequency superposition pulses on the same load RL, which can effectively solve the problem of insufficient pulse repetition frequency of a single pulse unit.

[0054] Preferably, the ground lines of the multiple drivers T1 to Tm connected to the multiple pulse units are connected together, thereby ensuring that the provided trigger signals do not affect each other.

[0055] like Figure 1 As shown, during the charging process, the DC power supply DC charges all pulse units 1~m. In a single pulse unit i, the charging current follows the charging path of DC→Ri,1~Ri,n→Ci,1~Ci,n→Di,1~Di,n→GND, charging each charging capacitor Ci,1~Ci,n. The transistors Qi,1~Qi,n remain in the off state and their collector-emitter voltage VCE is the voltage provided by the DC power supply DC, so that the transistors are in the critical avalanche state.

[0056] like Figure 1As shown, during the triggering process of a single pulse unit i, driver Ti provides a trigger signal, which is applied to the base of the first-stage transistor Qi,1, turning it on. Capacitor Ci,1 discharges along the path Ci,1→Qi,1→Di,1→Ci,1, forming a negative pulse on diode Di,1. This causes the emitter voltage of the second-stage transistor Qi,2 to change from ground potential to a negative potential, thereby causing Qi,2's VCE voltage to exceed the static withstand voltage, causing the transistor to overvoltage turn on. Ci,2 discharges in series with Ci,1 and along the path Ci,2→Qi,2→Ci,1→Qi,1→Di,1→Di,2→Ci,2, forming a negative pulse on Di,2, which is used to trigger the third-stage transistor Qi,3. Subsequent-stage transistors are triggered and turned on sequentially in this manner.

[0057] like Figure 1 As shown in the figure, during the discharge process of a single pulse unit i, when the n-level transistors Qi,1~Qi,n are turned on, Ci,1~Ci,n are connected in series and form a discharge path Ci,n→Qi,n→Ci,(n-1)→Qi,(n-1)→···→Ci,1→Qi,1→RL→Di→Ci,n, thereby forming a final pulse at the load RL.

[0058] It can be seen that in the pulse unit of the present application, except for the first-stage avalanche transistor which requires a trigger pulse, the base-emitter of the remaining stages are short-circuited and no additional external trigger is required.

[0059] like Figure 1 As shown, during the process of multiple pulse units 1~m discharging in time sequence, multiple drivers T1~Tm generate trigger signals in time sequence, controlling each pulse unit 1~m to be triggered at different times, and forming multiple pulse sequences on the load RL. The pulse repetition frequency of a single pulse unit is f, and the pulse generation interval is 1 / f. In the frequency superposition topology of the present application, when multiple pulse units are frequency superimposed and a pulse sequence is formed on the load RL, the pulse repetition frequency is , the pulse generation interval is .

[0060] like Figure 2 As shown in the figure, this embodiment provides a working principle diagram of a frequency-addition pulse generator based on an avalanche transistor. By controlling the delay of each signal port of the signal generator, the temporal sequence of different trigger signals is controlled to form a trigger pulse sequence with equal time intervals of 1 / (m*f). The signal time interval of a single pulse unit is 1 / f, and the trigger pulse unit generates output pulses with a time interval of 1 / f, which is controlled by the delay of the signal generator of the single pulse unit. Multiple pulse units 1-m form a final pulse sequence on the load RL, so that the pulse units 1-m generate sequential pulses, thereby achieving the effect of pulse frequency addition.

[0061] like Figure 3 As shown in FIG, this embodiment provides a structure diagram of a frequency superposition pulse generator based on an avalanche transistor in the simulation software PSpice. The capacitors, resistors, and diodes use the idealized devices provided by the PSpice software. The relevant electrical parameters and specific models are shown in FIG. Figure 3 .

[0062] like Figure 4 As shown, this embodiment provides a pulse waveform generated by a single pulse unit in a frequency superposition pulse generator based on an avalanche transistor. A single output pulse can reach more than 600V and has a fast rising edge and a narrow pulse width.

[0063] The repeated pulse simulation results of a single pulse unit i are as follows: Figure 5 As shown, the pulse repetition frequency is 10kHz and the pulse interval is 10us.

[0064] The simulation results of the repeated pulse of the frequency superposition topology of this embodiment with two pulse units are as follows: Figure 6 As shown in the figure, the pulse repetition frequency is 20kHz, which is increased by 2 times, and the pulse interval is reduced to 5us.

[0065] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A frequency superposition pulse circuit based on an avalanche transistor, characterized in that: It includes a plurality of pulse units, a plurality of isolation diodes and a load resistor; The output terminal of each pulse unit is connected to the cathode of the corresponding isolation diode and then connected in parallel with the same load resistor; The anodes of all isolation diodes are connected to the high voltage end of the load resistor; The pulse unit is composed of multiple Marx circuits connected in parallel, and each Marx circuit includes an avalanche transistor, a capacitor, a current limiting resistor and an isolation diode; In each pulse unit, the base of the avalanche transistor of the first-stage Marx circuit is used to connect to the high-voltage end of the external signal generator, and the emitter is used to connect to the ground end of the signal generator. The emitter and base of the avalanche transistor of the subsequent stage are short-circuited, and the cathode of the isolation diode is connected to the anode of the isolation diode of the previous stage.

2. The frequency superposition pulse circuit according to claim 1, characterized in that: In each level of the Marx circuit, one end of the capacitor is connected to the positive electrode of the isolation diode to form a series structure of capacitor and isolation diode. The collector of the avalanche transistor is connected to the other end of the capacitor, and the emitter is connected to the cathode of the isolation diode. The low voltage end of the current limiting resistor is connected to the collector of the avalanche transistor, and the high voltage end is used to connect to an external DC voltage source.

3. The frequency superposition pulse circuit according to claim 1, wherein: In different levels of Marx circuits in the same pulse unit, the avalanche transistors, current limiting resistors, capacitors and isolation diodes are of the same type.

4. The frequency superposition pulse circuit according to claim 1, wherein: The models of avalanche transistors, current limiting resistors, capacitors and isolation diodes are the same between different pulse units.

5. The frequency superposition pulse circuit according to claim 1, wherein: The number of pulse units and isolation diodes is the same, and the value range is 1 to 6.

6. A frequency superposition pulse generator based on an avalanche transistor, characterized in that: Comprising the frequency superposition pulse circuit, DC voltage source and signal generator according to any one of claims 1 to 5; A DC voltage source is connected to each of the plurality of pulse units for power supply, so that the avalanche transistor of the first-stage Marx circuit in each pulse unit is in a critical avalanche state; The signal generator is used to generate trigger signals in sequence, control each pulse unit to be triggered at different times, and form frequency superposition pulses on the same load resistor.

7. The frequency superposition pulse generator according to claim 6, characterized in that: The pulse repetition frequency of the frequency superposition pulse is , the pulse generation interval is , m is the number of pulse units.

8. The frequency superposition pulse generator according to claim 6, characterized in that: The signal generator is a square wave signal source.

9. The frequency superposition pulse generator according to claim 6, characterized in that: The frequency superposition pulse generator can output a repetition frequency of 200 kHz, a pulse amplitude of up to 0.8 kV, an output current of up to 16 A on the 50Ω load side, and a rise time of 3 ns.

10. A control method for a frequency superposition pulse generator based on an avalanche transistor, characterized in that: First, a trigger signal is sent to the first pulse unit alone to control its triggering; The trigger signal is sent to the next pulse unit in turn at the same pulse interval to control each pulse unit to be triggered at the same pulse interval.

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