Preparation method of monolithic MEMS pressure chip

By integrating the amplifier circuit and dielectric isolation structure inside the MEMS pressure chip, the sensitivity drift and electromagnetic interference problems during the miniaturization process are solved, and high-precision micro-pressure detection and cost reduction are achieved.

CN120518033APending Publication Date: 2025-08-22EAST CHINA INST OF OPTOELECTRONICS INTEGRATEDDEVICE
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Patent Information

Application Number
CN202510958898.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-11
Publication Date
2025-08-22

AI Technical Summary

Technical Problem

The existing MEMS pressure chips have nanoscale processing errors during the miniaturization process, resulting in sensitivity drift and piezoresistive signal amplitude attenuation caused by miniaturization, which is susceptible to circuit noise interference, affecting detection stability and accuracy.

Method used

A monolithic integrated preparation method is adopted, including lithography, injection, annealing, etching and other processes. The amplifier circuit is integrated inside the MEMS chip, and a dielectric isolation structure is formed through high-temperature oxidation, and conductive metal leads are provided in the contact hole to reduce signal transmission distance, suppress electromagnetic interference, and shorten the chip area.

Benefits of technology

It realizes high-precision micro-pressure detection, improves signal transmission stability, reduces chip area by 40%, reduces cost by 30%, and shortens signal transmission distance by 90%, effectively avoiding parasitic capacitors introduced by bonded leads.

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Abstract

The invention provides a preparation method of a monolithic MEMS pressure chip, and the method comprises the steps: preparing an N + buried layer and a shallow-cavity groove-shaped structure on top silicon of an SOI silicon wafer, bonding the SOI silicon wafer and a double-parabolic silicon wafer together, preparing a dielectric isolation structure, a collector region, a base region, a first injection region and a second injection region on the double-parabolic silicon wafer, arranging an emitter region on the base region, and arranging a second injection region on the emitter region. And sputtering metal leads correspondingly matched with the second injection region, the collector region, the base region and the emitter region, and upwards corroding the bottom of the double-parabolic silicon wafer to form a cavity. The preparation scheme provided by the invention has the advantages of clear steps, strong operability, batch manufacturing, high integration level, high signal sensitivity, high structural strength, easiness in sensor integration and the like.
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Description

Technical Field

[0001] The present invention relates to the field of micro-electromechanical systems (MEMS), and in particular to a method for preparing a single-chip MEMS pressure chip. Background Art

[0002] As one of the core achievements of microelectromechanical systems (MEMS) technology, the MEMS pressure chip integrates microelectronics and micromechanics to create a revolutionary miniature pressure detection system. Based on a unique micromechanical structural design, this miniaturized system utilizes the deformation effect of piezoresistors to convert external pressure into a measurable resistance change, thereby achieving high-precision pressure sensing. Its core advantage lies in reducing the size of traditional pressure detection devices to millimeters or even micrometers while maintaining excellent detection performance.

[0003] With the rapid development of smart healthcare, consumer electronics, and industrial automation, the market's performance requirements for MEMS pressure chips continue to escalate. In scenarios such as insulin pump drug control, smartwatch altitude monitoring, and cleanroom micro-differential pressure detection, devices must simultaneously meet stringent specifications such as micropascal-level detection accuracy, nanoampere-level power consumption, and cubic millimeter-level package size. However, as miniaturization progresses, technical bottlenecks are gradually emerging: nanometer-level machining errors in silicon-based sensitive structures can cause device sensitivity drift; the attenuation of piezoresistive signal amplitude caused by miniaturization makes it susceptible to circuit noise interference, ultimately resulting in reduced stability and precision of micro-pressure detection. Summary of the Invention

[0004] The present invention aims to overcome the deficiencies in the prior art and provides a method for preparing a single-chip MEMS pressure chip.

[0005] This application provides the following technical solutions: A method for preparing a monolithic MEMS pressure chip, characterized in that it comprises the following steps: S1, taking an SOI silicon wafer, and forming an N+ buried layer on the top silicon layer of the SOI silicon wafer by photolithography, implantation, annealing, and etching processes; S2, taking a double-polished silicon wafer, and oxidizing the upper and lower surfaces of the double-polished silicon wafer to form an oxide layer; S3, perform wafer-level vacuum bonding on the double-polished silicon wafer and the top silicon layer, and then remove the buried oxide layer and the substrate layer; S4, introducing oxygen into the top silicon (2) at a high temperature of 1000°C for oxidation, and then sequentially performing step-by-step photolithography, high-energy particle implantation, and annealing processes to prepare a dielectric isolation structure; S5. Forming a collector region, a base region, a first implantation region, and a second implantation region of the amplifier circuit on the top silicon layer by photolithography and implantation processes in sequence; S6, forming an emitter region on the base region by sequentially performing photolithography and implantation processes; S7, using LPTEOS film formation, stepper lithography, and dielectric etching in sequence to prepare contact holes corresponding to the second injection region, collector region, base region, and emitter region on the top silicon layer, and using ALSICU sputtering to provide a conductive metal lead in each contact hole (12); S8. Photolithography and anisotropic silicon etching processes are used in sequence to etch a cavity upward from the bottom of the double-polished silicon wafer, thereby forming a monolithic MEMS pressure chip.

[0006] On the basis of the above technical solutions, the following further technical solutions can be provided: In the S4, high-energy ion implantation impurities are: boron B / phosphorus P, energy: 60keV, incident angle: T7, dose: 1e13-2e16.

[0007] In step S4, the annealing temperature is 1000° C. / 1100° C., the annealing time is 1 hour, and the gas introduced is N 2 .

[0008] In step S7 , the thickness of the LPTEOS film is 400 nm.

[0009] In step S7 , the sputtering temperature is 200° C.

[0010] Advantages of the invention: The preparation scheme provided by the present invention features clear steps, strong operability, and mass production capabilities. Monolithic integrated gain circuit technology offers significant advantages in addressing this industry challenge. By directly integrating an amplifier within the MEMS chip, weak sensor signals can be amplified at the source while suppressing electromagnetic interference in the transmission path. Compared to traditional discrete solutions, this integrated design shortens signal transmission distance by 90%, effectively avoiding parasitic capacitance introduced by bonding wires. Furthermore, the integrated architecture reduces chip area by 40%, and the cost per chip after mass production is reduced by approximately 30%. Furthermore, the use of MEMS pressure chips offers advantages such as high integration, high signal sensitivity, high structural strength, and ease of sensor integration. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a schematic diagram of step S1 of the present invention; Figure 2 Schematic diagram of steps S2 and S3 of the present invention Figure 3 It is a structural diagram of a monolithic MEMS pressure chip. DETAILED DESCRIPTION

[0012] like Figure 1-3As shown, a method for preparing a monolithic MEMS pressure chip is characterized in that it includes the following steps: S1, taking an SOI silicon wafer, the SOI silicon wafer including a top silicon 2, a buried oxide layer and a substrate layer distributed in sequence from top to bottom, and forming an N+ buried layer 1 on the top silicon of the SOI silicon wafer by using photolithography, implantation, annealing and etching processes, and the buried layer is used to reduce the body resistance of the collector area.

[0013] S2. Take a double-polished silicon wafer 5 and oxidize the upper and lower surfaces of the double-polished silicon wafer 5 to form an oxide layer 5a.

[0014] S3, performing wafer-level vacuum bonding on the double-polished silicon wafer 5 and the top silicon layer 2, and then removing the buried oxide layer 3 and the substrate layer 4.

[0015] S4. Oxygen is introduced into the top silicon 2 at 1000°C for oxidation. Dielectric isolation structure 6 is then fabricated using a sequential process of stepper lithography, high-energy particle implantation, and annealing. The implanted impurities are boron (B) and phosphorus (P), with an energy of 60 keV, an incident angle of T7, and a dose of 1e13-2e16. The annealing temperature is 1000°C / 1100°C for 1 hour, and the annealing gas used is N2.

[0016] S5. The collector region 8, base region 9, first implant region 10, and second implant region 11 of the amplifier circuit are formed on the top silicon layer 2 by photolithography and implantation processes. The base region 9 and collector region 8 are located inside the dielectric isolation structure 6. The first implant region 10 and second implant region 11 are located outside the dielectric isolation structure 6.

[0017] S6. An emitter region 7 is formed on the base region 9 by sequentially performing photolithography and implantation processes.

[0018] S7, on the top silicon 2, LPTEOS film formation, stepper lithography, and dielectric etching are sequentially used to prepare contact holes 12 corresponding to the second injection region 11, collector region 8, base region 9, and emitter region 7. A conductive metal lead 13 is provided in each contact hole 12 by ALSICU sputtering. The thickness of the LPTEOS film is 400nm, and the sputtering temperature is 200℃. S8. Photolithography and anisotropic silicon etching processes are used in sequence to etch a cavity 14 upward from the bottom of the double-polished silicon wafer 5, thereby forming a monolithic MEMS pressure chip.

Claims

1. A method for preparing a monolithic MEMS pressure chip, characterized by: It includes the following steps: S1. Take an SOI silicon wafer and form an N+ buried layer on the top silicon of the SOI silicon wafer using photolithography, implantation, annealing, and etching processes; S2, taking a double-polished silicon wafer (5), and performing oxidation on the upper and lower surfaces of the double-polished silicon wafer (5) to form an oxide layer (5a); S3, performing wafer-level vacuum bonding of the double-polished silicon wafer (5) and the top silicon layer (2), and then removing the buried oxide layer (3) and the substrate layer (4); S4, oxidizing the top silicon (2) by introducing oxygen at a high temperature of 1000°C, and then sequentially performing step-by-step photolithography, high-energy particle implantation, and annealing processes to prepare a dielectric isolation structure (6); S5, forming a collector region (8), a base region (9), a first injection region (10) and a second injection region (11) of the amplifier circuit on the top silicon (2) by photolithography and injection processes in sequence; S6, forming an emitter region (7) on the base region (9) by sequentially performing photolithography and implantation processes; S7, using LPTEOS film formation, stepper lithography, and dielectric etching in sequence to prepare contact holes (12) distributed corresponding to the second injection region (11), the collector region (8), the base region (9), and the emitter region (7) on the top silicon (2), and using ALSICU sputtering to provide a conductive metal lead (13) in each contact hole (12); S8. Photolithography and anisotropic silicon etching processes are sequentially used to etch a cavity (14) upward from the bottom of the double-polished silicon wafer (5), thereby forming a monolithic MEMS pressure chip.

2. The method for preparing a single-chip MEMS pressure chip according to claim 1, characterized in that: In the step S4: in the step S5, high energy ion implantation is performed, boron B / phosphorus P, energy: 60keV, incident angle: T7, dose: 1e13-2e16.

3. The method for preparing a single-chip MEMS pressure chip according to claim 1, characterized in that: In step S4, the annealing temperature is 1000° C. / 1100° C., and the annealing time is 1 hour.

4. The method for preparing a single-chip MEMS pressure chip according to claim 1, characterized in that: In step S7 , the thickness of the LPTEOS film is 400 nm.

5. The method for preparing a single-chip MEMS pressure chip according to claim 1, characterized in that: In step S7 , the sputtering temperature is 200° C.

Citation Information

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