Isolation relay
By using the transformer coil structure on the PCB board in solid-state relays, the problems of unstable signal transmission of solid-state relays and high material cost at high temperatures are solved, and higher magnetic coupling performance and service life are achieved, and different temperature environments are adapted to.
Patent Information
- Application Number
- CN202420844704.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-22
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2034-04-22
AI Technical Summary
The existing solid-state relays have problems such as unstable input signal transmission, high material cost, and poor output voltage depend on the number of photodiodes and temperature characteristics at high temperatures, which affects their service life and working stability.
The transformer coil structure integrated on the PCB board is adopted, and the input driver chip modulation signal is input and transmitted to the output driver chip through the transformer, avoiding the complex process of integrated coils in the chip and improving magnetic coupling performance and energy transmission efficiency.
It reduces the difficulty and cost of coil preparation, improves high-temperature performance and service life, reduces the impact of temperature characteristics, adapts to different temperature environments, and reduces the overall design and production costs.
Smart Images
Figure CN222283230U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of circuits, in particular to an isolation relay. Background Art
[0002] Solid-state relay is a new type of non-contact switching device composed of solid-state electronic components. It uses the switching characteristics of electronic components (such as switching transistors, thyristors and other semiconductor devices) to achieve the purpose of non-contact and spark-on and off circuits, so it is also called "non-contact switch". Solid-state relay is a four-terminal active device, two of which are input control terminals and the other two are output control terminals. It has amplification, driving and isolation functions, and is suitable for driving high-power switch actuators.
[0003] At present, the input and output circuits of a mainstream solid-state relay are isolated and input control signals are transmitted by means of photoelectric coupling, such as Figure 1 As shown, it includes an input IR LED (infrared light emitting diode), a voltage generating module, and an output module. Among them, the IR LED converts the input electrical signal into an optical signal, and the optical signal generated by it is then converted into an electrical signal through the voltage generating module to drive the on and off of the MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) in the output module. This process realizes the signal conversion from electrical to optical to electrical. This optocoupler relay mainly has the following problems:
[0004] 1. The input stage uses IR LED for transmission and isolation of input signals. Conventional IR LEDs have poor service life and high temperature characteristics. The luminous efficiency will be significantly reduced at high temperatures, which will affect the overall service life and working stability of the circuit. In addition, IR LEDs also have a current aging effect. Long-term high current driving will lead to an increase in the potential wells of the luminescent material, making it easier for electrons to fall into the wells, resulting in a decrease in the recombination of electrons and holes, thereby weakening the luminous intensity. If high-quality IR LEDs such as high-temperature IR LEDs are used, the circuit manufacturing cost will increase significantly.
[0005] 2. The voltage generation module realizes the conversion of photoelectric signals based on the series connection of multiple photodiodes. Currently, it is mainly prepared using SOI (Silicon-On-Insulator) process, which has high material prices and tight production capacity. In addition, due to the special process, the chip preparation cost is relatively high.
[0006] 3. The output voltage of the voltage generating module can be approximately considered to be equal to VOUT=VPN×N. Where VPN is the forward voltage drop of a single photodiode, and N is the number of photodiodes connected in series. The output voltage is heavily dependent on the number of photodiodes connected in series. Therefore, when a higher output drive voltage is required, the more photodiodes N are required to be connected in series, resulting in a proportional increase in the overall chip area and a significant increase in chip preparation costs. Generally, VPN is around 0.5V to 0.7V, and it is difficult to significantly increase VPN.
[0007] 4. In terms of high temperature characteristics, VPN has a negative temperature characteristic, which is generally around -2mV / ℃. This negative temperature characteristic causes the output voltage of the voltage generating module to also show an obvious negative temperature characteristic. Taking the normal temperature TA=25℃ to the high temperature TA=125℃ as an example, there is an output voltage change of about -200mV. The high temperature characteristics are poor, which is not conducive to the output driving the MOSFET to work at high temperatures. Summary of the invention
[0008] The embodiment of the utility model provides an isolation relay to avoid the above-mentioned problems existing in the existing optocoupler relay, improve the high temperature performance of the isolation relay, ensure the consistency of high and low temperature characteristics, and extend the service life.
[0009] The utility model provides an isolation relay, comprising: an input drive chip, an output drive chip, and a transformer arranged on a PCB board;
[0010] The input driver chip is used to receive an input signal, modulate the input signal to generate a modulation signal, and transmit the modulation signal to the output driver chip through the transformer;
[0011] The output driver chip is used to demodulate the modulated signal and then output it.
[0012] Optionally, the input driver chip and the output driver chip are located on two sides of the PCB board and are in the same plane as the PCB board.
[0013] Optionally, the input driver chip and the output driver chip are arranged on the PCB board.
[0014] Optionally, the input driver chip and the output driver chip are located on both sides or on the same side of the transformer.
[0015] Optionally, the transformer comprises: a primary coil and a secondary coil;
[0016] The PCB board includes at least four layers of circuits, and an insulating layer is arranged between adjacent layers of circuits; the primary coil is located on the adjacent first and second layers of circuits; and the secondary coil is located on the adjacent third and fourth layers of circuits.
[0017] Optionally, a pad, a first blind hole, a second blind hole, a first via, a second via, and a third via are provided on the PCB board; the first blind hole connects the first layer circuit and the second layer circuit at the same position; the second blind hole connects the third layer circuit and the fourth layer circuit at the same position; the via connects all circuits at the same position.
[0018] Optionally, the first via hole serves as the transformer input positive electrode, and the pad serves as the transformer input negative electrode; the second via hole serves as the transformer output negative electrode, and the third via hole serves as the transformer output positive electrode.
[0019] Optionally, the pad, the first via, the second via, and the third via are located at the periphery of the primary coil and the secondary coil, the first blind hole is located at a position corresponding to the center of the primary coil, and the second blind hole is located at a position corresponding to the center of the secondary coil.
[0020] Optionally, the first via hole and the pad are respectively connected to two ends of the primary coil; the second via hole and the third via hole are respectively connected to two ends of the secondary coil.
[0021] Optionally, the secondary coil includes a first coil and a second coil wound in the same direction, the first coil is located in the third layer circuit, and the second coil is located in the fourth layer circuit.
[0022] Optionally, the input driver chip includes: an input filter shaping circuit, a resonant frequency generating circuit, a power amplifier, and a transformer driving circuit;
[0023] The input filtering and shaping circuit is used to perform filtering and shaping processing on the input signal of the input driving chip to filter out high-frequency signal interference on the input signal;
[0024] The resonant frequency generating circuit is used to generate a resonant signal during a time period in which the input signal of the input driving chip is valid;
[0025] The power amplifier is used to amplify the resonance signal and then output it to the transformer driving circuit;
[0026] The transformer driving circuit is used to generate a transformer driving signal to cause the primary coil of the transformer to produce a current change, and to couple the secondary coil of the transformer to generate an induced voltage signal.
[0027] Optionally, the input driver chip further includes: an input resonance compensation circuit, used to compensate for the reactance power of the resonance signal output by the power amplifier.
[0028] Optionally, the output driver chip includes: a rectifier circuit, a voltage stabilizing circuit, and an output driver circuit;
[0029] The rectifier circuit is used to convert the induced voltage signal into a DC signal;
[0030] The voltage stabilizing circuit is used to regulate the DC signal and output a stable DC signal to the output driving circuit;
[0031] The output driving circuit is used to amplify the DC signal and then output it.
[0032] Optionally, the output driver chip further includes: an undervoltage protection circuit, which is used to monitor the DC signal output by the voltage stabilization circuit, and shut down the output of the output driver chip when the DC signal is lower than a set threshold.
[0033] Optionally, the output driver chip further includes: an output resonance compensation circuit for compensating for the reactance power of the induced voltage signal input by the rectifier circuit.
[0034] Optionally, the isolation relay further includes: a power tube module, used for switching on or off according to an output signal of the output driver chip.
[0035] The isolation relay provided by the embodiment of the utility model avoids the complex process of integrating the coil structure inside the chip through the transformer coil structure integrated on the PCB board, and can effectively reduce the difficulty of coil preparation and integration process. At the same time, it avoids the coupling interference problem between the primary coil and the secondary coil when the coil is integrated inside the chip, improves the anti-drift capability of the magnetic coupling, has a better coupling effect, and further improves the energy transmission efficiency.
[0036] The packaging structure of the isolation relay has high space utilization, and a larger coil coupling area can be obtained under the same package space size. The design of separating the coupling coil group from the inside of the chip not only significantly reduces the area of the designed chip, reduces the difficulty and cost of process preparation, but also enables the overall circuit to have higher magnetic coupling performance.
[0037] In addition, the design of the transformer on the PCB board reduces the coil production cycle, facilitates the testing and adjustment of coil parameters, and can effectively shorten the development cycle of the entire solid-state relay product. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] Figure 1 It is a structural diagram of the existing solid-state relay input and output circuits being isolated by means of photoelectric coupling;
[0039] Figure 2This is a structural schematic diagram of an isolation relay provided by an embodiment of the utility model;
[0040] Figure 3 This is a schematic diagram of the position relationship between different modules in the isolation relay provided by the embodiment of the utility model;
[0041] Figure 4 This is another schematic diagram of the position relationship between different modules in the isolation relay provided by the embodiment of the utility model;
[0042] Figure 5 It is a schematic diagram of a longitudinal section of a transformer on a PCB board in an isolation relay provided by an embodiment of the utility model;
[0043] Figure 6 This is a structural schematic diagram of the primary coil of the transformer in the embodiment of the utility model;
[0044] Figure 7 It is a structural schematic diagram of the secondary coil of the transformer in the embodiment of the utility model;
[0045] Figure 8 It is another structural schematic diagram of the secondary coil of the transformer in the embodiment of the utility model;
[0046] Fig. 9 This is a schematic diagram of the structure of the input driver chip in the embodiment of the utility model;
[0047] Fig.10 This is a schematic diagram of the structure of the output driver chip in the embodiment of the utility model;
[0048] Fig.11 This is another structural schematic diagram of an isolation relay provided by an embodiment of the utility model;
[0049] Fig.12 yes Fig.11 A structural diagram of a medium power tube module. DETAILED DESCRIPTION
[0050] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0051] like Figure 2 , which is a structural schematic diagram of an isolation relay provided in an embodiment of the utility model.
[0052] The isolation relay 200 includes: an input driver chip 201, an output driver chip 202, and a transformer 231 disposed on a PCB board 203.
[0053] In a non-limiting embodiment, the input driver chip 201 , the output driver chip 202 , and the PCB board 203 may be packaged in the same housing.
[0054] The input driver chip 201 is used to receive an input signal, modulate the input signal to generate a modulation signal, and transmit the modulation signal to the output driver chip 202 through the transformer 231;
[0055] The output driver chip 202 is used to demodulate the modulated signal and then output it.
[0056] like Figure 3 As shown, a schematic diagram of the positional relationship between different modules in the isolation relay provided by an embodiment of the utility model is shown, wherein (3a) is a front view of the isolation relay, and (3b) is a top view of the isolation relay.
[0057] In this example, the input driver chip 201 and the output driver chip 202 are located on two sides of the PCB board 203 and are in the same plane as the PCB board 203 .
[0058] Figure 4 As shown, another schematic diagram of the positional relationship between different modules in the isolation relay provided by an embodiment of the utility model is shown, wherein (4a) is a front view of the isolation relay, and (4b) is a top view of the isolation relay.
[0059] In this example, the input driver chip 201 and the output driver chip 202 are disposed on the PCB board 203 , that is, overlapped with the PCB board 203 , which can further save the internal space of the isolation relay housing.
[0060] exist Figure 4 In the position relationship shown, the input driver chip 201 and the output driver chip 202 can be located on both sides or the same side of the transformer on the PCB board 203, which is not limited in this embodiment of the utility model.
[0061] The above-mentioned isolation relay products with different internal structures and shapes can meet the space occupancy requirements in different application environments.
[0062] In the embodiment of the present utility model, the PCB board 203 includes at least four layers of circuits, and an insulating layer is provided between adjacent layers of circuits. Figure 2 The transformer 231 in the embodiment includes: a primary coil and a secondary coil. The primary coil and the secondary coil are distributed in each layer of the circuit.
[0063] Take a four-layer circuit as an example. Figure 5 A schematic longitudinal section diagram of a transformer on a PCB board in an isolation relay provided by an embodiment of the utility model is shown.
[0064] In this example, the PCB board includes four layers of circuits, and an insulating layer is provided between adjacent layers of circuits. Accordingly, the primary coil of the transformer is located at the adjacent first layer of circuits 511 and second layer of circuits 512; the secondary coil of the transformer is located at the adjacent third layer of circuits 513 and fourth layer of circuits 514. Of course, it can also be the other way around, that is, the primary coil of the transformer is located at the adjacent third layer of circuits 513 and fourth layer of circuits 514, and the secondary coil is located at the first layer of circuits 511 and second layer of circuits 512, and this is not limited in the embodiment of the utility model.
[0065] Reference Figure 5 A first insulating layer 521 is provided between the first layer circuit 511 and the second layer circuit 512 , a second insulating layer 522 is provided between the second layer circuit 512 and the third layer circuit 513 , and a third insulating layer 523 is provided between the third layer circuit 513 and the fourth layer circuit 514 .
[0066] Since the second layer circuit 512 and the third layer circuit 513 respectively place the primary coil and the secondary coil of the transformer, the second insulating layer 522 serves as an isolation insulating layer for the primary and secondary coils, and its thickness can be designed to be relatively thicker than the first insulating layer 521 and the third insulating layer 523, so as to better ensure the isolation between the primary coil and the secondary coil.
[0067] In a non-limiting embodiment, the primary coil and the secondary coil each have two connection ends. In order to facilitate the connection between the two ends of the coil and the external input driver chip and the output driver chip, corresponding vias and blind holes can be provided on the PCB board to achieve the connection between the two ends of the primary coil and the output end of the input driver chip, and the connection between the secondary coil and the input end of the output driver chip.
[0068] For example, in a non-limiting embodiment, a pad, a first blind hole, a second blind hole, a first via, a second via, and a third via may be provided on the PCB board; the first blind hole connects the first layer circuit and the second layer circuit at the same position; the second blind hole connects the third layer circuit and the fourth layer circuit at the same position; the via connects all circuits at the same position.
[0069] Among them, the first via can be used as the positive input electrode of the transformer, and the pad can be used as the negative input electrode of the transformer; the second via can be used as the negative output electrode of the transformer, and the third via can be used as the positive output electrode of the transformer.
[0070] The positions of the vias, blind holes, and pads can be set arbitrarily, and the embodiments of the utility model do not limit this. For example, in order to facilitate wiring, the pads, the first vias, the second vias, and the third vias can be set at positions located at the periphery of the primary coil and the secondary coil, the first blind hole is located at a position corresponding to the center of the primary coil, and the second blind hole is located at a position corresponding to the center of the secondary coil.
[0071] In order to further explain the structure of the primary coil and the secondary coil in each layer of the PCB board and the connection method with the outside, the following is combined with Figures 6 to 8 Provide detailed explanation.
[0072] Reference Figure 6 , Figure 6 It is a structural schematic diagram of the primary coil of the transformer in the embodiment of the utility model.
[0073] In this example, the primary coil 71 is located between the first layer circuit 511 and the second layer circuit 512. One end of the primary coil 71 is connected to the pad 60 on the first layer circuit, and the other end is connected to the first via 61 on the second layer circuit 512 through the first blind hole 64. The first via 61 is connected as the input positive electrode to the positive phase output end of the input driver chip, and the pad 60 is connected as the input negative electrode to the negative phase output end of the input driver chip.
[0074] The second via 62 and the third via 63 are respectively connected to two ends of the secondary coil of the transformer.
[0075] Reference Figure 7 , Figure 7 It is a structural schematic diagram of the secondary coil of the transformer in the embodiment of the utility model.
[0076] In this example, the secondary coil 72 is located in the third layer circuit 513 and the fourth layer circuit 514. One end of the secondary coil 72 is connected to the third via 63 on the third layer circuit, and the other end is connected to the second via 62 on the fourth layer circuit 514 through the second blind hole 65. The second via 62 is connected to the negative phase input terminal of the output driver chip as the output negative electrode, and the third via 63 is connected to the positive phase input terminal of the output driver chip as the output positive electrode.
[0077] Reference Figure 8 , Figure 8 It is another structural schematic diagram of the secondary coil of the transformer in the embodiment of the utility model.
[0078] and Figure 7 The difference of the example shown is that in this example, the secondary coil 72 includes a first coil 721 and a second coil 722 wound in the same direction, wherein the first coil 721 is located on the third layer circuit 513, and the second coil 722 is located on the fourth layer circuit 514. One end of the first coil 721 is connected to the third via 63 on the third layer circuit 513, and the other end is connected to one end of the second coil 722 through the second blind hole 65, and the other end of the second coil 722 is connected to the second via 62 on the fourth layer circuit 514.
[0079] Compared to Figure 7 The secondary coil shown, Figure 8The secondary coil shown is designed with two sets of coils winding in the same direction in the third layer circuit 513 and the fourth layer circuit 514, and the two sets of coils are connected in series. This structural design can make the primary and secondary coil turns ratio 1:2, and the output end of the transformer can be coupled to a voltage twice that of the input end, that is, a higher output voltage can be obtained, and in some cases, the boost circuit in the output driver chip can be omitted.
[0080] It should be noted that the coil design parameters of the transformer depend on the multiple of the voltage that needs to be coupled to the output end and the maximum transmission power that needs to be obtained. Therefore, the various parameters of the coil can be designed according to application needs, and the embodiments of the present utility model do not limit this.
[0081] like Fig. 9 FIG. 1 is a schematic diagram of the structure of an input driver chip in an embodiment of the utility model.
[0082] The input driver chip 201 includes: an input filter shaping circuit 211, a resonant frequency generating circuit 212, a power amplifier 213, and a transformer driving circuit 214. Among them:
[0083] The input filter shaping circuit 211 is used to perform filter shaping processing on the input signal of the input driver chip to filter out high-frequency signal interference on the input signal;
[0084] The resonant frequency generating circuit 212 is used to generate a resonant signal during a time period in which the input signal of the input driving chip is valid;
[0085] The power amplifier 213 is used to amplify the resonance signal and output it to the transformer driving circuit;
[0086] The transformer driving circuit 214 is used to generate a transformer driving signal to cause the primary coil of the transformer to generate a current change, and to couple the secondary coil of the transformer to generate an induced voltage signal.
[0087] In another non-limiting embodiment, the input driver chip 201 may further include: an input resonance compensation circuit 215 for compensating the reactance power of the resonance signal output by the power amplifier 213 .
[0088] like Fig.10 , which is a schematic diagram of the structure of the output driver chip in the embodiment of the utility model.
[0089] The output driver chip 202 includes: a rectifier circuit 221, a voltage stabilizing circuit 222, and an output driver circuit 223. Among them:
[0090] The rectifier circuit 221 is used to convert the induced voltage signal into a DC signal;
[0091] The voltage stabilizing circuit 222 is used to regulate the DC signal and output a stable DC signal to the output driving circuit 223;
[0092] The output driving circuit 223 is used for amplifying the DC signal and then outputting it.
[0093] In another non-limiting embodiment, the output driver chip 202 may further include: an undervoltage protection circuit 224, which is used to monitor the DC signal output by the voltage stabilizing circuit 222, and when the DC signal is lower than a set threshold, the output of the output driver chip 202 is turned off. For example, when the undervoltage protection function is effective, the output enable signal (generally high level is effective) is output, and a combination logic judgment is performed with a normal output front-stage control signal through a combination logic, such as a simple OR gate structure, so that the output channel is turned off, and the output can usually be fixed to a low level state.
[0094] In another non-limiting embodiment, the output driver chip 202 may further include: an output resonance compensation circuit 225 for compensating the reactance power of the induced voltage signal input by the rectifier circuit 221 .
[0095] In another non-limiting embodiment, the output driver chip 202 may further include: a boost circuit 226 for amplifying the DC signal output by the rectifier circuit 221 and outputting the amplified DC signal to the voltage stabilizing circuit 222 .
[0096] like Fig.11 , which is another structural schematic diagram of the isolation relay provided in an embodiment of the utility model.
[0097] and Figure 2 The difference between the illustrated embodiment is that, in this embodiment, the isolation relay further includes: a power tube module 204 for switching on or off according to the output signal of the output driver chip 202 .
[0098] In a specific application, the power tube module 204 may include two or more power devices, and the power device may be, for example, but not limited to, any one of the following: MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), IGBT (Insulate-Gate Bipolar Transistor), SiC (Silicon Carbide) and other power devices.
[0099] Fig.12The schematic diagram of the structure of a power tube module composed of two MOS tubes is shown. The gates of the two MOS tubes M1 and M2 are connected as the input end of the power tube module 204, receiving Fig.10 The source electrodes of the two MOS tubes M1 and M2 are connected as the output end of the power tube module 204 according to the control signal output by the output driving circuit 223 .
[0100] Under the control of the control signal, the two MOS tubes are turned on or off at the same time. In a specific application, the two MOS tubes can be used individually, or two in parallel, or two in series, depending on the connection relationship between the lead-out terminals 1, 2, and 3, which is not limited in the embodiment of the utility model.
[0101] For example, when the lead-out terminals are 1 and 2 or 2 and 3, it is an application of a single MOS tube;
[0102] For another example, when 1 and 3 are connected together as one lead-out terminal and 2 is used as another lead-out terminal, two MOS tubes are used in parallel;
[0103] For another example, when the pins 1, 3, and 2 are left floating, two MOS tubes are connected in series.
[0104] The isolation relay provided by the embodiment of the utility model sets the transformer coil separately on the PCB board outside the chip, avoiding the complex process of integrating the coil structure inside the chip, greatly reducing the difficulty of coil preparation and integration process. At the same time, it avoids the coupling interference problem between the primary coil and the secondary coil when the coil is integrated inside the chip, improves the anti-drift ability of the magnetic coupling, has a better coupling effect, and further improves the energy transmission efficiency.
[0105] The isolation relay provided by the embodiment of the utility model uses a transformer arranged on a PCB as an isolation transmission device, which is essentially a conductive circuit laid between or on PCB board layers. The conductive circuit will not have any loss when working under the condition that it does not exceed its working capacity; and the conductive circuit will be arranged in a traditional packaging body, for example, it is filled and sealed with insulating materials such as epoxy resin, so as to avoid oxidation that may occur when it works for a long time in the air, thereby greatly improving the service life of the isolation relay.
[0106] The isolation relay provided by the embodiment of the utility model uses a transformer on a PCB board to isolate input and output signals, and its input and output voltages depend on the turns ratio of the primary and secondary coils and the coupling transmission efficiency. The change of the operating temperature has little effect on it, and it can better adapt to different temperature environments.
[0107] The input driver chip and output driver chip in the isolation relay can be prepared using the mainstream BCD (Bipolar-CMOS-DMOS) process, which is low-cost. When a higher output drive voltage is required, there is no need to increase the overall chip area in proportion. This can be achieved by adjusting the turns ratio of the primary and secondary coils and the boost circuit in the output driver chip. The transformer line density on the PCB board is high, and it can be prepared using the HDI (High Density Interconnector) circuit board process. The cost under the same area is much less than the chip cost.
[0108] It should be understood that the term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship.
[0109] The "plurality" appearing in the embodiments of the present invention refers to two or more than two.
[0110] The first, second, etc. descriptions appearing in the embodiments of the present invention are only used for illustration and distinction of the description objects. There is no order, nor does it indicate any special limitation on the number of devices in the embodiments of the present invention, and cannot constitute any limitation on the embodiments of the present invention.
[0111] Although the utility model is disclosed as above, the utility model is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the utility model. Therefore, the protection scope of the utility model shall be subject to the scope defined by the claims.
Claims
1. An isolation relay, characterized in that: include: An input driver chip, an output driver chip, and a transformer arranged on a PCB board; the transformer comprises: a primary coil and a secondary coil; the PCB board comprises at least four layers of circuits, and an insulating layer is arranged between adjacent layers of circuits; the primary coil is located at adjacent first and second layers of circuits; the secondary coil is located at adjacent third and fourth layers of circuits; The input driver chip is used to receive an input signal, modulate the input signal to generate a modulation signal, and transmit the modulation signal to the output driver chip through the transformer; The output driver chip is used to demodulate the modulated signal and then output it.
2. The isolation relay according to claim 1, characterized in that: The input driver chip and the output driver chip are located on two sides of the PCB board and are in the same plane as the PCB board.
3. The isolation relay according to claim 1, characterized in that: The input driver chip and the output driver chip are arranged on the PCB board.
4. The isolation relay according to claim 3, characterized in that: The input driver chip and the output driver chip are located on both sides or on the same side of the transformer.
5. The isolation relay according to claim 1, characterized in that: The PCB board is provided with a pad, a first blind hole, a second blind hole, a first via hole, a second via hole, and a third via hole; the first blind hole connects the first layer circuit and the second layer circuit at the same position; The second blind hole connects the third layer circuit and the fourth layer circuit at the same position; the via hole connects all circuits at the same position.
6. The isolation relay according to claim 5, characterized in that: The first via hole is used as the transformer input positive pole, and the pad is used as the transformer input negative pole; the second via hole is used as the transformer output negative pole, and the third via hole is used as the transformer output positive pole.
7. The isolation relay according to claim 5, characterized in that: The pad, the first via hole, the second via hole, and the third via hole are located at the periphery of the primary coil and the secondary coil, the first blind hole is located at a position corresponding to the center of the primary coil, and the second blind hole is located at a position corresponding to the center of the secondary coil.
8. The isolation relay according to claim 6, characterized in that: The first via hole and the pad are respectively connected to two ends of the primary coil; the second via hole and the third via hole are respectively connected to two ends of the secondary coil.
9. The isolation relay according to claim 6, characterized in that: The secondary coil includes a first coil and a second coil wound in the same direction, the first coil is located in the third circuit layer, and the second coil is located in the fourth circuit layer.
10. The isolating relay according to any one of claims 1 to 9, characterized in that: The input drive chip includes: an input filter shaping circuit, a resonant frequency generating circuit, a power amplifier, and a transformer drive circuit; The input filtering and shaping circuit is used to perform filtering and shaping processing on the input signal of the input driving chip to filter out high-frequency signal interference on the input signal; The resonant frequency generating circuit is used to generate a resonant signal during a time period in which the input signal of the input driving chip is valid; The power amplifier is used to amplify the resonance signal and then output it to the transformer driving circuit; The transformer driving circuit is used to generate a transformer driving signal to cause the primary coil of the transformer to produce a current change, and to couple the secondary coil of the transformer to generate an induced voltage signal.
11. The isolation relay according to claim 10, characterized in that: The input driver chip also includes: The input resonance compensation circuit is used to compensate the reactance power of the resonance signal output by the power amplifier.
12. The isolation relay according to claim 10, characterized in that: The output driver chip includes: a rectifier circuit, a voltage stabilizing circuit, and an output driver circuit; The rectifier circuit is used to convert the induced voltage signal into a DC signal; The voltage stabilizing circuit is used to regulate the DC signal and output a stable DC signal to the output driving circuit; The output driving circuit is used to amplify the DC signal and then output it.
13. The isolation relay according to claim 12, characterized in that: The output driver chip also includes: The undervoltage protection circuit is used to monitor the DC signal output by the voltage stabilizing circuit, and when the DC signal is lower than a set threshold, the output of the output driver chip is turned off.
14. The isolation relay according to claim 12, characterized in that: The output driver chip also includes: The output resonant compensation circuit is used to compensate the reactance power of the induced voltage signal input by the rectifier circuit.
15. The isolation relay according to claim 1, characterized in that: The isolation relay further comprises: The power tube module is used to be turned on or off according to the output signal of the output driver chip.