Flyback converter and primary state detection circuit thereof

Abstract

The utility model provides a flyback converter and a primary state detection circuit thereof, in a detection interval, when a drain terminal voltage of a synchronous rectifier is greater than an output voltage, integration is carried out from zero based on a difference value between the drain terminal voltage and the output voltage to obtain a first volt-second integral; the volt-second integral judgment module compares the first volt-second integral with a preset integral threshold value and outputs a first judgment signal; the pulse signal generation module generates a first short pulse signal and a second short pulse signal at the starting moment and the ending moment of a detection interval respectively; the pulse counting module counts pulses based on the first judgment signal, the first short pulse signal and the second short pulse signal and outputs a first count value; the synchronous rectifier driving control module judges that the flyback converter primary stage is in a fault state based on the first count value; and when the flyback converter is in the primary fault state, stopping driving the synchronous rectifier. By means of the arrangement, when the primary stage breaks down, the common phenomenon of the primary stage and the secondary stage can be avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of switch power supplies, in particular to a flyback converter and a primary state detection circuit thereof. Background Art

[0002] like Figure 1 The figure shows a schematic diagram of a flyback converter in the prior art, which includes a rectifier U0 and a transformer T1. The rectifier U0 is used to rectify the alternating current power source AC into direct current Vin; the transformer T1 includes a primary winding Np and a secondary winding Ns; a primary switch tube Q1 and a primary controller U1 are provided on the primary side of the flyback converter; a synchronous rectifier Q2 and a synchronous rectifier controller U2 are provided on the secondary side of the flyback converter, and the on or off of the synchronous rectifier Q2 is controlled by the synchronous rectifier controller U2. When the system starts up normally, when the control of the primary side is controlled by the secondary side, the synchronous rectifier Q2 is generally turned on for a period of time on the secondary side. The conduction of the synchronous rectifier Q2 causes the primary side to generate a current that is the same as that of the synchronous rectifier Q2. Figure 1 The current in the opposite direction of ip (regarded as negative current) can realize zero voltage conduction of the primary switch tube Q1 based on the negative current (the detection of the negative current can be calculated based on the current on the sampling resistor RCS); specifically, Figure 2 As shown, in the time period t3-t4, before the next primary switch tube Q1 is turned on, the synchronous rectifier Q2 is turned on for a period of time t, so that the negative current generated on the primary side at time t4 can achieve zero voltage turn-on of the primary switch tube Q1. However, when a fault occurs on the primary side of the flyback converter and it is restarted, the synchronous rectifier Q2 on the secondary side may also be in the on state during the turn-on period of the primary switch tube Q1. At this time, there will be a phenomenon of primary and secondary commonality, which will cause device damage. Therefore, it is necessary to improve the problems existing in the prior art to avoid the occurrence of the primary and secondary commonality phenomenon when the primary fault state occurs. Utility Model Content

[0003] In order to solve the above technical problems, the utility model provides a flyback converter and a primary state detection circuit thereof.

[0004] According to a first aspect of the utility model, a primary state detection circuit of a flyback converter is provided, wherein the flyback converter comprises a primary switch tube located on the primary side, and a synchronous rectifier and a synchronous rectification controller located on the secondary side, wherein the primary state detection circuit is arranged in the synchronous rectification controller, and the primary state detection circuit comprises:

[0005] A detection interval setting module, used to set a detection interval, wherein the start time of the detection interval is the turn-off time after the synchronous rectifier is turned on for the second time or a time later than the first time threshold of the turn-off time; the end time of the detection interval is the time after the start time passes through a preset detection time length;

[0006] a volt-second integral calculation module, wherein, within the detection interval, when the drain voltage of the synchronous rectifier is greater than the output voltage of the flyback converter, the volt-second integral calculation module integrates from zero based on the difference between the drain voltage of the synchronous rectifier and the output voltage to obtain a first volt-second integral;

[0007] a volt-second integral judgment module, which compares the first volt-second integral with a preset integral threshold and outputs a first judgment signal;

[0008] a pulse signal generating module, which generates a first short pulse signal at the beginning of the detection interval and generates a second short pulse signal at the end of the detection interval;

[0009] a pulse counting module, which counts pulses based on the first short pulse signal, the second short pulse signal and the first judgment signal and outputs a first count value;

[0010] The synchronous rectifier driving control module determines whether the primary of the flyback converter is in a fault state based on the first count value; when the primary of the flyback converter is in a fault state, stops driving the synchronous rectifier.

[0011] Optionally, when the first volt-second integral reaches the preset integral threshold, the volt-second integral judgment module outputs a third short pulse signal as the first judgment signal;

[0012] When the first volt-second integral is less than the preset integral threshold, the volt-second integral judgment module outputs a first level signal as a first judgment signal.

[0013] Optionally, the first level signal is a low level signal.

[0014] Optionally, the pulse counting module clears the first counting value to zero when receiving the third short pulse signal;

[0015] When receiving the first level signal, the pulse counting module continues to count based on the first short pulse signal and the second short pulse signal.

[0016] Optionally, the first short pulse signal, the second short pulse signal and the third short pulse signal are all single short pulse signals.

[0017] When the first count value is 1 or 2, the synchronous rectifier drive control module determines that the primary of the flyback converter is in a normal state;

[0018] When the first count value is (2N+1), the synchronous rectifier drive control module determines that the primary of the flyback converter is in a fault state, where N is a natural number greater than 0.

[0019] Optionally, the preset integration threshold is greater than a volt-second integration value in a resonant state, and greater than a volt-second integration value when the synchronous rectifier is turned on for the second time.

[0020] Optionally, the volt-second integrated value when the synchronous rectifier is turned on for the second time is a volt-second integrated value obtained by integrating the difference between the drain voltage of the synchronous rectifier and the output voltage from zero during the primary side freewheeling time in a primary fault state.

[0021] Optionally, the first time threshold is less than or equal to a dead time set between the synchronous rectifier and the primary switch tube of the flyback converter.

[0022] Optionally, based on the preset detection duration, the end time of the detection interval is within the conduction interval of the primary switch tube.

[0023] The present invention also provides a flyback converter, which includes a primary switch tube and a primary controller arranged on the primary side, and a synchronous rectifier and a synchronous rectifier controller arranged on the secondary side, and is characterized in that:

[0024] The synchronous rectification controller includes the primary state detection circuit described above, and detects the primary state of the flyback converter based on the primary state detection circuit; when the primary of the flyback converter is in a fault state, the synchronous rectifier drive control module stops driving the synchronous rectifier.

[0025] The beneficial effects of the utility model include at least:

[0026] The utility model provides a flyback converter and a primary state detection circuit thereof. The flyback converter includes a primary switch tube and a primary controller arranged on the primary side, and a synchronous rectifier and a synchronous rectifier controller arranged on the secondary side. The primary state detection circuit is arranged in the synchronous rectifier controller. The primary state detection circuit includes a detection interval setting module for setting the detection interval. The start time of the detection interval is the turn-off time after the synchronous rectifier is turned on for the second time or a time later than the first time threshold of the turn-off time; the end time of the detection interval is the time after the start time passes through a preset detection time length; a volt-second integral calculation module. Within the detection interval, when the drain terminal voltage of the synchronous rectifier is greater than the output voltage of the flyback converter, the volt-second integral calculation module calculates the voltage of the synchronous rectifier based on the output voltage of the synchronous rectifier. The difference between the drain voltage of the current transformer and the output voltage is integrated from zero to obtain the first volt-second integral; a volt-second integral judgment module compares the first volt-second integral with a preset integral threshold and outputs a first judgment signal; a pulse signal generating module generates a first short pulse signal at the beginning of the detection interval and generates a second short pulse signal at the end of the detection interval; a pulse counting module counts the pulse signal based on the first short pulse signal, the second short pulse signal and the first judgment signal and outputs a first count value; a synchronous rectifier drive control module determines whether the primary of the flyback converter is in a fault state based on the first count value; when the primary of the flyback converter is in a fault state, the synchronous rectifier drive control module stops driving the synchronous rectifier. The utility model can avoid the common phenomenon between the primary and secondary when the primary of the flyback converter is in a fault state through the above-mentioned settings.

[0027] Furthermore, the preset integral threshold is greater than the volt-second integral value in the resonant state, and greater than the volt-second integral value when the synchronous rectifier is turned on for the second time, so as to avoid misjudgment of the primary state.

[0028] It should be noted that the above general description and the following detailed description are merely exemplary and explanatory and cannot limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of a flyback converter is shown;

[0030] Figure 2 A working waveform diagram when a primary fault occurs in the flyback converter is shown;

[0031] Figure 3 A schematic diagram of a primary state detection circuit of a flyback converter provided by the utility model is shown;

[0032] Figure 4 A working waveform diagram of the primary state detection circuit of the flyback converter provided by the utility model is shown. DETAILED DESCRIPTION

[0033] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively with reference to the relevant drawings. The drawings provide preferred embodiments of the present invention. However, the present invention can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0034] The utility model provides a primary state detection circuit of a flyback converter. The flyback converter adopts Figure 1 The structure shown in is used as an example to illustrate. Figure 1 The flyback converter also includes other components or circuits. Here, only the settings related to the core concept of the utility model are introduced, and other components or circuits are not introduced in detail.

[0035] Figure 3 The schematic diagram of the primary state detection circuit of the flyback converter provided by the utility model is shown, wherein the primary state detection circuit is arranged in the synchronous rectifier controller U2, and includes a detection interval setting module, a volt-second integral calculation module, a volt-second integral judgment module, a pulse signal generation module, a pulse counting module and a synchronous rectifier drive control module. The detection interval setting module is used to set the detection interval Td, and the start time of the detection interval Td is the turn-off time after the synchronous rectifier Q2 is turned on for the second time or the time later than the first time threshold of the turn-off time; wherein, the second turn-on means that when the flyback converter is working normally, in one switching cycle, the synchronous rectifier is turned on twice, and the zero voltage turn-on of the primary switch tube Q1 in the next switching cycle is realized based on its second turn-on; the end time of the detection interval Td is the time after the start time passes through the preset detection time length T1. In the detection interval Td, when the drain-source voltage Vds_s of the synchronous rectifier Q2 is greater than the output voltage Vout of the flyback converter, the volt-second integral calculation module integrates the difference between the drain-source voltage Vds_s of the synchronous rectifier and the output voltage Vout (the difference is actually the voltage across the auxiliary winding) from zero to obtain the first volt-second integral. Figure 1In the circuit topology, the drain terminal of the synchronous rectifier Q2 is connected to one end of the auxiliary winding Ns, and the source terminal of the synchronous rectifier is directly connected to the ground. Therefore, the drain-source voltage Vds_s of the synchronous rectifier is the same as its drain terminal voltage Vds_d. The voltage across the auxiliary winding can be obtained based on the difference between the drain-source voltage Vds_s of the synchronous rectifier and the output voltage Vout. When other components (e.g., resistors) are provided between the source terminal of the synchronous rectifier and the ground terminal, the voltage across the auxiliary winding can be obtained based on the difference between the drain terminal voltage Vds_d of the synchronous rectifier and the output voltage Vout. In the detection interval Td, the volt-second integral judgment module compares the first volt-second integral with the preset integral threshold and outputs a first judgment signal. The pulse signal generating module generates a first short pulse signal at the start time of the detection interval Td, and generates a second short pulse signal at the end time Td of the detection interval. The pulse counting module counts the pulse signal based on the first short pulse signal, the second short pulse signal and the first judgment signal and outputs a first count value. The synchronous rectifier drive control module determines whether the primary of the flyback converter is in a fault state based on the first count value; when the primary of the flyback converter is in a fault state, the synchronous rectifier drive control module stops driving the synchronous rectifier.

[0036] As an embodiment of the present invention, when the first volt-second integral reaches a preset integral threshold, the volt-second integral judgment module outputs a third short pulse signal as a first judgment signal; when the first volt-second integral is less than the preset integral threshold, the volt-second integral judgment module outputs a first level signal as a first judgment signal. The following description is made by taking the first level signal as a low level as an example.

[0037] Figure 4 A schematic diagram of a working waveform of a primary state detection circuit of a flyback converter provided by the utility model. The flyback converter adopts Figure 1 The topological structure in Figure 3 The working principle of each module is further explained. Figure 4From top to bottom are the gate control signal Vgs_p of the primary switch tube Q1, the gate control signal Vgs_s of the synchronous rectifier Q2, the drain-source voltage Vds_p of the primary switch tube Q1, the drain-source voltage Vds_s of the synchronous rectifier Q2 (the same as its drain voltage Vds_d), the detection interval Td, the first / second pulse signal, the first judgment signal VT_OK, the primary side current ip and the secondary side current is. At time t0, the synchronous rectifier Q2 is turned off. Prior to this, the synchronous rectifier Q2 is turned on for a period of time to achieve zero voltage turn-on of the primary switch tube Q1. In the figure, at time t0, i.e., the turn-off time after the synchronous rectifier is turned on for the second time, as the start time of the detection interval Td, the pulse signal generating module generates the first short pulse signal Pul_up. At this time, the pulse counting module detects a pulse, and the count is 1, i.e., at this time, the first count value is 1; after time t0, the primary switch tube Q1 is turned on, and the primary side current ip increases. At time t1, the primary switch tube Q1 is turned off; wherein, at time t0, after the synchronous rectifier Q2 is turned off and before the primary switch tube Q1 is turned on, a corresponding dead time (not shown in the figure) can be set; before time t1, Figure 4 In the example, the time ta is set as the end time of the detection interval, the pulse signal generating module generates the second pulse signal Pul_down, the time difference ta-t0 is the preset detection duration T1, that is, the length of the detection interval. In the detection interval, the drain-source voltage Vds_s of the synchronous rectifier Q2 is greater than the output voltage Vout of the flyback converter. The volt-second integral calculation module integrates the difference between the drain-source voltage Vds_s of the synchronous rectifier Q2 and the output voltage Vout from zero to obtain the first volt-second integral, and the first volt-second integral is represented by the shaded area S1. Figure 4In the detection interval, at time tm, the first volt-second integral reaches the preset integral threshold, and the volt-second integral judgment module outputs a third short pulse signal VT_OK as the first judgment signal; after receiving the third short pulse signal VT_OK, the pulse counting module clears the previous count value, that is, at this time, counting starts from zero, and at time ta, the pulse counting module detects the second short pulse signal Pul_down generated by the pulse generating module at the end of the detection interval, and then recounts to 1, and the first count value is 1 at this time; after time t1, the synchronous rectifier Q2 is turned on, and at time t2, the synchronous rectifier Q2 is turned off; a corresponding time t1 can also be set between the turn-off time t1 of the primary side switch tube Q1 and the turn-on time of the synchronous rectifier Q2. Dead time (not shown in the figure); during the conduction period of the synchronous rectifier Q2, the secondary side current is decreases; at t3, the synchronous rectifier Q2 is turned on again (that is, the second conduction), between t2-t3, the primary and secondary of the flyback converter are in a resonant state; at t4, the synchronous rectifier Q2 is turned off again, and the duration of the second conduction of the synchronous rectifier Q2 is t, and the value of t can be set according to the actual application; after t4, the primary switch tube Q1 is turned on, and the working principle in the interval t4-t7 is the same as that between t0-t3, which will not be elaborated here. At t4, as the starting time of the detection interval, the pulse signal generating module generates the first short pulse signal Pul_up, and the pulse counting module detects a pulse, then in the original On the basis of the first count value of 1, the count value is added by 1, that is, at this time, the first count value is 2; at time tn, the first volt-second integral S1 calculated by the volt-second integral calculation module reaches the preset integral threshold, and the volt-second integral judgment module outputs the third short pulse signal VT_OK as the first judgment signal. After receiving the third short pulse signal VT_OK, the pulse counting module clears the previous count value, that is, at this time, counting starts from zero again; at time tb, the pulse counting module detects the second short pulse signal Pul_down generated by the pulse generating module at the end of the detection interval, and the count is 1. At this time, the first count value is 1; the t7-t8 time period is the second conduction interval of the synchronous rectifier Q2; at time t8, as mentioned above, the pulse The signal generating module generates the first short pulse signal Pul_up at this moment, and the pulse counting module detects a pulse and counts up by 1. At this moment, the first count value is 2. After time t8, when a fault occurs on the primary side of the flyback converter and the primary switch tube Q1 cannot be driven normally, within the detection interval, due to resonance or freewheeling on the primary side, there is also a situation where the drain-source voltage Vds_s of the synchronous rectifier Q2 is greater than the output voltage Vout of the flyback converter. When the drain-source voltage Vds_s of the synchronous rectifier Q2 is greater than the output voltage Vout of the flyback converter, the volt-second integral calculation module integrates the difference between the drain-source voltage Vds_s of the synchronous rectifier Q2 and the output voltage Vout from zero to obtain the first volt-second integral, such as Figure 4As shown in, in the interval t8-t9, there are multiple volt-second integrals, where the shaded portion where S2 is located represents the volt-second integral value when the synchronous rectifier Q2 is turned on for the second time, which can be obtained by integrating the difference between the drain-source voltage Vds_s of the synchronous rectifier Q2 and the output voltage Vout during the primary side freewheeling time from zero; the shaded portion where S3 is located represents the volt-second integral value during resonance; in order to identify the fault state of the primary side, in the utility model, a preset integral threshold is set to be greater than the volt-second integral value S2 when the synchronous rectifier Q2 is turned on for the second time, and at the same time It is also greater than the volt-second integral value S3 at resonance. Therefore, in the detection interval between t8 and t9, the volt-second integral value (S2 or S3, where there can be multiple volt-second integral values ​​at resonance) calculated by the volt-second integral calculation module is less than the preset integral threshold. In the time period between t8 and t9, the volt-second integral judgment module will not output the third short pulse signal VT_OK, and the first judgment signal output by it is always at a low level, that is, in this interval, the pulse counting module will not clear the count value, and it will count 2 again based on the previous count value of 1. At this time, the first count value is 3. The synchronous rectifier drive control module receives the first count value and determines whether the primary side is faulty based on the first count value. Based on the above, when the first count value it receives is 1 or 2, the synchronous rectifier drive control module determines that the primary side is in a normal state; when the first count value it receives is 3, the synchronous rectifier drive control module determines that the primary side is in a fault state. In the fault state, the synchronous rectifier Q2 is stopped from being driven to avoid the common phenomenon of the primary and secondary sides.

[0038] in, Figure 4 In the embodiment shown, the shutdown moment after the synchronous rectifier Q2 is turned on for the second time is used as the start moment of the detection interval. As other embodiments of the utility model, the moment later than the first time threshold of the shutdown moment can also be used as the start moment of the detection interval, wherein the first time threshold can be any time threshold within the dead time set between the synchronous rectifier and the primary switch tube of the flyback converter; for example, the first time threshold can be set to be equal to the dead time, and of course it can also be set to other values, such as a value less than the dead time, as long as it does not affect the judgment of the primary state based on the first volt-second integral value. In addition, Figure 4In the illustrated embodiment, the preset detection duration T1 (the length of the detection interval) is set to be shorter than the conduction duration of the primary switch tube in the normal state of the flyback converter, and the end time of the detection interval is set within the conduction interval of the primary switch tube; as other embodiments of the utility model, the end time of the detection interval may also be set to be the same as the end time of the conduction interval of the primary switch tube in the normal state of the flyback converter. The first short pulse signal, the second short pulse signal, and the third short pulse signal in the above text are all described using a single pulse as an example. These three short pulse signals may also include multiple short pulses. When determining whether the primary side is faulty, the size of the first count value may be adjusted accordingly. In addition, Figure 4 In the embodiment, detection is performed one by one on the switching cycle, that is, as long as the first count value reaches 3, the primary is judged to be in a fault state; as other embodiments, the primary is judged to be in a fault state only when abnormal counts of multiple consecutive switching cycles are detected, for example, when the first count value reaches 5 (at this time, the pulse counts of two consecutive switching cycles are in an abnormal state), the primary is judged to be in a fault state. The number of consecutive switching cycles for determining whether the primary state is faulty can be set according to the actual application, and only the size of the first count value needs to be set accordingly. In addition, in this article, when the first volt-second integral reaches the preset integral threshold, the first judgment signal output by the volt-second integral judgment module is the third short pulse signal, and when the first volt-second integral is less than the preset integral threshold, the first judgment signal output by the volt-second integral judgment module is a low level. The utility model is not limited to this. As long as the count value of the pulse counting module can be cleared based on the first judgment signal when the first volt-second integral reaches the preset integral threshold, and when the first volt-second integral is less than the preset integral threshold, the count value of the pulse counting module is not affected based on the first judgment signal, other forms of output of the first judgment signal are also within the verification concept of the utility model. The above is based on Figure 1 The structure of the flyback converter in is used as an example for explanation. This article is not limited to this. The core idea of ​​this article can also be applied to other deformed topological structures. For example, Figure 1 The position of the synchronous rectifier Q2 in the converter is adjusted and set between the output voltage Vout and the secondary winding Ns.

[0039] In summary, the utility model provides a flyback converter and a primary state detection circuit thereof, the flyback converter includes a primary switch tube and a primary controller arranged on the primary side, and a synchronous rectifier and a synchronous rectifier controller arranged on the secondary side, the primary state detection circuit is arranged in the synchronous rectifier controller, and the primary state detection circuit includes a detection interval setting module for setting the detection interval, the start time of the detection interval is the turn-off time after the secondary conduction of the synchronous rectifier or the time later than the first time threshold of the turn-off time; the end time of the detection interval is the time after the start time passes through a preset detection time length; a volt-second integral calculation module, within the detection interval, when the drain terminal voltage of the synchronous rectifier is greater than the output voltage of the flyback converter, the volt-second integral calculation module is based on the synchronous The difference between the drain voltage and the output voltage of the rectifier is integrated from zero to obtain the first volt-second integral; a volt-second integral judgment module compares the first volt-second integral with a preset integral threshold and outputs a first judgment signal; a pulse signal generation module generates a first short pulse signal at the beginning of the detection interval and generates a second short pulse signal at the end of the detection interval; a pulse counting module counts the pulse signal based on the first short pulse signal, the second short pulse signal and the first judgment signal and outputs a first count value; a synchronous rectifier drive control module determines whether the primary of the flyback converter is in a normal or fault state based on the first count value; when the primary of the flyback converter is in a fault state, the synchronous rectifier drive control module stops driving the synchronous rectifier. Through the above-mentioned settings, the utility model can avoid the common phenomenon between the primary and secondary when the primary of the flyback converter is in a fault state.

[0040] Furthermore, the preset integral threshold is greater than the volt-second integral value in the resonant state, and greater than the volt-second integral value when the synchronous rectifier is turned on for the second time, so as to avoid misjudgment of the primary state.

[0041] Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly explaining the present invention, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present invention.

Claims

1. A primary state detection circuit of a flyback converter, wherein the flyback converter comprises a primary switch tube located on the primary side, and a synchronous rectifier and a synchronous rectification controller located on the secondary side, characterized in that: The primary state detection circuit is arranged in the synchronous rectification controller, and the primary state detection circuit comprises: A detection interval setting module, used to set a detection interval, wherein the start time of the detection interval is the turn-off time after the synchronous rectifier is turned on for the second time or a time later than the first time threshold of the turn-off time; the end time of the detection interval is the time after the start time passes through a preset detection time length; a volt-second integral calculation module, wherein, within the detection interval, when the drain voltage of the synchronous rectifier is greater than the output voltage of the flyback converter, the volt-second integral calculation module integrates from zero based on the difference between the drain voltage of the synchronous rectifier and the output voltage to obtain a first volt-second integral; a volt-second integral judgment module, which compares the first volt-second integral with a preset integral threshold and outputs a first judgment signal; a pulse signal generating module, which generates a first short pulse signal at the beginning of the detection interval and generates a second short pulse signal at the end of the detection interval; a pulse counting module, which counts pulses based on the first short pulse signal, the second short pulse signal and the first judgment signal and outputs a first count value; The synchronous rectifier driving control module determines whether the primary of the flyback converter is in a fault state based on the first count value; when the primary of the flyback converter is in a fault state, stops driving the synchronous rectifier.

2. The detection circuit according to claim 1, characterized in that: When the first volt-second integral reaches the preset integral threshold, the volt-second integral judgment module outputs a third short pulse signal as a first judgment signal; When the first volt-second integral is less than the preset integral threshold, the volt-second integral judgment module outputs a first level signal as a first judgment signal.

3. The detection circuit according to claim 2, characterized in that: The first level signal is a low level signal.

4. The detection circuit according to claim 2, characterized in that: When the pulse counting module receives the third short pulse signal, the first counting value is cleared; When receiving the first level signal, the pulse counting module continues to count based on the first short pulse signal and the second short pulse signal.

5. The detection circuit according to claim 4, characterized in that: The first short pulse signal, the second short pulse signal and the third short pulse signal are all single short pulse signals. When the first count value is 1 or 2, the synchronous rectifier drive control module determines that the primary of the flyback converter is in a normal state; When the first count value is (2N+1), the synchronous rectifier drive control module determines that the primary of the flyback converter is in a fault state, where N is a natural number greater than 0.

6. The detection circuit according to claim 1, characterized in that: The preset integral threshold is greater than the volt-second integral value in the resonant state, and greater than the volt-second integral value when the synchronous rectifier is turned on for the second time.

7. The detection circuit according to claim 6, characterized in that: The volt-second integrated value when the synchronous rectifier is turned on for the second time is the volt-second integrated value obtained by integrating the difference between the drain voltage of the synchronous rectifier and the output voltage from zero during the primary side freewheeling time in the primary fault state.

8. The detection circuit according to claim 1, characterized in that: The first time threshold is less than or equal to a dead time set between the synchronous rectifier and the primary switch tube of the flyback converter.

9. The detection circuit according to claim 1, characterized in that: Based on the preset detection time length, the end time of the detection interval is within the conduction interval of the primary switch tube.

10. A flyback converter, comprising a primary switch tube and a primary controller arranged on a primary side, and a synchronous rectifier and a synchronous rectifier controller arranged on a secondary side, characterized in that: The synchronous rectifier controller includes the primary state detection circuit described in any one of claims 1-9, and the primary state of the flyback converter is detected based on the primary state detection circuit; when the primary of the flyback converter is in a fault state, the synchronous rectifier drive control module stops driving the synchronous rectifier.

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