Pulse generation circuit, board processing device, and energy regeneration method

Abstract

This pulse generation circuit is provided with: a capacitor that has one end connected to a power supply and the other end connected to a ground potential; a transformer that has one end of the primary side connected to the one end of the capacitor and the secondary side connected to a load; an inductor that has one end connected to the other end of the primary side of the transformer; a switching element that is connected between the other end of the inductor and the ground potential; a diode that has a cathode connected to the other end on the primary side of the transformer and an anode connected to the ground potential; and a control circuit that controls an ON-state and an OFF-state of the switching element. The control circuit controls the switching element to be turned ON, and controls the switching element to be turned OFF during a period in which the direction of the current flowing to the primary side of the transformer is reversed after the current flows to the primary side of the transformer.

Description

Pulse generating circuit, substrate processing apparatus, and energy regeneration method

[0001] Various aspects and embodiments of the present disclosure relate to a pulse generating circuit, a substrate processing apparatus, and an energy recovery method.

[0002] The following Patent Document 1 discloses "a pulse power supply including a magnetic reset circuit in which a saturable reactor is used as a magnetic switch means and a reset current is supplied to a reset winding of the saturable reactor to keep the iron core of the saturable reactor reversely excited, the magnetic reset circuit comprising: a DC power supply that constantly supplies a reset current to the reset winding; a first reactor that is provided at a reset current output terminal of the DC power supply and that suppresses surges in a reset current path from entering the DC power supply; a second reactor that is provided between the first reactor and the reset winding and that suppresses induced current generated in the reset winding; and a diode that is provided in parallel with a series circuit of the second reactor and the reset winding and that circulates the induced current to the second reactor."

[0003] Furthermore, the following Patent Document 2 discloses "a snubber circuit provided in each arm of a power conversion bridge circuit having at least two sets of upper arms and lower arms each formed by a main switch element, the snubber circuit suppressing a voltage derived from the operation of the main switch element, the snubber circuit comprising a regeneration circuit having a DC series circuit in which a diode and a snubber capacitor are connected in series and connected across the set of upper arms and lower arms, and a snubber switch element connected between a connection point between the diode and the snubber capacitor and a connection point between the set of upper arms and lower arms."

[0004] Japanese Patent Application Laid-Open No. 9-83052 Japanese Patent Application Laid-Open No. 2017-153205

[0005] The present disclosure provides a pulse generating circuit, a substrate processing apparatus, and an energy regeneration method that enable efficient use of energy.

[0006] A pulse generating circuit according to one aspect of the present disclosure includes a capacitor having one end connected to a power supply and the other end connected to a ground potential, a transformer having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load, an inductor having one end connected to the other end of the primary side of the transformer, a switching element connected between the other end of the inductor and the ground potential, a diode having a cathode connected to the other end of the primary side of the transformer and an anode connected to the ground potential, and a control circuit that controls the on and off states of the switching element, wherein the control circuit controls the switching element to the on state and to the off state during a period when, after a current flows in the primary side of the transformer, the direction of the current flowing in the primary side of the transformer is reversed.

[0007] According to various aspects and embodiments of the present disclosure, it is possible to achieve efficient use of energy.

[0008] FIG. 1 is a schematic diagram showing an example of a plasma processing apparatus. FIG. 2 is a diagram showing an example of the configuration of a pulse generating circuit in a first embodiment. FIG. 3 is a flowchart showing an example of the operation of the pulse generating circuit. FIG. 4 is a timing chart showing an example of changes in each signal in the first embodiment. FIG. 5 is a diagram showing an example of the configuration of a pulse generating circuit in a second embodiment. FIG. 6 is a diagram showing an example of a saturable inductor. FIG. 7 is a diagram showing an example of the configuration of a pulse generating circuit in a third embodiment. FIG. 8 is a diagram showing an example of an excitation circuit. FIG. 9 is a diagram showing a voltage V ds and current I d 10 is a diagram showing an example of a change in voltage V ds and current I d 11 is a diagram showing an example of a change in the voltage V ds and current I d 12 is a timing chart showing an example of changes in each signal in the third embodiment. FIG. 13 is a diagram showing an example of the configuration of a pulse generating circuit in the fourth embodiment.

[0009] Hereinafter, embodiments of a pulse generating circuit, a substrate processing apparatus, and an energy regeneration method will be described in detail with reference to the drawings. Note that the pulse generating circuit, the substrate processing apparatus, and the energy regeneration method disclosed below are not limited to the embodiments.

[0010] However, with the recent increase in awareness of environmental issues, there is a demand for power saving in devices, and power saving is also required in pulse generating circuits. Therefore, the present disclosure provides a technology that enables efficient use of energy.

[0011] [Configuration of Plasma Processing Apparatus 1] An example of the configuration of a plasma processing system will be described below. Fig. 1 is a diagram illustrating an example of the configuration of a capacitively coupled plasma processing apparatus 1. The plasma processing apparatus 1 is an example of a substrate processing apparatus.

[0012] The plasma processing system includes a capacitively coupled plasma processing apparatus 1 and a controller 2. The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 has at least one gas inlet for supplying at least one processing gas to the plasma processing space 10s and at least one gas outlet for exhausting gas from the plasma processing space 10s. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0013] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

[0014] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that the annular region 111b may also be provided by another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Furthermore, at least one RF / DC electrode coupled to an RF (Radio Frequency) power supply 31 and / or a DC (Direct Current) power supply 32 (described later) may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or a DC signal (described later) is supplied to the at least one RF / DC electrode, the RF / DC electrode is also called a bias electrode. Note that the conductive member of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Alternatively, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.

[0015] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0016] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer fluid, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0017] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0018] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include one or more flow modulation devices to modulate or pulse the flow rate of the at least one process gas.

[0019] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one process gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of a plasma generating unit configured to generate a plasma from one or more process gases in the plasma processing chamber 10. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, thereby attracting ion components in the formed plasma to the substrate W.

[0020] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0021] The second RF generator 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0022] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to the at least one lower electrode and configured to generate a first DC signal. The generated first bias DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to the at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0023] In this embodiment, at least one of the first and second DC signals is pulsed. A sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a pulse waveform of a rectangular, trapezoidal, triangular, or a combination thereof. In this embodiment, a pulse generation circuit for generating the sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Therefore, the first DC generator 32a and the pulse generation circuit constitute a voltage pulse generation unit. When the second DC generator 32b and the pulse generation circuit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses may have either positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generating units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b.

[0024] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0025] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 may be implemented by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and execute the read program to perform various control operations. The program may be stored in the storage unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a random access memory (RAM), a read only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).

[0026] 2 is a diagram showing an example of the configuration of the pulse generation circuit 50 according to the first embodiment. The pulse generation circuit 50 according to this embodiment includes a capacitor 52, a transformer 53, an inductor 54, a switching element 55, a gate circuit 56, and a diode 57. The control unit 2 and the gate circuit 56 are an example of a control circuit.

[0027] One end of the capacitor 52 is connected to the charger 51, and the other end is connected to a ground potential. The charger 51 is an example of a power supply. Charging of the capacitor 52 by the charger 51 is controlled by the control unit 2. The voltage of the capacitor 52 is V c The transformer 53 has one end of the primary side connected to one end of the capacitor 52, and the secondary side connected to the load 60. The current flowing from the capacitor 52 to the transformer 53 is defined as I m One end of the inductor 54 is connected to the other end of the primary side of the transformer 53.

[0028] The switching element 55 is connected between the other end of the inductor 54 and ground potential. In this embodiment, the switching element 55 is an n-channel MOSFET. Preferably, the switching element 55 is a MOSFET using silicon carbide. However, the switching element 55 may also be a p-channel MOSFET or an IGBT.

[0029] The gate circuit 56 controls the on / off of the switching element 55 by controlling the gate voltage V g In this embodiment, the gate voltage V g When the voltage V g When the trigger signal is input from the control unit 2 to the gate circuit 56, and when the gate voltage V is output from the gate circuit 56 to the switching element 55, the switching element 55 is turned off. g There is a delay ΔT between g exists.

[0030] The cathode of the diode 57 is connected to the other end of the primary side of the transformer 53, and the anode of the diode 57 is connected to the ground potential. The current flowing from the diode 57 to the transformer 53 is I r The diode 57 is preferably a diode that operates at high speed and has excellent reverse recovery characteristics. For example, the diode 57 is preferably a fast recovery diode or a Schottky barrier diode.

[0031] [Operation of Pulse Generation Circuit 50] Figure 3 is a flowchart showing an example of the operation of the pulse generation circuit 50. Each process illustrated in Figure 3 is realized by the control unit 2 controlling each part of the pulse generation circuit 50. The following description will be made with reference to the timing chart illustrated in Figure 4. Note that before the start of the flowchart illustrated in Figure 3, the switching element 55 is controlled to be in the off state.

[0032] First, the charger 51 is controlled to charge the capacitor 52 (step S10). In step S10, the charger 51 starts charging the capacitor 52 at timing t1 shown in FIG. 4, for example. Then, the voltage V of the capacitor 52 is c At time t2 when the voltage V reaches a predetermined voltage, the charger 51 stops charging the capacitor 52. In addition, since the switching element 55 is controlled to be in the OFF state, the drain-source voltage V of the switching element 55 is ds Also, the voltage V c rises with

[0033] Next, the switching element 55 is controlled to be in the ON state (step S11). Step S11 is an example of process a). In step S11, for example, at timing t3 shown in FIG. 4, a trigger signal instructing the switching element 55 to be in the ON state is supplied from the control unit 2 to the gate circuit 56. The gate circuit 56 receives a delay ΔT from the start of supply of the trigger signal. g At time t4 after the time has elapsed, the high gate voltage V g is applied to the gate terminal of the switching element 55. A high gate voltage V g 4, a current I flows from the capacitor 52 through the transformer 53, the inductor 54, and the switching element 55. m Also, the voltage V of the switching element 55 ds is almost 0.

[0034] Here, the current I mis attenuated while oscillating at a resonance frequency caused by the capacitance of the capacitor 52, the inductance of the transformer 53, the inductance of the inductor 54, the parasitic capacitance of the wiring, and the parasitic inductance of the wiring. r is the current I m The resonance period of

[0035] Next, it is determined whether a predetermined period ΔT0 has elapsed since the supply of the trigger signal was started (step S12). If the predetermined period ΔT0 has not elapsed since the supply of the trigger signal was started (step S12: No), the process shown in step S12 is executed again.

[0036] On the other hand, if a predetermined period ΔT has elapsed since the supply of the trigger signal started (step S12: Yes), the switching element 55 is controlled to be in the OFF state (step S13). Steps S12 and S13 are an example of process b). In step S13, for example, at timing t shown in FIG. 4, a trigger signal instructing the switching element 55 to be in the OFF state is supplied from the control unit 2 to the gate circuit 56. The gate circuit 56 receives a delay ΔT from the start of the supply of the trigger signal instructing the OFF state. g At the timing t6 after the time has elapsed, the low gate voltage V g is applied to the gate terminal of the switching element 55. A low gate voltage V g When this occurs, an off surge occurs in the switching element 55, and the voltage V ds vibrates greatly.

[0037] Next, it is determined whether or not to end the pulse generation (step S14). If the pulse generation is not to be ended (step S14: No), the process shown in step S10 is executed again. On the other hand, if the pulse generation is to be ended (step S14: Yes), the process shown in this flowchart ends.

[0038] In this embodiment, the timing t6 at which the switching element 55 is controlled to be in the OFF state is the timing at which the current I mThe current I m That is, the timing t6 is the timing during which the direction of the current I m The timing t when the direction of 51 from current I m In other words, the length of the period ΔT0 of the trigger signal instructing the switching element 55 to be in the ON state is the resonance period T r and the resonance period T r As a result, the regenerative current I r flows, and the regenerative current I r As a result, for example, as shown in FIG. 4, during the period from timing t6 to timing t7 when charging by the charger 51 is not performed, the capacitor 52 is charged, and the voltage V c This will increase the efficiency of energy use.

[0039] The timing t6 at which the switching element 55 is controlled to be in the OFF state is the timing at which the current I m The timing t when the direction of 51 from current I m The timing t7 at which the direction of the arrow first returns to its original direction is the timing t 51 This allows for a larger amount of regenerative current I r can be used to charge the capacitor 52.

[0040] If the diode 57 is not provided between the transformer 53 and the switching element 55, when the switching element 55 is controlled to be in the off state, the regenerative current I r Therefore, the voltage V of the capacitor 52 after the switching element 55 is controlled to the OFF state at the timing t6 c is maintained at the voltage at time t6, as shown by the dashed line in Figure 4. Therefore, when charging of the capacitor 52 by the charger 51 is resumed at time t8, the voltage V of the capacitor 52 is maintained at the voltage at time t6, as shown by the dashed line in Figure 4.c gradually increases, and at time t 10 At this point, a predetermined voltage is reached.

[0041] On the other hand, in this embodiment, the diode 57 is provided between the transformer 53 and the switching element 55, so the regenerative current I r flows, and the regenerative current I r Then, when the charger 51 resumes charging the capacitor 52 at timing t8, a certain amount of charge has been accumulated in the capacitor 52, and therefore the voltage V c 4, the voltage V of the capacitor 52 in this embodiment rises to the predetermined voltage more quickly. c is the timing t 10 The predetermined voltage is reached at an earlier timing t9, which allows the next pulse to be output more quickly.

[0042] In the example of FIG. 4, the current I m During the period when the direction of the regenerative current I r In the example, the capacitor 52 is charged by the current I m Even during the period when the direction of the regenerative current I r Therefore, by providing the diode 57, the current I after the switching element 55 is controlled to the off state is m During the period when the direction of the regenerative current I r This allows the capacitor 52 to be charged, thereby making it possible to effectively utilize energy.

[0043] The first embodiment has been described above. As described above, the pulse generating circuit (pulse generating circuit 50) in this embodiment includes a capacitor (capacitor 52) having one end connected to a power source (charger 51) and the other end connected to ground potential, a transformer (transformer 53) having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load (load 60), an inductor (inductor 54) having one end connected to the other end of the primary side of the transformer, a switching element (switching element 55) connected between the other end of the inductor and ground potential, a diode (57) having a cathode connected to the other end of the primary side of the transformer and an anode connected to ground potential, and a control circuit (plasma processing apparatus 1 and gate circuit 56) that controls the on and off states of the switching element. The control circuit controls the switching element to the on state and, after a current flows through the primary side of the transformer, controls the switching element to the off state during a period when the direction of the current flowing through the primary side of the transformer reverses. This allows for efficient energy utilization.

[0044] In the above-described embodiment, the switching element is a MOSFET. Alternatively, the switching element may be a MOSFET using silicon carbide, which enables high-speed switching.

[0045] Furthermore, the diodes in the above-described embodiments are fast recovery diodes or Schottky barrier diodes, which allow the regenerative current to flow quickly to the capacitor.

[0046] The substrate processing apparatus in the above-described embodiment also includes a chamber (plasma processing chamber 10) having a gas supply port (gas supply port 13 a) and a gas exhaust port (gas exhaust port 10 e) and accommodating a substrate (substrate W), and a pulse generating circuit (pulse generating circuit 50) that processes the substrate using plasma by supplying pulsed electric power into the chamber to convert the gas supplied through the gas supply port into plasma. The pulse generating circuit includes a capacitor (capacitor 52) having one end connected to a power source (charger 51) and the other end connected to ground potential, a transformer (transformer 53) having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load (load 60), an inductor (inductor 54) having one end connected to the other end of the primary side of the transformer, a switching element (switching element 55) connected between the other end of the inductor and ground potential, a diode (57) having a cathode connected to the other end of the primary side of the transformer and an anode connected to ground potential, and a control circuit (plasma processing apparatus 1 and gate circuit 56) that controls the on and off states of the switching element. The control circuit controls the switching element to the on state and, after current flows through the primary side of the transformer, controls the switching element to the off state during a period when the direction of the current flowing through the primary side of the transformer reverses. This allows for efficient energy utilization.

[0047] The energy regeneration method of the above-described embodiment includes a pulse generation circuit (pulse generation circuit 50) including a capacitor (capacitor 52) having one end connected to a power source (charger 51) and the other end connected to ground potential, a transformer (transformer 53) having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load (load 60), an inductor (inductor 54) having one end connected to the other end of the primary side of the transformer, a switching element (switching element 55) connected between the other end of the inductor and ground potential, a diode (57) having a cathode connected to the other end of the primary side of the transformer and an anode connected to ground potential, and a control circuit (plasma processing apparatus 1 and gate circuit 56) that controls the on and off states of the switching element. In step a), the switching element is controlled to an on state. In step b), after the switching element is turned on and current flows through the primary side of the transformer, the switching element is controlled to an off state during a period when the direction of the current flowing through the primary side of the transformer is reversed. This allows for efficient energy utilization.

[0048] Second Embodiment In the first embodiment, the pulse generating circuit 50 is provided with an inductor 54, but in the second embodiment, a saturable inductor 54' is provided instead of the inductor 54. The following description will focus on the differences from the first embodiment.

[0049] 5 is a diagram showing an example of the configuration of the pulse generation circuit 50 according to the second embodiment. The pulse generation circuit 50 according to this embodiment includes a capacitor 52, a transformer 53, a saturable inductor 54′, a switching element 55, a gate circuit 56, and a diode 57. One end of the saturable inductor 54′ is connected to the other end of the primary side of the transformer 53, and the other end is grounded via the switching element 55.

[0050] The saturable inductor 54' has a structure in which an electric wire is wound around a core made of, for example, ferrite or a cobalt-based amorphous alloy. Specifically, the saturable inductor 54' is a toroidal coil in which an electric wire 541 is wound around an annular toroidal core 540, as shown in Fig. 6 . By providing the saturable inductor 54' instead of the inductor 54, the switching loss of the switching element 55 can be reduced.

[0051] Third Embodiment The third embodiment differs from the second embodiment in that an excitation circuit 58 that excites a saturable inductor 54' is further provided. The following description will focus on the differences from the second embodiment.

[0052] 7 is a diagram showing an example of the configuration of the pulse generation circuit 50 according to the third embodiment. The pulse generation circuit 50 according to this embodiment includes a capacitor 52, a transformer 53, a saturable inductor 54′, a switching element 55, a gate circuit 56, a diode 57, and an excitation circuit 58. The excitation circuit 58 excites the saturable inductor 54′ so as to generate a magnetic field in the opposite direction to the magnetic field generated by the current flowing through the saturable inductor 54′ when the switching element 55 is turned on.

[0053] 8 is a diagram showing an example of the excitation circuit 58. The excitation circuit 58 has an inductor 580, an inductor 581, a resistor 582, a diode 583, an inductor 584, and a DC power supply 585. The inductor 581, the resistor 582, and the inductor 584 are connected in series between the positive side of the DC power supply 585 and one end of the inductor 580. The other end of the inductor 580 is connected to the negative side of the DC power supply 585. The cathode of the diode 583 is connected to the node between the resistor 582 and the inductor 584, and the anode of the diode 583 is connected to the negative side of the DC power supply 585.

[0054] The saturable inductor 54' is excited by a magnetic field generated in the inductor 580 by a current supplied to the inductor 580 from the DC power supply 585 via the inductor 584, the resistor 582, and the inductor 581. This makes it possible to lengthen the time required for the magnetic flux density of the saturable inductor 54' to saturate when the switching element 55 transitions to the on state. This allows the current I d Furthermore, since the impedance of the saturable inductor 54′ can be maintained high until the magnetic flux density is saturated, the voltage V of the switching element 55 can be delayed. ds can be lowered quickly.

[0055] Here, the voltage V in the switching element 55 of the first embodiment ds and current I d 9 shows the voltage V ds and current I d 9 is a diagram showing an example of a change in the voltage V ds Falling edge of current I d This coincides with the rise of the

[0056] FIG. 10 shows the voltage V ds and current I d 10 is a diagram showing an example of a change in voltage V during a period ΔT2. In the comparative example, a solenoid coil in which an electric wire is wound around a rod-shaped core such as ferrite is used instead of the inductor 54. In the example of FIG. ds Falling edge of current I d 9 and 10, the voltage V ds Falling edge of current I d The overlap with the rising edge of the first voltage is smaller in the comparative example than in the first embodiment. That is, the switching loss is smaller in the comparative example than in the first embodiment.

[0057] FIG. 11 shows the voltage V ds and current I dIn the third embodiment, a toroidal coil in which an electric wire is wound around a core such as ferrite is used as the saturable inductor 54'. In the example of FIG. 11, the voltage V ds Falling edge of current I d 9 to 11, the voltage V ds Falling edge of current I d That is, among the first embodiment, the comparative example, and the third embodiment, the third embodiment has the smallest switching loss.

[0058] 12 is a timing chart showing an example of changes in each signal in the third embodiment. The following description will focus on the differences from FIG.

[0059] The gate circuit 56 generates a delay ΔT from the timing t3 when the supply of the trigger signal is started. g At time t4 after the time has elapsed, the high gate voltage V g is applied to the gate terminal of the switching element 55. A high gate voltage V g When the voltage Vcc is applied, the switching element 55 is controlled to be in the ON state, and a current starts to flow through the saturable inductor 54'. However, it takes time ΔT until the magnetic flux density of the core of the saturable inductor 54' becomes saturated. s During this period, the impedance of the saturable inductor 54' is high, so that the current I d Therefore, the current I m The rise of period ΔT s delay, current I m For example, at timing t 41 It starts flowing from

[0060] Also, at timing t6, the low gate voltage V gis applied to the gate terminal of the switching element 55, and when the switching element 55 is controlled to be in the off state, an off-surge occurs in the switching element 55. However, in this embodiment, a saturable inductor 54' is connected to the switching element 55. Therefore, compared to the pulse generating circuit 50 of the first embodiment in which the inductor 54 is connected to the switching element 55, the voltage V ds (See FIGS. 4 and 12.) This makes it possible to prevent damage to the switching element 55 due to an off-surge.

[0061] 13 , for example, a magnetic pulse compression circuit 59 is provided between the load 60 and the transformer 53. This makes it possible to narrow the width of the pulse supplied to the load 60. Note that, although one magnetic pulse compression circuit 59 is provided between the load 60 and the transformer 53 in the example of FIG. 13 , the disclosed technology is not limited to this, and multiple magnetic pulse compression circuits 59 may be provided between the load 60 and the transformer 53.

[0062] [Others] The technology disclosed in the present application is not limited to the above-described embodiment, and various modifications are possible within the scope of the gist thereof.

[0063] For example, in the above-described embodiment, the plasma processing apparatus 1 has been described as using a capacitively coupled plasma (CCP) as an example of a plasma source, but the plasma source is not limited to this. Examples of plasma sources other than the capacitively coupled plasma include inductively coupled plasma (ICP), microwave-excited surface wave plasma (SWP), electron cyclotron resonance plasma (ECP), and helicon wave-excited plasma (HWP).

[0064] It should be noted that the disclosed embodiments are illustrative in all respects and should not be considered limiting. Indeed, the above-described embodiments may be embodied in various forms. Furthermore, the above-described embodiments may be omitted, substituted, or modified in various forms without departing from the scope and spirit of the appended claims.

[0065] Furthermore, the following supplementary notes are disclosed regarding the above-described embodiment.

[0066] (Supplementary Note 1) A pulse generation circuit comprising: a capacitor having one end connected to a power supply and the other end connected to a ground potential; a transformer having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load; an inductor having one end connected to the other end of the primary side of the transformer; a switching element connected between the other end of the inductor and ground potential; a diode having a cathode connected to the other end of the primary side of the transformer and an anode connected to ground potential; and a control circuit for controlling the on and off states of the switching element, wherein the control circuit controls the switching element to an on state and controls the switching element to an off state during a period after a current flows in the primary side of the transformer and when the direction of the current flowing in the primary side of the transformer is reversed. (Supplementary Note 2) The pulse generation circuit according to Supplementary Note 1, wherein the inductor is a saturable inductor. (Supplementary Note 3) The pulse generation circuit according to Supplementary Note 2, further comprising an excitation circuit that excites the saturable inductor so as to generate a magnetic field having a direction opposite to that of a magnetic field generated by a current flowing in the saturable inductor when the switching element is in an on state. (Supplementary Note 4) The pulse generating circuit according to Supplementary Note 2 or 3, wherein the inductor is a toroidal coil in which an electric wire is wound around an annular core. (Supplementary Note 5) The pulse generating circuit according to any one of Supplementary Notes 1 to 4, wherein the switching element is a MOSFET. (Supplementary Note 6) The pulse generating circuit according to Supplementary Note 5, wherein the switching element is a MOSFET using silicon carbide. (Supplementary Note 7) The pulse generating circuit according to any one of Supplementary Notes 1 to 6, wherein the diode is a fast recovery diode or a Schottky barrier diode. (Supplementary Note 8) The pulse generating circuit according to any one of Supplementary Notes 1 to 7, further comprising a magnetic pulse compression circuit provided between the secondary side of the transformer and a load.a control circuit for controlling the on and off states of the switching element, wherein the control circuit controls the switching element to be on, and controls the switching element to be off during a period in which a current flows through the primary side of the transformer and a direction in which the current flows through the primary side of the transformer is reversed after the current flows through the primary side of the transformer. (Supplementary Note 10) In a pulse generating circuit having a capacitor having one end connected to a power supply and the other end connected to a ground potential, a transformer having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load, an inductor having one end connected to the other end of the primary side of the transformer, a switching element connected between the other end of the inductor and ground potential, a diode having a cathode connected to the other end of the primary side of the transformer and an anode connected to the ground potential, and a control circuit for controlling the on state and off state of the switching element, wherein the control circuit executes the steps of: a) controlling the switching element to an on state, and b) controlling the switching element to an off state during a period in which a direction of the current flowing in the primary side of the transformer is reversed after the switching element is turned on and a current flows in the primary side of the transformer.

[0067] REFERENCE SIGNS LIST W substrate 1 plasma processing apparatus 10 plasma processing chamber 10a sidewall 10e gas exhaust port 10s plasma processing space 11 substrate support 111 main body 111a central region 111b annular region 1110 base 1110a flow path 1111 electrostatic chuck 1111a ceramic member 1111b electrostatic electrode 112 ring assembly 13 shower head 13a gas supply port 13b gas diffusion chamber 13c gas inlet 20 gas supply unit 21 gas source 22 flow rate controller 30 power supply 31 RF power supply 31a first RF generation unit 31b second RF generation unit 32 DC power supply 32a first DC generation unit 32b second DC generation unit 40 exhaust system 2 control unit 2a computer 2a1 processing unit 2a2 Memory unit 2a3 Communication interface 50 Pulse generating circuit 51 Charger 52 Capacitor 53 Transformer 54 Inductor 540 Toroidal core 541 Electric wire 54' Saturable inductor 55 Switching element 56 Gate circuit 57 Diode 58 Excitation circuit 580 Inductor 581 Inductor 582 Resistor 583 Diode 584 Inductor 585 DC power supply 59 Magnetic pulse compression circuit 60 Load

Claims

1. A pulse generating circuit comprising: a capacitor having one end connected to a power source and the other end connected to ground potential; a transformer having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load; an inductor having one end connected to the other end of the primary side of the transformer; a switching element connected between the other end of the inductor and ground potential; a diode having a cathode connected to the other end of the primary side of the transformer and an anode connected to ground potential; and a control circuit for controlling the on and off states of the switching element, wherein the control circuit controls the switching element to the on state and controls the switching element to the off state during a period in which, after a current flows in the primary side of the transformer, the direction of the current flowing in the primary side of the transformer is reversed.

2. The pulse generating circuit of claim 1, wherein the inductor is a saturable inductor.

3. The pulse generating circuit of claim 2, further comprising an excitation circuit that excites the saturable inductor so as to generate a magnetic field in the opposite direction to the magnetic field generated by the current flowing through the saturable inductor when the switching element is turned on.

4. A pulse generating circuit as claimed in claim 2 or 3, wherein the inductor is a toroidal coil having an electric wire wound around an annular core.

5. The pulse generating circuit according to claim 1, wherein said switching element is a MOSFET.

6. The pulse generating circuit according to claim 5, wherein said switching element is a MOSFET using silicon carbide.

7. The pulse generating circuit according to claim 1, wherein the diode is a fast recovery diode or a Schottky barrier diode.

8. The pulse generating circuit of claim 1, further comprising a magnetic pulse compression circuit provided between the secondary side of the transformer and a load.

9. A substrate processing apparatus comprising: a chamber having a gas supply port and a gas exhaust port and for accommodating a substrate; and a pulse generating circuit for supplying pulsed power into the chamber to convert the gas supplied through the gas supply port into plasma within the chamber, thereby processing the substrate using plasma, the pulse generating circuit comprising: a capacitor having one end connected to a power source and the other end connected to a ground potential; a transformer having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load; an inductor having one end connected to the other end of the primary side of the transformer; a switching element connected between the other end of the inductor and the ground potential; a diode having a cathode connected to the other end of the primary side of the transformer and an anode connected to the ground potential; and a control circuit for controlling the on and off states of the switching element, wherein the control circuit controls the switching element to an on state and controls the switching element to an off state during a period in which a current flows through the primary side of the transformer and then a direction of the current flowing through the primary side of the transformer is reversed.

10. A pulse generating circuit having a capacitor having one end connected to a power source and the other end connected to a ground potential, a transformer having one end of its primary side connected to one end of the capacitor and a secondary side connected to a load, an inductor having one end connected to the other end of the primary side of the transformer, a switching element connected between the other end of the inductor and ground potential, a diode having a cathode connected to the other end of the primary side of the transformer and an anode connected to the ground potential, and a control circuit for controlling the on and off states of the switching element, wherein the control circuit executes the following steps: a) controlling the switching element to an on state; and b) controlling the switching element to an off state during a period in which a current flows in the primary side of the transformer as a result of the switching element being turned on, and the direction of the current flowing in the primary side of the transformer is reversed.

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