Method for scheduling hardware accelerator and scheduling device

Abstract

The embodiment of the present application discloses a method for scheduling hardware accelerators and a scheduling device, which are used to solve the problem of low efficiency of scheduling HAC in the prior art. The method in this embodiment of the present application includes: the scheduling device receives a task request message, the task request message is used to request allocation of a hardware accelerator HAC for the requested task; the scheduling device schedules the target HAC in the first state to execute the requested task, and switching the state of the target HAC to a second state, the first state is used to indicate that the target HAC is not executing a task, and the second state is used to indicate that the target HAC is executing a task.

Description

technical field

[0001] The present application relates to the technical field of network communication, and in particular to a method for scheduling a hardware accelerator and a scheduling device. Background technique

[0002] A hardware accelerator (hardware accelerator, HAC) is a hardware module that uses logic language to implement certain functions. Because it can process data in parallel, it has greater advantages in terms of processing power and delay than software implementation. At present, some communication chips use HAC to achieve large data, large amount of calculation, and fixed kinetic energy to reduce the cost of software deployment. With the development of communication services, business scenarios are becoming more and more complex, which makes the processing specifications and delay requirements of the business more and more high. In order to meet these requirements, chips have to be deployed with larger scale, higher complexity, and more quantities. There...

Examples

Embodiment Construction

[0068] Embodiments of the present application provide a method for scheduling hardware accelerators and a scheduling device, which are used to solve the problem of low efficiency of scheduling HAC in the prior art.

[0069] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and not necessarily Used to describe a specific sequence or sequence. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or device comprising a sequence of steps or elements is not necessarily limited to the expressly listed inst...

technical field

[0001] The present application relates to the technical field of network communication, and in particular to a method for scheduling a hardware accelerator and a scheduling device. Background technique

[0002] A hardware accelerator (hardware accelerator, HAC) is a hardware module that uses logic language to implement certain functions. Because it can process data in parallel, it has greater advantages in terms of processing power and delay than software implementation. At present, some communication chips use HAC to achieve large data, large amount of calculation, and fixed kinetic energy to reduce the cost of software deployment. With the development of communication services, business scenarios are becoming more and more complex, which makes the processing specifications and delay requirements of the business more and more high. In order to meet these requirements, chips have to be deployed with larger scale, higher complexity, and more quantities. There...

Examples

Embodiment Construction

[0068] Embodiments of the present application provide a method for scheduling hardware accelerators and a scheduling device, which are used to solve the problem of low efficiency of scheduling HAC in the prior art.

[0069] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and not necessarily Used to describe a specific sequence or sequence. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or device comprising a sequence of steps or elements is not necessarily limited to the expressly listed inst...

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