Startup circuit, core circuit, consumable chip, consumable, start-up method of bandgap reference circuit, working method of core circuit

Abstract

The present invention relates to the technical field of a start-up circuit of a bandgap reference circuit, and specifically to a start-up circuit, a core circuit, a consumable chip, a consumable, a start-up method of a bandgap reference circuit, and a working method of a core circuit. When the start-up circuit is powered on, the first bias input terminal and the second bias input terminal of the bandgap reference circuit obtain a bias, thereby breaking the zero current state of the bandgap reference circuit. The control terminal of the start-up circuit is connected to the output terminal of the bandgap reference circuit, so that the start-up circuit can only be turned off after the output voltage of the bandgap reference circuit reaches an expected voltage value. When the start-up circuit is powered on, the third voltage output terminal directly provides an operating current for the reference transistor, so that the reference transistor leaves the zero current state and enters a normal working state.

Description

Technical Field

[0001] The present invention relates to the technical field of a start-up circuit of a bandgap reference circuit, and in particular to a start-up circuit, a core circuit, a consumable chip, consumables, a start-up method of the bandgap reference circuit, and a working method of the core circuit. Background Art

[0002] The bandgap reference circuit uses the negative temperature coefficient of the PN junction voltage and the positive temperature coefficient of the voltage difference between the two PN junctions under different current densities to compensate each other, thereby obtaining an output voltage with very low temperature drift. Theoretically, this output voltage value is approximately equal to the bandgap voltage of silicon, so this circuit is called a bandgap reference circuit. The bandgap reference circuit usually forms a power supply together with a startup circuit to provide a stable voltage output. When the power supply is powered on, in the absence of a startup circuit, the bandgap reference circuit may have the following two degenerate points:

[0003] (1) The input terminal of the operational amplifier of the bandgap reference circuit is at ground potential, and the core circuit is in a zero current state;

[0004] (2) In normal working state, the transistor with base and collector short-circuited is turned on and operates at the corresponding current density according to the principle of the circuit.

[0005] Theoretically, only the second state can exist stably, but due to the existence of leakage current, the first state may also exist stably.

[0006] The core circuit of the original consumable chip bandgap reference voltage source is as follows Figure 1 As shown in , it includes a startup circuit composed of MSP0, MSP1, MSP2, MSP3, MSN0, MSN1, MSN2, MSN3, and MSN4, and a bandgap reference circuit composed of other devices. Any VREF can be obtained by adjusting the resistor R2 in the bandgap reference circuit. The two transistors in the traditional bandgap reference circuit have only one current path, so the positions of the two degenerate points of the bandgap reference circuit can be easily determined. As long as a small startup current is given to the transistor circuit for a period of time, the circuit will approach the normal working point and eventually work stably. However, in Figure 1 In the core circuit shown in FIG. 1 , when the drain potential of MP1 and MP3 is too low to turn on transistors Q0 and Q1, the existence of resistors R3 and R4 connected in parallel with the two transistors Q0 and Q1 can also provide a current path for the circuit, so that the bandgap reference circuit has a third degenerate point in addition to the above two degenerate points:

[0007] (3) The input of the operational amplifier OPA is at a certain potential, but it cannot turn on transistors Q0 and Q1, so the circuit is in an unknown state.

[0008] therefore, Figure 1 The core circuit shown in has the following technical problems:

[0009] 1) Due to the existence of resistors R3 and R4, when the drain potential of MP1 and MP3 is too low to turn on transistors Q0 and Q1, R3 and R4 provide a current path for the circuit, causing the circuit to be at the third degenerate point, causing the circuit to fail to start normally.

[0010] 2) After the power supply voltage changes abnormally and returns to stability, the circuit may also be at the third degenerate point.

[0011] 3) When the bandgap reference circuit does not obtain the expected voltage value, the startup circuit has been turned off. Summary of the invention

[0012] In order to solve one or more of the above technical problems, the present invention provides a starting circuit, comprising:

[0013] A first voltage output terminal is electrically connected to a first bias voltage input terminal of a bandgap reference circuit;

[0014] A second voltage output terminal is electrically connected to a second bias voltage input terminal of the bandgap reference circuit;

[0015] a third voltage output terminal electrically connected to an emitter of a reference transistor of the bandgap reference circuit;

[0016] A start-up voltage control terminal electrically connected to an output terminal of a bandgap reference circuit;

[0017] The startup circuit provides an operating current to the bandgap reference circuit through the first voltage output terminal and the second voltage output terminal when there is power input;

[0018] The startup circuit provides an operating current for the reference transistor of the bandgap reference circuit through the third voltage output terminal when there is power input;

[0019] The startup circuit is turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and is turned off when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

[0020] In the above technical solution, when the startup circuit is powered on, the first bias input terminal and the second bias input terminal of the bandgap reference circuit obtain bias voltage, thereby breaking the zero current state of the bandgap reference circuit. The control terminal of the startup circuit is connected to the output terminal of the bandgap reference circuit, so that the startup circuit can be turned off only after the output voltage of the bandgap reference circuit reaches the expected voltage value. When the startup circuit is powered on, the third voltage output terminal directly provides the reference transistor with an operating current, so that the reference transistor leaves the zero current state and enters a normal working state.

[0021] Preferably, it further includes a starting voltage supply module and a bias output module; the starting voltage supply module is electrically connected to the bias output module and the starting voltage control terminal, so that the starting voltage supply module: provides a starting voltage for the bias output module when the voltage at the starting voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and stops providing the starting voltage for the bias output module when the voltage at the starting voltage control terminal reaches the expected output voltage of the bandgap reference circuit; the bias output module is electrically connected to the first voltage output terminal and the second voltage output terminal, so that the bias output module: outputs a voltage between the first voltage output terminal and the second voltage output terminal when there is a starting voltage input; and has no voltage output between the first voltage output terminal and the second voltage output terminal when there is no starting voltage input.

[0022] Preferably, the startup circuit voltage supply module comprises a startup voltage generating unit and a control unit; the control unit is electrically connected to the startup voltage generating unit and the startup voltage control terminal, so that the control unit: keeps the startup voltage generating unit turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and turns off the startup voltage generating unit when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

[0023] Preferably, it also includes a reference transistor voltage output module; the output end of the reference transistor voltage output module is electrically connected to the third voltage output end, so that the reference transistor voltage output module: outputs voltage to the third voltage output end when there is a startup voltage input; and no voltage is output at the third voltage output end when there is no startup voltage input.

[0024] Preferably, it also includes: a starting voltage providing module; the starting voltage providing module is electrically connected to the reference transistor voltage output module and the starting voltage control terminal, so that the starting voltage providing module: provides a starting voltage to the reference transistor voltage output module when the voltage at the starting voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and stops providing a starting voltage to the reference transistor voltage output module when the voltage at the starting voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

[0025] Preferably, the startup circuit voltage supply module comprises a startup voltage generating unit and a control unit; the control unit is electrically connected to the startup voltage generating unit and the startup voltage control terminal, so that the control unit: keeps the startup voltage generating unit turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and turns off the startup voltage generating unit when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

[0026] Preferably, it comprises a starting voltage supply module, a bias output module and a reference transistor voltage output module; the starting voltage supply module is electrically connected to the bias output module, the starting voltage control terminal and the reference transistor voltage output module, so that the starting voltage supply module: provides a starting voltage to the bias output module and the reference transistor voltage output module when the voltage at the starting voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and stops providing a starting voltage to the bias output module and the reference transistor voltage output module when the voltage at the starting voltage control terminal reaches the expected output voltage of the bandgap reference circuit; the bias output module is electrically connected to the first voltage output terminal and the second voltage output terminal, so that the bias output module: outputs a voltage between the first voltage output terminal and the second voltage output terminal when there is a starting voltage input; and has no voltage output between the first voltage output terminal and the second voltage output terminal when there is no starting voltage input; the output terminal of the reference transistor voltage output module is electrically connected to the third voltage output terminal, so that the reference transistor voltage output module: outputs a voltage to the third voltage output terminal when there is a starting voltage input; and has no voltage output at the third voltage output terminal when there is no starting voltage input.

[0027] Preferably, the startup circuit voltage supply module comprises a startup voltage generating unit and a control unit; the control unit is electrically connected to the startup voltage generating unit and the startup voltage control terminal, so that the control unit: keeps the startup voltage generating unit turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and turns off the startup voltage generating unit when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

[0028] The present invention also provides a core circuit, comprising the startup circuit and the bandgap reference circuit as described in any one of the above items.

[0029] The present invention also provides a consumable chip: comprising the above-mentioned core circuit.

[0030] The present invention also provides a consumable: comprising the consumable chip mentioned above.

[0031] The present invention also provides a method for starting a bandgap reference circuit, which is specifically as follows:

[0032] When the output voltage of the bandgap reference circuit does not reach the expected output voltage of the bandgap reference circuit, an operating current is provided to the bandgap reference circuit; when the output voltage of the bandgap reference circuit reaches the expected output voltage of the bandgap reference circuit, no operating current is provided to the bandgap reference circuit.

[0033] In the above technical solution, the startup circuit enables the first bias input terminal and the second bias input terminal of the bandgap reference circuit to obtain bias when powered on, breaking the zero current state of the bandgap reference circuit. The control terminal of the startup circuit is connected to the output terminal of the bandgap reference circuit, so that the startup circuit can only be turned off after the output voltage of the bandgap reference circuit reaches the expected voltage value.

[0034] Preferably, an operating current is provided for the reference transistor of the bandgap reference circuit, so that when the startup circuit is powered on, the third voltage output terminal directly provides an operating current for the reference transistor, so that the reference transistor leaves a zero current state and enters a normal working state.

[0035] Preferably, the output voltage is supplied to the emitter of the reference transistor to provide an operating current for the reference transistor.

[0036] The present invention also provides a core circuit working method, which is applicable to a core circuit including a start-up circuit and a bandgap reference circuit; the start-up circuit uses any of the above methods to start the bandgap reference circuit.

[0037] The present invention also provides a method for starting a bandgap reference circuit: the starting of the bandgap reference circuit includes: providing an operating current for the bandgap reference circuit and providing an operating current for a reference transistor of the bandgap reference circuit. In the above technical solution, when the starting circuit is powered on, the first bias input terminal and the second bias input terminal of the bandgap reference circuit obtain a bias voltage, thereby breaking the zero current state of the bandgap reference circuit. When the starting circuit is powered on, the third voltage output terminal directly provides a voltage to the emitter of the reference transistor, thereby causing the reference transistor to leave the zero current state and enter a normal working state.

[0038] Preferably, when the output voltage of the bandgap reference circuit does not reach the expected output voltage of the bandgap reference circuit, an operating current is provided for the bandgap reference circuit, and when the output voltage of the bandgap reference circuit reaches the expected output voltage of the bandgap reference circuit, no operating current is provided for the bandgap reference circuit. The control end of the startup circuit is connected to the output end of the bandgap reference circuit, so that the startup circuit can be turned off only after the output voltage of the bandgap reference circuit reaches the expected voltage value.

[0039] Preferably, when the output voltage of the bandgap reference circuit does not reach the expected output voltage of the bandgap reference circuit, an operating current is provided for the reference transistor of the bandgap reference circuit; when the output voltage of the bandgap reference circuit reaches the expected output voltage of the bandgap reference circuit, no operating current is provided for the reference transistor of the bandgap reference circuit.

[0040] The present invention also provides a core circuit operating method, which is applicable to a core circuit including a start-up circuit and a bandgap reference circuit as described in any one of the above items. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Attached Figure 1 It is the core circuit of the consumable chip in the prior art.

[0042] Attached Figure 2 The system is the core circuit of the present invention Figure 1 .

[0043] Attached Figure 3 The system is the core circuit of the present invention Figure 2 .

[0044] Attached Figure 4 The system is the core circuit of the present invention Figure 3 .

[0045] Attached Figure 5 The system is the core circuit of the present invention Figure 4 .

[0046] Attached Figure 6 The circuit which is the core circuit of the present invention Figure 5 . DETAILED DESCRIPTION

[0047] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0048] This specific embodiment is only an explanation of the present invention, and it is not a limitation of the invention. After reading this specification, those skilled in the art can make non-creative modifications to this embodiment as needed, but as long as it is within the scope of the claims of the present invention, it will be protected by the patent law.

[0049] Embodiment 1

[0050] A core circuit includes: a bandgap reference circuit and a startup circuit for starting the bandgap reference circuit. Figure 2 As shown, the core circuit includes a startup circuit composed of a startup voltage supply module, a bias output module, a reference transistor voltage output module, and a bandgap reference circuit composed of other devices.

[0051] The startup circuit includes:

[0052] The first voltage output terminal PBias1 is electrically connected to the first bias input terminal (the gate of the field effect transistor MP8 / MP6 / MP4 / MP2 / MP0) of the bandgap reference circuit;

[0053] The second voltage output terminal PBias2 is electrically connected to the second bias input terminal of the bandgap reference circuit (the gate of the field effect transistor MP9 / MP7 / MP5 / MP3 / MP1 or the drain of MP7);

[0054] A third voltage output terminal Vb is electrically connected to the emitter of a reference transistor Q1 of the bandgap reference circuit;

[0055] A start voltage control terminal Ctrl is electrically connected to an output terminal VREF of the bandgap reference circuit;

[0056] Power supply terminal VDD, connected to power supply;

[0057] Ground terminal GND, ground.

[0058] The power supply terminal and ground of the startup voltage providing module are electrically connected to the power supply VDD and ground GND of the startup circuit respectively. The startup voltage providing module also includes an output terminal Vstart for outputting the startup voltage, and a control terminal Vctrl for controlling the output of the startup voltage. The control terminal Vctrl is electrically connected to the startup voltage control terminal Ctrl, and the output terminal Vstart is electrically connected to the bias output module and the reference transistor voltage output module respectively, so that the startup voltage providing module: provides the startup voltage to the bias output module and the reference transistor voltage output module when the voltage of the startup voltage control terminal Ctrl (i.e., the voltage of the output terminal VREF of the bandgap reference circuit) does not reach the expected output voltage of the bandgap reference circuit (for example, the expected output voltage 3.3V), and stops providing the startup voltage to the bias output module and the reference transistor voltage output module when the voltage of the startup voltage control terminal Ctrl reaches the expected output voltage of the bandgap reference circuit. Figure 3 As shown, the startup circuit voltage supply module includes a startup voltage generating unit composed of field effect transistors MSP0 and MSP1 and a control unit composed of field effect transistor MSN0. The drain of field effect transistor MSP1 serves as the output terminal Vstart, and the gate of field effect transistor MSN0 serves as the control terminal Vctrl. Field effect transistor MSN0: when the voltage of the startup voltage control terminal Ctrl does not reach the expected output voltage of the bandgap reference circuit, the startup voltage generating unit is kept turned on and the startup voltage is output; when the voltage of the startup voltage control terminal Ctrl reaches the expected output voltage of the bandgap reference circuit, the startup voltage generating unit is turned off and the startup voltage is not output.

[0059] The power supply end of the bias output module is electrically connected to the output end Vstart of the startup voltage supply module, and the ground of the bias output module is electrically connected to the ground GND of the startup circuit. The bias output module is also electrically connected to the two output ends of the first voltage output end PBias1 and the second voltage output end PBias2, so that the bias output module: when there is a startup voltage input at the power supply end, the voltage is output between the first voltage output end PBias1 and the second voltage output end PBias2; when there is no startup voltage input at the power supply end, there is no voltage output between the first voltage output end PBias1 and the second voltage output end PBias2. Figure 4 As shown, the bias output module is composed of field effect transistors MSN3, MSN2, and MSN4. The gates of the field effect transistors MSN2 and MSN3 are both connected to the output end of the startup voltage output module, the drain of the field effect transistor MSN3 is electrically connected to the first voltage output end PBias1, and the drain of the field effect transistor MSN2 is electrically connected to the second voltage output end PBias2, so that when the startup voltage output module outputs the startup voltage, a voltage is output between the first voltage output end PBias1 and the second voltage output end PBias2 to provide an operating current for the bandgap reference circuit.

[0060] The input end of the reference transistor voltage output module is electrically connected to the output end Vstart of the startup voltage supply module, and the output end of the reference transistor voltage output module is electrically connected to the third voltage output end Vb of the startup circuit. The reference transistor voltage output module: when there is a startup voltage input at the input end, the output voltage is output to the third voltage output end Vb; when there is no startup voltage input, no voltage is output at the third voltage output end Vb. Figure 5 As shown, the reference transistor voltage output module is composed of an inverter INV0 and a field effect transistor MSP4. The input end of the inverter INV0 is electrically connected to the output end Vstart of the start voltage providing module, and the drain of the field effect transistor MSP4 is electrically connected to the third voltage output end Vb as an output end. The start voltage output by the start voltage providing module is output to the third voltage output end Vb electrically connected to the emitter of the reference transistor Q1 of the bandgap reference circuit, thereby directly providing an operating current for the reference transistor Q1.

[0061] The detailed circuit diagram of the core circuit of this embodiment is as follows: Figure 6As shown, the startup circuit includes the above-mentioned field effect transistors MSP0, MSP1, MSN0, MSN2, MSN3, MSN4, MSP4 and INV0, wherein MSP0, MSP1, MSN0 can generate a startup voltage VStart when the startup circuit is powered on (i.e., when the power input terminal VDD has power input), and the startup voltage can enable the bandgap reference circuit to obtain the voltage output by the first voltage output terminal PBias1 and the voltage output by the second voltage output terminal PBias2, thereby obtaining the working current; the startup voltage VStart is connected to the emitter of the reference transistor Q1 of the bandgap reference circuit after passing through the inverter INV0, so that the reference transistor Q1 can get rid of the zero current state; and the control unit MSN0 tube controlled by the output voltage VREF of the bandgap reference circuit can make the startup circuit shut down only when the output voltage of the bandgap reference circuit reaches the expected voltage value.

[0062] The startup circuit of this embodiment uses the following method to start the bandgap reference circuit: provide an operating current for the bandgap reference circuit and provide an operating current for the reference transistor of the bandgap reference circuit. For example, when the output voltage of the bandgap reference circuit does not reach the expected output voltage of the bandgap reference circuit, the operating current is provided for the bandgap reference circuit, and when the output voltage of the bandgap reference circuit reaches the expected output voltage of the bandgap reference circuit, the operating current is not provided for the bandgap reference circuit. Specifically, the operating current is provided for the reference transistor by outputting the voltage to the emitter of the reference transistor. This solves multiple technical problems raised in the background technology.

[0063] The core circuit startup circuit of this embodiment is in working state:

[0064] 1. When the startup circuit is powered on (i.e., when there is power input at the power input terminal VDD), since the gates of the two PMOS tubes MSP0 and MSP1 are grounded GND, the voltage VGS between the gate and source of MSP0 is lower than its turn-on voltage.

[0065] 2. FET MSP0 will be turned on, and MSP1 will also be turned on in the same principle, but VREF is not generated at this time, so FET MSN0 is turned off. Therefore, a start-up voltage VStart will be formed at this time, and it will increase with the increase of VDD voltage.

[0066] 3. The start voltage VStart is connected to the gates of the field effect transistors MSN2 and MSN3. As the start voltage VStart increases, when the gate voltages of the field effect transistors MSN2 and MSN3 are greater than their turn-on voltages, the two NMOS transistors will be turned on, breaking the unknown state of the first voltage output terminal PBias1 and the second voltage output terminal PBias2, so that current flows into the bandgap reference circuit (i.e., generates working current).

[0067] The startup circuit of this embodiment enables current to flow through the reference transistor Q1 of the bandgap reference circuit (i.e., provides operating current for the reference transistor):

[0068] Figure 1 In the bandgap reference circuit shown, after the startup circuit is powered on (i.e., power is input to the power input terminal VDD), a bias voltage is generated between the first voltage output terminal PBias1 and the second voltage output terminal PBias2. The bias voltage should cause the bandgap reference circuit to enter a normal working state, and the two transistors Q0 and Q1 of the bandgap reference circuit should be turned on. However, since resistors R3 and R4 are respectively connected in parallel on both sides of the two transistors, the resistors R3 and R4 become current paths, which may cause the drain voltage of the field effect transistors MP1 and MP3 to fail to turn on the transistors Q0 and Q1 in the core circuit, and the bandgap reference circuit will not work normally.

[0069] like Figure 6 As shown, the bandgap reference circuit in this embodiment is added with a reference transistor voltage output module. The module includes an inverter INV0 controlled by a start voltage VStart and a field effect transistor MSP4 controlled by INV0, the source of MSP4 is connected to the power supply VDD, and the drain is connected to the emitter of the transistor Q1. When the start circuit is powered on (i.e., when there is power input at the power input terminal VDD), the start voltage VStart increases as the voltage of the power supply VDD increases. When the power supply VDD and the start voltage VStart rise to a level that can make the inverter INV0 work, INV0 starts to work and the field effect transistor MSP4 is turned on. The conduction of the PMOS tube can transmit the voltage of the power supply VDD to the emitter end of the transistor Q1, effectively avoiding the situation that the transistor Q1 cannot be turned on due to the current branch formed by the resistors R3 and R4. Thus, through the above method, the situation that the transistor Q1 cannot be turned on is effectively avoided, and the circuit is separated from the third degenerate point and is at the required second degenerate point.

[0070] The startup circuit ensures that the bandgap reference circuit produces the expected voltage:

[0071] Figure 1 The shutdown of the startup circuit shown in the figure is achieved by turning on MSN0. The turning on of MSN0 will reduce the startup voltage VStart to a level that does not enable any MOS tube to be turned on, and the bandgap reference circuit enters a normal working state. However, since MSN0 is controlled by the drain of MSN1, when the field effect tubes MSP2 and MSP3 are turned on, a high voltage will be generated at the drain of the field effect tube MSN1, thereby turning on MSN0. In this case, if the application Figure 1The voltage rise speed of the power supply VDD of the consumable chip of the core circuit shown in the figure is too slow when it is powered on. Due to the conduction of MSN0, the start-up voltage Vstart, which has not risen to a certain voltage value, is pulled down, MSN2 and MNS3 are turned off, and the start-up circuit is turned off. Therefore, Figure 1 Before the power supply VDD rises to a certain voltage value, the startup circuit shown will be in an oscillating state of turning on and off, turning off and restarting, causing the output voltage VREF of the bandgap reference circuit to fail to reach the expected value and to oscillate continuously during this period.

[0072] And as Figure 6 In the core circuit of the present embodiment, the control voltage of the control unit MSN0 for controlling the startup circuit to shut down is not determined by Figure 1 The drain voltage of MSN1 connected to the field effect transistors MSP2 and MSP3 is not controlled, but the output voltage VREF of the bandgap reference circuit is connected to the gate of MSN0. In this way, only when the output terminal VREF of the bandgap reference circuit produces the expected voltage value, the MSN0 tube will be turned on and the startup circuit will be turned off. Because when the output terminal VREF of the bandgap reference circuit produces the expected voltage, the required power supply VDD must have reached the normal working voltage, so there will be no repeated opening and closing of the startup circuit caused by the slow power-on of the power supply VDD. Through the above method, the oscillation phenomenon of the output voltage VREF of the bandgap reference circuit that may be caused by the slow power-on of the power supply is effectively avoided.

[0073] Prevent the bandgap reference circuit from entering the third degenerate point after abnormal changes in the power supply VDD:

[0074] In the process of powering the core circuit, it is difficult to avoid abnormal changes in the power supply VDD. Figure 1 In the core circuit shown, when the power supply VDD undergoes an abnormal change and then stabilizes again, it is possible that the bandgap reference circuit enters an unwanted degenerate point and cannot work properly.

[0075] And as Figure 6 In the core circuit of the present embodiment shown, since MSN0 of the startup circuit is controlled by the voltage of the output terminal VREF of the bandgap reference circuit, when the power supply VDD changes abnormally and stabilizes again, if the voltage of the output terminal VREF of the bandgap reference circuit does not reach the expected value, the startup circuit will restart, thereby preventing the bandgap reference circuit from entering the state of an unwanted degenerate point and allowing the bandgap reference circuit to resume normal operation.

[0076] In summary, the core of the present invention is to provide a startup circuit controlled by VREF, and the advantages of the startup circuit are as follows:

[0077] 1) It can effectively avoid the situation where the transistor cannot be turned on due to the current branch formed by the resistor in parallel with the transistor with the base and collector short-circuited in the bandgap reference circuit;

[0078] 2) Avoid repeated opening and closing of the startup circuit due to slow power-on;

[0079] 3) By specifying the VREF output by the bandgap reference circuit, the startup circuit can be effectively adjusted to work in the required state in real time.

[0080] Embodiment 2

[0081] A consumable chip comprises the core circuit described in the first embodiment.

[0082] Embodiment 3

[0083] A consumable includes the consumable chip described in the second embodiment.

[0084] Although the embodiments of the present invention have been described with reference to the accompanying drawings, a person skilled in the art may make various changes or modifications within the scope of the appended claims.

Claims

1. A starting circuit, characterized in that: include: A first voltage output terminal is electrically connected to a first bias voltage input terminal of a bandgap reference circuit; A second voltage output terminal is electrically connected to a second bias voltage input terminal of the bandgap reference circuit; a third voltage output terminal electrically connected to an emitter of a reference transistor of the bandgap reference circuit; A start-up voltage control terminal electrically connected to an output terminal of a bandgap reference circuit; The startup circuit provides an operating current to the bandgap reference circuit through the first voltage output terminal and the second voltage output terminal when there is power input; The startup circuit provides an operating current for the reference transistor of the bandgap reference circuit through the third voltage output terminal when there is power input; The startup circuit also includes a reference transistor voltage output module; The output end of the reference transistor voltage output module is electrically connected to the third voltage output end, so that the reference transistor voltage output module: when there is a startup voltage input, transmits the voltage of the power supply to the emitter of the reference transistor through the third voltage output end; when there is no startup voltage input, no voltage is output at the third voltage output end; The startup circuit is turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and is turned off when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

2. A starting circuit according to claim 1, characterized in that: It includes a startup voltage supply module and a bias voltage output module; The startup voltage supply module is electrically connected to the bias output module and the startup voltage control terminal, so that the startup voltage supply module: provides the startup voltage to the bias output module when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and stops providing the startup voltage to the bias output module when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit; The bias output module is electrically connected to the first voltage output terminal and the second voltage output terminal, so that the bias output module: outputs a voltage between the first voltage output terminal and the second voltage output terminal when a startup voltage is input; When no startup voltage is input, no voltage is output between the first voltage output terminal and the second voltage output terminal.

3. A starting circuit according to claim 2, characterized in that: The starting circuit voltage providing module comprises a starting voltage generating unit and a control unit; The control unit is electrically connected to the startup voltage generating unit and the startup voltage control terminal, so that the control unit: keeps the startup voltage generating unit turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and turns off the startup voltage generating unit when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

4. A starting circuit according to claim 1, characterized in that: Also includes: Starting voltage supply module; The startup voltage providing module is electrically connected to the reference transistor voltage output module and the startup voltage control terminal, so that the startup voltage providing module provides a startup voltage to the reference transistor voltage output module when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and stops providing a startup voltage to the reference transistor voltage output module when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

5. A starting circuit according to claim 4, characterized in that: The starting circuit voltage providing module comprises a starting voltage generating unit and a control unit; The control unit is electrically connected to the startup voltage generating unit and the startup voltage control terminal, so that the control unit: keeps the startup voltage generating unit turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and turns off the startup voltage generating unit when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

6. A starting circuit according to claim 1, characterized in that: It includes a startup voltage supply module, a bias voltage output module, and a reference transistor voltage output module; The startup voltage providing module is electrically connected to the bias output module, the startup voltage control terminal, and the reference transistor voltage output module, so that the startup voltage providing module: provides the startup voltage to the bias output module and the reference transistor voltage output module when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and stops providing the startup voltage to the bias output module and the reference transistor voltage output module when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit; The bias output module is electrically connected to the first voltage output terminal and the second voltage output terminal, so that the bias output module: outputs a voltage between the first voltage output terminal and the second voltage output terminal when a startup voltage is input; When no startup voltage is input, no voltage is output between the first voltage output terminal and the second voltage output terminal.

7. A starting circuit according to claim 6, characterized in that: The starting circuit voltage providing module comprises a starting voltage generating unit and a control unit; The control unit is electrically connected to the startup voltage generating unit and the startup voltage control terminal, so that the control unit: keeps the startup voltage generating unit turned on when the voltage at the startup voltage control terminal does not reach the expected output voltage of the bandgap reference circuit, and turns off the startup voltage generating unit when the voltage at the startup voltage control terminal reaches the expected output voltage of the bandgap reference circuit.

8. A core circuit, comprising a startup circuit and a bandgap reference circuit, characterized in that: The startup circuit is as described in any one of claims 1-7.

9. A consumable chip, characterized in that: Includes the core circuit described in claim 8.

10. A consumable material, characterized in that: Including the consumable chip as described in claim 9.

11. A method for starting a bandgap reference circuit, applied to the starting circuit according to any one of claims 1 to 7, characterized in that: When the output voltage of the bandgap reference circuit does not reach the expected output voltage of the bandgap reference circuit, a working current is provided to the bandgap reference circuit, and when the output voltage of the bandgap reference circuit reaches the expected output voltage of the bandgap reference circuit, no working current is provided to the bandgap reference circuit; The method of providing the operating current for the bandgap reference circuit includes: outputting a voltage to the emitter of the reference transistor to provide the operating current for the reference transistor.

12. A core circuit operating method, applicable to a core circuit including a startup circuit and a bandgap reference circuit; characterized in that: The startup circuit starts the bandgap reference circuit using the method of claim 11.

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