A photoelectrically isolated universal chip-type CAN bus microsystem packaging structure
By designing a photoelectric isolation universal chip CAN bus microsystem package structure that includes an integrated shell and tube and microprocessing system, the existing technology cannot meet the modularity, high integration, miniaturization and low power of the new generation of electronic devices. The problem of high-reliability requirements has achieved high integration, miniaturization, low power consumption and high reliability microsystem packaging structure.
Patent Information
- Application Number
- CN201910760760.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-08-16
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2039-08-16
AI Technical Summary
The existing system-level packaging structure cannot meet the needs of new generation electronic devices for modularity, high integration, miniaturization, low power consumption and high reliability, especially in airborne, bomb load and industrial control occasions.
A general-purpose chip CAN bus microsystem package structure was designed, including an integrated tube and tube and microprocessing system. The microprocessing system consists of a CAN bus transceiver, an optoelectronic coupling module, a digital signal processor, SRAM and EEPROM, using Multi-layer ceramic wiring and conductive adhesive technology, providing high-density electrical connections and low power consumption.
It realizes high integration, miniaturization, low power consumption and high reliability of micro systems, meets the needs of the next generation of electronic devices, and has a wide range of application prospects in industrial control and detection systems.
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Figure CN110386586B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of microsystems, and relates to a photoelectrically isolated universal chip-type CAN bus microsystem packaging structure. Background Art
[0002] A microsystem is a multifunctional microdevice that integrates five basic elements: microelectronics, optoelectronics, MEMS, architecture, and algorithms, and five functional units: sensing, communication, processing, execution, and micro-energy. A system-level package structure is a module that integrates multiple electronic components with different functions into one package to realize a basic complete function.
[0003] Although there are a large number of system-level packaging structures, they can only achieve a specific function and cannot be widely used in various fields. Systems with control and processing functions are usually made by soldering chips with various functions on a carrier board. They are large in size and high in power consumption, which does not meet the integration requirements of current electronic devices.
[0004] Therefore, there is an urgent need for a modular, highly integrated, miniaturized, low-power, and highly reliable microsystem that can be used in CAN bus processing systems to meet the needs of a new generation of electronic equipment for modularization, high integration, miniaturization, low-power, and high reliability. Summary of the invention
[0005] In view of this, the purpose of the present invention is to provide a photoelectrically isolated universal chip-type CAN bus microsystem packaging structure, which can meet the requirements of the new generation of electronic equipment for modularization, high integration, miniaturization, low power consumption and high reliability, and has broad application prospects in airborne, missile-borne and high-reliability industrial control occasions.
[0006] In order to achieve the above object, the present invention provides the following technical solutions:
[0007] A photoelectrically isolated universal chip-type CAN bus microsystem packaging structure comprises an integrated tube shell (1) and a microprocessor system; the microprocessor system comprises a CAN bus transceiver (2), a photoelectric coupling module (3), a digital signal processor (4), an SRAM (5) and an EEPROM (6);
[0008] The integrated tube shell (1) is used to encapsulate and connect a microprocessor system; the CAN bus transceiver (2) is connected to a digital signal processor (4) via a photoelectric coupling module (3) to provide differential signal transmission and reception capabilities; the photoelectric coupling module (3) is used to isolate signals in the system; the digital signal processor (4) provides control, processing functions and some interfaces for the microprocessor system; the SRAM (5) is connected to the digital signal processor via an interface to provide high-speed data cache; the EEPROM (6) is connected to the digital signal processor via an interface to store setting data.
[0009] Furthermore, the integrated tube shell (1) adopts a cavity-digging method to provide a multi-channel optoelectronic coupling space for the microprocessor system.
[0010] Furthermore, the interconnection method of each module in the microprocessor system adopts a multi-layer ceramic wiring method to provide high-density electrical connection routing for the system.
[0011] Furthermore, the photoelectric coupling module (3) adopts a multi-channel array cavity digging method, and adjacent cavities share a cavity wall, and the typical number of channels is ≥4.
[0012] Furthermore, the microelectronic chips such as the CAN bus transceiver (2), the digital signal processor (4), the SRAM (5) and the EEPROM (6) are connected to the integrated tube shell (1) by using conductive adhesive bonding and bonding technology. A typical method is to use bonding technology to connect them to the surface bonding points of the integrated tube shell (1).
[0013] Furthermore, the integrated tube shell (1) is manufactured by HTCC process and mainly consists of three materials, namely ceramic material, metal material and conductor material; the ceramic material is used for the main structure of the integrated tube shell; the metal material is used for processing the parts of the integrated tube shell, including leads, sealing rings, cover plates and heat sinks; the conductor material is used for internal wiring of the integrated tube shell and filling interconnection holes for electrical interconnection.
[0014] The beneficial effects of the present invention are as follows: the packaging structure of the present invention has the characteristics of strong versatility, high integration, small size, and rich peripheral interfaces and signal processing capabilities. The present invention is conducive to realizing the miniaturization design, low power consumption design, and high reliability design of electronic equipment systems. In addition, the present invention is also an ideal choice for industrial control and detection systems, and can be widely used to replace the CAN bus control system in existing equipment.
[0015] Other advantages, objectives and features of the present invention will be described in the following description to some extent, and to some extent, will be obvious to those skilled in the art based on the following examination and study, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:
[0017] Figure 1 This is a schematic diagram of the microsystem packaging structure of the present invention;
[0018] Figure 2 This is a circuit block diagram of the microprocessing system of the present invention;
[0019] Figure 3 It is a top view of the integrated tube shell;
[0020] Figure 4 for Figure 3 A-A' side view;
[0021] Figure 5 This is a bottom view of the integrated tube shell;
[0022] Figure numerals: 1-integrated tube shell, 2-CAN bus transceiver, 3-photoelectric coupling module, 4-digital signal processor, 5-SRAM, 6-EEPROM, 7-cavity, 8-sealing ring. DETAILED DESCRIPTION
[0023] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner, and the following embodiments and features in the embodiments can be combined with each other without conflict.
[0024] Among them, the drawings are only used for illustrative explanations, and they only represent schematic diagrams rather than actual pictures, and should not be understood as limitations on the present invention. In order to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.
[0025] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right", "front", "rear", etc. indicate the orientation or position relationship, they are based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.
[0026] See also Figure 1 to Figure 5 , this embodiment provides a photoelectric isolation universal chip CAN bus microsystem packaging structure, including an integrated tube shell 1 and a microprocessor system; the microprocessor system includes a CAN bus transceiver 2, a photoelectric coupling module 3, a digital signal processor 4, an SRAM 5 and an EEPROM 6;
[0027] The integrated tube shell 1 is the physical structure carrier and electrical high-density interconnection body of the entire microsystem. It is an integrated CQFP ceramic tube shell. The metal cover is welded and sealed on the ceramic tube shell in parallel, and the pins are led out in the form of CQFP. The cavity is dug inside to provide a multi-channel optoelectronic coupling space for the microprocessing system. The front cavity is used to place the CAN bus transceiver 2, the digital signal processor 4, the SRAM 5 and the EEPROM 6.
[0028] Its structure is as Figures 3 to 5 As shown, the dimensions include but are not limited to those shown in this embodiment. The specific dimensions provided in this embodiment are: the cavity 7 is a square ring with a side length of L=W=23.5±0.24mm and a height of h7=2.6±0.26mm; the sealing ring 8 is a square ring with an inner side length of L3=23.9±0.15mm, an outer side length of L4=25.9±0.15mm, and a height of h5=0.3mm; the ceramic body is a square with a side length of L5=27±0.27mm and a height of h8=2.9±0.3mm; the center spacing of the peripheral pins L10=1.27±0.1mm, the pin width L9=0.4±0.05mm, the projection length ≤7mm, the overall height (including bending) h3=0.6±0.1mm, the pin thickness h4=0.2±0.0.05mm, and the total number of pins is 76. The distance between the bent ends of the pins on opposite sides of the integrated tube shell is L8 = 28.8 ± 0.4 mm.
[0029] The integrated tube shell 1 is made by HTCC process and is mainly composed of three materials, namely ceramic material, metal material and conductor material; the ceramic material is used for the main structure of the integrated tube shell; the metal material is used to process the parts of the integrated tube shell, including the lead, sealing ring, cover plate and heat sink, etc.; the conductor material is used for the internal wiring of the integrated tube shell and filling the interconnection hole for electrical interconnection. The lead resistance is less than or equal to 7 ohms; the insulation resistance between adjacent and non-interconnected leads is ≥1×10 10 Ω, DC 500V. Lead width, lead thickness, and lead support height can be customized according to requirements. Lead frame shape and size can also be customized according to requirements.
[0030] The CAN bus transceiver 2 includes two CAN PHY chips, which are connected to the surface bonding points of the integrated tube shell using bonding technology, providing a 2-channel CAN bus transceiver physical interface for the entire microprocessor system. The EEPROM 6 provides setting data storage for the entire microsystem, and its capacity is not limited to 256K Bytes.
[0031] The photoelectric coupling module includes four photoelectric coupling channels, each of which includes an LED chip and a PDIC chip, providing four-way photoelectric isolation for the entire system. The photoelectric coupling module uses a multi-channel array cavity to bond to the corners of the integrated tube shell, and the adjacent cavities share the cavity wall. In this embodiment, Figures 3-4 As shown, the width of the cavity for placing the entire optocoupler module is W1 = 5.2 ± 0.15 mm, the optical coupling channel is W2 = 4 ± 0.15 mm long, L1 = 1.7 ± 0.15 mm wide, and h2 = 0.9 ± 0.08 mm high. The remaining height of the optical coupling channel is h1 = 0.7 mm, providing installation space for the optical coupling upper cover. The spacing between the optical coupling channels is L6 = 0.5 mm, and the outer wall thickness is L7 = 0.7 mm.
[0032] The digital signal processor 4 provides processing capability for the entire system, including but not limited to the domestically produced 28335DSP bare chip.
[0033] The SRAM 5 provides data cache for the entire system, and its capacity includes but is not limited to 2M Bytes.
[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution, which should be included in the scope of the claims of the present invention.
Claims
1. A photoelectrically isolated universal chip-type CAN bus microsystem packaging structure, characterized in that: The packaging structure comprises an integrated tube shell (1) and a microprocessor system; the microprocessor system comprises a CAN bus transceiver (2), a photoelectric coupling module (3), a digital signal processor (4), an SRAM (5) and an EEPROM (6); The integrated tube shell (1) is manufactured by HTCC process and is used for packaging and connecting the microprocessor system; the integrated tube shell (1) adopts a cavity-digging method to provide a multi-channel optoelectronic coupling space for the microprocessor system; the CAN bus transceiver (2) is connected to the digital signal processor (4) through an optoelectronic coupling module (3) to provide differential signal transmission and reception capabilities; the optoelectronic coupling module (3) is used to isolate signals in the system; the digital signal processor (4) provides control, processing functions and some interfaces for the microprocessor system; the SRAM (5) is connected to the digital signal processor through an interface to provide high-speed data cache; the EEPROM (6) is connected to the digital signal processor through an interface to store setting data; The CAN bus transceiver (2), digital signal processor (4), SRAM (5) and EEPROM (6) are connected to the integrated tube shell (1) by using conductive adhesive bonding and bonding technology; the CAN bus transceiver (2) includes two CAN PHY chips, which are connected to the surface bonding points of the integrated tube shell by using bonding technology, providing a two-channel CAN bus transceiver physical interface for the entire microprocessor system; the photoelectric coupling module (3) includes a plurality of photoelectric coupling channels, each channel includes an LED chip and a PDIC chip, and provides multi-channel photoelectric isolation for the entire system; the digital signal processor (4) is a bare chip; The interconnection method of each module in the microprocessor system is to use a multi-layer ceramic wiring method to provide a high-density electrical connection routing for the system; The photoelectric coupling module (3) adopts a multi-channel array cavity digging method, adjacent cavities share a cavity wall, and the number of channels is ≥4.
2. The photoelectric isolation universal chip CAN bus microsystem packaging structure according to claim 1 is characterized in that: The integrated tube shell (1) is manufactured by HTCC process and is composed of three materials, namely ceramic material, metal material and conductor material; the ceramic material is used for the main structure of the integrated tube shell; the metal material is used for processing the parts of the integrated tube shell, including leads, sealing rings, cover plates and heat sinks; the conductor material is used for internal wiring of the integrated tube shell and filling interconnection holes for electrical interconnection.
Citation Information
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