A micro-sized LED device with an annular Y-shaped electrode and a preparation method thereof

Abstract

The present invention discloses a micro-sized LED device with an annular Y-shaped electrode and a preparation method thereof, wherein the device comprises a substrate and a boss-shaped structure connected to the substrate, wherein the boss-shaped structure comprises a boss lower part and a boss upper part, wherein the boss upper part is located above the boss lower part; the upper surface of the boss upper part is connected to a current expansion layer, and the current expansion layer is connected to a P electrode, wherein the P electrode is an annular Y-shaped electrode, wherein the annular Y-shaped electrode comprises a circular contact ring and two or more Y-shaped forks, wherein the bottom arms of the two or more Y-shaped forks are evenly distributed on the circular contact ring; and a passivation layer is deposited on the area other than the P electrode and the N electrode on the boss-shaped structure. The micro-sized LED device provided by the present invention effectively improves current expansion and distribution while reducing output light shielding, thereby achieving uniform light intensity distribution and uniform heat generation.

Description

Technical Field

[0001] The present invention relates to the technical field of light-emitting devices for visible light communication, and in particular to a micro-sized LED device with a ring-shaped Y-shaped electrode and a preparation method thereof. Background Art

[0002] Compared with traditional light sources, LED devices have advantages such as high luminous efficiency and long life, as well as good modulation performance and high modulation bandwidth. Based on the above advantages of LED devices, signals can be modulated onto the visible light emitted by them for transmission, taking into account illumination while realizing visible light wireless communication. The modulation bandwidth of LED is mainly affected by the recombination lifetime of minority carriers in the active area and the RC time constant, where R and C are the equivalent resistance and equivalent capacitance of the LED device, respectively. Reducing the active area of ​​the LED device, that is, realizing a micron-sized LED, can effectively reduce the equivalent capacitance on the one hand, thereby reducing the RC time constant; on the other hand, it can increase the current per unit area of ​​the LED device, reduce the recombination lifetime of minority carriers in the active area, and ultimately achieve an increase in the modulation bandwidth of the device. Compared with ordinary large-size devices, micron-sized LEDs have small pixel size, high integration, and higher unit current density in the active area. The current crowding effect has a more significant impact on them, and the current expansion on the device surface becomes more important. The choice of electrode shape directly affects the current expansion.

[0003] When the LED is injected with current, the current in the vertical direction is greater than the current in the horizontal direction because of the poor conductivity of P-type GaN. As a result, the current cannot be effectively and evenly distributed in the P-type GaN after injection, resulting in local current accumulation, excessively high turn-on voltage of the LED device, uneven light emission and heating, and increased non-radiative recombination in the active layer, which results in a decrease in internal quantum efficiency. Therefore, improving the uniformity of the lateral expansion of the LED current is crucial to improving the performance of the LED, and the lateral expansion of the current can be effectively achieved by designing a reasonable electrode structure.

[0004] At present, ordinary LEDs usually use the most common opaque circular electrode structure, and the current is mainly concentrated in the area directly below the circular electrode. The distance from the electrode to the active area is limited. When the current has not fully expanded horizontally, it has reached the active area, that is, the area of ​​​​the light-emitting area in the active area is mainly concentrated in the part of the active area below the electrode, resulting in a current crowding effect. Therefore, when designing the electrode, it is necessary to minimize the vertical current under the P electrode, and at the same time, the injected current should maximize the transmission current, that is, the transmission distance should be less than the current transmission length, and the electrode area should not be too large, because an overly large electrode will largely block the output of light. Summary of the invention

[0005] Aiming at GaN-based micro-size LED devices and based on the problems existing in LED electrodes and the principles of electrode design, the purpose of the present invention is to propose a micro-size LED device with an annular Y-shaped electrode that can reduce output light loss and improve current expansion, and at the same time provide a preparation method of the micro-size LED device with an annular Y-shaped electrode.

[0006] To achieve the above object, the present invention adopts at least one of the following technical solutions.

[0007] The present invention provides a micro-sized LED device with an annular Y-shaped electrode, the device comprising a substrate and a boss-type structure connected on the substrate, the boss-type structure comprising a boss lower part and a boss upper part, the boss upper part is located on the boss lower part, and the cross-sectional area of ​​the boss upper part is smaller than the cross-sectional area of ​​the boss lower part; the boss lower part comprises a buffer layer, an undoped N-type GaN layer and a first N-GaN layer arranged in sequence from bottom to top; the boss upper part comprises a second N-GaN layer, a multi-quantum well layer, a P-type AlGaN layer and a P-GaN layer arranged in sequence from bottom to top, the first N -GaN layer and the second N-GaN layer are integrally formed; the upper surface of the lower part of the boss is connected to the N electrode in the area other than the upper part of the boss; the upper surface of the upper part of the boss is connected to the current expansion layer, and the current expansion layer is connected to the P electrode, the P electrode is an annular Y-type electrode, the annular Y-type electrode includes a circular contact ring and more than two Y-type forks, the Y-type fork includes a bottom arm and a first fork and a second fork respectively connected to one end of the bottom arm, and the other end of the bottom arm is connected to the circular contact ring; a passivation layer is deposited on the boss structure except for the P electrode and the N electrode.

[0008] Preferably, the bottom arm, the first fork and the second fork are all straight lines, the first fork and the second fork are symmetrically distributed on both sides of the bottom arm, and the fork angle is 30°~120°.

[0009] Preferably, the bottom arm and the first fork are both straight lines, the second fork includes a straight line and an arc connected to the straight line, the straight lines of the first fork and the second fork are symmetrically distributed on both sides of the bottom arm, and the fork angle is 30°~120°; the arc of the second fork extends along the arc angle to one side of the straight line of the second fork, but the arc does not contact other Y-type forks; the length of the straight line of the first fork is greater than the length of the straight line of the second fork.

[0010] Preferably, the bottom arm is a straight line, the first fork and the second fork both include a straight line and an arc connected to the straight line, the straight lines of the first fork and the second fork are symmetrically distributed on both sides of the bottom arm, and the fork angle is 30°~120°; the arc of the first fork extends along the arc angle to one side of the straight line of the first fork, and the arc of the second fork extends along the arc angle to one side of the straight line of the second fork, but the arc does not contact other Y-type forks; the length of the straight line of the first fork is greater than the length of the straight line of the second fork.

[0011] Preferably, the upper part and the lower part of the boss are cylindrical structures, and the upper part of the boss is located at the center of the lower part of the boss; the area of ​​the current expansion layer is smaller than the bottom area of ​​the upper part of the boss; the bottom diameter of the upper part of the boss is 20um~200um, and the bottom diameter of the lower part of the boss is 30um~50um larger than the bottom diameter of the upper part of the boss; the P electrode is located at the center of the upper surface of the current expansion layer; the N electrode is a circular ring, and a rectangular protrusion is connected to the outer circle of the circular ring, the protrusion is located in the radial direction of the outer circle, and the width and length of the protrusion are 5um~10um; the N electrode is located at the center of the area between the edge of the upper surface of the first N-GaN layer and the edge of the lower surface of the multi-quantum well layer; the upper surface of the current expansion layer below the P electrode is a roughened structure.

[0012] Preferably, the current spreading layer is ITO with a thickness of 100 to 230 nm; the passivation layer is SiO 2 Or a double-layer dielectric layer, the double-layer dielectric layer is composed of two dielectric layers with different refractive indices arranged from bottom to top, and the refractive index of the upper dielectric layer is lower than the refractive index of the lower dielectric layer; the double-layer dielectric layer is HfO 2 / MgO、HfO 2 / SiO 2 or MgO / SiO 2 ; HfO 2 / MgO middle and lower layer is HfO 2 , the upper layer is MgO; HfO 2 / SiO 2 The middle and lower layers are HfO 2 , the upper layer is SiO 2 MgO / SiO 2 The lower middle layer is MgO, and the upper layer is SiO 2 ; The P electrode and N electrode are Cr / Al / Ti / Au metal layers, and the total thickness of the metal layers is 1.15um ~1.35um; the substrate is sapphire material.

[0013] Preferably, the number of the Y-shaped forks in the annular Y-shaped electrode is three, and the Y-shaped forks are evenly connected to the annular contact ring at 120° in pairs, and the three Y-shaped forks are completely consistent in size and shape.

[0014] Preferably, the number of the Y-shaped forks in the annular Y-shaped electrode is four, and the Y-shaped forks are evenly connected to the annular contact ring at 90° in pairs, and the four Y-shaped forks are completely consistent in size and shape.

[0015] Preferably, the number of the Y-shaped forks in the annular Y-shaped electrode is five, and the Y-shaped forks are evenly connected to the annular contact ring at an angle of 72° in pairs, and the five Y-shaped forks are completely consistent in size and shape.

[0016] Preferably, the bottom arm, the first fork and the second fork are all straight lines, the first fork and the second fork are symmetrically distributed on both sides of the bottom arm, the fork angle is 60°, the length ratio of the bottom arm and the first fork is 1:2, and the length of the first fork is equal to the length of the second fork.

[0017] The present invention also provides a method for preparing the micro-sized LED device having a ring-shaped Y-shaped electrode, comprising the following steps:

[0018] (1) Taking a sample, the sample includes a substrate, a buffer layer, an undoped N-type GaN layer and an N-GaN layer, a multi-quantum well layer, a P-type AlGaN layer and a P-GaN layer arranged in sequence from bottom to top, preparing a first photoresist mask layer on the P-GaN layer as a mask layer for etching a boss structure, etching from the P-GaN layer to the N-GaN layer using an ICP dry etching method, exposing a portion of the N-GaN layer, exposing a portion of the N-GaN layer on the side wall to form a second N-GaN layer, exposing a portion of the N-GaN layer on the upper surface to form a first N-GaN layer, thereby forming an upper portion of the boss, and then removing the first photoresist mask layer;

[0019] (2) preparing a current spreading layer on the exposed upper surface of the P-GaN layer and the first N-GaN layer at the upper part of the boss in step (1) by combining an electron beam evaporation coating machine and a rapid annealing furnace, and preparing a second photoresist mask layer on the upper surface of the current spreading layer on the P-GaN layer at the upper part of the boss, the area of ​​the second photoresist mask layer is smaller than the upper surface area of ​​the upper part of the boss, and performing wet etching in an acidic solution at 30°C to 50°C with a pH of 3.9 to 6.1. When the outer ring of the current spreading layer is smaller than the size of the second photoresist mask layer, the current spreading layer side corrosion occurs, and the second photoresist mask layer is removed;

[0020] (3) preparing a third photoresist mask layer on the exposed upper surface of the first N-GaN layer in step (2) and the upper surfaces of the P-GaN layer and the current spreading layer on the upper part of the protrusion, wherein the size of the third photoresist mask layer is larger than the size of the upper surface of the upper part of the protrusion, and etching from the first N-GaN layer to the substrate by an ICP dry etching method to expose the substrate to form the lower part of the protrusion, and then removing the third photoresist mask layer;

[0021] (4) Based on step (3), a passivation layer is deposited by using a dielectric thin film deposition technology, and then a fourth photoresist mask layer is formed on the upper surface of the passivation layer, wherein the fourth photoresist mask layer has openings on the upper surface of the upper part of the boss and the upper surface of the lower part of the boss except for the area connected to the upper part of the boss, and the passivation layer is etched by using an ICP etching method and a wet etching method to expose a part of the current spreading layer on the upper surface of the upper part of the boss and a part of the first N-GaN layer on the lower part of the boss;

[0022] (5) using the fourth photoresist mask layer prepared in step (4) as a mask layer for etching the current spreading layer, roughening the portion of the current spreading layer exposed on the upper surface of the boss by wet etching technology, and then removing the fourth photoresist mask layer;

[0023] (6) Based on step (5), a P electrode is prepared on the upper surface of the current spreading layer roughened in step (5) by using photolithography technology and metal stripping technology, and an N electrode is prepared on the lower surface of the boss in step (4).

[0024] Preferably, the photoresist mask layer 3 is a single-layer photoresist or a double-layer photoresist; the preparation method of the double-layer photoresist is: firstly pre-bake, coat and bake the sample processed in step (2) to form a single-layer photoresist, and coat and bake again to form a second layer of photoresist; in step (5), the photoresist mask layer 4 is hardened for 3 to 6 minutes before wet etching.

[0025] Preferably, the current spreading layer in step (2) is deposited by electron beam evaporation coating machine, and then annealed in a rapid annealing furnace at a temperature of 200 to 250 sccm N 2 and 30~50sccm O 2 In an atmosphere of 500-600° C., annealing is performed for 3-5 minutes at a temperature of 500-600° C.; the roughening of the current spreading layer in step (5) refers to etching the current spreading layer in an ITO etching solution at 30° C.-50° C. for 2-5 minutes, wherein the ITO etching solution is an acidic solution with a pH of 3.9-6.1.

[0026] Preferably, the acidic solution is a HF solution.

[0027] Compared with the prior art, the present invention has the following beneficial effects and advantages:

[0028] (1) The micro-sized LED device with an annular Y-shaped electrode prepared by the present invention has an epitaxial layer of a boss structure, and an annular Y-shaped P electrode is prepared on the current expansion layer on the upper surface of the boss. The annular Y-shaped P electrode effectively improves the current expansion and distribution while reducing the output light shielding through the annular contact ring and the Y-shaped fork, thereby achieving uniform light intensity distribution and uniform heat generation;

[0029] (2) In the micro-sized LED device with an annular Y-shaped electrode prepared by the present invention, the area of ​​the current expansion layer on the upper surface of the boss is smaller than the area of ​​the upper surface of the boss, that is, its edge is far away from the upper boundary of the boss, and it is not easy for material diffusion to cause leakage in the subsequent process. At the same time, the upper surface of the current expansion layer exposed after the passivation layer is prepared is a roughened structure, which is formed by etching in an acidic solution at a certain temperature for 2 to 5 minutes. The temperature of the acidic solution is 30°C to 50°C, so that the upper surface of the current expansion layer below the P electrode is a roughened structure, which increases the lateral output of light to a certain extent and reduces the damage to the light output power;

[0030] (3) The present invention uses a photoresist as a mask layer when preparing the passivation layer (PV) opening. The passivation layer is first etched by an ICP etching method. When the etching is almost finished, that is, only a thin layer of the passivation layer remains, wet etching is used until the passivation layer in the opening area is completely etched. On the one hand, the damage caused by ICP etching can be effectively reduced. On the other hand, the current spreading layer in the opening area can be corroded to a certain extent by the passivation etching solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a cross-sectional schematic diagram of a micro-sized LED device structure having a ring-shaped Y-shaped electrode provided in Example 1;

[0032] Figure 2a~Figure 2f is a schematic diagram of a preparation process of a micro-sized LED device with a ring-shaped Y-shaped electrode provided in Example 1;

[0033] Figure 3 is a top view of the N-type electrode provided in Example 1;

[0034] Figure 4 is a top view of the circular Y-shaped electrode provided in Example 1;

[0035] Figure 5 is a top view of the circular Y-shaped electrode provided in Example 2;

[0036] Figure 6 is a top view of the circular Y-shaped electrode provided in Example 3;

[0037] Figure 1 to Figure 2f In the figure, 1-substrate; 2-buffer layer; 3-undoped N-type GaN layer; 401-first N-GaN layer; 402-second N-GaN layer; 5-multi-quantum well layer; 6-P-type AlGaN layer; 7-P-GaN layer; 8-current spreading layer; 9-passivation layer; 10-N electrode; 11-P electrode; Figure 4 In the figure, 1120 is an annular contact ring; 1121 is a bottom arm; 1122 is a first fork; 1123 is a second fork; Figure 5In the figure, 1130 is an annular contact ring; 1131 is a bottom arm; 1132 is a first fork; 1133 is a second fork; Figure 6 In the figure, 1160 is an annular contact ring; 1161 is a bottom arm; 1162 is a first fork; and 1163 is a second fork. DETAILED DESCRIPTION

[0038] The specific implementation of the present invention is further described below in conjunction with the drawings and examples. The embodiments cannot be described one by one here, but the implementation and protection scope of the present invention are not limited to the following embodiments. If there are processes or parameters that are not specifically described in detail below, they can be implemented by those skilled in the art with reference to the prior art.

[0039] Embodiment 1:

[0040] This embodiment provides a micro-sized LED device with a ring-shaped Y-shaped electrode, such as Figure 1 As shown, the device includes a substrate 1 and a boss-type structure connected to the substrate, the boss-type structure includes a boss lower part and a boss upper part, the boss upper part is located on the boss lower part, and the cross-sectional area of ​​the boss upper part is smaller than the cross-sectional area of ​​the boss lower part; the boss lower part includes a buffer layer 2, an undoped N-type GaN layer 3 and a first N-GaN layer 401 arranged in sequence from bottom to top; the boss upper part includes a second N-GaN layer 402, a multi-quantum well layer 5, a P-type AlGaN layer 6 and a P-GaN layer 7 arranged in sequence from bottom to top, and the first N-GaN layer 401 and the second N-GaN layer 402 are integrally formed; the upper surface of the lower part of the boss is connected to an N electrode 10 in an area other than the boss upper part; the upper surface of the boss upper part is connected to a current expansion layer 8, and the current expansion layer is connected to a P electrode 11, as shown in FIG. Figure 4 As shown, the P electrode 11 is an annular Y-type electrode, which includes an annular contact ring 1120 and three Y-type forks. The Y-type fork includes a bottom arm 1121 and a first fork 1122 and a second fork 1123 respectively connected to one end of the bottom arm, and the other end of the bottom arm is connected to the annular contact ring 1120. The bottom arms of the three Y-type forks are evenly distributed on the annular contact ring; a passivation layer 9 is deposited on the area on the boss except for the P electrode 11 and the N electrode 10.

[0041] The bottom arm 1121 and the first fork 1122 are both straight lines, the second fork 1123 includes a straight line and an arc connected to the straight line, the straight lines of the first fork 1122 and the second fork 1123 are symmetrically distributed on both sides of the bottom arm 1121, and the fork angle is 60°; the arc of the second fork extends along the arc angle to one side of the straight line of the second fork, but the arc does not contact other Y-shaped forks; the length of the straight line of the first fork is greater than the length of the straight line of the second fork.

[0042] The upper and lower parts of the boss are cylindrical structures, and the upper part of the boss is located at the center of the lower part of the boss; the area of ​​the current expansion layer 8 is smaller than the bottom area of ​​the upper part of the boss; the bottom diameter of the upper part of the boss is 160um, and the bottom diameter of the lower part of the boss is 30um larger than the bottom diameter of the upper part of the boss; the P electrode 11 is located at the center of the upper surface of the current expansion layer; the N electrode 10 is a circular ring, and a rectangular protrusion is connected to the outer circle of the circular ring. The protrusion is located in the radial direction of the outer circle, and the width and length of the protrusion are 5um, such as Figure 3 As shown; the N electrode 10 is located at the center of the area between the edge of the upper surface of the first N-GaN layer 401 and the edge of the lower surface of the multi-quantum well layer 5; the upper surface of the current spreading layer 8 below the P electrode 11 is a roughened structure.

[0043] The current spreading layer 8 is ITO with a thickness of 120nm and a diameter of 90um; the passivation layer 9 is SiO 2 , with a thickness of 1um; the P electrode 11 and the N electrode 10 are Cr / Al / Ti / Au metal layers, and the total thickness of the metal layers is 1.15um; the substrate 1 is made of sapphire material.

[0044] The number of the Y-shaped forks in the annular Y-shaped electrode is 3, and the Y-shaped forks are evenly connected to the annular contact ring at 120 degrees, and the sizes and shapes of the three Y-shaped forks are exactly the same, such as Figure 4 shown.

[0045] This embodiment also provides a method for preparing the micro-sized LED device having a ring-shaped Y-shaped electrode, comprising the following steps:

[0046] (1) A sample is obtained, wherein the sample comprises a substrate 1, a buffer layer 2, an undoped N-type GaN layer 3 and an N-GaN layer, a multi-quantum well layer 5, a P-type AlGaN layer 6 and a P-GaN layer 7 which are arranged in sequence from bottom to top. A circular first photoresist mask layer is formed on the P-GaN layer 7 by using a common ultraviolet lithography process as a mask layer for etching a boss-type structure, and the diameter of the first photoresist mask layer is 100 um. An ICP dry etching method is used to etch from the P-GaN layer 7 to the N-GaN layer, and the depth is 1.3 um, thereby exposing a portion of the N-GaN layer, exposing a portion of the N-GaN layer on the side wall to form a second N-GaN layer 402, and exposing a portion of the N-GaN layer on the upper surface to form a first N-GaN layer 401, thereby forming an upper boss, and the diameter of the upper boss is 160 um. Then, the first photoresist mask layer is removed by ultrasonication using acetone isopropyl alcohol, and the cross-section of the processed sample is as shown in FIG. Figure 2a shown.

[0047] (2) After the sample processed in step (1) is treated with 511 solution (commercially available) and ammonia water (commercially available), the exposed upper surfaces of the P-GaN layer 7 and the first N-GaN layer 401 at the upper part of the boss are subjected to rapid annealing for 3 minutes in a nitrogen and oxygen atmosphere at 550°C by using an electron beam evaporation coating machine to prepare a current spreading layer 8 by alloying, and a second photoresist mask layer is prepared on the upper surface of the current spreading layer 8 on the P-GaN layer 7 at the upper part of the boss. The area of ​​the second photoresist mask layer is smaller than the upper surface area of ​​the upper part of the boss. An ITO current spreading layer 8 with a diameter of 90 um is formed at the center of the upper part of the boss by using photolithography technology and wet etching technology. The etching condition is etching in an acidic solution at 40°C for 15 minutes. When the outer circle of the current spreading layer 8 is smaller than the size of the second photoresist mask layer and the current spreading layer side corrosion occurs, the second photoresist mask layer is then ultrasonically removed by using acetone isopropyl alcohol. The cross section processed in step (2) is as follows: Figure 2b As shown;

[0048] (3) A circular third photoresist mask layer with a diameter of 140 μm is formed by using a photolithography process with the exposed upper surface of the first N-GaN layer 401 and the center of the upper surface of the P-GaN layer 7 and the current spreading layer 8 on the upper part of the boss as the center of the circle. The size of the third photoresist mask layer is larger than the size of the upper surface of the upper part of the boss. The ICP dry etching method is used to etch from the first N-GaN layer 401 to the substrate 1 with a depth of 4.3 μm, exposing the substrate 1 to form the lower part of the circular boss. Subsequently, the third photoresist mask layer is ultrasonically removed by using acetone isopropyl alcohol. The cross section of the sample processed in step (3) is as follows: Figure 2c As shown;

[0049] (4) Based on step (3), SiO was deposited at 260°C using dielectric thin film deposition technology. 2 A passivation layer 9 with a thickness of 1 μm is then formed on the upper surface of the passivation layer 9. The fourth photoresist mask layer has a circular opening with a diameter of 40 μm at the center of the upper surface of the upper part of the boss and a circular opening on the upper surface of the lower part of the boss except for the area connected to the upper part of the boss. After etching for 13 minutes using the ICP etching method, HF acid solution (commercially available) is used for etching until the ITO current spreading layer 8 and the first N-GaN layer 401 at the opening on the passivation layer 9 are exposed. The cross section of the sample processed in step (4) is as follows: Figure 2d As shown, a portion of the current spreading layer 8 on the upper surface of the upper part of the boss and a portion of the first N-GaN layer 401 on the lower part of the boss are exposed;

[0050] (5) The fourth photoresist mask layer prepared in step (4) is used as a mask layer for etching the current spreading layer 8, and the fourth photoresist mask layer is hardened by a hot plate at a temperature of 105° C. for 5 minutes; then, the ITO current spreading layer 8 at the top center of the passivation layer opening 9 on the upper surface of the boss is etched in an ITO etching solution at 35° C. for 5 minutes to form a roughened structure of the ITO current spreading layer, wherein the upper surface of the ITO current spreading layer 8 is a roughened structure and the lower surface is a normal structure; then, the fourth photoresist mask layer is ultrasonically removed by acetone isopropanol, and the cross section of the sample after step (5) is as shown in FIG. Figure 2e shown.

[0051] (6) Based on step (5), a negative photoresist is used to form a P electrode 11 and an N electrode 10 pattern on the sample by ordinary ultraviolet lithography technology, and a Cr / Al / Ti / Au electrode is prepared by electron evaporation technology with a total thickness of 1.15 um; then, 60°C acetone and 85°C degumming liquid are used for stripping to form a P electrode 11 and an N electrode 10. The cross-section of the device is as follows: Figure 2f shown.

[0052] Example 2

[0053] This embodiment proposes a micro-sized LED device with a ring-shaped Y-shaped electrode, the structure of which is as shown in Embodiment 1. Figure 1 and Figure 3 As shown, only the structure of the P electrode 11 is different. The P electrode 11, as shown Figure 5 As shown, it includes an annular contact ring 1130 and three Y-type forks; the annular contact ring is located at the center of the ITO current spreading layer 8; the Y-type fork includes a bottom arm 1131 and a first fork 1132 and a second fork 1133 respectively connected to one end of the bottom arm 1131, and the other end of the bottom arm is connected to the annular contact ring 1130, the bottom arms of the three Y-type forks are evenly distributed on the annular contact ring, and the Y-type forks are evenly connected to the annular contact ring at 120° in pairs, and the size and shape of the Y-type forks are completely consistent; the bottom arm 1131, the first fork 1132 and the second fork 1133 are all straight lines, the first fork 1132 and the second fork 1133 are symmetrically distributed on both sides of the bottom arm, the fork angle is 60°, the lengths of the first fork 1132 and the second fork 1133 are equal, and the length of the first fork 1132 is twice the length of the bottom arm 1131.

[0054] Example 3

[0055] This embodiment proposes a micro-sized LED device with a ring-shaped Y-shaped electrode, whose structure and size are similar to those of the embodiment 1. Figure 1 and Figure 3As shown, only the structure of the P electrode 11 is different. The P electrode 11 is an annular Y-type electrode, including an annular contact ring 1160 and three Y-type forks; the annular contact ring 1160 is located at the center of the current spreading layer 8, the Y-type fork includes a bottom arm 1161 and a first fork 1162 and a second fork 1163 respectively connected to one end of the bottom arm, the other end of the bottom arm is connected to the annular contact ring 1160, the bottom arms 1161 of the three Y-type forks are evenly distributed on the annular contact ring 1160, and the Y-type forks are evenly connected to the annular contact ring at 120 degrees in pairs, and the size and shape of the Y-type forks are completely consistent;

[0056] like Figure 6 As shown, the bottom arm 1161 is a straight line, the first fork 1162 and the second fork 1163 both include a straight line and an arc connected to the straight line, the straight lines of the first fork 1162 and the second fork 1163 are symmetrically distributed on both sides of the bottom arm, and the fork angle is 60°; the arc of the first fork 1161 extends along the arc angle to one side of the straight line of the first fork 1161, and the arc of the second fork 1162 extends along the arc angle to one side of the straight line of the second fork 1163, but the arc does not contact other Y-type forks; the length of the straight line of the first fork 1161 is greater than the length of the straight line of the second fork 1162.

[0057] The above is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any equivalent changes, modifications or evolutions made by those skilled in the art to the above embodiment using the technical solution of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A micro-sized LED device having a ring-shaped Y-shaped electrode, characterized in that: The device comprises a substrate and a boss-type structure connected on the substrate, wherein the boss-type structure comprises a boss lower part and a boss upper part, wherein the boss upper part is located above the boss lower part, and the cross-sectional area of ​​the boss upper part is smaller than the cross-sectional area of ​​the boss lower part; the boss lower part comprises a buffer layer, an undoped N-type GaN layer and a first N-GaN layer arranged in sequence from bottom to top; the boss upper part comprises a second N-GaN layer, a multi-quantum well layer, a P-type AlGaN layer and a P-GaN layer arranged in sequence from bottom to top, and the first N-GaN layer and the second N-GaN layer are integrally formed; the upper surface of the boss lower part is connected to the boss The area other than the upper part is connected to the N electrode; the upper surface of the upper part of the boss is connected to the current expansion layer, and the current expansion layer is connected to the P electrode, the P electrode is an annular Y-type electrode, the annular Y-type electrode includes a circular contact ring and more than two Y-type forks, the Y-type fork includes a bottom arm and a first fork and a second fork respectively connected to one end of the bottom arm, and the other end of the bottom arm is connected to the circular contact ring; a passivation layer is deposited on the area other than the P electrode and the N electrode on the boss structure; the upper part of the boss is located at the center of the lower part of the boss; the area of ​​the current expansion layer is smaller than the bottom area of ​​the upper part of the boss; The bottom arm and the first fork are both straight lines, the second fork includes a straight line and an arc connected to the straight line, the straight lines of the first fork and the second fork are symmetrically distributed on both sides of the bottom arm, and the fork angle is 30° to 120°; the arc of the second fork extends along the arc angle to one side of the straight line of the second fork, but the arc does not touch other Y-shaped forks; the length of the straight line of the first fork is greater than the length of the straight line of the second fork; Or the bottom arm is a straight line, the first fork and the second fork both include a straight line and an arc connected to the straight line, the straight lines of the first fork and the second fork are symmetrically distributed on both sides of the bottom arm, and the fork angle is 30°~120°; the arc of the first fork extends along the arc angle to one side of the straight line of the first fork, and the arc of the second fork extends along the arc angle to one side of the straight line of the second fork, but the arc does not contact other Y-type forks; the length of the straight line of the first fork is greater than the length of the straight line of the second fork.

2. The micro-sized LED device with an annular Y-shaped electrode according to claim 1, characterized in that: The upper part and the lower part of the boss are cylindrical structures; the bottom diameter of the upper part of the boss is 20um~200um, and the bottom diameter of the lower part of the boss is 30um~50um larger than the bottom diameter of the upper part of the boss; the P electrode is located at the center of the upper surface of the current expansion layer; the N electrode is a circular ring, and a rectangular protrusion is connected to the outer circle of the circular ring, the protrusion is located in the radial direction of the outer circle, and the width and length of the protrusion are 5um~10um; the N electrode is located at the center of the area between the edge of the upper surface of the first N-GaN layer and the edge of the lower surface of the multi-quantum well layer; the upper surface of the current expansion layer below the P electrode is a roughened structure.

3. The micro-sized LED device with an annular Y-shaped electrode according to claim 1, characterized in that: The current spreading layer is ITO with a thickness of 100 to 230 nm; the passivation layer is SiO2 or a double-layer dielectric layer, the double-layer dielectric layer is composed of two dielectric layers with different refractive indices arranged from bottom to top, and the refractive index of the upper dielectric layer is lower than that of the lower dielectric layer; the double-layer dielectric layer is HfO2 / MgO, HfO2 / SiO2 or MgO / SiO2; the lower layer in HfO2 / MgO is HfO2, and the upper layer is MgO; the lower layer in HfO2 / SiO2 is HfO2, and the upper layer is SiO2; the lower layer in MgO / SiO2 is MgO, and the upper layer is SiO2; the P electrode and the N electrode are Cr / Al / Ti / Au metal layers, and the total thickness of the metal layer is 1.15um to 1.35um; The substrate is made of sapphire material.

4. The micro-sized LED device with a ring-shaped Y-shaped electrode according to claim 1, characterized in that: The number of the Y-shaped forks in the annular Y-shaped electrode is 3, 4 or 5, and the corresponding Y-shaped forks are evenly connected to the annular contact ring at 120°, 90° or 72°, and the Y-shaped forks are completely consistent in size and shape.

5. A method for preparing a micro-sized LED device having a ring-shaped Y-shaped electrode according to any one of claims 1 to 4, characterized in that: The following steps are involved: (1) Taking a sample, the sample includes a substrate, a buffer layer, an undoped N-type GaN layer and an N-GaN layer, a multi-quantum well layer, a P-type AlGaN layer and a P-GaN layer arranged in sequence from bottom to top, preparing a first photoresist mask layer on the P-GaN layer as a mask layer for etching a boss structure, etching from the P-GaN layer to the N-GaN layer using an ICP dry etching method, exposing a portion of the N-GaN layer, exposing a portion of the N-GaN layer on the side wall to form a second N-GaN layer, exposing a portion of the N-GaN layer on the upper surface to form a first N-GaN layer, thereby forming an upper portion of the boss, and then removing the first photoresist mask layer; (2) In step (1), a current spreading layer is prepared on the exposed upper surface of the P-GaN layer at the upper part of the boss and the first N-GaN layer at the lower part of the boss by combining an electron beam evaporation coating machine and a rapid annealing furnace, and a second photoresist mask layer is prepared on the upper surface of the current spreading layer on the P-GaN layer at the upper part of the boss, the area of ​​the second photoresist mask layer is smaller than the upper surface area of ​​the upper part of the boss, and wet etching is performed in an acidic solution at 30°C to 50°C, and the pH value is 3.9 to 6.

1. When the outer circle of the current spreading layer is smaller than the size of the second photoresist mask layer, the current spreading layer side corrosion occurs, and the second photoresist mask layer is removed; the current spreading layer is evaporated by an electron beam evaporation coating machine, and then annealed in a rapid annealing furnace under the conditions of 200 to 250 sccm N2 and 30 to 50 sccm O2 atmosphere, and annealed at a temperature of 500 to 600°C for 3 to 5 minutes; the roughening of the current spreading layer in step (5) refers to etching the current spreading layer in an ITO etching solution at 30°C to 50°C for 2 to 5 minutes, ITO etching solution is an acidic solution with a pH of 3.9 to 6.1; (3) preparing a third photoresist mask layer on the exposed portion of the upper surface of the first N-GaN layer in step (2) and the upper surfaces of the P-GaN layer and the current spreading layer on the upper portion of the protrusion, wherein the size of the third photoresist mask layer is larger than the size of the upper surface of the upper portion of the protrusion, and etching from the first N-GaN layer to the substrate using an ICP dry etching method, exposing a portion of the substrate to form the lower portion of the protrusion, and then removing the third photoresist mask layer; (4) Based on step (3), a passivation layer is deposited by using a dielectric thin film deposition technology, and then a fourth photoresist mask layer is formed on the upper surface of the passivation layer, wherein the fourth photoresist mask layer has openings on the upper surface of the upper part of the boss and the upper surface of the lower part of the boss except for the area connected to the upper part of the boss, and the passivation layer is etched by using an ICP etching method and a wet etching method to expose a part of the current spreading layer on the upper surface of the upper part of the boss and a part of the first N-GaN layer on the lower part of the boss; (5) using the fourth photoresist mask layer prepared in step (4) as a mask layer for etching the current spreading layer, roughening the portion of the current spreading layer exposed on the upper surface of the boss by wet etching technology, and then removing the fourth photoresist mask layer; (6) Based on step (5), a P electrode is prepared on the upper surface of the current spreading layer roughened in step (5) by using photolithography technology and metal stripping technology, and an N electrode is prepared on the lower surface of the boss in step (4).

6. The method for preparing a micro-sized LED device having a ring-shaped Y-shaped electrode according to claim 5, characterized in that: The photoresist mask layer is a single-layer photoresist or a double-layer photoresist. The preparation method of the double-layer photoresist is as follows: pre-bake, coat and bake the sample processed in step (2) to form a single-layer photoresist, coat and bake again to form a second layer of photoresist; and harden the photoresist mask layer for 3 to 6 minutes before wet etching in step (5).

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