Method for processing wide bandgap semiconductor wafer and wide bandgap semiconductor wafer

Abstract

A method (100) for processing a wide bandgap semiconductor wafer is provided. The method (100) comprises depositing (110) a non-single-crystal support layer (320) at the back side of the wide bandgap semiconductor wafer. The method (100) further comprises depositing (120) an epitaxial layer at the front side of the wide bandgap semiconductor wafer. The wide bandgap semiconductor wafer is split (130) along a splitting region to obtain a device wafer comprising at least a portion of the epitaxial layer, and a remaining wafer comprising the non-single-crystal support layer (320).

Description

Technical Field

[0001] Examples relate to methods for processing wide bandgap semiconductor wafers, methods for forming a plurality of thin wide bandgap semiconductor wafers, and wide bandgap semiconductor wafers. Background Art

[0002] Thin semiconductor wafers (e.g., having a thickness of less than 250 μm) may exhibit wafer bowing or warping. Therefore, it may not be possible to fully automatically process thin semiconductor wafers, as the process equipment may not be able to handle such thin semiconductor wafers. Semiconductor wafers may be thinned by wafer splitting, for example, to enable reuse. Summary of the invention

[0003] One example relates to a method for processing a wide bandgap semiconductor wafer. A non-single-crystal support layer is deposited at the back side of the wide bandgap semiconductor wafer. In addition, an epitaxial layer is deposited at the front side of the wide bandgap semiconductor wafer. The method includes: splitting the wide bandgap semiconductor wafer along a splitting region to obtain a device wafer including at least a portion of the epitaxial layer, and obtaining a remaining wafer including the non-single-crystal support layer.

[0004] One example relates to a method for forming a plurality of thin wide bandgap semiconductor wafers. The method includes: depositing a first non-single crystalline support layer on a wide bandgap semiconductor ingot. Separating the wide bandgap semiconductor ingot along a first separation region to obtain a first thin wide bandgap semiconductor wafer including a non-single crystalline support layer and a thin wide bandgap semiconductor layer, and obtaining a first remaining wide bandgap semiconductor ingot. For example, the thickness of the wide bandgap semiconductor ingot is at least 2 times the thickness of the thin wide bandgap semiconductor layer. Depositing an additional non-single crystalline support layer on the first remaining wide bandgap semiconductor ingot. Separating the first remaining wide bandgap semiconductor ingot along an additional separation region to obtain an additional thin wide bandgap semiconductor wafer, and obtaining a remaining wide bandgap semiconductor ingot.

[0005] One example relates to a wide bandgap semiconductor wafer. The wide bandgap semiconductor wafer includes a single crystal wide bandgap semiconductor layer. The single crystal wide bandgap semiconductor layer has a thickness of at least 250 μm. The wide bandgap semiconductor wafer further includes a non-single crystal support layer at a surface of the single crystal semiconductor substrate. The non-single crystal support layer has a thickness of at least 150 μm. The thermal expansion coefficient of the non-single crystal support layer differs from the thermal expansion coefficient of the single crystal wide bandgap semiconductor layer by at most 5% of the thermal expansion coefficient of the single crystal wide bandgap semiconductor layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Some examples of apparatus and / or methods will be described hereinafter by way of example only and with reference to the accompanying drawings, in which:

[0007] Figure 1A flow chart showing a method for processing a wide bandgap semiconductor wafer;

[0008] Figure 2 A flow chart showing a method for forming a plurality of thin wide bandgap semiconductor wafers;

[0009] Figure 3 shows a schematic cross section of a wide bandgap semiconductor wafer with a non-single crystalline support layer; and

[0010] Figures 4a to 4i An example of a method for processing a wide bandgap semiconductor wafer is shown. DETAILED DESCRIPTION

[0011] Various examples will now be described more fully with reference to the accompanying drawings, in which some examples are illustrated.In the drawings, the thickness of lines, layers and / or regions may be exaggerated for clarity.

[0012] Therefore, although other examples can have various modifications and alternative forms, some specific examples thereof are shown in the figures and will be described in detail later. However, this detailed description does not limit other examples to the specific forms described. Other examples can cover all modifications, equivalents and alternatives that fall within the scope of the present disclosure. Throughout the description of the accompanying drawings, the same or similar numbers refer to similar or similar elements, which can be implemented in the same manner or in a modified form when compared to each other, while providing the same or similar functions.

[0013] It will be understood that when an element is referred to as being "connected" or "coupled" to another element, the element may be directly connected or coupled, or connected or coupled via one or more intervening elements. If two elements A and B are combined using "or", this is to be understood as disclosing all possible combinations, i.e., only A, only B, and A and B, if not otherwise explicitly or implicitly defined. Alternative wording for the same combination is "at least one of A and B" or "A and / or B". This also applies, mutatis mutandis, to combinations of more than two elements.

[0014] The terms used in this article for the purpose of describing a specific example are not intended to be restrictive for other examples. Whenever a singular form such as "one", "an" and "the" is used, and neither explicitly nor implicitly, the use of only a single element is defined as mandatory, then other examples can also use plural elements to implement the same function. Similarly, when functionality is subsequently described as being implemented using multiple elements, other examples can be implemented using a single element or processing entity. It will be further understood that the terms "include", "include", "include" and / or "include" specify the existence of stated features, wholes, steps, operations, processes, actions, elements and / or parts when used, but do not exclude the existence or addition of one or more other features, wholes, steps, operations, processes, actions, elements, parts and / or any grouping thereof.

[0015] Unless otherwise defined, all terms (including technical and scientific terms) are used herein with their ordinary meanings in the art to which the examples belong.

[0016] In the following, a "semiconductor ingot" may be a semiconductor ingot and / or a thick semiconductor wafer. For example, a semiconductor ingot may have the shape of an elongated rod or a elongated strip. A thick semiconductor wafer may have the shape of a disk or a cylinder. The thickness of the thick semiconductor wafer may be at least 2 mm. In addition, a "semiconductor wafer" may be a disk of semiconductor material. The thickness of the disk may be at least one order of magnitude smaller, for example at least two orders of magnitude smaller, than the extension of the disk perpendicular to the thickness. In the case of a thick semiconductor wafer, the thickness may be approximately one order of magnitude smaller than the extension of the thick semiconductor wafer perpendicular to the thickness.

[0017] Figure 1 A flow chart of an embodiment of a method 100 for processing a wide bandgap semiconductor wafer is shown. The method 100 may include depositing 110 a non-single crystalline support layer on a wide bandgap semiconductor wafer. For example, the non-single crystalline support layer is deposited 110 at a back side of the wide bandgap semiconductor wafer. The non-single crystalline support layer may be a crystalline layer, such as a polycrystalline layer or an amorphous layer. The non-single crystalline support layer may include a semiconductor material, such as a wide bandgap semiconductor. For example, the non-single crystalline support layer may be deposited directly on the back side surface of the wide bandgap semiconductor wafer. Alternatively, an intermediate layer may be formed between the non-single crystalline support layer and the back side surface of the wide bandgap semiconductor wafer.

[0018] For example, the method 100 may include depositing 120 an epitaxial layer at a front side of the wide bandgap semiconductor wafer opposite to a back side of the wide bandgap semiconductor wafer. For example, the epitaxial layer may be epitaxially grown directly on the front side surface of the wide bandgap semiconductor wafer. For example, only the wide bandgap semiconductor wafer may be located between the non-single crystalline support layer and the epitaxial layer. For example, the epitaxial layer may be grown on the same wide bandgap semiconductor material as the non-single crystalline support layer. For example, the epitaxial layer may be grown directly on a single crystalline portion of the wide bandgap semiconductor wafer.

[0019] The method 100 may further include splitting 130 the wide bandgap semiconductor wafer along the splitting region. Splitting 130 may be performed to obtain a device wafer including at least a portion of the epitaxial layer. For example, the splitting region may be located within the epitaxial layer so that only a portion of the epitaxial layer remains for the device wafer. Alternatively, the splitting region may be located within the wide bandgap semiconductor wafer so that the device wafer may include a complete epitaxial layer.

[0020] For example, the split region may be located within a single crystalline portion (e.g., a single crystalline layer) of the wide bandgap semiconductor wafer. The device wafer may include a single crystalline wide bandgap semiconductor material (e.g., the device wafer may be a single crystalline semiconductor wafer). For example, the device wafer may be a single crystalline wide bandgap semiconductor wafer, and for example, after splitting 130 the device wafer, the device wafer may include less than 10% (or less than 5%, less than 3%, less than 1%, or less than 0.5%) of non-single crystalline semiconductor material. For example, the device wafer may include a (e.g., single crystalline) epitaxial layer and a (e.g., single crystalline) portion of the split wide bandgap semiconductor wafer.

[0021] In addition, a remaining wafer may be obtained by splitting 130 the wide bandgap semiconductor wafer. The remaining wafer may include a non-single crystalline support layer. In addition, the remaining layer may include a remaining portion of the wide bandgap semiconductor wafer, for example, a single crystalline layer of the wide bandgap semiconductor wafer. For example, splitting 130 may be performed after depositing 110 the non-single crystalline support layer.

[0022] For example, the device wafer may have a thickness greater than 2 times (or greater than 3 times, greater than 5 times, or greater than 10 times) that of the remaining wafer. For example, the thickness of the remaining wide bandgap semiconductor wafer of the remaining wafer may be at least 2 times that of the split device wafer.

[0023] For example, providing a non-single crystalline support layer can enable further splitting of the remaining wafer or the single crystalline wide bandgap semiconductor wafer substrate of the remaining wafer. The non-single crystalline support layer can provide mechanical support for the wide bandgap semiconductor wafer, and / or can increase the overall thickness of the wide bandgap semiconductor wafer to enable processing of the wide bandgap semiconductor wafer. The non-single crystalline support layer can enable further use of the wide bandgap semiconductor wafer substrate, for example, the complete wide bandgap semiconductor wafer substrate can be used. For example, in an additional splitting process, additional device wafers can be formed. Using the complete wide bandgap semiconductor wafer substrate can reduce costs, because the cost for a new device wafer (e.g., a thin wide bandgap semiconductor wafer) may be higher than the cost for forming a non-single crystalline support layer. For example, the non-single crystalline support layer can be easier and / or faster and / or cheaper to form than a single crystalline wide bandgap semiconductor wafer.

[0024] For example, splitting a wide bandgap semiconductor wafer may be more complicated than thinning the wafer by grinding. However, splitting may enable further use of the remaining portion of the wide bandgap semiconductor wafer, for example. Grinding may be used to thin other materials, such as non-single-crystal wafers or non-single-crystal layers (e.g., amorphous layers), for example, for economic reasons.

[0025] For example, the coefficient of thermal expansion of the non-single crystalline support layer may differ from the coefficient of thermal expansion of the wide bandgap semiconductor wafer by up to 10% (or up to 5%, up to 3%, up to 1%, or up to 0.1%) of the coefficient of thermal expansion of the wide bandgap semiconductor wafer. By providing the non-single crystalline support layer with a coefficient of thermal expansion that is similar or equal to that of the wide bandgap semiconductor wafer, deformation of the wide bandgap semiconductor wafer supported by the non-single crystalline support layer may be avoided. For example, similar coefficients of thermal expansion may enable processing of the wide bandgap semiconductor wafer supported by the non-single crystalline support layer at different temperatures.

[0026] For example, the non-single crystalline support layer may be deposited with a deposition rate of at least 40 μm / hour (or at least 50 μm / hour, at least 60 μm / hour, at least 80 μm / hour, or at least 100 μm / hour). For example, chemical vapor deposition (CVD), laser CVD, and / or Close Space Epitaxy may be used to deposit the non-single crystalline support layer. For example, a high deposition rate may be available because only mechanical stability of the non-single crystalline support layer may be required, and there may be no electrical requirements for the non-single crystalline support layer. A high deposition rate may enable fast processing and may therefore reduce manufacturing costs.

[0027] For example, during deposition of a non-single crystalline support layer, a protective layer may be located at the front side of the wide bandgap semiconductor wafer. Prior to deposition of the non-single crystalline support layer, a protective layer (e.g., a carbon cap) may be formed at or deposited on the front side. The protective layer may be removed after deposition of the non-single crystalline support layer, for example to enable deposition of an epitaxial layer at the front side. For example, the protective layer may prevent layer growth at the front side of the wide bandgap semiconductor wafer while depositing the non-single crystalline support layer.

[0028] For example, if the wide bandgap semiconductor wafer is a silicon carbide wafer, the non-single crystalline support layer may be one of a polycrystalline silicon carbide layer and a molybdenum layer. For example, the non-single crystalline support layer may include at least two sublayers of different materials. For example, the non-single crystalline support layer may include a first sublayer of polycrystalline silicon carbide and a second sublayer of molybdenum and / or carbon (e.g., graphite).

[0029] For example, the total thickness of the remaining wafer including the non-single-crystalline support layer (and, for example, the remaining part of the wide bandgap semiconductor wafer) may be at least 200 μm (or at least 300 μm, at least 400 μm or at least 500 μm) and / or at most 1500 μm (or at most 1300 μm, at most 1000 μm or at most 700 μm). For example, the non-single-crystalline support layer may be deposited with a predefined thickness such that a sufficient total thickness of the remaining wafer may be achieved after splitting the wide bandgap semiconductor wafer. For example, the total thickness of the remaining wafer may be adapted by depositing the non-single-crystalline support layer to enable further processing of the remaining wafer using standard semiconductor equipment.

[0030] For example, the method may include depositing an additional non-single-crystalline support layer on (e.g., directly on) the non-single-crystalline support layer of the remaining wafer. For example, after depositing the non-single-crystalline support layer, the wide bandgap semiconductor wafer (or the corresponding remaining wafer) may be split several times to obtain several device wafers. For example, if, for example, after splitting the additional device wafer, the thickness of the corresponding remaining wafer will be lower than the minimum total thickness of the wide bandgap semiconductor wafer required for processing the wafer, the additional non-single-crystalline support layer may be deposited. Depositing the additional non-single-crystalline support layer may enable, for example, further processing of the corresponding remaining wafer after splitting the additional device wafer.

[0031] For example, the material of the additional non-single-crystal support layer may be different from the material of the non-single-crystal support layer. For example, using different materials may facilitate the deposition of the corresponding non-single-crystal support layer and / or may reduce the cost of depositing the non-single-crystal support layer.

[0032] For example, the thickness of the remaining wafer including the non-single crystalline support layer and the additional non-single crystalline support layer may differ from the thickness of the remaining wide bandgap semiconductor wafer before splitting the wide bandgap semiconductor wafer (e.g., before or after depositing the epitaxial layer) by at most 400 μm (or at most 300 μm, or at most 200 μm). For example, the thickness of the additional non-single crystalline support layer may be similar to the thickness of the device wafer, so that the total thickness of the wide bandgap semiconductor wafer or the corresponding remaining wafer may remain approximately constant while splitting the device wafer from the wide bandgap semiconductor wafer or the corresponding remaining wafer. For example, the thickness of the additional non-single crystalline support layer may depend on the thickness of the device wafer and / or the thickness of the epitaxial layer, so that the total thickness of the wide bandgap semiconductor wafer may remain constant while splitting the device wafer from the wide bandgap semiconductor wafer. For example, after depositing the non-single crystalline support layer, two or more device wafers may be split from the wide bandgap semiconductor wafer, and the additional non-single crystalline support layer may have a thickness that depends on the total thickness of the two or more device wafers.

[0033] For example, the method may include depositing an additional epitaxial layer at the front side of the remaining wafer. The method may further include splitting the remaining wafer along the additional splitting region to obtain an additional device wafer including an additional epitaxial layer, and obtaining an additional remaining wafer including a non-single crystalline support layer. The method may include, for example, depositing an additional non-single crystalline support layer on the non-single crystalline support layer of the additional remaining wafer after further splitting the remaining wafer. The thickness of the additional non-single crystalline support layer may have a thickness of at least 70% (or at least 80% or at least 90%) and / or at most 130% (or at most 120% or at most 110%) of the total thickness of the additional device wafer. For example, the thickness of the device wafer may be at most 300 μm (or at most 200 μm, at most 110 μm, at most 50 μm or at most 20 μm). For example, the additional non-single crystalline support layer may be deposited before splitting the remaining wafer to obtain the additional device wafer.

[0034] According to an example, the method may further include forming a doped region of a wide bandgap semiconductor device in a wide bandgap semiconductor wafer (e.g., in an epitaxial layer). The doped region may be formed after depositing a non-single crystalline support layer. The doped region may be an anode region or a cathode region of a diode, or a source region, a body region, a drain region, an emitter region, a base region, or a collector region of a transistor (e.g., a MOSFET or an IGBT). The doped region may be an n-doped or p-doped region. For example, the doped region may be formed before splitting the wide bandgap semiconductor wafer. For example, multiple doped regions of corresponding multiple wide bandgap semiconductor devices to be formed on the wide bandgap semiconductor wafer may be formed simultaneously.

[0035] For example, the method may further include forming a metallization structure of a wide bandgap semiconductor device at the front side of the wide bandgap semiconductor wafer, for example after depositing the non-single crystalline support layer. For example, a corresponding metallization structure for a plurality of wide bandgap semiconductor devices may be formed. For example, the metallization structure may be formed before splitting the wide bandgap semiconductor wafer.

[0036] For example, semiconductor processes may be performed before singulation at temperatures above 1000° C. For example, after singulation, the device wafer is treated at a temperature of up to 1000° C., thereby avoiding alteration of structures formed at the front side before singulation.

[0037] For example, one or more wide bandgap semiconductor devices may be formed on a wide bandgap semiconductor wafer. For example, each wide bandgap semiconductor device includes a transistor. At least one of a gate trench and a gate electrode of the transistor may be formed before splitting.

[0038] The transistor may be a field effect transistor (e.g., a metal oxide semiconductor field effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT)). The gate of the transistor may be located in a gate trench extending into the wide bandgap semiconductor substrate, or may be located on a side surface of the wide bandgap semiconductor substrate. The transistor may include one or more transistor cells. For example, the wide bandgap semiconductor substrate may include one or more source regions, one or more body regions, and a drift region of the transistor. The one or more source regions and the drift region may each have a first conductivity type (e.g., n-doped). The one or more body regions may have a second conductivity type (e.g., p-doped).

[0039] The transistor may be a vertical transistor structure that conducts current between the front side surface of the wide bandgap semiconductor substrate and the back side surface of the wide bandgap semiconductor substrate. For example, a transistor of a wide bandgap semiconductor device may include: a plurality of source doped regions connected to a source wiring structure, a plurality of gate electrodes or a grid of gate electrodes connected to a gate wiring structure and a back side drain metallization or a back side collector metallization.

[0040] For example, the wide bandgap semiconductor wafer may be any of the following: a wide bandgap semiconductor base substrate, a wide bandgap semiconductor base substrate having a wide bandgap semiconductor epitaxial layer grown on the wide bandgap semiconductor base substrate, or a wide bandgap semiconductor epitaxial layer. The wide bandgap semiconductor wafer may be a single crystal wafer, or may include at least a single crystal wide bandgap semiconductor layer.

[0041] For example, the wide bandgap semiconductor wafer may have a bandgap greater than the bandgap of silicon (1.1 eV). In particular, the wide bandgap semiconductor wafer has a bandgap greater than 2 eV (e.g., greater than 3 eV). For example, the wide bandgap semiconductor wafer may be a silicon carbide semiconductor (SiC) wafer, or a gallium arsenide (GaAs) semiconductor wafer, or a gallium nitride (GaN) semiconductor wafer.

[0042] The front side of a wide bandgap semiconductor wafer may be the side used to implement more delicate and complex structures (e.g., gates of transistors) than at the back side of a semiconductor substrate. Process parameters (e.g., temperature) and treatments used to form structures at the back side may be limited to avoid altering structures formed at the front side.

[0043] The wide bandgap semiconductor device to be formed on the wide bandgap semiconductor wafer may be a power semiconductor device. For example, the power semiconductor device or the electrical structure of the power semiconductor device (e.g., a transistor arrangement of the semiconductor device) may have a breakdown voltage or blocking voltage of more than 100 V (e.g., a breakdown voltage of 200 V, 300 V, or 500 V) or a breakdown voltage or blocking voltage of more than 500 V (e.g., a breakdown voltage of 600 V, 700 V, 800 V, or 1000 V) or a breakdown voltage or blocking voltage of more than 1000 V (e.g., a breakdown voltage of 1200 V, 1500 V, 1700 V, 2000 V, 3300 V, or 6500 V).

[0044] Figure 2 A flow chart of a method 200 for forming a plurality of thin wide bandgap semiconductor wafers is shown. The method 200 may include depositing 210 a first non-single crystalline support layer on a wide bandgap semiconductor ingot. For example, the non-single crystalline support layer may be a polycrystalline layer and / or an amorphous layer.

[0045] In addition, the method 200 may include separating 220 (e.g., splitting 220 and / or sawing 220) the wide bandgap semiconductor ingot along a first separation region (e.g., a splitting region or a sawing region) to obtain a first thin wide bandgap semiconductor wafer. As an alternative or in addition to splitting 220, the first thin wide bandgap semiconductor wafer may be obtained by, for example, partially sawing 220 the wide bandgap semiconductor ingot. The thin wide bandgap semiconductor wafer may include a non-single crystalline support layer and a thin wide bandgap semiconductor layer. For example, the thickness of the non-single crystalline support layer may be at least 100 μm (or at least 150 μm). For example, the thin wide bandgap semiconductor layer may have a thickness of at least 50 μm (at least 100 μm or at least 250 μm) and / or at most 500 μm. In addition, a first remaining wide bandgap semiconductor ingot may be obtained. For example, the thickness of the wide bandgap semiconductor ingot may be at least 2 times (or at least 5 times, or at least 10 times) the thickness of the thin wide bandgap semiconductor layer.

[0046] In addition, the method 200 may include depositing 230 an additional (e.g., second) non-single-crystalline support layer on the first remaining wide bandgap semiconductor ingot (e.g., including the non-single-crystalline support layer). For example, after separating 220 (e.g., splitting or sawing) the wide bandgap semiconductor ingot along the first separation region, the additional non-single-crystalline support layer may be deposited 230.

[0047] The method 200 may further include separating 240 (e.g., separating 240 or sawing 240) the first remaining wide bandgap semiconductor ingot along a second separation region (e.g., splitting region or sawing region). For example, a further (e.g., second) thin wide bandgap semiconductor wafer and a further (e.g., second) remaining wide bandgap semiconductor ingot may be obtained. For example, the further thin wide bandgap semiconductor wafer may include a further non-single crystalline support layer and a further thin wide bandgap semiconductor layer. The process sequence may be repeated several times.

[0048] For example, an additional (e.g., third) non-single crystalline support layer may be deposited on the second remaining wide band gap semiconductor ingot. For example, the second remaining wide band gap semiconductor ingot may be separated (e.g., split or sawed) along an additional separation region (e.g., split region or sawing region) to obtain an additional (e.g., third) thin wide band gap semiconductor wafer, and an additional remaining wide band gap semiconductor ingot. The additional thin wide band gap semiconductor wafer may include an additional non-single crystalline support layer and a thin wide band gap semiconductor layer. Thus, an additional non-single crystalline support layer may be deposited on the corresponding additional remaining wide band gap semiconductor ingot to form a plurality of thin wide band gap semiconductor wafers. This process may be repeated, for example, several times, for example, until the thickness of the remaining wide band gap semiconductor ingot is too small to split the remaining wide band gap semiconductor ingot, for example, if it is thinner than the thin wide band gap semiconductor wafer.

[0049] The method 200 may be used to provide or split or saw thin wide bandgap semiconductor wafers from a wide bandgap semiconductor ingot. Thereby, the amount of wide bandgap semiconductor material required for the thin wide bandgap semiconductor wafer may be reduced. It may be possible that mechanical stability (e.g., for further processing) is provided by a non-single-crystal support layer. For example, the wide bandgap semiconductor ingot may have a thickness of at least 2 mm (or at least 3 mm or at least 5 mm). The wide bandgap semiconductor ingot may be a wide bandgap semiconductor ingot and / or a thick wide bandgap semiconductor wafer. For example, the wide bandgap semiconductor ingot may have the shape of an elongated rod or an elongated strip. For example, the method 200 may enable the provision of thin wide bandgap semiconductor wafers while reducing the required amount of wide bandgap semiconductor wafer material.

[0050] Further details and aspects are mentioned in conjunction with the embodiments described above or below. Figure 2The embodiments shown in may include: one or more optional additional features, which correspond to the concepts proposed in combination or above or below (for example, Figure 1 and 3 -4i) One or more aspects mentioned in one or more embodiments described.

[0051] Figure 3 A diagram of a wide bandgap semiconductor wafer 300 is shown. The wide bandgap semiconductor wafer 300 may include a single crystalline wide bandgap semiconductor layer 310. The single crystalline wide bandgap semiconductor layer may have a thickness of at least 50 μm (or at least 70 μm, at least 90 μm, at least 100 μm, at least 150 μm, at least 250 μm, at least 350 μm, at least 500 μm, at least 700 μm, or at least 1000 μm) and / or at most 2000 μm (or at most 1300 μm, at most 1000 μm, or at most 800 μm). For example, a single crystalline wide bandgap semiconductor layer having a thickness of more than 300 μm may be used to separate a plurality of thin single crystalline semiconductor wafers from the single crystalline wide bandgap semiconductor layer 310.

[0052] The wide bandgap semiconductor wafer 300 may further include a non-single crystalline support layer. The non-single crystalline support layer may be a crystalline layer, such as an amorphous layer or a polycrystalline layer. For example, the non-single crystalline support layer may include a semiconductor material, such as a wide bandgap semiconductor. The non-single crystalline support layer may be located at the surface of the single crystalline semiconductor layer. The thickness of the non-single crystalline support layer may be at least 100 μm (or at least 150 μm, at least 200 μm, at least 250 μm, at least 300 μm, at least 400 μm, at least 500 μm, at least 700 μm, or at least 1000 μm) and / or at most 1500 μm (or at most 1200 μm, at most 1000 μm, at most 750 μm, at most 500 μm, at most 350 μm, or at most 200 μm). A thickness of more than 300 μm (eg more than 350 μm) of the non-single-crystalline support layer may, for example, enable the singulation of further thin semiconductor wafers from the single-crystalline wide bandgap semiconductor layer 310 .

[0053] For example, the non-single crystalline support layer increases the overall thickness of the wide bandgap semiconductor wafer 300 and can mechanically support a thin single crystalline wide bandgap semiconductor layer, for example, where the thickness of the single crystalline wide bandgap semiconductor layer is less than 250 μm. For example, the overall thickness of the wide bandgap semiconductor wafer 300 is at least 200 μm (or at least 250 μm) and / or at most 1500 μm (or at most 1300 μm). The overall thickness of the wide bandgap semiconductor wafer 300 can enable the wide bandgap semiconductor wafer 300 to be processed using standard semiconductor equipment.

[0054] Providing a non-single crystalline support layer can enable processing and / or use of a complete single crystalline wide band gap semiconductor layer. The single crystalline wide band gap semiconductor layer may include expensive materials, while the material of the non-single crystalline support layer may be relatively cheap. For example, the wide band gap semiconductor wafer 300 may be a silicon carbide wafer, and the single crystalline wide band gap semiconductor layer may be a silicon carbide layer. For example, the non-single crystalline support layer may be a polycrystalline silicon carbide layer. By providing a non-single crystalline support layer, a single crystalline wide band gap semiconductor layer may be used or processed in its entirety, for example, by splitting a thin wide band gap semiconductor wafer from a single crystalline wide band gap semiconductor layer. To this end, once a critical thickness for further processing of the wafer is reached, an additional polycrystalline silicon carbide layer may be deposited on the support layer. The unusable remaining portion of the single crystalline wide band gap semiconductor layer may be reduced (e.g., reduced to a thickness of less than 60 μm or less than 30 μm), so that by more efficiently using the single crystalline wide band gap semiconductor layer, for example, the overall manufacturing cost of the thin wide band gap semiconductor wafer may be reduced.

[0055] For example, the thermal expansion coefficient of at least a portion of the non-single crystalline support layer may differ from the thermal expansion coefficient of the single crystalline wide band gap semiconductor layer by up to 10% (or up to 5%, up to 3%, up to 1% or up to 0.1%) of the thermal expansion coefficient of the single crystalline wide band gap semiconductor layer. For example, a portion of the non-single crystalline support layer may be a sublayer of the non-single crystalline support layer. Similar thermal expansion coefficients of the two layers may result in preventing wafer bowing of the wide band gap semiconductor wafer 300, for example, when the wide band gap semiconductor wafer 300 is processed at different temperatures.

[0056] For example, a first sublayer of the non-single crystalline support layer may include a first material, and a second sublayer of the non-single crystalline support layer may include a second material, wherein the first material may be different from the second material. For example, the first and second materials may have different coefficients of thermal expansion. For example, the coefficient of thermal expansion of a sublayer immediately adjacent to the single crystalline wide bandgap semiconductor layer may differ from the coefficient of thermal expansion of the single crystalline wide bandgap semiconductor layer by up to 10% of the coefficient of thermal expansion of the single crystalline wide bandgap semiconductor layer, and for example, the coefficient of thermal expansion of another sublayer may differ from the coefficient of thermal expansion of the single crystalline wide bandgap semiconductor layer by more than 10%.

[0057] Further details and aspects are mentioned in conjunction with the embodiments described above or below. Figure 3 The embodiments shown in may include: one or more optional additional features, which correspond to the concepts proposed in combination or above or below (for example, Figure 1-2 and 4a-4i) one or more aspects mentioned in one or more embodiments described.

[0058] Figures 4a to 4iAn example of a method for processing a wide bandgap semiconductor wafer 400 is shown. A wide bandgap semiconductor wafer 400 may be provided as a starting wafer. An epitaxial layer 410 may be deposited on the starting wafer. For example, front side structures or metallization structures 420, 422 may be formed on the epitaxial layer 410. For example, after forming the front side structures (e.g., to provide semiconductor devices), the wide bandgap semiconductor wafer 400 may be split. For example, as Figure 4d As shown in , a remaining bulk wafer 430 can be obtained after splitting, and the remaining bulk wafer 430 includes at least a first portion of the starting wafer. For example, a device wafer 440 can be obtained after splitting. The device wafer 440 can include an epitaxial layer 410 and metallization structures 420, 422. For example, the device wafer 440 can further include a second portion of the starting wafer. For example, the second portion of the starting wafer can be thinner than the epitaxial layer 410.

[0059] The bulk wafer 430 can be turned so that the front side 450 of the bulk wafer 430 faces downward. The bulk wafer 430 can be thickened by depositing a support layer 460 formed at the back side of the bulk wafer 430 opposite to the front side 450. The bulk wafer 430 and the support layer 460 can form a new starting wafer 470. For example, the new starting wafer 470 can be turned so that the front side 450 faces upward, for example to enable further processing of the front side. Processes for reducing surface roughness, such as, for example, CMP, etching, polishing, can be performed on the first side 450. Additional epitaxial layers can be formed at the front side 450, for example after post-processing of the new starting wafer 470, and iterations of the method can be performed, wherein a new starting wafer 470 can replace the starting wafer 400.

[0060] Further details and aspects are mentioned in conjunction with the embodiments described above or below. Figures 4a to 4i The embodiments shown in the may include: one or more optional additional features, which correspond to the combination of the proposed concepts or the above or below (for example Figure 1-3 ) One or more aspects mentioned in one or more embodiments described in the present invention.

[0061] For example, for some concepts involving splitting and reuse, limitations regarding the reuse cycle may occur and it may not be possible to process substrates of thin semiconductor wafers in their entirety. For example, after splitting a semiconductor wafer, the remaining wafer part may have a thickness below 250 μm. Due to its low thickness, it may not be possible to further use the remaining part. In order to ensure the required thickness of the remaining part, for example greater than 250 μm, thick epitaxial layers may be grown on the semiconductor wafer before splitting, which epitaxial layers lead to increased costs. There is a need for improved concepts for processing semiconductor wafers.

[0062] According to other concepts, it may not be possible to process wafers below 250 μm thickness in their entirety. For concepts aiming at splitting and / or reusing the wafers, limitations regarding the reuse cycle may therefore arise. For example, the starting substrate (e.g., starting wafer) has a starting thickness of 350 μm and a split thickness of 110 μm can be used. According to some concepts, a splitting of a maximum of 2 times of the starting substrate can be achieved (e.g., including > 30 μm Epi deposition), even if the rest of the block can still be used.

[0063] For example, by using the provided concept, the remaining part of the block can also be used intact. The proposed method can for example provide the use of a temperature-resistant and / or low-cost deposition on the back side of the wafer. This deposition can for example only be used to thicken the disk (e.g., wafer or substrate) and may not have electrical relevance, since for example this layer will not be found again in the resulting device wafer (e.g., which is split off). Still, this additional layer may not have a negative impact on the manufacturability of the wafer during processing, both with respect to wafer bowing / warping and roughness.

[0064] For example, deposition of polycrystalline silicon carbide (poly-SiC) on the back side of the wafer can be carried out from the gas phase, for example, similar gas systems can be used as in SiC epitaxy (e.g., hydrocarbons, silanes and / or silane derivatives and / or gases containing carbon and silicon (Si) in the right proportions). Moreover, it may be advisable to use chlorine (Cl) containing gases (e.g., trichlorosilane), for example in order to obtain high surface diffusion rates and thus high growth rates. A further alternative may be, for example, the use of laser chemical vapor deposition (CVD) or close-space epitaxy.

[0065] For example, the front side of the single crystal wafer can be protected by a removable cover layer (e.g., a carbon cover), for example to inhibit undesired growth there. A possible implementation would be, for example, to select the overall thickness of the starting wafer to be significantly thicker than 350 microns by adapting the processing equipment used, and possibly to minimize wafer bending and facilitate wafer handling. In this regard, for example, at the beginning of processing the initial wafer, a polycrystalline silicon carbide layer of corresponding thickness can be provided to the initial wafer, which corresponding thickness can be increased during the subsequent reuse process so that the wafer can be reused several times. The process can be repeated until the original single crystal SiC layer is exhausted. For example, in the case of polycrystalline silicon carbide, it may not be necessary to perform thickening after each splitting process, but for example only when the processing equipment used makes it necessary.

[0066] Examples relate to a method for thickening a SiC wafer. One aspect may relate to wafer backside deposition of a layer compatible with SiC processes in order to utilize a SiC wafer reuse concept by means of split-off layers to subsequently prevent a critical wafer thickness from being reached. Such split-off layers may not only meet thermal requirements, but also mechanical requirements. An example of such a layer may be a polycrystalline SiC layer.

[0067] Using the proposed concept may enable to reduce the manufacturing costs for SiC technology, since the substrate can be reused several times. The proposed concept may also be integrated for even thinner split layers and / or be scalable to different wafer diameters.

[0068] Thick epitaxial layer deposition on the wafer front side may enable thickening of the disk / layer. The proposed concept may be easily implemented compared to other concepts and / or may be easily included into a production process and / or may enable implementation of currently required test concepts.

[0069] Aspects and features mentioned and described in conjunction with one or more of the previously detailed examples and figures may also be combined with one or more other examples in order to replace similar features of the other examples or in order to additionally introduce features into the other examples.

[0070] The description and drawings merely illustrate the principles of the present disclosure. In addition, all examples recorded herein are primarily intended to be used for illustrative purposes only to help the reader understand the principles of the present disclosure and the concepts contributed by the inventor(s) to advance the prior art. All statements of principles, aspects, and examples of the present disclosure and their specific examples recorded herein are intended to encompass their equivalents.

[0071] It is to be understood that the disclosure of multiple actions, processes, operations, steps or functions disclosed in this specification or claims may not be interpreted as being in a specific order, unless otherwise explicitly or implicitly stated, for example, for technical reasons. Therefore, the disclosure of multiple actions or functions will not limit these to a specific order, unless such actions or functions are not interchangeable for technical reasons. In addition, in some examples, a single action, function, process, operation or step may include or may be decomposed into multiple sub-actions, sub-functions, sub-processes, sub-operations or sub-steps, respectively. Unless explicitly excluded, such sub-actions may be included and may be part of the disclosure of this single action.

[0072] In addition, the following claims are hereby incorporated into the detailed description, where each claim can stand on its own as a separate example. Although each claim can stand on its own as a separate example, it is noted that although a dependent claim may refer to a specific combination with one or more other claims in the claims, other examples may also include a combination of the dependent claim with the subject matter of each other dependent or independent claim. These combinations are explicitly set forth herein unless the statement does not intend Figure 1 Furthermore, it is intended to also include features of a claim to any other independent claim, even if this claim is not directly made dependent upon the independent claim.

Claims

1. A method (100) for processing a wide bandgap semiconductor wafer, the method (100) comprising: Depositing a non-single-crystal support layer (320) of a polycrystalline silicon carbide layer or a molybdenum layer at the back side of a wide bandgap semiconductor wafer, the wide bandgap semiconductor wafer being a silicon carbide wafer; depositing an epitaxial layer at a front side of the wide bandgap semiconductor wafer; Splitting the wide bandgap semiconductor wafer along a splitting region to obtain a device wafer including at least a portion of the epitaxial layer and a remaining wafer including the non-single-crystal supporting layer (320); and An additional non-single-crystal support layer is deposited on the non-single-crystal support layer (320) of the remaining wafer.

2. The method (100) according to claim 1, The thermal expansion coefficient of the non-single-crystal support layer (320) differs from the thermal expansion coefficient of the wide-bandgap semiconductor wafer by at most 10% of the thermal expansion coefficient of the wide-bandgap semiconductor wafer.

3. The method (100) according to claim 1 or 2, The non-single-crystalline support layer (320) is deposited at a deposition rate of at least 50 μm / hour.

4. The method (100) according to any one of claims 1 to 2, The total thickness of the remaining wafer including the non-single-crystal support layer (320) is at least 200 μm and at most 1500 μm.

5. The method (100) according to any one of claims 1 to 2, During the deposition of the non-single-crystal support layer (320), a protective layer is located at the front side of the wide bandgap semiconductor wafer.

6. The method (100) according to claim 1, The material of the additional non-single-crystal supporting layer is different from the material of the non-single-crystal supporting layer (320).

7. The method (100) according to claim 1, The thickness of the remaining wafer including the non-single-crystal support layer (320) and the additional non-single-crystal support layer differs from the thickness of the wide-bandgap semiconductor wafer before the wide-bandgap semiconductor wafer is split by at most 300 μm.

8. The method (100) according to claim 1, Wherein the further non-single-crystalline supporting layer has a thickness of at least 90% and at most 110% of the total thickness of the further device wafer.

9. The method (100) according to any one of claims 1-2, further comprising: depositing an additional epitaxial layer at the front side of the remaining wafer; as well as The remaining wafer is split along further split regions to obtain a further device wafer comprising the further epitaxial layer and a further remaining wafer comprising the non-single-crystalline supporting layer (320).

10. The method (100) according to any one of claims 1-2, further comprising: After depositing the non-single-crystal support layer (320), a doped region of a wide-bandgap semiconductor device is formed in the wide-bandgap semiconductor wafer.

11. The method (100) according to claim 10, further comprising: After depositing the non-single-crystal support layer, a metallization structure of the wide bandgap semiconductor device is formed at the front side of the wide bandgap semiconductor wafer.

12. The method (100) according to any one of claims 1 to 2, Wherein at least one of a gate trench and a gate electrode of a transistor is formed at the front side of the wide bandgap semiconductor wafer before singulation (130).

13. The method (100) according to any one of claims 1 to 2, Wherein after singulation (130), the device wafer is processed at a temperature of up to 1000°C.

14. A method (200) for processing a silicon carbide semiconductor wafer, the method (200) comprising: Providing silicon carbide semiconductor wafers; depositing an epitaxial layer at the front side of the silicon carbide semiconductor wafer; Separating the silicon carbide semiconductor wafer along a first splitting region to obtain a first device wafer including at least a portion of the epitaxial layer and a first remaining wafer; depositing a first non-single-crystalline supporting layer of polycrystalline silicon carbide or molybdenum at the back side of the first remaining wafer; depositing an epitaxial layer at the front side of the first remaining wafer after depositing the first non-single-crystalline supporting layer; and The first remaining wafer is separated along a second splitting region extending parallel to the front side in the first remaining wafer to obtain a second device wafer including at least a portion of the epitaxial layer and a second remaining wafer including the first non-single-crystal supporting layer.

15. The method (200) according to claim 14, further comprising the steps of: depositing a second non-single-crystal support layer of polycrystalline silicon carbide or molybdenum at the first non-single-crystal support layer of the second remaining wafer; After depositing the second non-single-crystalline support layer, depositing an epitaxial layer at the front side of the second remaining wafer; and The second remaining wafer is separated along a third splitting region extending parallel to the front side in the second remaining wafer to obtain a third device wafer including at least a portion of the epitaxial layer and a third remaining wafer including at least a portion of the first non-single-crystal supporting layer and the second non-single-crystal supporting layer.

16. The method (200) according to claim 15, wherein the thickness of the first remaining wafer, including the thickness of the first non-single-crystal support layer, differs from the thickness of the silicon carbide wafer before splitting the silicon carbide wafer by at most 200 μm, and / or The thickness of the second remaining wafer, including the thickness of the first and second non-single-crystal supporting layers, differs from the thickness of the first remaining wafer before splitting the first remaining wafer by at most 200 μm.

17. A wide bandgap semiconductor wafer (300) of a silicon carbide wafer, comprising A single crystalline wide bandgap semiconductor layer (310) of silicon carbide, wherein the single crystalline wide bandgap semiconductor layer (310) has a thickness of at least 250 μm; and a non-single-crystal support layer (320) of a polycrystalline silicon carbide layer or a molybdenum layer located on the surface of the single-crystal wide bandgap semiconductor layer (310), wherein the thickness of the non-single-crystal support layer (320) is at least 150 μm, wherein the thermal expansion coefficient of at least a portion of the non-single-crystalline support layer (320) differs from the thermal expansion coefficient of the single-crystalline wide-bandgap semiconductor layer (310) by at most 10% of the thermal expansion coefficient of the single-crystalline wide-bandgap semiconductor layer (310), The first sublayer of the non-single-crystal support layer (320) comprises a first material, and the second sublayer of the non-single-crystal support layer (320) comprises a second material, wherein the first material is different from the second material.

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