Electronic Devices

Abstract

An electronic device is disclosed, the electronic device comprising a plurality of pixels, a plurality of power lines, a power pad, a power pattern, a plurality of sensing electrodes and a plurality of sensing pads, wherein the plurality of pixels are arranged on an effective area, each of the plurality of power lines is connected to at least one of the pixels, the power pad is arranged on a peripheral area and configured to receive a power voltage, the power pattern is arranged on the peripheral area and connects the power line to the power pad, the plurality of sensing electrodes are arranged on the pixels and on the effective area in a cross-sectional view, the plurality of sensing pads are arranged on the peripheral area and electrically connected to the sensing electrodes. When viewed in a plan view, the sensing pad overlaps with the power pattern.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority from Korean Patent Application No. 10-2018-0077539, filed on Jul. 4, 2018, the entire contents of which are incorporated herein by reference. Background Art

[0003] The present disclosure herein relates to electronic devices, and more particularly, to electronic devices having improved reliability.

[0004] The electronic device is activated by an electrical signal. The electronic device may include various electronic components, such as a display unit for displaying an image and / or an input sensing unit for sensing an external input. The electronic components may be electrically connected to each other through signal lines arranged differently.

[0005] The number of signal lines may be determined according to the number of electronic components and / or the processing environment, and the signal lines may be appropriately arranged in a predetermined panel area to prevent interference of electrical signals. The signal lines may receive external electrical signals through pads. As the processing speed and / or processing data of the electronic device increases, the number of signal lines and pads may increase, and thus mutual interference between electronic components and / or between signal lines may increase. Summary of the invention

[0006] The present disclosure may provide an electronic device capable of minimizing or preventing degradation of electrical reliability that may be caused by interference of electrical signals.

[0007] The present disclosure may also provide an electronic device capable of improving bending reliability.

[0008] In an embodiment of the present inventive concept, an electronic device includes a base substrate, a plurality of pixels, a plurality of power lines, a power pad, a power pattern, a plurality of sensing electrodes, and a plurality of sensing pads, wherein the base substrate includes an active area and a peripheral area adjacent to the active area, the plurality of pixels are arranged on the active area, each of the plurality of power lines is connected to at least one of the pixels, the power pad is arranged on the peripheral area and configured to receive a power voltage, the power pattern is arranged on the peripheral area and connects the power line to the power pad, the plurality of sensing electrodes are arranged on the pixels and on the active area in a cross-sectional view, the plurality of sensing pads are arranged on the peripheral area and electrically connected to the sensing electrodes. When viewed in a plan view, the sensing pad overlaps with the power pattern.

[0009] In an embodiment, each of the pixels may include a thin film transistor and a light emitting element, wherein the thin film transistor is covered by an insulating layer and includes a semiconductor layer, a control electrode, an input electrode, and an output electrode, the control electrode is spaced apart from the semiconductor layer, the input electrode is connected to the semiconductor layer, the output electrode is disposed on the same layer as the input electrode and is connected to the semiconductor layer, the light emitting element is disposed on the insulating layer and includes a first electrode, a second electrode, and an emission layer, the second electrode is disposed on the first electrode, and the emission layer is disposed between the first electrode and the second electrode. When viewed in a cross-sectional view, the sensing pad may be disposed at a level between the light emitting element and the thin film transistor.

[0010] In an embodiment, the power pattern may be disposed on the same layer as the output electrode.

[0011] In an embodiment, the insulating layer may include a first layer, a second layer, and a third layer, wherein the first layer is disposed between the first electrode and the output electrode and covers the output electrode, the second layer is disposed on the first layer, the third layer is disposed on the second layer, and the first electrode is disposed on the third layer. The power pattern may be covered by the first layer.

[0012] In an implementation, the sensing pad may be disposed between the second layer and the third layer.

[0013] In an embodiment, the electronic device may further include a connection electrode disposed between the second layer and the third layer. The first electrode may penetrate the third layer to be connected to the connection electrode, and the connection electrode may penetrate the first layer and the second layer to be connected to the output electrode.

[0014] In an embodiment, the electronic device may further include a first circuit board connected to the power pad and a second circuit board connected to the sensing pad. The sensing electrode may receive an electrical signal through the second circuit board.

[0015] In an embodiment, the base substrate may include a bending portion and a non-bending portion, wherein the bending portion is bent around a bending axis extending in one direction, and the non-bending portion is connected to the bending portion. The power pattern and the sensing pad may be disposed on the non-bending portion, and the power pad may be disposed on the bending portion.

[0016] In an embodiment, the electronic device may further include a main pad and a bridge line, wherein the main pad is disposed on the bent portion and the bridge line extends in a direction intersecting the bending axis to connect the main pad to the sensing pad.

[0017] In an implementation, the bridge line may be in direct contact with the sensing pad.

[0018] In an embodiment, the bridge line may include a first line and a second line, wherein the first line connects the main pad to the sensing pad, and the second line connects the main pad to the sensing pad and includes a portion spaced apart from the first line in a cross-sectional view. The first line, the second line, and the sensing pad may directly contact each other.

[0019] In an embodiment, the electronic device may further include an organic layer disposed on the bent portion. The organic layer may be disposed between the first line and the second line.

[0020] In an embodiment, the electronic device may further include a circuit board connected to the main pad and the power pad. The sensing electrode may receive an electrical signal through the circuit board.

[0021] In an embodiment of the present invention, an electronic device includes an electronic panel and a circuit board connected to the electronic panel, wherein the electronic panel includes a curved portion curved around a curved axis extending in one direction and a non-curved portion connected to the curved portion. The electronic panel includes a plurality of pixels, a sensing electrode, a data pad, a power pad, a power pattern, and a sensing pad, wherein the plurality of pixels are arranged in the non-curved portion, the sensing electrode is arranged in the non-curved portion and overlaps with the pixel when viewed in a plan view, the data pad is arranged in the curved portion and connected to the circuit board, the power pad is arranged in the curved portion and connected to the circuit board, the power pattern is arranged in the non-curved portion and connects the power pad to the pixel, and the sensing pad is arranged in the non-curved portion and connected to the sensing electrode. When viewed in a plan view, the sensing pad overlaps with the power pattern.

[0022] In an embodiment, the circuit board may include a first circuit board connected to the data pad and the power pad and a second circuit board connected to the sensing pad. The sensing electrode may receive an electrical signal through the second circuit board.

[0023] In an embodiment, the electronic device may further include a main pad and a bridge line, wherein the main pad is disposed in the bent portion and connected to the circuit board, and the bridge line extends in a direction intersecting the bending axis to connect the main pad to the sensing pad. The sensing electrode may receive an electrical signal through the circuit board.

[0024] In an embodiment, the electronic device may further include a stress relaxation layer disposed in the bent portion and including an organic material. The bridge line may include a first line and a second line spaced apart from each other with the stress relaxation layer interposed therebetween when viewed in a cross-sectional view.

[0025] In an implementation, the sensing pad, the first line, and the second line may be stacked when viewed in a cross-sectional view.

[0026] In an embodiment, the first line may be disposed on the second line, and at least a portion of the second line may be disposed on the same layer as the power pattern.

[0027] In an embodiment, the electronic device may further include an encapsulation layer disposed between the pixel and the sensing electrode and including at least one of an organic layer and an inorganic layer. The sensing electrode may be directly disposed on the encapsulation layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification. The accompanying drawings illustrate exemplary embodiments of the inventive concept and together with the description serve to explain the principles of the inventive concept. In the drawings:

[0029] Figure 1A is an exploded perspective view showing an electronic device according to an embodiment of the inventive concept;

[0030] Figure 1B It is shown Figure 1A A combined stereogram of an electronic device;

[0031] Figure 2A is a perspective view showing an electronic panel according to an embodiment of the inventive concept;

[0032] Figure 2B It is shown Figure 2A An exploded perspective view of the electronic panel;

[0033] Figure 3A It is along Figure 2B A cross-sectional view taken along line II′;

[0034] Figure 3B It is along Figure 2B A sectional view taken along line II-II′;

[0035] Figure 4 is an exploded perspective view showing an electronic device according to an embodiment of the inventive concept;

[0036] Figure 5 is a cross-sectional view showing a portion of an electronic device according to an embodiment of the inventive concept;

[0037] Figure 6 is a cross-sectional view showing a portion of an electronic panel according to an embodiment of the present inventive concept;

[0038] Figure 7 is a cross-sectional view illustrating a portion of an electronic panel according to an embodiment of the present inventive concept; and

[0039] FIG. 8A to FIG. 8C is a plan view schematically illustrating an electronic panel according to some embodiments of the inventive concept. DETAILED DESCRIPTION

[0040] The inventive concept will now be described more fully below with reference to the accompanying drawings, in which various embodiments are shown. However, the inventive concept can be implemented in many different forms, and the inventive concept should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. The same reference numerals in the accompanying drawings represent the same elements.

[0041] It will be understood that when an element such as a layer, region, or substrate is referred to as being "on" another element, it can be directly on the other element, or intervening elements may be present. In contrast, the term "directly" means that there are no intervening elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0042] The terms used herein are only for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, unless the content clearly indicates otherwise, the singular forms "one", "an" and "the" are intended to include plural forms, including "at least one". "Or" means "and / or". As used herein, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items. It will also be understood that when the terms "comprise" and / or "comprising" or "include" and / or "including" are used in this specification, the presence of the features, regions, wholes, steps, operations, elements and / or components is specified, but the presence or addition of one or more other features, regions, wholes, steps, operations, elements, components and / or their groups is not excluded.

[0043] For ease of description, spatially relative terms such as "under", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature to other elements or features as shown in the figures. It will be understood that in addition to the orientation depicted in the figures, the spatially relative terms are intended to include different orientations of the device in use or operation. For example, if the device in the figure is turned over, the elements described as "under" or "under" other elements or features will then be oriented as "above" the other elements or features to which they belong. Therefore, the exemplary term "under" may include both "above" and "under" orientations. The device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein are interpreted accordingly.

[0044] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or section from another region, layer, or section. Therefore, without departing from the teachings herein, the first element, first component, first region, first layer, or first section discussed below may be named as the second element, second component, second region, second layer, or second section.

[0045] As used herein, "about" or "approximately" includes the stated value and the average within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0046] In this article, exemplary embodiments are described with reference to cross-sectional illustrations and / or plan illustrations illustrated as idealized examples. In the accompanying drawings, the thickness of layers and regions is exaggerated for clarity. Accordingly, changes in the shapes of the illustrations caused by, for example, manufacturing techniques and / or tolerances will be expected. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown in this article, but will include deviations in shapes caused by, for example, manufacturing. For example, an etched area shown as a rectangle will generally have rounded or curved features. Therefore, the areas shown in the figures are schematic in nature, and their shapes are not intended to illustrate the actual shape of the areas of the device and are not intended to limit the scope of the exemplary embodiments.

[0047] Hereinafter, exemplary embodiments of the present inventive concept will be described in detail with reference to the accompanying drawings.

[0048] Figure 1A is an exploded perspective view showing an electronic device according to an embodiment of the inventive concept, and Figure 1B It is shown Figure 1A Hereinafter, reference will be made to Figure 1A and Figure 1B Embodiments of the inventive concept are described.

[0049] The electronic device EA may include a window member 100, an electronic panel 200, and a circuit board 300. When viewed in a plan view defined by a first direction D1 and a second direction D2, the window member 100 may include a transmissive area TRA and a bezel area BZA.

[0050] The transmissive region TRA may transmit light incident thereto. The light transmittance of the frame region BZA may be lower than the light transmittance of the transmissive region TRA. The frame region BZA may be adjacent to the transmissive region TRA. In the present embodiment, when viewed in a plan view, the frame region BZA may surround the transmissive region TRA. However, embodiments of the inventive concept are not limited thereto. In another embodiment, the frame region BZA may be adjacent to only a portion of an edge of the transmissive region TRA.

[0051] When viewed in a plan view, the electronic panel 200 may include an active area AA and a peripheral area NAA. The electronic panel 200 may activate the active area AA by an electrical signal. The electronic panel 200 may display an image IM in an upward direction D3 (hereinafter, referred to as a third direction D3) through the activated active area AA and / or may sense an external input TC applied to the active area AA.

[0052] In the present embodiment, the transmissive area TRA may correspond to or overlap the active area AA. Therefore, the user can easily view the image IM displayed in the active area AA through the transmissive area TRA. The external input TC may include various embodiments. For example, the external input TC may include at least one of various types of external inputs such as a part of the user's body (e.g., a finger), light, heat, and pressure. In addition, the electronic device EA may sense a proximity input as well as an input that touches the electronic device EA.

[0053] The peripheral area NAA may be adjacent to the active area AA. When viewed in a plan view, the peripheral area NAA may surround an edge of the active area AA. However, embodiments of the inventive concept are not limited thereto. In another embodiment, the peripheral area NAA may be adjacent to only a portion of an edge of the active area AA.

[0054] Various kinds of signal lines and / or electronic devices for providing electrical signals to the active area AA may be disposed in the peripheral area NAA. The peripheral area NAA may be covered by the bezel area BZA and thus may not be visible to the outside.

[0055] In the present embodiment, the electronic panel 200 may include a first pad area PA1 and a second pad area PA2. When viewed in a plan view, the first pad area PA1 and the second pad area PA2 may be spaced apart from each other. The circuit board 300 may be coupled to the first pad area PA1 and the second pad area PA2. The first pad area PA1 and the second pad area PA2 may be spaced apart from the active area AA.

[0056] In the present embodiment, at least a portion of the electronic panel 200 may be bent and may be coupled to the window member 100. A portion of the peripheral area NAA in which the first pad area PA1 is disposed may be bent to be positioned below the electronic panel 200. Therefore, the circuit board 300 may be assembled to be disposed on the rear surface of the electronic panel 200, thereby manufacturing the electronic device EA. This will be described in more detail later.

[0057] The circuit board 300 may be connected to the electronic panel 200 . The circuit board 300 may include a first circuit board 310 and a second circuit board 320 .

[0058] The first circuit board 310 may be connected to the electronic panel 200 through the first pad area PA1. The first circuit board 310 may provide a power signal and / or a signal for controlling a displayed image IM to the electronic panel 200. The first circuit board 310 may include a main board 311, electronic devices 312, and a connector 313.

[0059] The main board 311 may be substantially coupled to the electronic panel 200. The main board 311 may be electrically and physically coupled to the first pad area PA1 through a conductive adhesive member (not shown). The main board 311 may include a signal line (not shown).

[0060] The electronic device 312 may be mounted on the main board 311. The electronic device 312 may be connected to a signal line of the main board 311, and thus may be electrically connected to the electronic panel 200. The electronic device 312 may generate and / or process various kinds of electrical signals.

[0061] The connector 313 may be mounted on the main board 311. The connector 313 may be connected to a signal line of the main board 311. The connector 313 may serve as a path for electrically connecting the first circuit board 310 to external components.

[0062] The second circuit board 320 may be connected to the electronic panel 200 through the second pad area PA2. The second circuit board 320 may transmit / receive an electrical signal that activates the active area AA of the electronic panel 200 so that the active area AA senses the external input TC. The second circuit board 320 may provide an electrical signal to the electronic panel 200 and / or may receive and process an electrical signal generated from the electronic panel 200.

[0063] Meanwhile, the second circuit board 320 may be connected to the first circuit board 310 through the connector 313. Therefore, the first circuit board 310 may also process an electrical signal corresponding to the external input TC provided through the second circuit board 320 and an electrical signal for displaying the image IM. However, embodiments of the inventive concept are not limited thereto. In another embodiment, the second circuit board 320 may be separated from the first circuit board 310 and may be controlled independently of the first circuit board 310.

[0064] Figure 2A is a perspective view showing an electronic panel according to an embodiment of the present inventive concept, and Figure 2B It is shown Figure 2A Hereinafter, reference will be made to Figure 2A and Figure 2B Embodiments of the inventive concept are described.

[0065] Reference Figure 2A , the electronic panel 200 may include a curved portion BR and a non-curved portion NBR, wherein the curved portion BR is curved around a curved axis BX extending in the first direction D1. The curved portion BR may be curved around the curved axis BX. When viewed in a cross-sectional view defined by the second direction D2 and the third direction D3, at least a portion of the curved portion BR may have a curve. Depending on the degree of curvature of the electronic panel 200 and / or the width of the curved portion BR in the second direction D2, the curved portion BR may have only a curved portion or may have a curved portion and a flat portion.

[0066] The non-bending portion NBR may be connected to the bending portion BR in the second direction D2. When the bending portion BR is bent, the non-bending portion NBR may be maintained parallel to a plane defined by the first direction D1 and the second direction D2.

[0067] The boundary of the bending portion BR and the non-bending portion NBR may be defined to be parallel to the bending axis BX. The electronic panel 200 may have one side and the other side extending in a direction parallel to the bending axis BX and opposite to each other in a direction intersecting the bending axis BX. In this case, the non-bending portion NBR may be an area from the boundary to one of the one side and the other side, and the bending portion BR may be a remaining area of ​​the electronic panel 200 excluding the non-bending portion NBR. In other words, the bending portion BR may be an area from the boundary to the other of the one side and the other side.

[0068] The active area AA and the second pad area PA2 may be defined in the non-bending portion NBR. Therefore, the active area AA and the second pad area PA2 may be exposed in the third direction D3. In an embodiment, the first pad area PA1 may be defined in the bending portion BR. Therefore, the first pad area PA1 may be disposed on the rear surface of the non-bending portion NBR and is not exposed in the third direction D3. According to the degree of curvature of the bending portion BR and / or the width of the bending portion BR in the second direction D2, the first pad area PA1 may be formed on at least one of the various surfaces without the limitation of a curved surface or a flat surface. For example, when the bending portion BR has only a curved portion, the first pad area PA1 may be formed on a curved surface. Alternatively, when the bending portion BR has a curved portion and a flat portion connected to the curved portion, the first pad area PA1 may be formed on a flat surface.

[0069] The electronic panel 200 may include a display unit 210 and an input sensing unit 220. For ease and convenience of description and explanation, Figure 2B The display unit 210 and the input sensing unit 220 are shown separated from each other.

[0070] The display unit 210 may generate and display an image IM in the active area AA (see Figure 1B ). The display unit 210 may include a base substrate 10, a plurality of signal lines GL, DL, and PL, pixels PX, a power pattern PP, and a plurality of display pads PDP and PDD.

[0071] The base substrate 10 may have a shape corresponding to the shape of the electronic panel 200. For example, the base substrate 10 may be a component that basically provides a bending portion BR and a non-bending portion NBR. The base substrate 10 may have flexibility so as to be bendable. For example, the base substrate 10 may include an insulating polymer film.

[0072] The signal lines GL, DL, and PL may be disposed on the base substrate 10. The signal lines GL, DL, and PL may include gate lines GL, data lines DL, and power lines PL. The gate lines GL, data lines DL, and power lines PL may transmit electric signals different from each other.

[0073] The gate line GL may extend in the first direction D1. The gate line GL may be provided in plurality, and the plurality of gate lines GL may be arranged in the second direction D2 and spaced apart from each other. However, for the sake of simplicity and convenience of description and explanation, as an example, Figure 2B A single gate line GL is shown in FIG.

[0074] Meanwhile, although not shown in the figure, the display unit 210 may further include a gate driving circuit mounted on the base substrate 10 to provide an electrical signal to the gate line GL. Alternatively, the display unit 210 may further include a gate pad electrically connected to a gate driving circuit provided outside the display unit 210.

[0075] The data line DL may extend in the second direction D2. The data line DL may be electrically insulated from the gate line GL. A plurality of data lines DL may be provided, and the plurality of data lines DL may be arranged in the first direction D1 and spaced apart from each other. However, for the sake of simplicity and convenience of description and explanation, as an example, Figure 2B A single data line DL is shown in FIG. The data line DL may provide a data signal to the pixel PX.

[0076] The power line PL may extend in the second direction D2. The power line PL may be electrically insulated from the gate line GL and the data line DL. A plurality of power lines PL may be provided, and the plurality of power lines PL may be arranged in the first direction D1 and spaced apart from each other. However, for ease and convenience of description and explanation, as an example, Figure 2B A single power line PL is shown in FIG. The power line PL may provide a power signal (hereinafter, referred to as a first power signal) to the pixel PX.

[0077] The pixel PX may be disposed in the display area DA of the display unit 210. The pixel PX may be disposed in plurality, and the plurality of pixels PX may be arranged in a matrix along the first direction D1 and the second direction D2 in the display area DA. However, for the sake of simplicity and convenience of description and explanation, as an example, Figure 2B A single pixel PX is shown in FIG. The pixel PX can display light through an electrical signal to realize an image IM.

[0078] The pixel PX may include a first thin film transistor TR1, a second thin film transistor TR2, a capacitor CP, and a light emitting element ED. The first thin film transistor TR1, the second thin film transistor TR2, the capacitor CP, and the light emitting element ED may be electrically connected to each other.

[0079] The first thin film transistor TR1 may be a switching element configured to control the on and off of the pixel PX. The first thin film transistor TR1 may be connected to the gate line GL and the data line DL. The first thin film transistor TR1 may be turned on by a gate signal provided through the gate line GL, and may provide a data signal provided through the data line DL to the capacitor CP.

[0080] The capacitor CP may store a voltage corresponding to a potential difference between a first power signal supplied from the power line PL and a data signal supplied from the first thin film transistor TR1. The second thin film transistor TR2 may supply the first power signal supplied from the power line PL to the light emitting element ED in response to the voltage stored in the capacitor CP.

[0081] The light emitting element ED may generate light or control the amount of light by an electrical signal. For example, the light emitting element ED may include an organic light emitting element, a quantum dot light emitting element, an electrophoresis element, or an electrowetting element.

[0082] The light emitting element ED may be connected to a power terminal (not shown) and may receive a second power signal different from the first power signal. A driving current corresponding to the difference between the second power signal and the electric signal provided from the second thin film transistor TR2 may flow through the light emitting element ED, and the light emitting element ED may generate light corresponding to the driving current.

[0083] However, embodiments of the inventive concept are not limited thereto. Components of the pixel PX may be variously modified or changed, and may be variously arranged.

[0084] The power pattern PP may be disposed in the non-display area NDA of the display unit 210. The power pattern PP may be included in the non-bending portion NBR. The power pattern PP may have a rectangular shape having a long side extending in the first direction D1 and a short side extending in the second direction D2. The power pattern PP may be electrically connected to the power line PL. In other words, the same electrical signal may be provided to the power pattern PP and the power line PL.

[0085] A plurality of display pads PDP and PDD may be disposed in the non-display area NDA. A portion of the non-display area NDA in which the display pads PDP and PDD are disposed may be defined as a first pad area PA1. As described above, the first circuit board 310 (see Figure 1A ) may be coupled to the first pad area PA1. The first circuit board 310 may be electrically connected to the electronic panel 200 through the display pads PDP and PDD provided in the first pad area PA1.

[0086] The display pads PDP and PDD may include a data pad PDD and a power pad PDP. The data pad PDD may be connected to a data line DL. The data line DL may extend from the display area DA to the data pad PDD via the power pattern PP. The data line DL may receive a data signal from the outside through the data pad PDD.

[0087] However, the embodiments of the present inventive concept are not limited thereto. In another embodiment, the data line DL may be disposed in the display area DA, and the display unit 210 may further include a separate bridge line disposed in the non-display area NDA to connect the data line DL to the data pad PDD. In this case, the bridge line may be connected to each of the data line DL and the data pad PDD through a contact hole, or may be in direct contact with each of the data line DL and the data pad PDD.

[0088] The power pad PDP may be connected to the power pattern PP. The power pattern PP may transmit a first power signal provided from the outside to the power line PL through the power pad PDP. A bridge line connecting the power pattern PP to the power pad PDP may be integrally formed as a single entity with the power pattern PP, or may be provided on a different layer. This will be described in more detail later.

[0089] The input sensing unit 220 may be disposed on the display unit 210. The input sensing unit 220 may sense an external input TC (see Figure 1B ), to obtain information about the position and / or strength of the external input TC. The input sensing unit 220 may include a sensing insulating layer 20, a sensing electrode SS, a plurality of sensing lines SL1 and SL2, and a plurality of sensing pads PDT.

[0090] The input sensing unit 220 may include a sensing area SA and a non-sensing area NSA. The sensing area SA may sense an external input TC. The sensing area SA may overlap with the display area DA. In the present embodiment, the active area AA may include the sensing area SA and the display area DA.

[0091] The non-sensing area NSA may be adjacent to the sensing area SA. When viewed in a plan view, the non-sensing area NSA may surround an edge of the sensing area SA. However, embodiments of the inventive concept are not limited thereto. In other embodiments, the non-sensing area NSA may be adjacent to only a portion of an edge of the sensing area SA or may be omitted.

[0092] The sensing electrode SS may be disposed in the sensing area SA. The sensing electrode SS may include first and second sensing electrodes SP1 and SP2 that receive different electrical signals from each other. The sensing electrode SS may obtain information about the external input TC by using a capacitance change between the first and second sensing electrodes SP1 and SP2.

[0093] The first sensing electrode SP1 may extend in the first direction D1. The first sensing electrode SP1 may be provided in plurality, and the plurality of first sensing electrodes SP1 may be arranged in the second direction D2 and spaced apart from each other. The second sensing electrode SP2 may extend in the second direction D2. The second sensing electrode SP2 may be provided in plurality, and the plurality of second sensing electrodes SP2 may be arranged in the first direction D1 and spaced apart from each other.

[0094] The sensing lines SL1 and SL2 and the sensing pads PDT may be disposed in the non-sensing area NSA. The sensing pads PDT may be connected to the sensing lines SL1 and SL2, respectively. The sensing lines SL1 and SL2 may include a first sensing line SL1 and a second sensing line SL2. The first sensing line SL1 may connect the first sensing electrode SP1 to one of the sensing pads PDT, and an electrical signal provided from the outside may be transmitted to the first sensing electrode SP1 through the one sensing pad PDT. The second sensing line SL2 may connect the second sensing electrode SP2 to another of the sensing pads PDT, and an electrical signal provided from the outside may be transmitted to the second sensing electrode SP2 through the other sensing pad PDT.

[0095] The portion of the non-sensing area NSA in which the sensing pad PDT is disposed may be defined as the second pad area PA2. Figure 1A ) may be coupled to the second pad area PA2. The second circuit board 320 may be electrically connected to the electronic panel 200 through the sensing pads PDT provided in the second pad area PA2.

[0096] Meanwhile, in the present embodiment, when viewed in a plan view, the second pad area PA2 may overlap the power pattern PP. In other words, the sensing pad PDT may be disposed on a layer different from the layer on which the power pattern PP is disposed, and when viewed in a plan view, the sensing pad PDT may overlap the power pattern PP. The area in which the sensing pad PDT is disposed may be independently designed from the area in which the power pattern PP is disposed, thereby preventing mutual interference therebetween. This will be described in more detail later.

[0097] Figure 3A It is along Figure 2B A cross-sectional view taken along line II′, and Figure 3B It is along Figure 2B For the sake of simplicity and convenience of description, Figure 3A and Figure 3B 2 shows a state in which the display unit 210 and the input sensing unit 220 of the electronic panel 200 are coupled to each other. Figure 3A and Figure 3BDescribe the embodiments of the present invention. Figures 1A to 2B The same components described will be denoted by the same reference numerals or symbols, and description of these components will be omitted.

[0098] Figure 3A and Figure 3B The area in which the non-bending portion NBR and the bending portion BR are connected to each other is shown. The electronic panel 200 may include a plurality of insulating layers 11, 12, 13, 14, 15, 16, 17, and 18 disposed between the base substrate 10 and the sensing insulating layer 20 and an encapsulation layer ECL. A thin film transistor TR and a light emitting element ED connected to each other may be disposed on the base substrate 10. The thin film transistor TR may be connected to Figure 2B The second thin film transistor TR2 shown in FIG.

[0099] The thin film transistor TR may include a semiconductor layer AL, a control electrode CE, an input electrode IE, and an output electrode OE. The semiconductor layer AL may include a semiconductor material. The first insulating layer 11 may be disposed on the base substrate 10, and the semiconductor layer AL may be disposed between the first insulating layer 11 and the second insulating layer 12. The first insulating layer 11 may include an inorganic layer. The first insulating layer 11 may include a barrier layer, a buffer layer, or a combination thereof.

[0100] The control electrode CE may be disposed between the second insulating layer 12 and the third insulating layer 13. The second insulating layer 12 may be disposed on the first insulating layer 11, and the control electrode CE may be spaced apart from the semiconductor layer AL, and the second insulating layer 12 is interposed between the control electrode CE and the semiconductor layer AL. The fourth insulating layer 14 and the fifth insulating layer 15 may be sequentially stacked on the third insulating layer 13, and the input electrode IE and the output electrode OE may be disposed between the fourth insulating layer 14 and the fifth insulating layer 15. The input electrode IE and the output electrode OE may penetrate the second insulating layer 12, the third insulating layer 13, and the fourth insulating layer 14 to be connected to corresponding portions of the semiconductor layer AL, respectively.

[0101] In the present embodiment, the electronic panel 200 may further include an upper electrode UE disposed between the third insulating layer 13 and the fourth insulating layer 14. The upper electrode UE may be spaced apart from the control electrode CE, and the third insulating layer 13 is interposed between the upper electrode UE and the control electrode CE. The function of the upper electrode UE may be determined according to an electrical signal applied to the upper electrode UE. For example, the upper electrode UE may be provided with the same electrical signal as the control electrode CE. In this case, the thin film transistor TR may have a dual gate structure including an upper electrode UE and a control electrode CE. Alternatively, for another example, the upper electrode UE and the control electrode CE may be provided with different electrical signals. In this case, the upper electrode UE and the control electrode CE may be used as a capacitor to form a predetermined electric field. However, the embodiments of the present inventive concept are not limited thereto. In another embodiment, the upper electrode UE may be omitted.

[0102] On the other hand, in the present embodiment, portions of the insulating layers 11, 12, 13, 14, and 15 included in the bent portion BR may be removed. For example, portions of the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, the fourth insulating layer 14, and the fifth insulating layer 15 may be removed to form an opening region OP-B in the bent portion BR. The sixth insulating layer 16 may fill the opening region OP-B. The sixth insulating layer 16 may include an organic material. According to the present embodiment, the opening region OP-B may be formed in the bent portion BR and may be filled with the sixth insulating layer 16 having high flexibility, and thus the bending stress applied to the bent portion BR may be relaxed and the reliability of the electronic panel 200 may be improved.

[0103] In the present embodiment, the light emitting element ED may be disposed on the thin film transistor TR. The sixth insulating layer 16 and the seventh insulating layer 17 stacked in sequence may be disposed between the thin film transistor TR and the light emitting element ED. In the present embodiment, the electronic panel 200 may further include a connecting electrode CNE disposed between the sixth insulating layer 16 and the seventh insulating layer 17. The connecting electrode CNE may penetrate the fifth insulating layer 15 and the sixth insulating layer 16 to be connected to the output electrode OE of the thin film transistor TR. The first electrode E1 of the light emitting element ED may penetrate the seventh insulating layer 17 to be electrically connected to the output electrode OE through the connecting electrode CNE. According to an embodiment of the inventive concept, the electronic panel 200 may further include a connecting electrode CNE, and thus the contact resistance between the light emitting element ED and the thin film transistor TR may be reduced and the reliability of the electrical connection may be improved. However, the inventive concept is not limited thereto. In another embodiment, the connecting electrode CNE may be omitted.

[0104] The light emitting element ED may include a first electrode E1, an emission layer EL, and a second electrode E2. The first electrode E1 may be connected to the thin film transistor TR as described above, and thus the first electrode E1 may receive an electrical signal from the thin film transistor TR. The second electrode E2 may be connected to a power terminal (not shown). The emission layer EL may be disposed in an opening defined in the eighth insulating layer 18. The emission layer EL may emit light in response to a potential difference between the first electrode E1 and the second electrode E2.

[0105] The encapsulation layer ECL may include a first inorganic layer IOL1, a second inorganic layer IOL2, and an organic layer OL. The first inorganic layer IOL1 may cover the light emitting element ED. The organic layer OL may be disposed between the first inorganic layer IOL1 and the second inorganic layer IOL2. The organic layer OL may have a flat top surface, and the second inorganic layer IOL2 is disposed on the flat top surface. The second inorganic layer IOL2 may cover the organic layer OL. A portion of the first inorganic layer IOL1 may be exposed from the organic layer OL and may be in direct contact with the second inorganic layer IOL2.

[0106] In an embodiment, the sensing electrode SS may be disposed on the encapsulation layer ECL. The sensing electrode SS may include a first sensing layer TL1 and a second sensing layer TL2. The first sensing layer TL1 may be disposed between the encapsulation layer ECL and the sensing insulating layer 20. The second sensing layer TL2 may be disposed on the sensing insulating layer 20. In the present embodiment, the first sensing layer TL1 may be a bridge pattern connected to the second sensing layer TL2. However, embodiments of the inventive concept are not limited thereto.

[0107] The power pattern PP may be disposed between the fourth insulating layer 14 and the fifth insulating layer 15. In this embodiment, the power pattern PP may be disposed on the same layer as the input electrode IE and the output electrode OE. Therefore, the power pattern PP may be formed simultaneously with the input electrode IE and the output electrode OE in the same process.

[0108] The sensing pad PDT may be disposed on the power pattern PP. When viewed in a plan view, the sensing pad PDT may overlap the power pattern PP. In the present embodiment, the sensing pad PDT and the power pattern PP may be disposed on different layers. For example, the sensing pad PDT may be disposed between the sixth insulating layer 16 and the seventh insulating layer 17. The sensing electrode SS may receive an electrical signal from the outside through the sensing pad PDT.

[0109] An opening region OP-T may be formed in the seventh insulating layer 17 to expose the sensing pad PDT. The sensing pad PDT may be connected to other components through the opening region OP-T.

[0110] The sensing signal line SL-T may connect the sensing electrode SS to the sensing pad PDT, and may be the sensing lines SL1 and SL2 (see Figure 2B). Alternatively, the sensing signal line SL-T may be another conductive line different from the sensing lines SL1 and SL2. In this case, the sensing signal line SL-T may be connected to one of the sensing lines SL1 and SL2 through a contact hole, or may be directly connected to one of the sensing lines SL1 and SL2, and thus the sensing signal line SL-T may connect the sensing pad PDT to one of the sensing lines SL1 and SL2.

[0111] The power pad PDP may be disposed in the bent portion BR. The power pad PDP may be disposed between the fourth insulating layer 14 and the fifth insulating layer 15. In other words, in the present embodiment, the power pad PDP and the power pattern PP may be disposed on the same layer. The power pad PDP may be exposed to the outside through the opening area OP-P1 formed in the fifth insulating layer 15, the sixth insulating layer 16, and the seventh insulating layer 17.

[0112] The power pattern PP and the power pad PDP may be connected to each other by a power bridge line BRL 1. The power bridge line BRL 1 may connect the power pattern PP disposed in the non-bending portion NBR to the power pad PDP disposed in the bending portion BR via the opening area OP-B.

[0113] The power bridge line BRL1 may include a material having higher flexibility or softness than the power pattern PP or the power pad PDP. Therefore, the reliability of the power bridge line BRL1 against bending stress may be improved. However, embodiments of the inventive concept are not limited thereto. In another embodiment, the power bridge line BRL1 may include the same material as the power pattern PP or the power pad PDP.

[0114] In the present embodiment, the power bridge line BRL1 may be disposed on the fourth insulating layer 14. The power bridge line BRL1 may penetrate the fourth insulating layer 14 to be connected to the power signal line SL-P. The power signal line SL-P may be disposed on the same layer as the data signal line SL-D. The power pattern PP is connected to the power signal line SL-P by penetrating the fourth insulating layer 14. Therefore, the power bridge line BRL1 is connected to each of the power pattern PP and the power pad PDP. However, the embodiments of the inventive concept are not limited thereto, and in other embodiments, the power signal line SL-P may be omitted. In other embodiments, the power bridge line BRL1 may be disposed at one of various other positions for connecting the power pad PDP and the power pattern PP.

[0115] Reference Figure 3B, the data pad PDD may be disposed on the fourth insulating layer 14. In the present embodiment, the data pad PDD may be disposed on the same layer as the power pad PDP. Accordingly, the surface to which the first circuit board 310 is connected may be disposed on the same insulating layer, and thus the first circuit board 310 may be stably connected to the electronic panel 200. However, embodiments of the inventive concept are not limited thereto. In another embodiment, the data pad PDD and the power pad PDP may be disposed on different layers.

[0116] The data pad PDD may be connected to the data line DL of the non-bending portion NBR through the data bridge line BRL2 (see Figure 2B ). For the sake of simplicity and convenience of description, Figure 3B 1 and 2 show a connection pattern CNP and a data signal line SL-D. The connection pattern CNP may be disposed on the fourth insulating layer 14, wherein the input electrode IE and the output electrode OE are disposed on the fourth insulating layer 14. The connection pattern CNP may be a conductive pattern disposed on the same layer as the data line DL. The connection pattern CNP may connect the data line DL to the data signal line SL-D.

[0117] The data signal line SL-D may be disposed on a layer different from the layer on which the data line DL is disposed. When viewed in a plan view, the data signal line SL-D may overlap the power pattern PP. The data signal line SL-D may be connected to the data line DL through the connection pattern CNP, and may be connected to the data pad PDD through the data bridge line BRL2. According to an embodiment of the inventive concept, the electronic panel 200 may further include the data signal line SL-D, and thus may transmit a data signal different from the power signal to a region overlapping the power pattern PP.

[0118] The data bridge line BRL2 may include a material having higher flexibility or softness than the data signal line SL-D or the data pad PDD. Therefore, the reliability of the data bridge line BRL2 against bending stress may be improved. However, embodiments of the inventive concept are not limited thereto. In another embodiment, the data bridge line BRL2 may include the same material as the data signal line SL-D or the data pad PDD.

[0119] According to an embodiment of the inventive concept, a sensing pad PDT for supplying a voltage to a sensing electrode SS disposed on the encapsulation layer ECL may be disposed on a layer different from a layer on which a power pattern PP is disposed, and therefore, when viewed in a plan view, the power pattern PP and the sensing pad PDT may overlap each other. Therefore, it is possible to ensure that a space in which the power pattern PP is disposed is independent of a space in which the sensing pad PDT is disposed, and a short circuit therebetween may be prevented. Therefore, the reliability of the electronic panel 200 may be improved.

[0120] Figure 4 is an exploded perspective view showing an electronic device according to an embodiment of the inventive concept, and Figure 5 1 is a cross-sectional view showing a portion of an electronic device according to an embodiment of the present invention. Figure 4 and Figure 1A Corresponding, and Figure 5 Shown with Figure 3A Corresponding area. Figure 4 and Figure 5 Describe the embodiments of the present invention. Figures 1A to 3B The same components described will be denoted by the same reference numerals or symbols, and description of these components will be omitted.

[0121] The electronic device EA1 may include an electronic panel 201 and a circuit board 301. The electronic panel 201 may include a first pad area PA10 and a second pad area PA20.

[0122] The circuit board 301 may be connected to the electronic panel 201 through the first pad area PA10. The circuit board 301 may include a main board 311, an electronic device 312, and a sensing drive device 314. The main board 311 and the electronic device 312 may be connected to the electronic panel 201. Figure 1A The main board 311 and the electronic device 312 correspond to each other, and thus a detailed description thereof will be omitted. The sensing driving device 314 may provide a driving signal to the sensing electrode SS and / or may receive and process a sensing signal provided from the sensing electrode SS.

[0123] The sensing drive device 314 may be mounted on Figure 1A The second pad area PA20 may be connected to a separate circuit board.

[0124] The sensing pad PDT may be disposed in the non-bending portion NBR. The sensing pad PDT may be disposed on the power pattern PP. When viewed in a plan view, the sensing pad PDT may overlap the power pattern PP.

[0125] The electronic panel 201 may further include a bridge wire BRL-T (hereinafter referred to as a sensing bridge wire BRL-T) connecting the second pad area PA20 to the first pad area PA10. The sensing bridge wire BRL-T may connect the sensing pad PDT disposed in the second pad area PA20 to the main pad PD-T disposed in the first pad area PA10. In other words, in the present embodiment, the electronic panel 201 may further include a main pad PD-T disposed in the first pad area PA10.

[0126] The electronic panel 201 may transfer the electrical signal provided through the main pad PD-T to the sensing pad PDT through the sensing bridge line BRL-T. The sensing pad PDT may provide the transferred electrical signal to the sensing electrode SS to sense an external input.

[0127] The sensing bridge wire BRL-T may pass through the bent portion BR to be connected to the sensing pad PDT. The sensing bridge wire BRL-T may be disposed on a layer different from a layer on which the power pattern PP is disposed. In addition, even though not shown in the drawings, the sensing bridge wire BRL-T may also be disposed on a layer on which a power bridge wire BRL1 connected to the power pattern PP is disposed (see FIG. Figure 3A ) or a data bridge line BRL2 for transmitting a data voltage (see Figure 3B ) is on a layer different from the layer of the input sensing unit. Therefore, interference between electrical signals respectively provided to the display unit and the input sensing unit can be minimized.

[0128] The sensing bridge wire BRL-T may include a material having higher flexibility or softness than the sensing pad PDT or the main pad PD-T. Therefore, the reliability of the sensing bridge wire BRL-T against bending stress may be improved. However, the embodiments of the inventive concept are not limited thereto. In another embodiment, the sensing bridge wire BRL-T may include the same material as the sensing pad PDT or the main pad PD-T.

[0129] According to an embodiment of the inventive concept, a portion of the circuit board 301 configured to provide an electrical signal to the sensing electrode SS may also be connected to the first pad area PA10 due to the sensing bridge line BRL-T. Figure 2B ), data pad PDD (see Figure 2B ) and the main pads PD-T may be disposed in one pad area (ie, the first pad area PA10), and thus an additional component such as the second circuit board 320 may be omitted. Therefore, the production cost may be reduced.

[0130] Figure 6 1 is a cross-sectional view showing a portion of an electronic panel according to an embodiment of the present invention. Figure 6 Shown with Figure 5 Corresponding area. Figure 6 Describe the embodiments of the present invention. Figures 1A to 5 The same components described will be denoted by the same reference numerals or symbols, and description of these components will be omitted.

[0131] like Figure 6As shown in , the electronic panel 202 may include a sensing bridge wire BRL-T1, and the sensing bridge wire BRL-T1 includes a plurality of wires. The sensing bridge wire BRL-T1 may include a first wire BRL-TA and a second wire BRL-TB. The first wire BRL-TA and the second wire BRL-TB may be connected to the main pad PD-T and the sensing pad PDT through a bent portion BR. In the present embodiment, the main pad PD-T may be a part of the second wire BRL-TB. However, the embodiments of the inventive concept are not limited thereto. In another embodiment, the main pad PD-T may be set as a separate pattern.

[0132] A stress relaxation layer SNL may be further provided between the first wire BRL-TA and the second wire BRL-TB. The stress relaxation layer SNL may include an organic material. For example, the stress relaxation layer SNL may include the same material as at least one of the sixth insulating layer 16 or the seventh insulating layer 17. For another example, the stress relaxation layer SNL may include a material having higher flexibility or softness than the sixth insulating layer 16 and the seventh insulating layer 17. The stress relaxation layer SNL may have a single-layer structure or a multi-layer structure including a plurality of layers.

[0133] The first line BRL-TA may extend to the sensing pad PDT via the bent portion BR on the stress relaxation layer SNL. The second line BRL-TB may extend to the sensing pad PDT via the bent portion BR under the stress relaxation layer SNL. A portion of the second line BRL-TB may be disposed on the same layer as the power pattern PP. Referring to region XX, the first line BRL-TA, the second line BRL-TB, and the sensing pad PDT may be in direct contact with each other.

[0134] According to an embodiment of the inventive concept, the sensing bridge wire BRL-T1 extending through the bent portion BR may have a double-wire structure, and thus the sensing bridge wire BRL-T1 may be prevented from being damaged by bending stress. In addition, even if one of the first wire BRL-TA and the second wire BRL-TB is damaged by bending stress, the other of the first wire BRL-TA and the second wire BRL-TB may continue to stably transmit an electrical signal.

[0135] Figure 7 1 is a cross-sectional view showing a portion of an electronic panel according to an embodiment of the present invention. Figure 7 Shown with Figure 5 Corresponding area. Figure 7 Describe the embodiments of the present invention. Figures 1A to 6 The same components described will be denoted by the same reference numerals or symbols, and description of these components will be omitted.

[0136] like Figure 7As shown in , in the electronic panel 203, the sensing pad PDT, the sensing bridge line BRL-T and the main pad PD-T may be formed as a single integral body on the same layer. An opening region may be formed in the seventh insulating layer 17, and the opening region exposes a portion of the conductive line disposed between the sixth insulating layer 16 and the seventh insulating layer 17. Therefore, the portion of the non-bending portion NBR exposed by the opening region may be defined as the sensing pad PDT, and the portion of the bending portion BR exposed by the opening region may be defined as the main pad PD-T.

[0137] At this time, the main pad PD-T and the sensing pad PDT may be formed on the same layer. Although not shown in the figure, a display pad (not shown) may be provided on the same layer as the main pad PD-T, and the display pad is different from the sensing pad PDT. Figure 3A 301 . Therefore, the step difference between the main pad PD-T and the display pad can be eliminated to prevent connection failure with the circuit board 301. However, the embodiments of the inventive concept are not limited thereto. In another embodiment, the display pad and the main pad PD-T may be disposed on different layers, and the step difference between the display pad and the main pad PD-T may be compensated by a connection member such as an anisotropic conductive film or solder particles.

[0138] According to an embodiment of the present invention, the sensing pad PDT, the sensing bridge line BRL-T and the main pad PD-T can be formed using a single conductive line, and thus the manufacturing process can be simplified and the processing cost can be reduced. However, the embodiment of the present invention is not limited thereto. In other embodiments, the stacking structure of the electronic panel 203 can be designed or modified differently.

[0139] FIG. 8A to FIG. 8C Schematically illustrates a plan view of an electronic panel according to some embodiments of the present invention. FIG. 8A to FIG. 8C The positional relationship between the power pattern and the sensing pad is schematically shown, and FIG. 8A to FIG. 8C Other components are omitted. FIG. 8A to FIG. 8C Describe some embodiments of the present invention. Figures 1A to 7 The same components described will be denoted by the same reference numerals or symbols, and description of these components will be omitted.

[0140] like Fig. 8A As shown in FIG. 2 , the electronic panel 200-1 may include a power pattern PP-1 and a sensing pad PDT-1 overlapping each other when viewed in a plan view. The second pad area PA2-1 in which the sensing pad PDT-1 is disposed may overlap the power pattern PP-1.

[0141] According to an embodiment of the inventive concept, the sensing pad PDT-1 may be disposed on the power pattern PP-1 and may overlap the power pattern PP-1, and therefore, the width D11 (hereinafter, referred to as the first width) of the second pad area PA2-1 in the first direction D1 may be equal to or less than the width D21 (hereinafter, referred to as the second width) of the power pattern PP-1 in the first direction D1. In addition, the position of the second pad area PA2-1 may be variously changed in the area defined by the second width D21.

[0142] Reference Figure 8B In the electronic panel 200-2, the second width D22 of the power pattern PP-2 may extend beyond the active area AA. The second width D22 of the power pattern PP-2 may be greater than Fig. 8A 2. According to an embodiment of the inventive concept, since the power pattern PP-2 is disposed on a layer different from the layer on which the sensing pad PDT-2 on which the second pad area PA2-2 is disposed, the position of the sensing pad PDT-2 may not affect the area in which the power pattern PP-2 is disposed. According to an embodiment of the inventive concept, the size, shape and / or width of the power pattern PP-2 may be variously designed regardless of the sensing pad PDT-2.

[0143] Reference Figure 8C In the electronic panel 200-3, the first width D13 of the second pad area PA2-3 may be greater than Fig. 8A The first width D11 shown in FIG. 1 and the second width D23 of the power pattern PP-3 may be equal to Fig. 8A When the number of sensing pads PDT-3 is equal to the second width D21 of the power pattern PP-1 shown in FIG. Fig. 8A When the number of sensing pads PDT-1 is increased, the distance between the sensing pads PDT-3 may increase due to the increase of the first width D13. Therefore, interference between the sensing pads PDT-3 may be reduced, and an electrical signal may be stably transmitted through each of the sensing pads PDT-3.

[0144] According to an embodiment of the inventive concept, the sensing pads PDT-1, PDT-2 or PDT-3 and the power patterns PP-1, PP-2 or PP-3 may be disposed on different layers, and thus interference therebetween may be minimized or prevented, and the sensing pads PDT-1, PDT-2 or PDT-3 and the power patterns PP-1, PP-2 or PP-3 may be designed independently of each other. Therefore, the reliability of the electronic panels 200-1, 200-2 and 200-3 may be improved.

[0145] According to an embodiment of the present invention, mutual interference between a power pattern and a sensing pad for transmitting / receiving an electrical signal for sensing an external input can be prevented. Therefore, the electrical reliability of the electronic panel can be improved. In addition, according to an embodiment of the present invention, the reliability of the sensing signal line against bending stress can be improved in an electronic panel whose portion is curved.

[0146] Although the inventive concept has been described with reference to exemplary embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the inventive concept. Therefore, it should be understood that the above embodiments are not restrictive, but illustrative. Therefore, the scope of the inventive concept will be determined by the broadest permissible interpretation of the appended claims and their equivalents, and should not be restricted or limited by the foregoing description.

Claims

1. Electronic devices, including: a base substrate, comprising an active area and a peripheral area adjacent to the active area; A plurality of pixels are arranged on the effective area; a plurality of power lines, each of the plurality of power lines connected to at least one of the pixels; a power pad disposed on the peripheral region and configured to receive a power voltage; a power pattern disposed on the peripheral area and connecting the power line to the power pad; A plurality of sensing electrodes are disposed on the pixels and on the active area; as well as a plurality of sensing pads disposed on the peripheral area and electrically connected to the sensing electrodes, The sensing pad is disposed on a layer different from a layer on which the power pattern is disposed to be electrically insulated from the power pattern, and the sensing pad overlaps the power pattern when viewed in a plan view.

2. The electronic device according to claim 1, wherein: Each of the pixels includes: a thin film transistor covered by an insulating layer and including a semiconductor layer, a control electrode spaced apart from the semiconductor layer, an input electrode connected to the semiconductor layer, and an output electrode disposed on the same layer as the input electrode and connected to the semiconductor layer; and a light emitting element disposed on the insulating layer and comprising a first electrode, a second electrode disposed on the first electrode, and an emission layer disposed between the first electrode and the second electrode, Wherein, when viewed in a cross-sectional view, the sensing pad is disposed between the light emitting element and the thin film transistor.

3. The electronic device according to claim 2, wherein: The power pattern is provided on the same layer as the output electrode.

4. The electronic device according to claim 3, wherein: The insulating layer comprises: A first layer, disposed between the first electrode and the output electrode and covering the output electrode; a second layer disposed on the first layer; and a third layer disposed on the second layer, and the first electrode disposed on the third layer, Wherein, the power pattern is covered by the first layer.

5. The electronic device according to claim 4, wherein: The sensing pad is disposed between the second layer and the third layer.

6. The electronic device according to claim 4, further comprising: a connecting electrode, arranged between the second layer and the third layer, The first electrode penetrates the third layer to be connected to the connection electrode, and the connection electrode penetrates the first layer and the second layer to be connected to the output electrode.

7. The electronic device according to claim 2, wherein: The light emitting element includes an organic light emitting element or a quantum dot light emitting element.

8. The electronic device according to claim 1, further comprising: a first circuit board connected to the power pad; as well as A second circuit board is connected to the sensing pad, Wherein, the sensing electrode receives an electrical signal through the second circuit board.

9. The electronic device according to claim 1, wherein: The base substrate comprises: a bending portion that bends about a bending axis extending in one direction; and a non-bending portion connected to the bending portion, wherein the power pattern and the sensing pad are disposed on the non-bending portion, and Wherein, the power pad is arranged on the bent portion.

10. The electronic device according to claim 9, further comprising: A main pad, disposed on the bent portion; as well as A bridge line extends in a direction intersecting the bending axis to connect the main pad to the sensing pad.

11. The electronic device according to claim 10, wherein: The bridge line is in direct contact with the sensing pad.

12. The electronic device according to claim 10, wherein: The bridge line comprises: a first line connecting the main pad to the sensing pad; and a second line connecting the main pad to the sensing pad and including a portion spaced apart from the first line in a cross-sectional view, The first line, the second line and the sensing pad are in direct contact with each other.

13. The electronic device according to claim 12, further comprising: an organic layer disposed on the bent portion, The organic layer is disposed between the first line and the second line.

14. The electronic device according to claim 10, further comprising: a circuit board connected to the main pad and the power pad, Wherein, the sensing electrode receives an electrical signal through the circuit board.

15. Electronic devices, including: An electronic panel including a bent portion bent about a bending axis extending in one direction and a non-bent portion connected to the bent portion; as well as a circuit board connected to the electronic panel, Wherein, the electronic panel comprises: a plurality of pixels disposed in the non-bent portion; a sensing electrode disposed in the non-bending portion and overlapping the pixel when viewed in a plan view; a data pad disposed in the bent portion and connected to the circuit board; a power pad disposed in the bent portion and connected to the circuit board; a power pattern disposed in the non-bending portion and connecting the power pad to the pixel; and a sensing pad disposed in the non-bending portion and connected to the sensing electrode, The sensing pad is disposed on a layer different from a layer on which the power pattern is disposed to be electrically insulated from the power pattern, and the sensing pad overlaps the power pattern when viewed in a plan view.

16. The electronic device according to claim 15, wherein: The circuit board comprises: a first circuit board connected to the data pad and the power pad; and A second circuit board is connected to the sensing pad, Wherein, the sensing electrode receives an electrical signal through the second circuit board.

17. The electronic device according to claim 15, further comprising: a main pad disposed in the bent portion and connected to the circuit board; as well as a bridge line extending in a direction intersecting the bending axis to connect the main pad to the sensing pad, Wherein, the sensing electrode receives an electrical signal through the circuit board.

18. The electronic device according to claim 17, further comprising: a stress relaxation layer disposed in the bent portion and comprising an organic material, The bridge line includes a first line and a second line, and when viewed in a cross-sectional view, the first line and the second line are spaced apart from each other and the stress relaxation layer is interposed between the first line and the second line.

19. The electronic device according to claim 18, wherein: When viewed in a cross-sectional view, the sensing pad, the first line, and the second line are stacked.

20. The electronic device according to claim 18, wherein: The first line is disposed on the second line, and At least a portion of the second line is disposed on the same layer as the power pattern.

21. The electronic device according to claim 15, further comprising: an encapsulation layer disposed between the pixel and the sensing electrode and including at least one of an organic layer and an inorganic layer, Wherein, the sensing electrode is directly arranged on the packaging layer.

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