Drivers for switching Gallium Nitride (GaN) devices
By using a high-side charging circuit in GaN e-HEMT device driver and using a low-side power supply to charge the high-side power supply, the overcharge problem caused by the reverse current characteristics of GaN e-HEMT devices in high voltage and high frequency applications is solved. Achieve power management without additional costs and timing optimization.
Patent Information
- Application Number
- CN201910700081.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-08-01
- Filing Date
- 2019-07-31
- Publication Date
- 2025-01-10
- Estimated Expiration
- 2039-07-31
AI Technical Summary
GaN e-HEMT devices have narrow gate-source voltage range and reverse current characteristics in high voltage and high frequency applications, resulting in inappropriate switching voltages during dead-band switching, which may lead to overloading of high-side GaN e-HEMT devices. For charging and damage, the prior art requires additional regulation circuits or diodes to avoid damage.
Using a high-side charging circuit, when the low-side driver activates the low-side GaN device, the high-side power supply is used to charge the high-side power supply. By connecting the bootstrap diode to the low-side GaN e-HEMT gate, reusing the gate pull-up pMOS As a blocking switch, the synchronization of low-side on and bootstrap capacitor recharge paths is optimized to avoid bootstrap overcharging.
Eliminates additional pins and silicon costs, and the optimal timing between low-side switch-on and bootstrap capacitor recharge path is achieved, avoids overcharging of high-side power supplies, and protects GaN e-HEMT devices.
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Figure CN110798053B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to circuits for driving gallium nitride (GaN) devices, particularly GaN devices in half-bridge switching applications. Background Art
[0002] Gallium nitride (GaN) devices have desirable properties that make them more suitable than metal oxide semiconductor field effect transistors (MOSFETs) in half-bridge switching applications, especially when high frequency and high efficiency are required. For example, compared with MOSFETs, GaN devices can have faster switching speeds and / or smaller packages. Moreover, GaN devices can omit parasitic body diodes, which do not generate reverse recovery losses. Further, GaN devices can conduct in reverse. As a result, GaN devices can omit external anti-parallel diodes. Summary of the invention
[0003] In general, the present disclosure relates to a driver for a gallium nitride (GaN) device having a high-side power supply that is charged using a low-side power supply. For example, the driver can be adapted to charge the high-side power supply using the low-side power supply when the low-side driver activates the low-side GaN device. In this way, the driver can charge the high-side power supply to a desired floating voltage without having to rely on additional components for post-regulating or clamping the voltage output by the high-side power supply.
[0004] In one example, an apparatus for switching a GaN device includes a high-side driver adapted to control the high-side GaN device using a high-side power supply; a low-side driver adapted to control the low-side GaN device using a low-side power supply; and a high-side charging circuit adapted to charge the high-side power supply using the low-side power supply when the low-side driver activates the low-side GaN device.
[0005] In another example, a method for driving a GaN device includes: using a high-side power supply to control the high-side GaN device; using a low-side power supply to control the low-side GaN device; and when the low-side driver activates the low-side GaN device, using the low-side power supply to charge the high-side power supply.
[0006] In another example, a system for controlling a power converter includes: a high-side GaN device; a low-side GaN device; a high-side driver adapted to control the high-side GaN device using a high-side power supply; a low-side driver adapted to control the low-side GaN device using a low-side power supply; and a high-side charging circuit adapted to charge the high-side power supply using the low-side power supply when the low-side driver activates the low-side GaN device.
[0007] The details of these and other examples are set forth in the drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 is a block diagram illustrating a driver for a gallium nitride (GaN) device having a high-side power supply charged from a low-side power supply in accordance with one or more techniques of this disclosure.
[0009] Figure 2 is a diagram illustrating one or more techniques according to the present disclosure Figure 1 A circuit diagram of a first example of a driver.
[0010] Figure 3 is a diagram illustrating one or more techniques according to the present disclosure Figure 1 A circuit diagram of a second example of a driver.
[0011] Figure 4 is a diagram illustrating one or more techniques according to the present disclosure Figure 1 A circuit diagram of a third example of a driver.
[0012] Figure 5 is a diagram illustrating one or more techniques according to the present disclosure Figure 1 A circuit diagram of a fourth example of a driver.
[0013] Figure 6 According to one or more techniques of the present disclosure Figure 1 A first illustration of the performance of the drive.
[0014] Figure 7 According to one or more techniques of the present disclosure Figure 1 A second illustration of the performance of the drive.
[0015] Figure 8 According to one or more techniques of the present disclosure Figure 1 A third illustration of the performance of the drive.
[0016] Fig. 9 is a flow chart of a method for driving a GaN device according to one or more techniques of this disclosure. DETAILED DESCRIPTION
[0017] The difficulty in driving gallium nitride (GaN) enhancement mode high electron mobility transistors (e-HEMTs) is that the gate voltage range of GaN e-HEMTs is narrow (typically -4V / +6V) compared to metal oxide semiconductor field effect transistors (MOSFETs). Another characteristic of GaN e-HEMTs is the gate-source voltage “V GS ” is less than zero (for example, VGS ≤0V) is “diode-like” and is generated when the gate voltage relative to the drain exceeds the voltage threshold “V th ” is established. The source-drain voltage “V SD An example of " is shown below.
[0018] V SD =V SG +V GD =-V GS +V th +I*R rev_ON (Equation 1) Among them, "V SG ” is the source-gate voltage, “V GD ” is the gate-drain voltage, “I” is the current at the GaN e-HEMT, and “Rrev_ON” is the resistance of the GaN e-HEMT.
[0019] Assuming the voltage threshold "V th ” is in the range of 1.5V-2V, then the source-drain voltage “V SD ” is usually higher than the voltage threshold of silicon power MOSFETs. For high voltage and high dV / dt kW applications, GaN e-HEMTs may utilize negative gate-source voltages “V GS ” is turned off, thereby further increasing the source-drain voltage “V SD ”.
[0020] In applications using low-side freewheeling, such as but not limited to half-bridge switching applications using a high-side GaN e-HEMT device and a low-side GaNe-HEMT device, this GaN e-HEMT characteristic may be undesirable. H "When turned off, the positive inductor current is forced to flow on the low side, which goes into reverse conduction. This causes the switch node voltage to be equal to the low-side GaN e-HEMT during the dead-time switching" T L ” Source-drain voltage “V DS In a bootstrap capacitor based high-side driver, a negative voltage at the switch node (e.g., the high-side driver is floating to ground) may overcharge the bootstrap capacitor to a value higher than the GaN source-drain voltage “V GS ” maximum rating, which may cause damage to the high-side GaN e-HEMT device.
[0021] In some systems, an additional post-regulation circuit is used to regulate the bootstrap voltage to avoid damaging the GaN e-HEMT while preserving the drive capability. In other systems, an additional external (or internal) Zener diode (plus resistor) is used to clamp the bootstrap voltage to avoid damaging the GaN e-HEMT while preserving the drive capability. In other systems, an additional series switch with its body diode connected back-to-back to the bootstrap diode is used to cut off the recharging path when the low-side GaN e-HEMT device is turned off (e.g., operating in an open circuit state).
[0022] According to one or more techniques described herein, a driver may include a high-side charging circuit adapted to charge a high-side power supply from a low-side power supply when a low-side driver activates a low-side GaN device. For example, the driver may be adapted to connect a bootstrap diode to a low-side GaN e-HEMT gate, thereby reusing an already existing gate pull-up pMOS as a blocking switch, optimizing synchronization between low-side GaN e-HEMT turn-on and activation of a bootstrap capacitor recharge path, thereby protecting the application from bootstrap overcharging without additional pins and silicon cost. Some advantages of including such a high-side charging circuit may include, but are not limited to, for example, optimal timing between low-side turn-on and activation of a bootstrap capacitor recharge path, no additional external or internal components, and no additional driver pins.
[0023] Figure 1 is a block diagram illustrating a driver for a GaN device with a high-side power supply charged from a low-side power supply in accordance with one or more techniques of this disclosure. Figure 1 A system 100 is shown, which includes a low-side power supply 102, a low-side driver 104, a low-side GaN device 106, a high-side charging circuit 110, a high-side power supply 112, a high-side driver 114, a high-side GaN device 116, and a converter element 124. The system 100 may include other components in addition to those shown. In some examples, the system 100 can be implemented as a single or multiple integrated circuit (IC) packages.
[0024] The low-side power supply 102 can be configured to provide power to one or more other components of the system 100. For example, the low-side power supply 102 can be configured to supply charge at the gate of the low-side GaN device 106. In some examples, the low-side power supply 102 can be the output of a power converter, a power inverter, a regulator, or other power conversion circuit. For example, the low-side power supply 102 can be the output of a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, a linear regulator, or other power conversion circuit.
[0025] The low-side driver 104 may be adapted to control the low-side GaN device 106 using the low-side power supply 102. For example, the low-side driver 104 may include a switching element that couples the gate of the low-side GaN device 106 to the positive terminal of the low-side power supply 102 or the negative terminal (e.g., ground) of the low-side power supply 102. Examples of switching elements may include, but are not limited to, junction field effect transistors (JFETs), metal oxide semiconductor field effect transistors (MOSFETs), dual-gate MOSFETs, insulated gate bipolar transistors (IGBTs), any other type of FET, or any combination of switching elements. Examples of MOSFETs may include, but are not limited to, p-channel MOSFETs (pMOS), n-channel MOSFETs (nMOS), double diffused MOSFETs (DMOS), or any other type of MOSFETs, or any combination thereof. In some examples, the switching element may include a high electron mobility transistor, a GaN-based transistor, or another switching element. Other materials may also be used to implement the switching element.
[0026] The low-side driver 104 may include a low-side drive circuit that is suitable for selectively driving a switching element to couple the gate of the low-side GaN device 106 to the positive terminal of the low-side power supply 102 or the negative terminal of the low-side power supply 102 (e.g., ground). The low-side drive circuit may include a modulation (e.g., pulse width modulation) controller. For example, the low-side drive circuit may output a high signal (e.g., logic '1') to the switching element during a first portion of a pulse width modulation cycle so that the switching element couples the gate of the low-side GaN device to the positive terminal of the low-side power supply 102. In this example, the low-side drive circuit may output a low signal (e.g., logic '0') to the switching element during a second portion of the pulse width modulation cycle so that the switching element couples the gate of the low-side GaN device 106 to the negative terminal of the low-side power supply 102. In some examples, the low-side drive circuit may output one or more dead time signals to the switching element during a third portion of the pulse width modulation cycle so that the switching element decouples the gate of the low-side GaN device 106 from the low-side power supply 102.
[0027] The low-side drive circuit can include any suitable arrangement of hardware, software, firmware or any combination thereof. The low-side drive circuit can include any one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or any other equivalent integrated or discrete logic circuits and any combination of these components. When the low-side drive circuit includes software or firmware, the low-side drive circuit can also include any necessary hardware for storing and executing the software or firmware, such as one or more memories and one or more processors or processing units. Generally speaking, the processing unit can include one or more microprocessors, DSPs, ASICs, FPGAs or any other equivalent integrated or discrete logic circuits and any combination of these components.
[0028] The high-side power supply 112 may be adapted to provide power to one or more other components of the system 100. For example, the high-side power supply 112 may be adapted to supply charge at the gate of the high-side GaN device 116. In some examples, the high-side power supply 112 may be floating. For example, the high-side power supply 112 may have a negative terminal having a voltage different from the ground of the system 100 (e.g., the negative terminal of the low-side power supply 102). In some examples, the high-side power supply 112 includes a capacitor. The capacitor may include an electrical component adapted to store electrical energy in an electric field. Examples of electrical components configured to store electrical energy in an electric field may include, but are not limited to, ceramic capacitors, film capacitors, electrolytic capacitors (e.g., aluminum, tantalum, niobium, etc.), supercapacitors (e.g., double-layer, pseudocapacitors, hybrid capacitors), mica capacitors, or other capacitors. Although the examples of the present disclosure may refer to the capacitor as a single capacitor, in some examples, the capacitor may be an array of capacitive elements. In some instances, the high-side power supply 112 may include a capacitor formed by an array of capacitive elements coupled in parallel and / or in series. In some instances, each capacitive element may be a discrete component, while in other instances, each capacitive element may be contained within a single package (eg, a capacitor array).
[0029] The high-side driver 114 may include a high-side drive circuit that is suitable for selectively driving a switching element to couple the gate of the high-side GaN device 116 to the positive terminal of the high-side power supply 112 or the negative terminal of the high-side power supply 112. The high-side drive circuit may include a modulation (e.g., pulse width modulation) controller. For example, the high-side drive circuit may output a high signal (e.g., logic '1') to the switching element during a first portion of a pulse width modulation cycle so that the switching element couples the gate of the high-side GaN device 116 to the positive terminal of the high-side power supply 112. In this example, the high-side drive circuit may output a low signal (e.g., logic '0') to the switching element during a second portion of the pulse width modulation cycle so that the switching element couples the gate of the high-side GaN device 116 to the negative terminal of the high-side power supply 112. In some examples, the high-side drive circuit may output one or more dead time signals to the switching element during a third portion of the pulse width modulation cycle so that the switching element decouples the gate of the high-side GaN device 116 from the high-side power supply 112.
[0030] The high-side driver circuit may include any suitable arrangement of hardware, software, firmware, or any combination thereof. The high-side driver circuit may include any one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuits, and any combination of these components. When the high-side driver circuit includes software or firmware, the low-side driver circuit may also include any necessary hardware for storing and executing the software or firmware, such as one or more memories and one or more processors or processing units.
[0031] The high-side charging circuit 110 can be adapted to charge the high-side power supply 112 using the low-side power supply 102 when the low-side driver 104 activates the low-side GaN device 106. In some examples, the high-side charging circuit 110 can be adapted to prevent current from flowing from the high-side power supply 112 to the low-side driver 104 and permit current to flow from the low-side driver 104 to the high-side power supply 112. For example, the high-side charging circuit 110 can be configured to generate a channel that electronically couples the low-side power supply 102 to the high-side power supply 112 when the low-side driver 104 activates the low-side GaN device 106. For example, the high-side charging circuit can be coupled to the output of the low-side driver 104 and / or the gate of the low-side GaN device 106. In some examples, the high-side charging circuit 110 can include a diode that prevents current from flowing from the high-side power supply 112 to the low-side power supply 102 and permits current to flow from the low-side power supply 102 to the high-side power supply 112. In some examples, the high-side charging circuit 110 can include a switch that is selectively activated to prevent current from flowing from the high-side power supply 112 to the low-side power supply 102 and to permit current to flow from the low-side power supply 102 to the high-side power supply 112 .
[0032] The converter element 124 may be adapted to provide a target voltage, current, or power at a load. The converter element 124 may include, for example, one or more of a capacitor, an inductor, a resistor, a transformer, a sensor, or another converter element. In some examples, the load is coupled to the converter element 124, which is configured to receive a target voltage, current, or power output by the converter element 124.
[0033] As opposed to relying on dedicated circuitry for regulating the voltage at the high-side power supply 112, the high-side charging circuit 110 is adapted to utilize the low-side power supply 102 to charge the high-side power supply 112 when the low-side driver 104 activates the low-side GaN device 106. For example, when the low-side driver 104 couples the gate of the low-side GaN device 106 to the positive terminal of the low-side driver 104, the high-side charging circuit 110 may couple the positive terminal of the high-side power supply 112 to the positive terminal of the low-side driver 104. In this example, the low-side GaN device 106 forms a channel coupling the negative terminal of the low-side power supply 102 and the high-side power supply 112, such that the low-side power supply 102 charges the high-side power supply 112. For example, the low-side GaN device 106 forms a channel coupling the negative terminal of the low-side power supply 102 and the high-side power supply 112, such that the high-side power supply 112 charges the capacitor of the high-side power supply 112.
[0034] Figure 2 is a diagram illustrating one or more techniques according to the present disclosure Figure 1200 includes a low-side power supply 202, a low-side driver 204, a low-side GaN device 206, a high-side charging circuit 210, a high-side power supply 212, a high-side driver 214, a high-side GaN device 216, and a converter element 224. System 200 may include additional components in addition to the components shown. In some examples, system 200 may be implemented as a single or multiple IC packages. Low-side power supply 202, low-side driver 204, and low-side GaN device 206 may be examples of low-side power supply 102, low-side driver 104, and low-side GaN device 106, respectively. High-side power supply 212, high-side driver 214, and high-side GaN device 216 are examples of high-side power supply 112, high-side driver 114, and high-side GaN device 116, respectively. As shown, high-side power supply 212 may include a capacitive element (e.g., a capacitor). The high-side charging circuit 210 is an example of the high-side charging circuit 110, and the converter element 224 is an example of the converter element 124. For example, the converter element 224 may include an inductor. Figure 1 In the context of Figure 2 Described.
[0035] As shown, the high-side GaN device 216 includes a control node coupled to the high-side driver 214, a first node coupled to the positive terminal 215 of the power converter power supply, and a second node coupled to one or more converter elements 224 for the power converter, which is suitable for receiving power from the power converter power supply and outputting a regulated voltage or a regulated current. In this example, the low-side GaN device 206 includes a control node coupled to the low-side driver 204, a first node coupled to one or more converter elements 224, and a second node coupled to the negative terminal 217 of the power converter power supply. The power converter power supply can be the output of a linear regulator, a power converter, a power inverter, or another regulated power supply. For example, the power converter power supply can be a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, or another regulated power supply. The power converter power supply can include a battery, which can be configured to store electrical energy. Examples of batteries can include, but are not limited to, nickel-cadmium, lead acid, nickel metal hydride, nickel-zinc, silver oxide, lithium ion, lithium polymer, any other type of rechargeable battery, or any combination of batteries.
[0036] The low side power supply 202 includes a regulated power supply 230 coupled in parallel with a capacitor 232. The regulated power supply 230 can be the output of a linear regulator, a power converter, a power inverter or another regulated power supply. For example, the regulated power supply 230 can be a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter or the output of another regulated power supply. The regulated power supply 230 can include a battery, which can be configured to store electrical energy.
[0037] The low-side driver 204 includes a first low-side switch element 234, a second low-side switch element 236, and a low-side drive circuit 238. The first low-side switch element 234 includes a first node coupled to the positive terminal of the low-side power supply 202, a second node coupled to the control node of the low-side GaN device 206, and a control node. The second low-side switch element 236 includes a first node coupled to the control node of the low-side GaN device 206, a second node coupled to the negative terminal of the low-side power supply 202, and a control node. The control node of the first low-side switch element 234 and / or the control node of the second low-side switch element 236 can be coupled to the low-side drive circuit 238.
[0038] The low-side drive circuit 238 may be adapted to generate a first control signal at a control node of the first low-side switch element 234 so that the first low-side switch element 234 establishes a first low-side channel between the positive terminal of the low-side power supply 202 and the control node of the low-side GaN device 206 to activate the low-side GaN device 206. In some examples, the low-side drive circuit 238 may be adapted to generate a second control signal at a control node of the second low-side switch element 236 so that the second low-side switch element 236 establishes a second low-side channel between the negative terminal of the low-side power supply 202 and the control node of the low-side GaN device 206 to deactivate the low-side GaN device 206.
[0039] The high-side driver 214 includes a first high-side switch element 244, a second high-side switch element 246, and a high-side drive circuit 248. The first high-side switch element 244 includes a first node coupled to the positive terminal of the high-side power supply 212, a second node coupled to the control node of the high-side GaN device 216, and a control node. The second high-side switch element 246 includes a first node coupled to the control node of the high-side GaN device 216, a second node coupled to the negative terminal of the high-side power supply 212, and a control node. The control node of the first high-side switch element 244 and / or the control node of the second high-side switch element 246 can be coupled to the high-side drive circuit 248.
[0040] The high-side driving circuit 248 may be adapted to generate a first control signal at a control node of the first high-side switching element 244 to cause the first high-side switching element 244 to establish a first high-side channel between the positive terminal of the high-side power supply 212 and the control node of the high-side GaN device 216 to activate the high-side GaN device 216. In some examples, the high-side driving circuit 248 may be adapted to generate a second control signal at a control node of the second high-side switching element 246 to cause the second high-side switching element 246 to establish a second high-side channel between the negative terminal of the high-side power supply 212 and the control node of the high-side GaN device 216 to deactivate the high-side GaN device 216.
[0041] The high-side charging circuit 210 includes a diode 250. As illustrated, the diode 250 includes an anode coupled to the low-side driver 204 and a cathode coupled to the high-side power supply 212 to prevent current from flowing from the high-side power supply 212 to the low-side driver 204 and to permit current to flow from the low-side driver 204 to the high-side power supply 212.
[0042] As opposed to relying on dedicated circuitry for regulating the voltage at the high-side power supply 212, the high-side charging circuit 210 is adapted to utilize the low-side power supply 202 to charge the high-side power supply 212 when the low-side driver 204 activates the low-side GaN device 206. For example, when the low-side driver 204 couples the gate of the low-side GaN device 206 to the positive terminal of the low-side power supply 202, the diode 250 can couple the low-side driver 204 to the positive terminal of the high-side power supply 212. In this example, the low-side GaN device 206 forms a channel coupling the negative terminal of the low-side power supply 202 and the negative terminal of the high-side power supply 212, so that the low-side power supply 202 charges the high-side power supply 212. For example, the low-side GaN device 206 forms a channel coupling the negative terminal of the low-side power supply 202 and the negative terminal of the high-side power supply 212, so that the low-side power supply 202 charges the capacitor of the high-side power supply 212.
[0043] Figure 3 is a diagram illustrating one or more techniques according to the present disclosure Figure 1Circuit diagram of a second example of a driver. As illustrated, system 300 includes a low-side power supply 302, a low-side driver 304, a low-side GaN device 306, a high-side charging circuit 310, a high-side power supply 312, a high-side driver 314, a high-side GaN device 316, and a converter element 324, which can be substantially similar to low-side power supply 202, low-side driver 204, low-side GaN device 206, high-side charging circuit 210, high-side power supply 212, high-side driver 214, high-side GaN device 216, and converter element 224, respectively. Moreover, system 300 also includes a low-side discharge circuit 308 and a high-side discharge circuit 318. System 300 may include additional components in addition to the components shown. In some examples, system 300 may be implemented as a single or multiple IC packages. For exemplary purposes only, in Figure 1 In the context of Figure 3 Described.
[0044] The low-side discharge circuit 308 is adapted to reduce current flow from the low-side driver 304 to the low-side GaN device 306, and inhibit reduction of current flow from the low-side GaN device 306 to the low-side driver 304. The low-side discharge circuit 308 may include a resistor 352, a diode 354, and a resistor 356. As shown, a first side of the low-side discharge circuit 308 is coupled to the low-side driver 304, and a second side of the low-side discharge circuit 308 is coupled to the low-side GaN device 306. The first side of the low-side discharge circuit 308 is coupled to the cathode of the diode 354 and the first node of the resistor 352. The anode of the diode 354 is coupled to the first node of the resistor 356. The second side of the low-side discharge circuit 308 is coupled to the second node of the resistor 356 and the second side of the resistor 352.
[0045] The high-side discharge circuit 318 may be adapted to reduce current flow from the high-side driver 314 to the high-side GaN device 316, and inhibit reduction of current flow from the high-side GaN device 316 to the high-side driver 314. The high-side discharge circuit 318 may include a first resistor, a diode, and a second resistor arranged similarly to the low-side discharge circuit 308.
[0046] exist Figure 3In the example of , the high-side charging circuit 310 is adapted to charge the high-side power supply 312 using the low-side power supply 302 when the low-side driver 304 activates the low-side GaN device 306. For example, when the low-side driver 304 couples the gate of the low-side GaN device 306 to the positive terminal of the low-side power supply 302, the high-side charging circuit 310 may couple the gate of the low-side GaN device 306 to the positive terminal of the high-side power supply 312. In this example, the low-side GaN device 306 forms a channel coupling the negative terminal of the low-side power supply 302 and the negative terminal of the high-side power supply 312, so that the low-side power supply 302 charges the high-side power supply 312.
[0047] Figure 4 is a diagram illustrating one or more techniques according to the present disclosure Figure 1 Circuit diagram of a third example of a driver. As shown, system 400 includes a low-side power supply 402, a low-side driver 404, a low-side GaN device 406, a high-side power supply 412, a high-side driver 414, a high-side GaN device 416, and a converter element 424, which can be substantially similar to low-side power supply 202, low-side driver 204, low-side GaN device 206, high-side power supply 212, high-side driver 214, high-side GaN device 216, and converter element 224, respectively. System 400 also includes a high-side charging circuit 410. System 400 may include additional components in addition to those shown. In some examples, system 400 can be implemented as a single or multiple IC packages. For exemplary purposes only, Figure 1 In the context of Figure 4 Described.
[0048] The high-side charging circuit 410 includes a switching element 460 and an active switching circuit 462. The switching element 460 includes a first node coupled to the high-side power supply 412, and a second node coupled to the low-side driver 404 and / or the low-side GaN device 406. The active switching circuit 462 can be adapted to selectively activate the switching element 460 to prevent current from flowing from the high-side power supply 412 to the low-side driver 404 and to permit current to flow from the low-side driver 404 to the high-side power supply 412.
[0049] exist Figure 4In the example of , the high-side charging circuit 410 is adapted to charge the high-side power supply 412 using the low-side power supply 402 when the low-side driver 404 activates the low-side GaN device 406. For example, when the low-side driver 404 couples the gate of the low-side GaN device 406 to the positive terminal of the low-side power supply 402, the active switch circuit 462 drives the switch element 460 to couple the gate of the low-side GaN device 406 to the positive terminal of the high-side power supply 412. In this example, the low-side GaN device 406 forms a channel coupling the negative terminal of the low-side power supply 402 and the negative terminal of the high-side power supply 412, so that the low-side power supply 402 charges the high-side power supply 412.
[0050] Figure 5 is a diagram illustrating one or more techniques according to the present disclosure Figure 1 Circuit diagram of a fourth example of a driver. As shown, system 500 includes a low-side power supply 502, a low-side driver 504, a low-side GaN device 506, a high-side charging circuit 510, a high-side power supply 512, a high-side driver 514, a high-side GaN device 516, and a converter element 524, which can be substantially similar to low-side power supply 402, low-side driver 404, low-side GaN device 406, high-side charging circuit 410, high-side power supply 412, high-side driver 414, high-side GaN device 416, and converter element 424, respectively. Moreover, system 500 also includes a low-side discharge circuit 508 and a high-side discharge circuit 518. System 500 may include additional components in addition to those shown. In some examples, system 500 may be implemented as a single or multiple IC packages. For exemplary purposes only, in Figure 1 and Figure 4 In the context of Figure 5 Described.
[0051] The low-side discharge circuit 508 is adapted to reduce current flow from the low-side driver 504 to the low-side GaN device 506, and inhibit reduction of current flow from the low-side GaN device 506 to the low-side driver 504. The low-side discharge circuit 508 may include a resistor 552, a diode 554, and a resistor 556. As shown, a first side of the low-side discharge circuit 508 is coupled to the low-side driver 504, and a second side of the low-side discharge circuit 508 is coupled to the low-side GaN device 506. The first side of the low-side discharge circuit 508 is coupled to the cathode of the diode 554 and the first node of the resistor 552. The anode of the diode 554 is coupled to the first node of the resistor 556. The second side of the low-side discharge circuit 508 is coupled to the second node of the resistor 556 and the second side of the resistor 552.
[0052] The high-side discharge circuit 518 may be adapted to reduce current flow from the high-side driver 514 to the high-side GaN device 516, and inhibit reduction of current flow from the high-side GaN device 516 to the high-side driver 514. The high-side discharge circuit 518 may include a first resistor, a diode, and a second resistor arranged similarly to the low-side discharge circuit 508.
[0053] exist Figure 5 In the example of , the high-side charging circuit 510 is adapted to charge the high-side power supply 512 using the low-side power supply 502 when the low-side driver 504 activates the low-side GaN device 506. For example, when the low-side driver 504 couples the gate of the low-side GaN device 506 to the positive terminal of the low-side power supply 502, the high-side charging circuit 510 may couple the gate of the low-side GaN device 506 to the positive terminal of the high-side power supply 512. In this example, the low-side GaN device 506 forms a channel coupling the negative terminal of the low-side power supply 502 and the negative terminal of the high-side power supply 512, so that the low-side power supply 502 charges the high-side power supply 512.
[0054] Figure 6 According to one or more techniques of the present disclosure Figure 1 A first illustration of the performance of the drive. Figure 6 The horizontal axis (eg, horizontal) of represents time, and Figure 6 The vertical axis (e.g., vertical) represents the converter voltage (SWN) 602 at the input of the converter element 124, the high-side switch voltage (HX-SWN) 604 at the gate of the high-side GaN device 116, the low-side switch voltage (LX) 606 at the gate of the low-side GaN device 106, and the bootstrap voltage 608 (Bootstrap_Diode) at the high-side charging circuit 110.
[0055] As shown, the converter voltage 602 is negative during the dead time 610, for example, due to the freewheeling inductor current flowing. However, the bootstrap voltage 608 illustrates that the high-side charging circuit 110 prevents charging of the high-side power supply 112 during the dead time 610. In this way, the high-side charging circuit 110 can avoid overcharging the high-side power supply 112 in the presence of the low-side freewheeling inductor current flowing.
[0056] Figure 7 According to one or more techniques of the present disclosure Figure 1 A second illustration of the performance of the drive. Figure 7 The horizontal axis (eg, horizontal) of represents time, and Figure 7The vertical axis (e.g., vertical) of represents the inductor current 702 at the converter element 124, the converter voltage 704 at the input of the converter element 124, the high-side supply voltage 706 at the high-side power supply 112, the bootstrap voltage 708 at the high-side charging circuit 110, and the gate-source voltage 710 at the high-side GaN device 116. As shown, the high-side supply voltage 706 remains less than the maximum GaN voltage rating of 5 volts, resulting in the gate-source voltage 710 being less than the maximum GaN voltage rating. In this way, the techniques described herein can prevent overcharging of the high-side power supply 112 above the GaN source-gate voltage "V GS ” maximum ratings.
[0057] Figure 8 According to one or more techniques of the present disclosure Figure 1 A third illustration of the performance of the drive. Figure 8 The horizontal axis (eg, horizontal) of represents time, and Figure 8 The vertical axis (e.g., vertical) of represents the converter voltage 802 at the input of the converter element 124, the bootstrap voltage 804 at the high-side charging circuit 110, the low-side switch voltage 806 at the gate of the low-side GaN device 106, and the low-side drive voltage 808 output by the low-side driver 104. As illustrated, when the first low-side switch element 234 (e.g., pull-up pMOS) is turned off (e.g., deactivated), the body diode of the first low-side switch element 234 blocks the charging path from the low-side power supply 102 (e.g., VCC). When the first low-side switch element 234 (e.g., pull-up pMOS) is turned on (e.g., activated), the charging path is valid, but because the low-side GaN device 106 is turned on (e.g., activated), the converter voltage 802 is not in danger. In this way, even if there are additional external components on the gate drive path, the system 100 can help achieve the desired timing between the low-side turn-on of the low-side GaN device 106 and the activation of the bootstrap capacitor recharging path.
[0058] Fig. 9 is a flow chart of a method for driving a GaN device according to one or more techniques of the present disclosure. Figures 1 to 8 In the context of Fig. 9 106 (902). The high-side driver 114 uses the high-side power supply 112 to control the high-side GaN device 116 (904). When the low-side driver 104 activates the low-side GaN device 106, the high-side charging circuit 110 uses the low-side power supply 102 to charge the high-side power supply 112 (906).
[0059] Although the device has been described with reference to the illustrative embodiments, the description is not intended to be interpreted in a limiting sense. Various modifications and combinations of the illustrative embodiments and other embodiments of the invention will be apparent to those skilled in the art with reference to the specification. Therefore, the appended claims are intended to cover any such modifications or embodiments.
[0060] The following examples may illustrate one or more aspects of the present disclosure.
[0061] Example 1. A device for switching a gallium nitride (GaN) device, the device comprising: a high-side driver, adapted to control the high-side GaN device using a high-side power supply; a low-side driver, adapted to control the low-side GaN device using a low-side power supply; and a high-side charging circuit, adapted to charge the high-side power supply using the low-side power supply when the low-side driver activates the low-side GaN device.
[0062] Example 2. The device of Example 1, wherein the high-side charging circuit is adapted to prevent current from flowing from the high-side power supply to the low-side driver and permit current to flow from the low-side driver to the high-side power supply.
[0063] Example 3. A device of any combination of Examples 1 to 2, wherein the high-side charging circuit includes a diode, the diode including an anode coupled to the low-side driver and a cathode coupled to the high-side power supply to prevent current from flowing from the high-side power supply to the low-side driver and to permit current to flow from the low-side driver to the high-side power supply.
[0064] Example 4. A device of any combination of Examples 1 to 3, wherein the high-side charging circuit comprises: a switching element comprising a first node coupled to a high-side power supply and a second node coupled to a low-side driver; an active switching circuit adapted to selectively activate the switching element to prevent current from flowing from the high-side power supply to the low-side driver and to permit current to flow from the low-side driver to the high-side power supply.
[0065] Example 5. The apparatus of any combination of Examples 1-4, wherein the low-side power supply comprises a capacitor coupled in parallel with the voltage source; and wherein the high-side power supply comprises a capacitor.
[0066] Example 6. A device of any combination of Examples 1 to 5, comprising one or more of the following: a low-side discharge circuit adapted to reduce current flow from a low-side driver to a low-side GaN device and inhibit reduction of current flow from the low-side GaN device to the low-side driver; or a high-side discharge circuit adapted to reduce current flow from a high-side driver to a high-side GaN device and inhibit reduction of current flow from the high-side GaN device to the high-side driver.
[0067] Example 7. A device of any combination of Examples 1 to 6, wherein the low-side driver is suitable for establishing a first low-side channel between the positive terminal of the low-side power supply and the low-side GaN device to activate the low-side GaN device, and establishing a second low-side channel between the negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device; and wherein the high-side driver is suitable for establishing a first high-side channel between the positive terminal of the high-side power supply and the high-side GaN device to activate the high-side GaN device, and establishing a second high-side channel between the negative terminal of the high-side power supply and the low-side GaN device to deactivate the high-side GaN device.
[0068] Example 8. A device of any combination of Examples 1 to 7, wherein the low-side driver comprises: a first low-side switching element comprising a first node coupled to a positive terminal of a low-side power supply, a second node coupled to the low-side GaN device, and a control node; a second low-side switching element comprising a first node coupled to the low-side GaN device, a second node coupled to a negative terminal of the low-side power supply, and a control node; and a low-side driving circuit adapted to generate a first control signal at the control node of the first low-side switching element so that the first low-side switching element establishes a first low-side channel between the positive terminal of the low-side power supply and the low-side GaN device to activate the low-side GaN device, and to generate a second control signal at the control node of the second low-side switching element so that the second low-side switching element establishes a second low-side channel between the negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device.
[0069] Example 9. A device of any combination of Examples 1 to 8, wherein the high-side driver comprises: a first high-side switch element comprising a first node coupled to a positive terminal of a high-side power supply, a second node coupled to the high-side GaN device, and a control node; a second high-side switch element comprising a first node coupled to the high-side GaN device, a second node coupled to a negative terminal of the high-side power supply, and a control node; and a high-side drive circuit adapted to generate a first control signal at the control node of the first high-side switch element so that the first high-side switch element establishes a first high-side channel between the positive terminal of the high-side power supply and the high-side GaN device to activate the high-side GaN device, and to generate a second control signal at the control node of the second high-side switch element so that the second high-side switch element establishes a second high-side channel between the negative terminal of the high-side power supply and the high-side GaN device to deactivate the high-side GaN device.
[0070] Example 10. A device of any combination of Examples 1-9, wherein the high-side GaN device comprises: a control node coupled to a high-side driver, a first node coupled to a positive terminal of a power converter power supply, and a second node coupled to one or more converter elements for a power converter, the power converter being suitable for receiving power from the power converter power supply and outputting a regulated voltage or a regulated current; and wherein the low-side GaN device comprises: a control node coupled to the low-side driver, a first node coupled to one or more converter elements, and a second node coupled to a negative terminal of the power converter power supply.
[0071] Example 11. A method for driving a gallium nitride (GaN) device, the method comprising: using a high-side power supply to control the high-side GaN device; using a low-side power supply to control the low-side GaN device; and when the low-side driver activates the low-side GaN device, using the low-side power supply to charge the high-side power supply.
[0072] Example 12. The method of Example 11, wherein charging the high-side power supply comprises: preventing current from flowing from the high-side power supply to the low-side driver; and permitting current to flow from the low-side driver to the high-side power supply.
[0073] Example 13. The method of any combination of Examples 11 to 12, wherein charging the high-side voltage comprises selectively activating a switching element to prevent current from flowing from the high-side power supply to the low-side driver and to permit current to flow from the low-side driver to the high-side power supply.
[0074] Example 14. The device of any combination of Examples 11 to 13, wherein the low-side power supply comprises a capacitor coupled in parallel with the voltage source; and wherein the high-side power supply comprises a capacitor.
[0075] Example 15. A method of any combination of Examples 11 to 14, wherein controlling the high-side GaN device includes: reducing current flow from the high-side driver to the high-side GaN device, and suppressing a reduction in current flow from the high-side GaN device to the high-side driver; and wherein controlling the low-side GaN device includes: reducing current flow from the low-side driver to the low-side GaN device, and suppressing a reduction in current flow from the low-side GaN device to the low-side driver.
[0076] Example 16. A method of any combination of Examples 11 to 15, wherein controlling the low-side GaN device includes: establishing a first low-side channel between a positive terminal of a low-side power supply and the low-side GaN device to activate the low-side GaN device, and establishing a second low-side channel between a negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device; and wherein controlling the high-side GaN device includes: establishing a first high-side channel between a positive terminal of the high-side power supply and the high-side GaN device to activate the high-side GaN device, and establishing a second high-side channel between the negative terminal of the high-side power supply and the high-side GaN device to deactivate the high-side GaN device.
[0077] Example 17. A method of any combination of Examples 11 to 16, wherein controlling the low-side GaN device comprises: generating a control signal at a control node of a first low-side switch element so that the first low-side switch element establishes a first low-side channel between a positive terminal of a low-side power supply and the low-side GaN device to activate the low-side GaN device; and generating a second control signal at a control node of a second low-side switch element so that the second low-side switch element establishes a second low-side channel between a negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device.
[0078] Example 18. A method of any combination of Examples 11 to 17, wherein controlling the high-side GaN device comprises: generating a first control signal at a control node of a first high-side switch element so that the first high-side switch element establishes a first high-side channel between a positive terminal of a high-side power supply and the high-side GaN device to activate the high-side GaN device; and generating a second control signal at a control node of a second high-side switch element so that the second high-side switch element establishes a second high-side channel between a negative terminal of the high-side power supply and the high-side GaN device to deactivate the high-side GaN device.
[0079] Example 19. A method of any combination of Examples 11 to 18, wherein the high-side GaN device comprises: a control node coupled to a high-side driver, a first node coupled to a positive terminal of a power converter power supply, and a second node coupled to one or more converter elements for a power converter suitable for receiving power from the power converter power supply and outputting a regulated voltage or a regulated current; and wherein the low-side GaN device comprises: a control node coupled to the low-side driver, a first node coupled to one or more converter elements, and a second node coupled to a negative terminal of the power converter power supply.
[0080] Example 20. A system for controlling a power converter, the system comprising: a high-side GaN device; a low-side GaN device; a high-side driver adapted to control the high-side GaN device using a high-side power supply; a low-side driver adapted to control the low-side GaN device using a low-side power supply; and a high-side charging circuit adapted to charge the high-side power supply using the low-side power supply when the low-side driver activates the low-side GaN device.
[0081] Various aspects have been described in this disclosure. These and other aspects are within the scope of the following claims.
Claims
1. A device for switching a GaN device, the device comprising: a high-side driver adapted to control a high-side GaN device using a high-side power supply, wherein the high-side power supply comprises a capacitor; Low-side driver, suitable for controlling low-side GaN devices using low-side power supplies; as well as A high-side charging circuit is directly connected between the gate of the low-side GaN device and the capacitor of the high-side power supply and is indirectly connected to the low-side power supply through the low-side driver. The high-side charging circuit is suitable for charging the high-side power supply using the low-side power supply when the low-side driver activates the low-side GaN device. 2 . The device of claim 1 , wherein the high-side charging circuit is adapted to prevent current from flowing from the high-side power supply to the low-side driver and to permit current to flow from the low-side driver to the high-side power supply.
3. The apparatus of claim 2 , wherein the high-side charging circuit comprises a diode including an anode coupled to the low-side driver and a cathode coupled to the high-side power supply to prevent current from flowing from the high-side power supply to the low-side driver and to permit current to flow from the low-side driver to the high-side power supply.
4. The device of claim 2, wherein the high-side charging circuit comprises: a switching element including a first node coupled to the high-side power supply and a second node coupled to the low-side driver; as well as An active switching circuit is adapted to selectively activate the switching element to prevent current from flowing from the high-side power supply to the low-side driver and to permit current to flow from the low-side driver to the high-side power supply.
5. The device according to claim 1, Wherein the capacitor is a first capacitor, and wherein the low-side power supply includes a second capacitor coupled in parallel with a voltage source.
6. The device according to claim 1, comprising one or more of the following: a low-side discharge circuit adapted to reduce current flow from the low-side driver to the low-side GaN device and inhibit reduction of current flow from the low-side GaN device to the low-side driver; or A high-side discharge circuit is adapted to reduce a current flow from the high-side driver to the high-side GaN device and to suppress a reduction in the current flow from the high-side GaN device to the high-side driver.
7. The device according to claim 1, wherein the low-side driver is adapted to establish a first low-side channel between a positive terminal of the low-side power supply and the low-side GaN device to activate the low-side GaN device, and to establish a second low-side channel between a negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device; and The high-side driver is suitable for establishing a first high-side channel between the positive terminal of the high-side power supply and the high-side GaN device to activate the high-side GaN device, and establishing a second high-side channel between the negative terminal of the high-side power supply and the low-side GaN device to deactivate the high-side GaN device.
8. The apparatus of claim 7, wherein the low-side driver comprises: a first low-side switching element comprising a first node coupled to the positive terminal of the low-side power supply, a second node coupled to the low-side GaN device, and a control node; a second low-side switching element comprising a first node coupled to the low-side GaN device, a second node coupled to the negative terminal of the low-side power supply, and a control node; as well as A low-side driving circuit is suitable for generating a first control signal at the control node of the first low-side switching element so that the first low-side switching element establishes the first low-side channel between the positive terminal of the low-side power supply and the low-side GaN device to activate the low-side GaN device, and is suitable for generating a second control signal at the control node of the second low-side switching element so that the second low-side switching element establishes the second low-side channel between the negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device.
9. The apparatus of claim 7, wherein the high-side driver comprises: a first high-side switching element including a first node coupled to the positive terminal of the high-side power supply, a second node coupled to the high-side GaN device, and a control node; a second high-side switching element including a first node coupled to the high-side GaN device, a second node coupled to the negative terminal of the high-side power supply, and a control node; as well as A high-side driving circuit is suitable for generating a first control signal at the control node of the first high-side switching element so that the first high-side switching element establishes the first high-side channel between the positive terminal of the high-side power supply and the high-side GaN device to activate the high-side GaN device, and is suitable for generating a second control signal at the control node of the second high-side switching element so that the second high-side switching element establishes the second high-side channel between the negative terminal of the high-side power supply and the high-side GaN device to deactivate the high-side GaN device.
10. The device according to claim 1, wherein the high-side GaN device includes a control node coupled to the high-side driver, a first node coupled to a positive terminal of a power converter power supply, and a second node coupled to one or more converter elements for a power converter, the power converter being adapted to receive power from the power converter power supply and output a regulated voltage or a regulated current; and Wherein the low-side GaN device includes a control node coupled to the low-side driver, a first node coupled to the one or more converter elements, and a second node coupled to a negative terminal of the power converter power supply.
11. A method for driving a GaN device, the method comprising: controlling the high-side GaN device using a high-side power supply, wherein the high-side power supply includes a capacitor; Use a low-side power supply to control the low-side GaN device; as well as When the low-side driver activates the low-side GaN device, the high-side power supply is charged by the low-side power supply through a high-side charging circuit, wherein the high-side charging circuit is directly connected between the gate of the low-side GaN device and the capacitor of the high-side power supply, and is indirectly connected to the low-side power supply through the low-side driver.
12. The method of claim 11 , wherein charging the high-side power supply comprises: preventing current from flowing from the high-side power supply to the low-side driver; as well as Current is permitted to flow from the low-side driver to the high-side power supply.
13. The method of claim 12, wherein charging the high-side power supply comprises: A switching element is selectively activated to prevent current from flowing from the high-side power supply to the low-side driver and to permit current to flow from the low-side driver to the high-side power supply.
14. The method according to claim 11, Wherein the capacitor is a first capacitor, and wherein the low-side power supply includes a second capacitor coupled in parallel with a voltage source.
15. The method according to claim 11, Wherein controlling the high-side GaN device comprises: reducing a current flow from a high-side driver to the high-side GaN device, and inhibiting a reduction in a current flow from the high-side GaN device to the high-side driver; as well as Wherein controlling the low-side GaN device includes: reducing a current flow from the low-side driver to the low-side GaN device, and suppressing a reduction in the current flow from the low-side GaN device to the low-side driver.
16. The method according to claim 11, Wherein controlling the low-side GaN device comprises: Establishing a first low-side channel between a positive terminal of the low-side power supply and the low-side GaN device to activate the low-side GaN device, and establishing a second low-side channel between a negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device; as well as Controlling the high-side GaN device includes: establishing a first high-side channel between the positive terminal of the high-side power supply and the high-side GaN device to activate the high-side GaN device, and establishing a second high-side channel between the negative terminal of the high-side power supply and the high-side GaN device to deactivate the high-side GaN device.
17. The method of claim 16, wherein controlling the low-side GaN device comprises: generating a control signal at a control node of a first low-side switch element so that the first low-side switch element establishes the first low-side channel between the positive terminal of the low-side power supply and the low-side GaN device to activate the low-side GaN device; as well as A second control signal is generated at a control node of a second low-side switch element to cause the second low-side switch element to establish the second low-side channel between the negative terminal of the low-side power supply and the low-side GaN device to deactivate the low-side GaN device.
18. The method of claim 16, wherein controlling the high-side GaN device comprises: generating a first control signal at a control node of a first high-side switch element so that the first high-side switch element establishes the first high-side channel between the positive terminal of the high-side power supply and the high-side GaN device to activate the high-side GaN device; as well as A second control signal is generated at a control node of a second high-side switch element to cause the second high-side switch element to establish the second high-side channel between the negative terminal of the high-side power supply and the high-side GaN device to deactivate the high-side GaN device.
19. The method according to claim 11, wherein the high-side GaN device includes a control node coupled to a high-side driver, a first node coupled to a positive terminal of a power converter power supply, and a second node coupled to one or more converter elements for a power converter, the power converter being adapted to receive power from the power converter power supply and output a regulated voltage or a regulated current; and Wherein the low-side GaN device includes a control node coupled to the low-side driver, a first node coupled to the one or more converter elements, and a second node coupled to a negative terminal of the power converter power supply.
20. A system for controlling a power converter, the system comprising: High-side GaN devices; Low-side GaN devices; a high-side driver adapted to control the high-side GaN device using a high-side power supply, wherein the high-side power supply comprises a capacitor; A low-side driver adapted to control the low-side GaN device using a low-side power supply; as well as A high-side charging circuit is directly connected between the gate of the low-side GaN device and the capacitor of the high-side power supply and is indirectly connected to the low-side power supply through the low-side driver. The high-side charging circuit is suitable for charging the high-side power supply using the low-side power supply when the low-side driver activates the low-side GaN device.
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