Heat treatment method and heat treatment device

Abstract

The present invention provides a heat treatment method and a heat treatment device that can perform dummy treatment while suppressing the reduction of the processing efficiency of product wafers to a minimum. In the present invention, a product process recipe that specifies the processing sequence and processing conditions of the heat treatment of product wafers is prepared at an appropriate time point. In addition, a dummy process recipe that specifies the processing sequence and processing conditions of the heat treatment of dummy wafers is also prepared. The product process recipe is associated with the corresponding dummy process recipe and stored. When the control unit receives a pre-warning signal that the product wafer arrives at the heat treatment device, the dummy treatment of the dummy wafer is started. The dummy wafer is accommodated in a dummy carrier that is always set on a dedicated load port. The dummy treatment is performed according to the dummy process recipe associated with the product process recipe corresponding to the product wafer expected to arrive.

Description

Technical Field

[0001] The invention relates to a heat treatment method and a heat treatment device for managing heat treatment of a dummy wafer. Background Art

[0002] In the manufacturing process of semiconductor devices, flash lamp annealing (FLA) for heating semiconductor wafers in a very short time has attracted attention. Flash lamp annealing is a heat treatment technology that heats the surface of a semiconductor wafer in a very short time (several milliseconds or less) by irradiating a flash of light onto the surface of the semiconductor wafer using a xenon flash lamp (hereinafter referred to as a "flash lamp").

[0003] The radiation spectrum distribution of the xenon flash lamp is from the ultraviolet region to the near-infrared region, and the wavelength is shorter than that of the conventional halogen lamp, which is roughly consistent with the basic absorption band of the silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with a flash from the xenon flash lamp, less light is transmitted, and the temperature of the semiconductor wafer can be rapidly increased. In addition, it is also clear that if the flash irradiation is extremely short, less than a few milliseconds, it is possible to selectively increase the temperature only near the surface of the semiconductor wafer.

[0004] This type of flash lamp annealing is used for processes that require heating for an extremely short time, for example, typically for activation of impurities implanted into a semiconductor wafer. If a flash lamp is irradiated onto the surface of a semiconductor wafer into which impurities have been implanted by ion implantation, the surface of the semiconductor wafer can be heated to the activation temperature in an extremely short time, and only the impurity activation can be performed without causing the impurities to diffuse deeply.

[0005] Typically, not limited to heat treatment, semiconductor wafer processing is performed in batches (a group of semiconductor wafers that are the subject of the same content processing under the same conditions). In a single-wafer substrate processing device, multiple semiconductor wafers constituting a batch are processed continuously and sequentially. In a flash lamp annealing device, multiple semiconductor wafers constituting a batch are also moved into a chamber one by one and heat treated sequentially.

[0006] However, in the process of sequentially processing a plurality of semiconductor wafers constituting a batch, the temperature of a chamber structure such as a wafer base holding the semiconductor wafer may change. This phenomenon occurs in the following cases: when the process is restarted in a flash lamp annealing device that is temporarily stopped, or when the process conditions such as the process temperature of the semiconductor wafer are changed. In the process of processing a plurality of semiconductor wafers constituting a batch, if the temperature of a chamber structure such as a wafer base changes, the following problem may occur: the temperature history of the semiconductor wafers at the beginning of the batch and the semiconductor wafers at the end of the batch are different during processing.

[0007] In order to solve this problem, before starting the processing of the product batch, the following steps are performed: a dummy wafer that is not the processing object is moved into the chamber and supported on a crystal base, and the dummy wafer is heated to raise the temperature of the chamber structure such as the crystal base in advance (dummy operation). Patent document 1 discloses the following content: dummy operation is performed on about 10 dummy wafers to make the temperature of the chamber structure such as the crystal base reach the stable temperature during processing.

[0008] [Background Technology Literature]

[0009] [Patent Document]

[0010] [Patent Document 1] Japanese Patent Application Publication No. 2017-092102 Summary of the invention

[0011] [Problems to be solved by the invention]

[0012] Semiconductor wafers (product wafers) and dummy wafers constituting a product batch are carried into the flash lamp annealing device while being contained in a carrier such as a FOUP. Typically, the dummy operation is performed before the product wafers are processed by carrying the carrier containing the product batch. After the temperature of the chamber structures such as the crystal base is adjusted to a stable temperature through the dummy operation, the product wafers are processed.

[0013] During the dummy operation, product wafers cannot be processed. Therefore, from the perspective of improving processing efficiency, it is ideal to shorten the dummy operation as much as possible. However, in order to effectively adjust the temperature of the chamber structure such as the crystal seat to a stable temperature, dummy operations for at least 10 dummy wafers are required, which takes a corresponding amount of time.

[0014] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a heat treatment method and a heat treatment apparatus capable of performing a dummy process while minimizing a decrease in the processing efficiency of a product wafer.

[0015] [Technical means to solve the problem]

[0016] In order to solve the above-mentioned problem, the invention of Technical Solution 1 is a heat treatment method for managing the heat treatment of a dummy wafer, which is characterized by comprising: a receiving process for receiving a prior notice signal of the arrival of a product wafer at a heat treatment device; and a dummy treatment process for starting the heat treatment of the dummy wafer using the heat treatment device when receiving the prior notice signal.

[0017] In addition, the invention of technical solution 2 is a heat treatment method according to the invention of technical solution 1, characterized in that, in the dummy processing process, the dummy wafer is moved out from a dummy carrier which is always set on a load port dedicated to the dummy carrier set in the heat treatment device, and heat treated.

[0018] In addition, the invention of Technical Solution 3 is a heat treatment method according to the invention of Technical Solution 1 or Technical Solution 2, characterized in that, in the dummy processing process, the heat treatment of the dummy wafer is performed according to a dummy process recipe associated with a product process recipe that specifies the order and processing conditions of the heat treatment of the product wafer.

[0019] In addition, the invention of technical solution 4 is a heat treatment device for managing the heat treatment of dummy wafers, which is characterized by comprising: a heat treatment unit for performing heat treatment on the dummy wafer; and a control unit for starting the heat treatment of the dummy wafer when receiving a prior notice signal that the product wafer has arrived at the heat treatment device.

[0020] In addition, the invention of technical solution 5 is a heat treatment device according to the invention of technical solution 4, characterized in that it also has a load port dedicated to the dummy carrier. When the warning signal is received, the dummy wafer is moved out from the dummy carrier that is always set on the load port and transported to the heat treatment part.

[0021] In addition, the invention of technical solution 6 is a heat treatment device according to the invention of technical solution 4 or technical solution 5, characterized in that it also includes a storage unit, which associates and stores a product process recipe that specifies the order and processing conditions of heat treatment of the product wafer with a dummy process recipe that specifies the order and processing conditions of heat treatment of the dummy wafer, and when the warning signal is received, the heat treatment of the dummy wafer is performed according to the dummy process recipe associated with the product process recipe.

[0022] [Effects of the Invention]

[0023] According to the invention of technical solutions 1 to 3, when a prior warning signal of the arrival of a product wafer at a heat treatment device is received, heat treatment of a dummy wafer is started using the heat treatment device. Therefore, the time before the arrival of the product wafer can be effectively utilized, and the dummy processing can be performed while minimizing the reduction in the processing efficiency of the product wafer.

[0024] In particular, according to the invention of technical solution 2, the dummy wafer is unloaded from the dummy carrier always provided at the load port dedicated to the dummy carrier and subjected to heat treatment, so that when the advance notice signal is received, the heat treatment of the dummy wafer can be started immediately.

[0025] According to the invention of technical solutions 4 to 6, when the advance warning signal of the arrival of the product wafer at the heat treatment device is received, the heat treatment of the dummy wafer is started. Therefore, the time before the arrival of the product wafer can be effectively utilized, and the dummy processing can be performed while the reduction in the processing efficiency of the product wafer is minimized.

[0026] In particular, according to the invention of technical solution 5, the dummy wafer is unloaded from the dummy carrier always provided at the load port dedicated to the dummy carrier and transported to the heat treatment section, so that when the advance notice signal is received, the heat treatment of the dummy wafer can be started immediately. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a top view showing the heat treatment apparatus of the present invention.

[0028] Figure 2 yes Figure 1 Front view of the heat treatment device.

[0029] Figure 3 It is a longitudinal sectional view showing the structure of the heat treatment part.

[0030] Figure 4 It is a perspective view showing the overall appearance of the holding portion.

[0031] Figure 5 This is a top view of the crystal seat.

[0032] Figure 6 It is a cross-sectional view of the crystal seat.

[0033] Figure 7 It is a top view of the transfer mechanism.

[0034] Figure 8 It is a side view of the transfer mechanism.

[0035] Fig. 9 It is a top view showing the arrangement of a plurality of halogen lamps.

[0036] Fig.10 It is a block diagram showing the configuration of a control unit.

[0037] Fig.11 This is a flowchart showing the procedure of dummy processing. DETAILED DESCRIPTION

[0038] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0039] First, the heat treatment apparatus of the present invention will be described. Figure 1 is a top view showing a heat treatment apparatus 100 of the present invention, Figure 21 is a front view thereof. The heat treatment apparatus 100 is a flash lamp annealing apparatus that irradiates a circular plate-shaped semiconductor wafer W as a substrate with a flash to heat the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, φ300 mm or φ450 mm. Impurities are injected into the semiconductor wafer W before being transported into the heat treatment apparatus 100, and the injected impurities are activated by the heat treatment of the heat treatment apparatus 100. In addition, Figure 1 In the following figures, the size or number of each part is exaggerated or simplified as necessary for easy understanding. Figure 1 to Figure 3 In each figure, in order to clarify their directional relationship, an XYZ orthogonal coordinate system is attached, in which the Z-axis direction is set as the vertical direction and the XY plane is set as the horizontal plane.

[0040] like Figure 1 and Figure 2 As shown, the heat treatment apparatus 100 includes: an indexer section 101 for carrying an unprocessed semiconductor wafer W from outside into the apparatus and carrying a processed semiconductor wafer W out of the apparatus; an alignment section 230 for positioning the unprocessed semiconductor wafer W; two cooling sections 130 and 140 for cooling the semiconductor wafer W after the heat treatment; a heat treatment section 160 for performing flash heat treatment on the semiconductor wafer W; and a transfer robot 150 for transferring the semiconductor wafer W between the cooling sections 130 and 140 and the heat treatment section 160. In addition, the heat treatment apparatus 100 includes a control section 3, which controls the motion mechanisms provided in the above-mentioned processing sections and the transfer robot 150 to perform the flash heat treatment on the semiconductor wafer W.

[0041] The indexer section 101 includes: a load port 110 for arranging and placing a plurality of carriers C; and a transfer robot 120 for taking out unprocessed semiconductor wafers W from each carrier C and placing processed semiconductor wafers W in each carrier C. Specifically, the indexer section 101 is provided with three load ports, and the load port 110 is a general term including a first load port 110a, a second load port 110b, and a third load port 110c (in the case where the three load ports are not particularly distinguished, simply referred to as load port 110). The first load port 110a and the second load port 110b of the three load ports are loaded with carriers C for placing semiconductor wafers W to be products (hereinafter also referred to as product wafers W). On the other hand, the third load port 110c is a load port dedicated to a dummy carrier DC for placing a dummy wafer DW. That is, only a dummy carrier DC is placed in the third load port 110c.

[0042] The carrier C and dummy carrier DC containing unprocessed semiconductor wafers W are transported by an unmanned transport vehicle (AGV, OHT) and placed on the load port 110. In addition, the carrier C and dummy carrier DC containing processed semiconductor wafers W are also taken away from the load port 110 by the unmanned transport vehicle.

[0043] In addition, in the load port 110, the transfer robot 120 can take and place any semiconductor wafer W (or dummy wafer DW) relative to the carrier C and the dummy carrier DC. Figure 2 The carrier C and the dummy carrier DC may be configured to be movable and raised as shown by the arrow CU. In addition, the carrier C and the dummy carrier DC may be in the form of a SMIF (Standard Mechanical Interface Face) box or an OC (open cassette) box that exposes the stored semiconductor wafer W to the outside atmosphere, in addition to a FOUP (front opening unified pod) that stores the semiconductor wafer W in a closed space.

[0044] In addition, the transfer robot 120 can perform the following operations: Figure 1 The handover robot 120 performs the sliding movement shown by the arrow 120S, the rotation movement shown by the arrow 120R, and the lifting movement. Thus, the delivery robot 120 takes and places the semiconductor wafer W relative to the carrier C and the dummy carrier DC, and delivers the semiconductor wafer W to the alignment part 230 and the two cooling parts 130, 140. The taking and placing of the semiconductor wafer W relative to the carrier C (or the dummy carrier DC) by the delivery robot 120 is performed by the sliding movement of the hand 121 and the lifting movement of the carrier C. In addition, the delivery of the semiconductor wafer W between the delivery robot 120 and the alignment part 230 or the cooling parts 130, 140 is performed by the sliding movement of the hand 121 and the lifting movement of the delivery robot 120.

[0045] The alignment unit 230 is connected to and provided on the side of the indexer unit 101 along the Y-axis direction. The alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane so that it faces a direction suitable for flash heating. The alignment unit 230 is configured by providing a mechanism that supports and rotates the semiconductor wafer W in a horizontal posture and a mechanism that optically detects a notch or an orientation flat surface formed on the peripheral edge of the semiconductor wafer W, etc., inside an alignment chamber 231 that is a housing made of aluminum alloy.

[0046] The semiconductor wafer W is delivered to the alignment section 230 by the delivery robot 120. The semiconductor wafer W is delivered from the delivery robot 120 to the alignment chamber 231 in a manner such that the center of the wafer is located at a specific position. In the alignment section 230, the semiconductor wafer W is rotated around the vertical axis with the center of the semiconductor wafer W received from the indexer section 101 as the rotation center, and the direction of the semiconductor wafer W is adjusted by optically detecting the notch and the like. The semiconductor wafer W whose direction has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.

[0047] As a transfer space for semiconductor wafers W using the transfer robot 150, a transfer chamber 170 is provided to accommodate the transfer robot 150. The transfer chamber 170 is connected in three directions to the processing chamber 6 of the heat treatment unit 160, the first cooling chamber 131 of the cooling unit 130, and the second cooling chamber 141 of the cooling unit 140.

[0048] The heat treatment unit 160, which is a main part of the heat treatment apparatus 100, is a substrate processing unit that performs flash heating processing by irradiating flash from a xenon flash lamp FL to the preheated semiconductor wafer W. The configuration of the heat treatment unit 160 will be described further below.

[0049] The two cooling units 130 and 140 have substantially the same structure. The cooling units 130 and 140 are respectively provided with a metal cooling plate and a quartz plate placed on the upper surface thereof in the first cooling chamber 131 and the second cooling chamber 141, which are aluminum alloy shells (both are omitted in the figure). The cooling plate is temperature-controlled to room temperature (about 23° C.) by a Peltier element or a constant temperature water circulation. The semiconductor wafer W subjected to flash heat treatment by the heat treatment unit 160 is carried into the first cooling chamber 131 or the second cooling chamber 141 and placed on the quartz plate for cooling.

[0050] The first cooling chamber 131 and the second cooling chamber 141 are connected to the indexer section 101 and the transfer chamber 170 between them. Two openings for carrying in and out the semiconductor wafer W are formed in the first cooling chamber 131 and the second cooling chamber 141. Of the two openings of the first cooling chamber 131, the opening connected to the indexer section 101 can be opened and closed by a gate valve 181. On the other hand, the opening of the first cooling chamber 131 connected to the transfer chamber 170 can be opened and closed by a gate valve 183. That is, the first cooling chamber 131 is connected to the indexer section 101 via the gate valve 181, and the first cooling chamber 131 is connected to the transfer chamber 170 via the gate valve 183.

[0051] When the semiconductor wafer W is transferred between the indexer unit 101 and the first cooling chamber 131, the gate valve 181 is opened. When the semiconductor wafer W is transferred between the first cooling chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valves 181 and 183 are closed, the interior of the first cooling chamber 131 becomes a closed space.

[0052] In addition, the opening of the second cooling chamber 141 connected to the indexer part 101 among the two openings can be opened and closed by the gate valve 182. On the other hand, the opening of the second cooling chamber 141 connected to the transfer chamber 170 can be opened and closed by the gate valve 184. That is, the second cooling chamber 141 and the indexer part 101 are connected via the gate valve 182, and the second cooling chamber 141 and the transfer chamber 170 are connected via the gate valve 184.

[0053] When the semiconductor wafer W is transferred between the indexer unit 101 and the second cooling chamber 141, the gate valve 182 is opened. When the semiconductor wafer W is transferred between the second cooling chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valves 182 and 184 are closed, the interior of the second cooling chamber 141 becomes a closed space.

[0054] Furthermore, the cooling units 130 and 140 are respectively provided with a gas supply mechanism for supplying clean nitrogen gas to the first cooling chamber 131 and the second cooling chamber 141 and an exhaust mechanism for exhausting the gas atmosphere in the chamber. The gas supply mechanism and the exhaust mechanism can also switch the flow rate in two stages.

[0055] The transport robot 150 disposed in the transport chamber 170 can rotate around an axis along the vertical direction as shown by an arrow 150R. The transport robot 150 has two link mechanisms including a plurality of arm sections, and transport hands 151a and 151b for holding semiconductor wafers W are respectively disposed at the front ends of these two link mechanisms. These transport hands 151a and 151b are arranged with only a specific spacing therebetween, and can slide and move linearly in the same horizontal direction independently through the link mechanisms. In addition, the transport robot 150 moves the two transport hands 151a and 151b up and down while maintaining the two transport hands 151a and 151b separated by only a specific spacing by lifting and lowering a base provided with two link mechanisms.

[0056] When the transfer robot 150 transfers (takes and places) the semiconductor wafer W with the first cooling chamber 131, the second cooling chamber 141, or the processing chamber 6 of the heat treatment unit 160 as a transfer object, first, the two transfer hands 151a and 151b rotate in a manner opposite to the transfer object, and then (or during the rotation) move up and down so that one of the transfer hands is at a height to transfer the semiconductor wafer W to the transfer object. Then, the transfer hand 151a (151b) slides linearly in the horizontal direction to transfer the semiconductor wafer W to the transfer object.

[0057] The semiconductor wafer W of the transfer robot 150 and the delivery robot 120 can be delivered via the cooling units 130 and 140. That is, the first cooling chamber 131 of the cooling unit 130 and the second cooling chamber 141 of the cooling unit 140 also function as a passage for delivering the semiconductor wafer W between the transfer robot 150 and the delivery robot 120. Specifically, the semiconductor wafer W delivered to the first cooling chamber 131 or the second cooling chamber 141 by one of the transfer robot 150 and the delivery robot 120 is received by the other, thereby delivering the semiconductor wafer W. The transfer robot 150 and the delivery robot 120 constitute a transfer mechanism for transferring the semiconductor wafer W from the carrier C to the thermal treatment unit 160.

[0058] As described above, gate valves 181 and 182 are provided between the first cooling chamber 131 and the second cooling chamber 141 and the indexer section 101, respectively. In addition, gate valves 183 and 184 are provided between the transfer chamber 170 and the first cooling chamber 131 and the second cooling chamber 141, respectively. Furthermore, a gate valve 185 is provided between the transfer chamber 170 and the processing chamber 6 of the thermal treatment section 160. When the semiconductor wafer W is transferred in the thermal treatment apparatus 100, these gate valves are opened and closed as appropriate. In addition, nitrogen gas is also supplied to the transfer chamber 170 and the alignment chamber 231 from the gas supply section, and the gas atmosphere inside them is exhausted by the exhaust section (both are omitted in the figure).

[0059] Next, the configuration of the heat treatment unit 160 will be described. Figure 3 1 is a longitudinal sectional view showing the structure of the heat treatment unit 160. The heat treatment unit 160 includes: a processing chamber 6 for accommodating a semiconductor wafer W and performing a heat treatment; a flash lamp room 5 for housing a plurality of flash lamps FL; and a halogen lamp room 4 for housing a plurality of halogen lamps HL. The flash lamp room 5 is provided on the upper side of the processing chamber 6, and the halogen lamp room 4 is provided on the lower side. In addition, the heat treatment unit 160 includes: a holding unit 7 for holding the semiconductor wafer W in a horizontal posture inside the processing chamber 6; and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding unit 7 and the transfer robot 150.

[0060] The processing chamber 6 is formed by installing quartz chamber windows on the top and bottom of a cylindrical chamber side portion 61. The chamber side portion 61 has a generally cylindrical shape with upper and lower openings, and an upper chamber window 63 is installed on the upper opening to close it, and a lower chamber window 64 is installed on the lower opening to close it. The upper chamber window 63 constituting the top of the processing chamber 6 is a disk-shaped component formed of quartz, and functions as a quartz window in the processing chamber 6 for transmitting the flash emitted from the flash lamp FL. In addition, the lower chamber window 64 constituting the floor portion of the processing chamber 6 is also a disk-shaped component formed of quartz, and functions as a quartz window in the processing chamber 6 for transmitting the light from the halogen lamp HL.

[0061] In addition, a reflection ring 68 is installed on the upper part of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is installed on the lower part. The reflection rings 68 and 69 are both formed in a circular ring shape. The upper reflection ring 68 is installed by embedding from the upper side of the chamber side portion 61. On the other hand, the lower reflection ring 69 is installed by embedding from the lower side of the chamber side portion 61 and nailing it with screws that are omitted from the figure. That is, the reflection rings 68 and 69 are both installed on the chamber side portion 61 so that they can be easily loaded and unloaded. The inner space of the processing chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61 and the reflection rings 68 and 69 is defined as a heat treatment space 65.

[0062] By installing the reflection rings 68 and 69 on the chamber side portion 61, a recessed portion 62 is formed on the inner wall surface of the processing chamber 6. That is, the recessed portion 62 is formed to be surrounded by the central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not installed, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69. The recessed portion 62 is formed in a circular ring shape along the horizontal direction on the inner wall surface of the processing chamber 6, and surrounds the holding portion 7 holding the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.

[0063] In addition, a transport opening (furnace port) 66 for carrying in and out the semiconductor wafer W from the processing chamber 6 is formed on the chamber side 61. The transport opening 66 can be opened and closed by the gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transport opening 66, the semiconductor wafer W can be carried in from the transport opening 66 through the recess 62 to the heat treatment space 65 and the semiconductor wafer W can be carried out from the heat treatment space 65. In addition, when the gate valve 185 closes the transport opening 66, the heat treatment space 65 in the processing chamber 6 is set as a closed space.

[0064] In addition, a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed on the upper part of the inner wall of the processing chamber 6. The gas supply hole 81 is arranged at a position higher than the recess 62, and may also be arranged on the reflection ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 via a buffer space 82 formed in a circular ring shape inside the side wall of the processing chamber 6. The gas supply pipe 83 is connected to a processing gas supply source 85. In addition, a valve 84 is inserted in the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows in a manner that expands in the buffer space 82 where the fluid resistance is smaller than that of the gas supply hole 81, and is supplied from the gas supply hole 81 to the heat treatment space 65. Nitrogen (N 2 ) or other inert gases, or hydrogen (H 2 ), ammonia (NH 3 ) and other reactive gases (nitrogen in this embodiment).

[0065] On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed at the lower part of the inner wall of the processing chamber 6. The gas exhaust hole 86 is formed at a lower position than the recess 62, and can also be set at the reflection ring 69. The gas exhaust hole 86 is connected to the gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the processing chamber 6. The gas exhaust pipe 88 is connected to the exhaust mechanism 190. In addition, a valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 through the buffer space 87 to the gas exhaust pipe 88. In addition, the gas supply hole 81 and the gas exhaust hole 86 can be set in multiple numbers along the circumference of the processing chamber 6, or they can be slit-shaped. In addition, the processing gas supply source 85 and the exhaust mechanism 190 can be a mechanism set in the heat treatment device 100, or it can be equipment in a factory where the heat treatment device 100 is set.

[0066] A gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the front end of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. By opening the valve 192, the gas in the processing chamber 6 is exhausted through the transfer opening 66.

[0067] Figure 4 : is a perspective view showing the overall appearance of the holding part 7. The holding part 7 is composed of a base ring 71, a connecting part 72 and a crystal seat 74. The base ring 71, the connecting part 72 and the crystal seat 74 are all formed of quartz. That is, the holding part 7 is formed of quartz as a whole.

[0068] The base ring 71 is a circular arc quartz component with a portion missing from the circular ring. The missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described below and the base ring 71. The base ring 71 is placed on the bottom surface of the recess 62 and is thereby supported by the wall surface of the processing chamber 6 (see Figure 3 ). On the upper surface of the base ring 71, a plurality of connecting parts 72 (four in this embodiment) are provided along the circumferential direction of the annular shape. The connecting part 72 is also a quartz component and is fixed to the base ring 71 by welding.

[0069] The crystal susceptor 74 is supported by four connection portions 72 provided on the base ring 71 . Figure 5 74 is a top view of the crystal seat. Figure 6 74. The crystal base 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate-shaped member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger plane size than the semiconductor wafer W.

[0070] A guide ring 76 is provided on the peripheral portion of the upper surface of the retaining plate 75. The guide ring 76 is a circular ring-shaped component having an inner diameter greater than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 is set as an inclined surface that widens upward from the retaining plate 75. The guide ring 76 is formed of the same quartz as the retaining plate 75. The guide ring 76 can be welded to the upper surface of the retaining plate 75, or it can be fixed to the retaining plate 75 using a separately processed pin or the like. Alternatively, the retaining plate 75 and the guide ring 76 can be processed as an integral component.

[0071] The area on the upper surface of the holding plate 75 that is closer to the inner side than the guide ring 76 is set as a planar holding surface 75a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In the present embodiment, a total of 12 substrate support pins 77 are erected at intervals of 30° along the circumference of the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76). The diameter of the circle on which the 12 substrate support pins 77 are arranged (the distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is φ300 mm, the diameter of the circle is φ270 mm to φ280 mm (φ270 mm in the present embodiment). Each substrate support pin 77 is formed of quartz. A plurality of substrate support pins 77 can be set on the upper surface of the holding plate 75 by welding, or can be processed integrally with the holding plate 75.

[0072] Back to Figure 4, the four connecting parts 72 erected on the base ring 71 and the peripheral part of the holding plate 75 of the crystal seat 74 are fixed by welding. That is, the crystal seat 74 and the base ring 71 are fixedly connected by the connecting parts 72. The base ring 71 of the holding part 7 is supported by the wall surface of the processing chamber 6, and thus the holding part 7 is installed in the processing chamber 6. When the holding part 7 is installed in the processing chamber 6, the holding plate 75 of the crystal seat 74 is in a horizontal posture (a posture in which the normal line is consistent with the vertical direction). That is, the holding surface 75a of the holding plate 75 becomes a horizontal plane.

[0073] The semiconductor wafer W carried into the processing chamber 6 is placed and held in a horizontal position on a crystal base 74 of a holding portion 7 installed in the processing chamber 6. At this time, the semiconductor wafer W is supported and held on the crystal base 74 by 12 substrate support pins 77 erected on the holding plate 75. More strictly speaking, the upper ends of the 12 substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. The heights of the 12 substrate support pins 77 (the distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75) are uniform, so the semiconductor wafer W can be supported in a horizontal position by the 12 substrate support pins 77.

[0074] In addition, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a certain interval from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents the horizontal position of the semiconductor wafer W supported by the plurality of substrate support pins 77 from being displaced.

[0075] In addition, if Figure 4 and Figure 5 As shown, an opening 78 is formed vertically through the holding plate 75 of the crystal seat 74. The opening 78 is for the edge radiation thermometer 20 (see Figure 3 ) is provided to receive radiation light (infrared light) radiated from the lower surface of the semiconductor wafer W held on the crystal base 74. That is, the edge radiation thermometer 20 receives the light radiated from the lower surface of the semiconductor wafer W held on the crystal base 74 through the opening 78, and measures the temperature of the semiconductor wafer W. Furthermore, four through holes 79 are provided on the holding plate 75 of the crystal base 74, through which the lift pins 12 of the transfer mechanism 10 described below pass in order to transfer the semiconductor wafer W.

[0076] Figure 7 1 is a top view of the transfer mechanism 10. Figure 81 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arms 11 are formed in an arc shape along the substantially annular recess 62. Two lift pins 12 are provided on each transfer arm 11. Each transfer arm 11 can be rotated by a horizontal moving mechanism 13. The horizontal moving mechanism 13 enables a pair of transfer arms 11 to be in a transfer operation position ( Figure 7 The solid line position) and the retreat position ( Figure 7 The transfer action position is below the crystal seat 74, and the retreat position is further outside the crystal seat 74. As the horizontal movement mechanism 13, each transfer arm 11 can be rotated separately by a separate motor, or a link mechanism can be used to rotate a pair of transfer arms 11 in conjunction with one motor.

[0077] In addition, the pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIG. 1 ) formed in the crystal seat 74. Figure 4 , 5 ), the upper end of the lift pin 12 protrudes from the upper surface of the crystal seat 74. On the other hand, when the lifting mechanism 14 lowers the pair of transfer arms 11 to the transfer action position, the lift pin 12 is pulled out from the through hole 79, and the horizontal moving mechanism 13 moves the pair of transfer arms 11 in a manner to open them, each transfer arm 11 moves to the retreat position. The retreat position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. The base ring 71 is placed on the bottom surface of the recess 62, and therefore, the retreat position of the transfer arm 11 becomes the inner side of the recess 62. In addition, an exhaust mechanism (not shown) is also provided near the portion of the transfer mechanism 10 where the drive portion (the horizontal moving mechanism 13 and the lifting mechanism 14) is provided, and is configured so that the gas atmosphere around the drive portion of the transfer mechanism 10 is exhausted to the outside of the processing chamber 6.

[0078] Back to Figure 3 The heat treatment section 160 has two radiation thermometers, an edge radiation thermometer (edge ​​pyrometer) 20 and a center radiation thermometer (center pyrometer) 25. As described above, the edge radiation thermometer 20 is a wafer thermometer that receives infrared light radiated from the lower surface of the semiconductor wafer W via the opening 78 of the crystal seat 74, and measures the temperature of the semiconductor wafer W by the intensity of the infrared light. On the other hand, the center radiation thermometer 25 is a crystal seat thermometer that receives infrared light radiated from the center of the crystal seat 74, and measures the temperature of the crystal seat 74 by the intensity of the infrared light. In addition, for the convenience of illustration, Figure 3In FIG. 1 , the edge radiation thermometer 20 and the center radiation thermometer 25 are described in the interior of the processing chamber 6 , but they are both mounted on the outer wall surface of the processing chamber 6 and receive infrared light through the through holes provided in the outer wall surface.

[0079] The flash lamp room 5 disposed above the processing chamber 6 is provided with a light source including a plurality of (in this embodiment, 30) xenon flash lamps FL inside a housing 51, and a reflector 52 disposed so as to cover the upper part of the light source. In addition, a light radiation window 53 is installed at the bottom of the housing 51 of the flash lamp room 5. The light radiation window 53 constituting the floor portion of the flash lamp room 5 is a plate-shaped quartz window formed of quartz. By disposing the flash lamp room 5 above the processing chamber 6, the light radiation window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the processing chamber 6 through the light radiation window 53 and the upper chamber window 63.

[0080] The flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and are arranged in a plane so that their length directions are parallel to each other along the main surface (i.e., along the horizontal direction) of the semiconductor wafer W held by the holding portion 7. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

[0081] The xenon flash lamp FL includes: a rod-shaped glass tube (discharge tube) in which xenon gas is sealed, and an anode and a cathode connected to a capacitor are arranged at both ends; and a trigger electrode is attached to the outer peripheral surface of the glass tube. Xenon gas is an electrical insulator, so even if the capacitor stores electric charge, electricity does not flow in the glass tube under normal conditions. However, when a high voltage is applied to the trigger electrode to break the insulation, the electricity stored in the capacitor flows instantaneously in the glass tube, and light is emitted by the excitation of the atoms or molecules of the xenon gas at this time. In this xenon flash lamp FL, the electrostatic energy stored in the capacitor in advance is converted into an extremely short light pulse of 0.1 milliseconds to 100 milliseconds, so it has the following characteristics: it can emit extremely strong light compared to a light source that is continuously lit like a halogen lamp HL. That is, the flash lamp FL is a pulse light lamp that emits light instantaneously in an extremely short time of less than 1 second. In addition, the light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.

[0082] In addition, the reflector 52 is provided above the plurality of flash lamps FL so as to cover them all. The basic function of the reflector 52 is to reflect the flash emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and its surface (the surface facing the flash lamp FL) is roughened by blasting.

[0083] The halogen lamp house 4 disposed below the processing chamber 6 has a plurality of (40 in this embodiment) halogen lamps HL built inside a housing 41. The plurality of halogen lamps HL irradiate the heat treatment space 65 with light from below the processing chamber 6 through the lower chamber window 64.

[0084] Fig. 9 It is a top view showing the arrangement of a plurality of halogen lamps HL. In the present embodiment, 20 halogen lamps HL are arranged in the upper and lower sections. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in the upper and lower sections are arranged in parallel with each other along the main surface of the semiconductor wafer W held by the holding portion 7 (i.e., along the horizontal direction) in their respective length directions. Therefore, the plane formed by the arrangement of the halogen lamps HL in the upper and lower sections is a horizontal plane.

[0085] In addition, if Fig. 9 As shown, the upper and lower sections are both arranged with a higher density of halogen lamps HL in the area opposite to the peripheral portion than in the area opposite to the central portion of the semiconductor wafer W held by the holding portion 7. That is, in both the upper and lower sections, the arrangement spacing of the halogen lamps HL in the peripheral portion is shorter than in the central portion of the lamp arrangement. Therefore, when heating is performed by light irradiation from the halogen lamps HL, a larger amount of light can be irradiated to the peripheral portion of the semiconductor wafer W, which is prone to temperature drop.

[0086] The lamp group including the upper halogen lamps HL and the lamp group including the lower halogen lamps HL are arranged in a lattice-like manner, that is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of each upper halogen lamp HL is perpendicular to the longitudinal direction of each lower halogen lamp HL.

[0087] The halogen lamp HL is a filament-type light source that turns the filament incandescent and emits light by energizing the filament disposed inside a glass tube. A gas formed by introducing a trace amount of halogen elements (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is sealed inside the glass tube. By introducing the halogen element, the temperature of the filament can be set to a high temperature while suppressing the breakage of the filament. Therefore, the halogen lamp HL has the following characteristics: compared with a conventional incandescent bulb, it has a longer life and can continuously irradiate stronger light. That is, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least 1 second. In addition, the halogen lamp HL is a rod-shaped lamp, so it has a long life, and by arranging the halogen lamp HL in the horizontal direction, the radiation efficiency to the semiconductor wafer W above becomes excellent.

[0088] In addition, a reflector 43 ( Figure 3 ). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 side.

[0089] The control unit 3 controls the various operating mechanisms provided in the heat treatment apparatus 100 . Fig.10 This is a block diagram showing the structure of the control unit 3. The hardware structure of the control unit 3 is the same as that of a general computer. That is, the control unit 3 has: a CPU (Central Processing Unit), which is a circuit that performs various calculations; a ROM (Read Only Memory), which is a dedicated read-only memory that stores basic programs; a RAM (Random Access Memory), which is a readable and writable memory that stores various information; and a disk 35 that stores control software or data, etc. The processing in the heat treatment device 100 is performed by the CPU of the control unit 3 executing a specific processing program. In addition, in Figure 1 In FIG. 1 , the control unit 3 is shown in the indexer unit 101 , but the present invention is not limited thereto, and the control unit 3 can be arranged at any position in the heat treatment apparatus 100 .

[0090] like Fig.10 As shown, in the magnetic disk 35 as the storage unit of the control unit 3, the product process recipe for the product wafer W and the dummy process recipe for the dummy wafer DW are associated and stored. This will be described further below.

[0091] A touch panel 33 of liquid crystal is connected to the control unit 3. The touch panel 33 is, for example, provided on the outer wall of the heat treatment device 100. The touch panel 33 displays various information and accepts input of various comments or parameters. That is, the touch panel 33 has the functions of both a display unit and an input unit. The operator of the heat treatment device 100 can input commands or parameters from the touch panel 33 while confirming the information displayed on the touch panel 33. In addition, a combination of an input unit such as a keyboard or a mouse and a display unit such as a liquid crystal display can be used instead of the touch panel 33.

[0092] In addition, the control unit 3 of the heat treatment apparatus 100 can communicate with the host computer 39. The host computer 39 is a controller that manages the entirety of the plurality of heat treatment apparatuses 100 installed in the semiconductor manufacturing plant. The host computer 39 also controls the transportation of the carriers C of the plurality of heat treatment apparatuses 100 by OHT (Overhead Hoist Transfer) in the semiconductor manufacturing plant. In addition, the communication between the host computer 39 and the control unit 3 may be wired or wireless.

[0093] In addition to the above-mentioned structure, in order to prevent the temperature of the halogen lamp room 4, the flash lamp room 5 and the processing chamber 6 from excessively rising due to the heat energy generated by the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W, the heat treatment unit 160 also has various cooling structures. For example, a water cooling pipe (not shown) is provided on the wall of the processing chamber 6. In addition, the halogen lamp room 4 and the flash lamp room 5 are provided with an air cooling structure that forms a gas flow inside to discharge heat. In addition, air is also supplied to the gap between the upper chamber window 63 and the lamp radiation window 53 to cool the flash lamp room 5 and the upper chamber window 63.

[0094] Next, the processing operation of the heat treatment device 100 of the present invention is described. Here, after describing the processing operation for the semiconductor wafer (product wafer) W that becomes a product, the heat treatment of the dummy wafer DW is described. The semiconductor wafer W that becomes the processing object is a semiconductor substrate to which impurities (ions) are added by ion implantation. The activation of the impurities is performed by flash irradiation heating treatment (annealing) using the heat treatment device 100.

[0095] First, unprocessed semiconductor wafers W injected with impurities are placed on the first load port 110a or the second load port 110b of the indexer section 101 in a state where a plurality of wafers are stored in the carrier C. Then, the transfer robot 120 takes out the unprocessed semiconductor wafers W from the carrier C one by one and carries them into the alignment chamber 231 of the alignment section 230. In the alignment chamber 231, the semiconductor wafer W is rotated around the vertical axis in a horizontal plane with its center as the rotation center, and the orientation of the semiconductor wafer W is adjusted by optically detecting notches and the like.

[0096] Next, the transfer robot 120 of the indexer unit 101 takes out the semiconductor wafer W whose direction has been adjusted from the alignment chamber 231, and carries it into the first cooling chamber 131 of the cooling unit 130 or the second cooling chamber 141 of the cooling unit 140. The unprocessed semiconductor wafer W carried into the first cooling chamber 131 or the second cooling chamber 141 is carried out into the transfer chamber 170 by the transfer robot 150. When the unprocessed semiconductor wafer W is transferred from the indexer unit 101 to the transfer chamber 170 via the first cooling chamber 131 or the second cooling chamber 141, the first cooling chamber 131 and the second cooling chamber 141 function as passages for carrying out the transfer of the semiconductor wafer W.

[0097] The transfer robot 150 that has taken out the semiconductor wafer W rotates toward the heat treatment unit 160. Then, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 transfers the unprocessed semiconductor wafer W into the processing chamber 6. At this time, if the semiconductor wafer W that has been previously heat-treated exists in the processing chamber 6, after taking out the heat-treated semiconductor wafer W by one of the transfer hands 151a and 151b, the unprocessed semiconductor wafer W is transferred into the processing chamber 6 to perform wafer replacement. Thereafter, the gate valve 185 closes the space between the processing chamber 6 and the transfer chamber 170.

[0098] The semiconductor wafer W loaded into the processing chamber 6 is preheated by the halogen lamp HL and then flash-heated by flash irradiation from the flash lamp FL. The impurities implanted into the semiconductor wafer W are activated by the flash-heating.

[0099] After the flash heat treatment is completed, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170 again, and the transfer robot 150 transfers the semiconductor wafer W after the flash heat treatment from the processing chamber 6 to the transfer chamber 170. The transfer robot 150 that has taken out the semiconductor wafer W rotates from the processing chamber 6 toward the first cooling chamber 131 or the second cooling chamber 141. In addition, the gate valve 185 closes the space between the processing chamber 6 and the transfer chamber 170.

[0100] Thereafter, the transfer robot 150 transfers the semiconductor wafer W after the heat treatment to the first cooling chamber 131 of the cooling unit 130 or the second cooling chamber 141 of the cooling unit 140. At this time, if the semiconductor wafer W completely passes through the first cooling chamber 131 before the heat treatment, it is also transferred to the first cooling chamber 131 after the heat treatment, and if the semiconductor wafer W completely passes through the second cooling chamber 141 before the heat treatment, it is also transferred to the second cooling chamber 141 after the heat treatment. In the first cooling chamber 131 or the second cooling chamber 141, the semiconductor wafer W after the flash heat treatment is cooled. The temperature of the entire semiconductor wafer W at the time of being transferred out of the processing chamber 6 of the heat treatment unit 160 is relatively high, so it is cooled to near room temperature by the first cooling chamber 131 or the second cooling chamber 141.

[0101] After a specific cooling treatment time, the transfer robot 120 carries out the cooled semiconductor wafers W from the first cooling chamber 131 or the second cooling chamber 141 and returns them to the carrier C. When a specific number of processed semiconductor wafers W are accommodated on the carrier C, the carrier C is carried out from the first load port 110 a or the second load port 110 b of the indexer part 101 .

[0102] The heat treatment in the heat treatment part 160 is further described. Before the semiconductor wafer W is carried into the processing chamber 6, the valve 84 for gas supply is opened, and the valves 89 and 192 for exhaust are opened to start exhausting the gas supply in the processing chamber 6. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. In addition, when the valve 89 is opened, the gas in the processing chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the processing chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65.

[0103] In addition, by opening the valve 192, the gas in the processing chamber 6 is also exhausted from the transfer opening 66. Furthermore, by omitting the exhaust mechanism (not shown), the gas atmosphere around the driving part of the transfer mechanism 10 is also exhausted. In addition, during the heat treatment of the semiconductor wafer W in the heat treatment part 160, nitrogen gas is continuously supplied to the heat treatment space 65, and the supply amount thereof is appropriately changed according to the treatment process.

[0104] Then, the gate valve 185 is opened, and the transport opening 66 is opened, and the semiconductor wafer W to be processed is transported into the heat treatment space 65 in the processing chamber 6 through the transport opening 66 by the transport robot 150. The transport robot 150 moves the transport hand 151a (or the transport hand 151b) holding the unprocessed semiconductor wafer W in and out to the position just above the holding part 7 and stops there. Then, the pair of transfer arms 11 of the transfer mechanism 10 move horizontally from the retreat position and rise to the transfer action position, whereby the lift pins 12 protrude from the upper surface of the holding plate 75 of the crystal base 74 through the through holes 79 to receive the semiconductor wafer W. At this time, the lift pins 12 rise to a position higher than the upper end of the substrate support pins 77.

[0105] After placing the unprocessed semiconductor wafer W on the lift pins 12, the transport robot 150 withdraws the transport hand 151a from the heat treatment space 65 and closes the transport opening 66 through the gate valve 185. Then, the pair of transfer arms 11 descends, whereby the semiconductor wafer W is transferred from the transfer mechanism 10 to the crystal seat 74 of the holding portion 7 and is held from below in a horizontal posture. The semiconductor wafer W is supported and held on the crystal seat 74 by a plurality of substrate support pins 77 erected on the holding plate 75. In addition, the semiconductor wafer W is held on the holding portion 7 with the surface on which the pattern formation is completed and the impurities are injected as the upper surface. A specific gap is formed between the back side (the main surface on the opposite side to the front side) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 that have descended to the bottom of the crystal seat 74 retreat to the retreat position, that is, the inner side of the recess 62, through the horizontal moving mechanism 13.

[0106] After the semiconductor wafer W is held horizontally from below by the crystal seat 74 of the holding portion 7, 40 halogen lamps HL are lit at the same time to start preheating (auxiliary heating). The halogen light emitted from the halogen lamps HL passes through the lower chamber window 64 and the crystal seat 74 formed by quartz and irradiates from the lower surface of the semiconductor wafer W. By receiving the light irradiation from the halogen lamps HL, the semiconductor wafer W is preheated and the temperature rises. In addition, the transfer arm 11 of the transfer mechanism 10 retreats to the inner side of the recess 62, so that the heating by the halogen lamps HL is not hindered.

[0107] When preheating using the halogen lamp HL is performed, the temperature of the semiconductor wafer W is measured by the edge radiation thermometer 20. That is, the edge radiation thermometer 20 receives infrared light radiated from the lower surface of the semiconductor wafer W held on the crystal base 74 through the opening 78 to measure the temperature of the wafer during heating. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W heated by the light irradiation from the halogen lamp HL reaches a specific preheating temperature T1. That is, the control unit 3 feedback controls the output of the halogen lamp HL based on the measured value measured by the edge radiation thermometer 20 so that the temperature of the semiconductor wafer W reaches the preheating temperature T1. The preheating temperature T1 is set to about 600°C to 800°C (700°C in the present embodiment), so that there is no concern that impurities added to the semiconductor wafer W will diffuse due to heat.

[0108] After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the edge radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W at approximately the preheating temperature T1.

[0109] By performing the preheating using the halogen lamp HL, the temperature of the entire semiconductor wafer W is uniformly raised to the preheating temperature T1. In the preheating stage using the halogen lamp HL, there is a tendency that the temperature of the peripheral portion of the semiconductor wafer W, which is more likely to generate heat dissipation, is lower than that of the central portion. However, the arrangement density of the halogen lamps HL in the halogen lamp room 4 is higher in the area opposite to the peripheral portion than in the area opposite to the central portion of the semiconductor wafer W. Therefore, the amount of light irradiated to the peripheral portion of the semiconductor wafer W, which is more likely to generate heat dissipation, becomes larger, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.

[0110] When the temperature of the semiconductor wafer W reaches the preheating temperature T1 and a specific time has passed, the flash lamp FL performs flash irradiation on the surface of the semiconductor wafer W. At this time, part of the flash radiated from the flash lamp FL is directly directed into the processing chamber 6, and the other part is temporarily reflected by the reflector 52 and then directed into the processing chamber 6. The semiconductor wafer W is flash heated by the irradiation of these flashes.

[0111] Flash heating is performed by flash irradiation from the flash lamp FL, so the surface temperature of the semiconductor wafer W can be increased in a short time. That is, the flash irradiated from the flash lamp FL is an extremely short and strong flash of about 0.1 milliseconds to 100 milliseconds, which is an extremely short and strong flash in which the electrostatic energy stored in advance in the capacitor is converted into an extremely short light pulse. In addition, the surface temperature of the semiconductor wafer W flash-heated by the flash irradiation from the flash lamp FL instantly rises to a processing temperature T2 of more than 1000°C, and the impurities injected into the semiconductor wafer W are activated, and then the surface temperature drops rapidly. In this way, the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time by flash heating, so the impurities can be activated while suppressing the diffusion caused by the heat of the impurities injected into the semiconductor wafer W. In addition, the time required for the activation of the impurities is extremely short compared to the time required for the thermal diffusion thereof, so the activation is completed even in a short time of about 0.1 milliseconds to 100 milliseconds where no diffusion occurs.

[0112] After the flash heating treatment is completed, the halogen lamp HL goes out after a specific time. As a result, the semiconductor wafer W is rapidly cooled from the preheating temperature T1. The temperature of the semiconductor wafer W being cooled is measured by the edge radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W has dropped to a specific temperature based on the measurement result of the edge radiation thermometer 20. Then, after the temperature of the semiconductor wafer W has dropped below the specific temperature, the pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retreat position again and rises to the transfer action position, whereby the lift pins 12 protrude from the upper surface of the crystal seat 74 and receive the heat-treated semiconductor wafer W from the crystal seat 74. Subsequently, the transport opening 66 closed by the gate valve 185 is opened, and the processed semiconductor wafer W placed on the lift pins 12 is carried out by the transfer hand 151b (or transfer hand 151a) of the transfer robot 150. The transfer robot 150 moves the transfer hand 151b in and out to a position directly below the semiconductor wafer W lifted by the lift pins 12 and stops there. Then, by lowering the pair of transfer arms 11, the flash-heated semiconductor wafer W is delivered and placed on the transfer hand 151b. Thereafter, the transfer robot 150 withdraws the transfer hand 151b from the processing chamber 6 and carries out the processed semiconductor wafer W.

[0113] However, typically, the semiconductor wafers W are processed in batches. A batch refers to a group of semiconductor wafers W that are subjected to the same processing under the same conditions. In the heat treatment apparatus 100 of the present embodiment, a plurality of semiconductor wafers W (for example, 25) constituting a batch are accommodated in a carrier C and loaded on the first loading port 110a or the second loading port 110b of the indexer section 101, and the semiconductor wafers W are sequentially moved from the carrier C to the processing chamber 6 and subjected to heat treatment.

[0114] Here, when the batch processing is started by using the heat treatment device 100 that has not yet been processed, the first semiconductor wafer W of the batch is moved into the processing chamber 6 at approximately room temperature, and preheating and flash heating treatment are performed. This situation is, for example, the case where the initial batch is processed after the heat treatment device 100 is started after maintenance, or the case where a long time has passed after the previous batch has been processed. During the heating treatment, the crystal seat 74 and other chamber structures will generate heat conduction due to the heated semiconductor wafer W. Therefore, the crystal seat 74, which is initially at room temperature, slowly heats up through heat storage as the number of processed semiconductor wafers W increases. In addition, a part of the infrared light emitted from the halogen lamp HL is absorbed by the lower chamber window 64. Therefore, as the number of processed semiconductor wafers W increases, the temperature of the lower chamber window 64 also slowly rises.

[0115] Moreover, when the heat treatment of about 10 semiconductor wafers W is performed, the temperature of the crystal seat 74 and the lower chamber window 64 reaches a fixed stable temperature. In the crystal seat 74 that has reached the stable temperature, the heat transfer from the semiconductor wafer W to the crystal seat 74 is balanced with the heat dissipation from the crystal seat 74. Until the temperature of the crystal seat 74 reaches the stable temperature, the heat transfer from the semiconductor wafer W is greater than the heat dissipation from the crystal seat 74, so as the number of processed semiconductor wafers W increases, the temperature of the crystal seat 74 slowly rises through heat storage. In contrast, after the temperature of the crystal seat 74 reaches the stable temperature, the heat transfer from the semiconductor wafer W is balanced with the heat dissipation from the crystal seat 74, so the temperature of the crystal seat 74 is maintained at a fixed stable temperature. In addition, the stable temperature of the chamber structure such as the crystal seat 74 refers to the temperature of the structure when the temperature of the chamber structure such as the crystal seat 74 rises and becomes fixed when a batch of semiconductor wafers W are continuously heated in the processing chamber 6 without preheating the structure. Furthermore, after the temperature of the lower chamber window 64 reaches the stable temperature, the heat absorbed by the lower chamber window 64 from the irradiation light of the halogen lamp HL is balanced with the heat released from the lower chamber window 64, so the temperature of the lower chamber window 64 is also maintained at a fixed stable temperature.

[0116] There is a problem as follows: when processing is started in the processing chamber 6 at room temperature in this way, the temperature history becomes uneven because the temperature of the structures in the processing chamber 6 in the initial semiconductor wafer W of the batch and the semiconductor wafer W from the middle is different. In addition, the initial semiconductor wafer W is supported by the low-temperature crystal seat 74 and flash heated, so there is also a case where the wafer warps. Therefore, before starting the processing of the product batch, a dummy operation (dummy processing) is implemented, that is, a dummy wafer DW that is not the processing object is moved into the processing chamber 6 for heating processing, and the crystal seat 74 and other chamber structures are heated to a stable temperature. By heating about 10 dummy wafers DW, the crystal seat 74 and other chamber structures can be heated to a stable temperature. This dummy processing is not only performed when the processing is started in the processing chamber 6 at room temperature, but also when the preheating temperature T1 or the processing temperature T2 is changed. The heat treatment of the product wafers W constituting the product lot and the dummy treatment of the dummy wafers DW are both performed according to the process recipe. The dummy treatment in this embodiment will be described below.

[0117] Fig.11 : is a flowchart showing the sequence of virtual processing. First, a product process recipe is prepared at an appropriate time (step S1). The product process recipe refers to a process recipe that specifies the processing sequence and processing conditions for the heat treatment of the semiconductor wafer (product wafer) W that becomes a product. If the content of the heat treatment is different, the product process recipe is also different. For example, if the preheating temperature T1 or the processing temperature T2, or the type of processing gas is different, the product process recipe is also different. Therefore, in the heat treatment device 100, a plurality of product process recipes are prepared and saved according to the number of patterns of the heat treatment performed. The product process recipe is prepared, for example, by the operator of the heat treatment device 100 inputting various parameters such as the target temperature during preheating (preheating temperature T1), the maintenance time at the preheating temperature T1, the applied voltage to the flash lamp FL, and the pulse width of the flash from the touch panel 33.

[0118] Next, a dummy process recipe is made (step S2). A dummy process recipe refers to a process recipe that specifies the processing order and processing conditions for the heat treatment (dummy treatment) of a dummy wafer DW. The dummy process recipe can be said to be a process recipe specialized for dummy treatment, and is a process recipe used to adjust the temperature of the structures in the chamber such as the crystal seat 74 to a stable temperature. If the heat treatment conditions are different for each product process recipe, then the stable temperature is also different. Therefore, a dummy process recipe is made for each product process recipe. The dummy process recipe is also made by the operator of the heat treatment device 100 inputting various parameters from the touch panel 33, just like the product process recipe.

[0119] Then, the produced dummy process recipe is associated with the product process recipe and stored in the disk 35 as the storage unit of the control unit 3 (step S3). A plurality of product process recipes are produced according to the number of patterns of the heat treatment of the product wafer W. In addition, if the heat treatment conditions of the product wafer W are different, the stable temperature is also different. Therefore, a dummy process recipe is produced for each product process recipe. That is, a dummy process recipe corresponding to the product process recipe is produced one to one. This dummy process recipe corresponding to each of the plurality of product process recipes is associated with the product process recipe and stored in the disk 35.

[0120] The above steps S1 to S3 are preparation operations for dummy processing. Before starting the processing of the product wafer W, the heat treatment device 100 is in a standby state until the product batch arrives. When the heat treatment device 100 is in the standby state, the halogen lamp HL and the flash lamp FL are both extinguished. Then, the heat treatment device 100 continues the standby state until a pre-notification signal is received from the host computer 39 (step S4).

[0121] The host computer 39 manages the entirety of the plurality of heat treatment apparatuses 100 installed in the semiconductor manufacturing plant, and also controls the transport of the carrier C performed by the OHT in the semiconductor manufacturing plant. When the host computer 39 causes the heat treatment apparatus 100 to process a product batch, it causes the OHT to transport the carrier C containing the unprocessed product wafers W to the heat treatment apparatus 100. The carriers C containing the unprocessed product wafers W are gathered in a storage in the semiconductor manufacturing plant, and the host computer 39 instructs the OHT to transport the carriers C containing the unprocessed product wafers W from the storage to the heat treatment apparatus 100. Then, while instructing the OHT to transport the carrier C, the host computer 39 sends a prior notice signal indicating the arrival of the unprocessed product wafers W and the product process recipe name corresponding to the product wafers W to the heat treatment apparatus 100.

[0122] Even if the host computer 39 instructs OHT to transport the carrier C, the carrier C is not immediately transported to the heat treatment device 100. OHT is responsible for transporting the carrier C of multiple heat treatment devices 100 set in the semiconductor manufacturing plant. It typically takes several minutes from receiving the instruction from the host computer 39 to transporting the carrier C to the heat treatment device 100. In this embodiment, the dummy process is performed during the period from the host computer 39 instructing OHT to transport the carrier C containing the unprocessed product wafer W to the carrier C being transported to the heat treatment device 100. Specifically, at the time when the control unit 3 of the heat treatment device 100 receives the advance notice signal sent from the host computer 39, it enters step S5 from step S4 to start the dummy process.

[0123] The dummy processing is performed by taking out the dummy wafer DW from the dummy carrier DC placed on the third load port 110c and moving it into the processing chamber 6 of the heat treatment unit 160, and performing a heat treatment on the dummy wafer DW. The dummy wafer DW is a disk-shaped silicon wafer that is the same as the semiconductor wafer W that becomes a product, and has the same size and shape as the semiconductor wafer W. However, the dummy wafer DW is not patterned or ion implanted. That is, the dummy wafer DW is a so-called bare wafer. In addition, the form of the dummy carrier DC itself is the same as the carrier C that accommodates the semiconductor wafer W that becomes a product, and in this embodiment, it is a FOUP. However, the dummy carrier DC is a carrier dedicated to the dummy wafer DW that only accommodates the dummy wafer DW.

[0124] Here, assuming that when starting the dummy processing, the dummy carrier DC stored in the storage is moved into the heat treatment device 100, and the dummy wafer DW is taken out from the dummy carrier DC, then the transportation of the dummy carrier DC also requires a corresponding time, so the start of the dummy processing will be delayed. In this embodiment, a load port dedicated to the dummy carrier DC, that is, the third load port 110c is set, and the dummy carrier DC containing a plurality of dummy wafers DW is always set in the third load port 110c. Therefore, when receiving the advance notice signal from the host computer 39, the dummy wafer DW can be immediately taken out from the dummy carrier DC placed on the third load port 110c and the dummy processing can be started.

[0125] In addition, the dummy process is performed according to the dummy process recipe associated with the product process recipe of the product wafer W expected to arrive at the heat treatment device 100. Specifically, the control unit 3 extracts the dummy process recipe associated with the product process recipe notified from the host computer 39 from the disk 35, and controls each mechanism of the heat treatment device 100 according to the dummy process recipe. According to the dummy process recipe, the dummy wafer DW is transferred from the dummy carrier DC always placed on the third load port 110c to the processing chamber 6 of the heat treatment unit 160 by the transfer robot 120 and the transfer robot 150. Then, in the processing chamber 6, the heat treatment of the dummy wafer DW is performed according to the dummy process recipe. The dummy wafer DW heated by the dummy process is used to heat the chamber structure such as the crystal base 74 and approach the stable temperature. The dummy wafer DW that has finished the heat treatment is returned to the dummy carrier DC by the transfer robot 120 and the transfer robot 150. By performing dummy processing on a number of dummy wafers DW, the temperature of the structures in the chamber, such as the crystal susceptor 74 , is adjusted to a stable temperature.

[0126] Then, after the carrier C containing the product wafer W is placed on the first load port 110a or the second load port 110b through the OHT, the processing of the product wafer W is started (step S6). As described above, the heat treatment of the product wafer W is performed according to the product process recipe notified from the host computer 39. The dummy process is performed according to the dummy process recipe associated with the product process recipe, so the first product wafer W is held on the crystal base 74 that is adjusted to a stable temperature suitable for the content of the heat treatment of the product wafer W. Therefore, the heat treatment history can be made uniform for all the product wafers W constituting the product batch.

[0127] In the present embodiment, when the control unit 3 receives a pre-notification signal indicating that the product wafer W arrives at the heat treatment device 100, the dummy processing of the dummy wafer DW is started. That is, the dummy processing is started before the product wafer W arrives at the heat treatment device 100. Thus, the time before the product wafer W arrives at the heat treatment device 100 can be effectively utilized, and the waiting time of the product wafer W arriving at the first load port 110a or the second load port 110b can be minimized. That is, the dummy processing can be performed while suppressing the reduction in the processing efficiency of the product wafer W to a minimum.

[0128] When the control unit 3 receives the advance notice signal, the dummy processing can be started immediately because the dummy carrier DC for accommodating a plurality of dummy wafers DW is always provided in the third load port 110c dedicated to the dummy carrier. When the control unit 3 receives the advance notice signal, the dummy wafer DW can be unloaded from the dummy carrier DC immediately and the dummy processing can be started.

[0129] In addition, by executing the dummy processing on the dummy wafer DW according to the dummy process recipe associated with the product process recipe corresponding to the expected product wafer W, the temperature of the chamber structure such as the crystal susceptor 74 can be adjusted to a stable temperature suitable for the content of the heat treatment of the product wafer W. As a result, the crystal susceptor 74 is maintained at a stable temperature covering all the product wafers W constituting the product batch, and the heat treatment history can be made uniform.

[0130] The above is a description of the embodiment of the present invention, but the present invention can be modified in various ways without departing from the main purpose. For example, in the above embodiment, the process recipe is edited by the touch panel 33 and stored in the disk 35, but the process recipe can also be prepared by the host computer 39 and submitted to each heat treatment device 100 during processing.

[0131] In the above embodiment, the flash lamp room 5 is provided with 30 flash lamps FL, but the present invention is not limited thereto, and the number of flash lamps FL can be set to any number. In addition, the flash lamps FL are not limited to xenon flash lamps, and can also be krypton flash lamps. In addition, the number of halogen lamps HL provided in the halogen lamp room 4 is not limited to 40, and can be set to any number.

[0132] In addition, in the above-described embodiment, a filament-type halogen lamp HL is used as a continuous lighting lamp that continuously emits light for more than 1 second to preheat the semiconductor wafer W, but the present invention is not limited thereto, and a discharge arc lamp (e.g., a xenon arc lamp) may be used as a continuous lighting lamp instead of the halogen lamp HL to perform preheating. In this case, the dummy wafer DW is also heated by light irradiation from the arc lamp.

[0133] In addition, the substrate to be processed by the heat treatment apparatus 100 is not limited to a semiconductor wafer, and may be a glass substrate used for a flat panel display such as a liquid crystal display device or a substrate for a solar cell.

[0134] [Explanation of Symbols]

[0135] 3. Control Unit

[0136] 4 Halogen lamp room

[0137] 5 Flash Room

[0138] 6 Processing Chamber

[0139] 7. Maintaining part

[0140] 10 Transfer mechanism

[0141] 33 Touch Panel

[0142] 35 Disk

[0143] 39 Host Computer

[0144] 65 Heat treatment space

[0145] 74 Crystal seat

[0146] 100 Heat treatment device

[0147] 101 Indexer

[0148] 110 Load Port

[0149] 110a Load port 1

[0150] 110b 2nd load port

[0151] 110c Load port 3

[0152] 120 Handover Robot

[0153] 130, 140 Cooling unit

[0154] 150 Transport Robot

[0155] 151a, 151b Carrying hand

[0156] 160 Heat Treatment Department

[0157] C Vehicles

[0158] DC Virtual Vehicle

[0159] DW Dummy Wafer

[0160] FL Flash

[0161] HL halogen lamp

[0162] W Semiconductor Wafer

Claims

1. A heat treatment method, characterized in that: The invention relates to a heat treatment method for managing the heat treatment of a dummy wafer, comprising: A receiving process, when a computer managing a heat treatment device instructs to transfer an unprocessed product wafer to the heat treatment device, and before a carrier containing the product wafer is actually transferred into the heat treatment device, receiving a prior notice signal of the product wafer arriving at the heat treatment device; and The dummy processing process starts heat treatment of the dummy wafer by using the heat treatment device when receiving the advance notice signal.

2. The heat treatment method according to claim 1, characterized in that In the dummy processing process, the dummy wafer is unloaded from a dummy carrier which is always provided on a load port dedicated to the dummy carrier provided in the heat treatment apparatus and is subjected to heat treatment.

3. The heat treatment method according to claim 1 or 2, characterized in that: In the dummy processing recipe, the dummy wafer is thermally treated according to the dummy process recipe associated with the product process recipe that specifies the order and treatment conditions of the thermal treatment on the product wafer.

4. A heat treatment device, characterized in that: It is a heat treatment device for managing the heat treatment of a dummy wafer, and has: A heat treatment section performs heat treatment on the dummy wafer; and The control unit starts heat treatment of the dummy wafer upon receiving a prior notice signal of the arrival of the product wafer at the heat treatment device before the carrier containing the product wafer is actually moved into the heat treatment device, when the computer managing the heat treatment device instructs the unprocessed product wafer to be transferred to the heat treatment device.

5. The heat treatment device according to claim 4, characterized in that It also has a dedicated load port for virtual vehicles. When the advance signal is received, the dummy wafer is unloaded from the dummy carrier which is always arranged on the load port and transported to the thermal processing section.

6. The heat treatment device according to claim 4 or 5, characterized in that The method further comprises a storage unit for storing a product process recipe that specifies the sequence and processing conditions of the heat treatment of the product wafer and a dummy process recipe that specifies the sequence and processing conditions of the heat treatment of the dummy wafer in association with each other. When the advance signal is received, the dummy wafer is thermally treated according to the dummy process recipe associated with the product process recipe.

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