An optical module

By adopting dual CPU mode and SFP-DD package design in optical modules, high-speed processing of PAM4 signals is realized, solving the problem of insufficient transmission rate of existing optical modules, improving transmission rate and reducing costs, and suitable for 5G networks high-speed data transmission.

CN111371501BActive Publication Date: 2025-01-14DONGGUAN MENTECH OPTICAL & MAGNETIC CO LTD
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Patent Information

Application Number
CN202010273227.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-04-09
Publication Date
2025-01-14
Estimated Expiration
2040-04-09

AI Technical Summary

Technical Problem

The existing PAM4 optical modules cannot meet the requirements of 5G networks to transmit data at high speed, and the transmission rate is not enough to meet the future high bandwidth requirements.

Method used

Design an optical module, adopts a dual CPU working mode, combines the microcontroller MCU and digital signal processor DSP, and realizes high-speed PAM4 signal processing through the combination of software and hardware, adopts SFP-DD package and 170MHz crystal oscillator to realize bidirectional two channels Sending and receiving, supporting the maximum speed of 57.8Gbps/lane, meeting the needs of 128G FC optical modules.

Benefits of technology

It achieves a twice-time improvement in transmission rate, can meet the requirements of high-speed data transmission in 5G networks, and has the advantages of low cost, easy to produce in large quantities and large-scale use.

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Abstract

The present invention discloses an optical module, including MCU, DSP, EEPROM, LDD, TIA / LA, VCSEL and PD; the SPI interface of DSP and the SPI interface of MCU are respectively connected to EEPROM; the first electrical signal transceiver interface and the second electrical signal transceiver interface of DSP are both connected to an external host end, the GPIO interface and the MDIO interface of DSP are respectively connected to the GPIO interface and the MDIO interface of MCU, and DSP is also connected to an external crystal oscillator; LDD is respectively connected to DSP, MCU and VCSEL; TIA / LA is respectively connected to DSP, MCU and PD; VCSEL is provided with a first optical signal transmitting interface and a second optical signal transmitting interface; PD is provided with a first optical signal receiving interface and a second optical signal receiving interface. The optical module provided by the present invention realizes two-way transceiver of two channels in one packaging space, and compared with the existing PAM4 optical module products, the transmission rate is increased by 2 times, which can meet the requirements of high-speed data transmission of 5G network, and has the advantages of low cost, easy mass production and wide range of use.
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Description

Technical Field

[0001] The present invention relates to the field of PAM4 optical module communication technology, and in particular to an optical module. Background Art

[0002] In recent years, the rapid development of application markets such as big data, cloud computing, 5G, the Internet of Things, and artificial intelligence has led to a sharp increase in traffic demand, which has placed higher and higher requirements on Internet bandwidth. However, it is becoming increasingly difficult to improve the bandwidth of optical devices. Therefore, it is urgent to adopt complex modulation methods. At present, in the upgrade plan of NRZ (Non-Return-to-Zero) modulation method, PAM4 (4Pulse Amplitude Modulation) is the most promising high-order modulation method, which will support optical interconnection to move towards higher rates. Specifically, PAM4 is a type of PAM (Pulse Amplitude Modulation) modulation technology. It is a popular signal transmission technology after NRZ (Non-Return-to-Zero). It is also a representative of multi-order modulation technology. It can effectively improve bandwidth utilization efficiency and has been widely used in the field of high-speed signal interconnection. NRZ signals use high and low signal levels to represent 1 and 0 of digital logic signals, and each clock cycle can transmit 1bit of logic information. PAM4 signals use 4 different signal levels for signal transmission, and each clock cycle can transmit 2 bits of logical information, namely 00, 01, 10, and 11. Therefore, under the same baud rate conditions, the bit rate of PAM4 signals is twice that of NRZ signals, which doubles the transmission efficiency and effectively reduces costs. When wireless communications enter the 5G era, the bearer network traffic will increase by 2 to 3 orders of magnitude compared to the 4G era. Therefore, it is foreseeable that PAM4 technology will be widely used in future 5G bearer high-speed optical modules.

[0003] At present, a small number of optical modules using PAM4 modulation technology that have appeared on the market are single-channel optical modules, and the maximum single-channel transmission rate can reach 57.8Gbps. Although this is twice the transmission rate of previous generations of optical modules using NRZ modulation technology, with the development of optical communication products, especially the demand for 5G fronthaul, single-channel optical modules using PAM4 modulation technology also have the defect of not being able to better meet the requirements of high-speed data transmission in the rapidly developing 5G network. Therefore, if the transmission rate of optical module products can be further improved, it will undoubtedly gain an advantage in the competition for 5G networks. Summary of the invention

[0004] The present invention provides an optical module to solve the deficiencies of the prior art.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] An optical module includes a microcontroller MCU, a digital signal processor DSP, an electrically erasable programmable read-only memory EEPROM, a laser diode driver LDD, a transimpedance amplifier / limiting amplifier TIA / LA, a vertical cavity surface emitting laser VCSEL and a photodiode PD; wherein,

[0007] The SPI interface of the DSP and the SPI interface of the MCU are connected to the EEPROM respectively;

[0008] The first electrical signal transceiver interface and the second electrical signal transceiver interface of the DSP are both connected to an external host terminal, the GPIO interface and the MDIO interface of the DSP are respectively connected to the GPIO interface and the MDIO interface of the MCU, and the DSP is also connected to an external crystal oscillator;

[0009] The LDD is connected to the DSP, MCU and VCSEL respectively;

[0010] The TIA / LA is connected to the DSP, MCU and PD respectively;

[0011] The VCSEL is provided with a first optical signal transmitting interface and a second optical signal transmitting interface;

[0012] The PD is provided with a first optical signal receiving interface and a second optical signal receiving interface.

[0013] Further, in the optical module, the EEPROM stores a mirror program for the DSP to load when powered on;

[0014] The flash memory Flash inside the MCU stores an image program for loading when the MCU is powered on.

[0015] Furthermore, in the optical module, the optical module is an optical module in a SFP-DD packaging form.

[0016] Furthermore, in the optical module, the crystal oscillator is a 170 MHz crystal oscillator.

[0017] Further, in the optical module, the MCU and the LDD are connected via a first I2C bus;

[0018] The MCU and the TIA / LA are connected via a second I2C bus.

[0019] An optical module provided in an embodiment of the present invention realizes bidirectional transmission and reception of two channels in one packaging space. Compared with existing PAM4 optical module products, the transmission rate is increased by 2 times, which can meet the requirements of high-speed data transmission in 5G networks. It has the advantages of low cost, easy mass production and wide range of use. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0021] Figure 1 is a schematic diagram of the structure of an optical module provided by an embodiment of the present invention;

[0022] Figure 2 is an internal signal processing block diagram of a DSP provided by an embodiment of the present invention;

[0023] Figure 3 is an internal signal processing block diagram of a DSP provided by an embodiment of the present invention;

[0024] Figure 4 It is an internal signal processing block diagram of the DSP provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] In the description of the present invention, it is to be understood that when a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally disposed component. When a component is considered to be "disposed on" another component, it may be directly disposed on the other component or there may be a centrally disposed component.

[0027] In addition, terms such as "long", "short", "inside" and "outside" indicating directions or positional relationships are based on the directions or positional relationships shown in the accompanying drawings and are only used to facilitate the description of the present invention. They do not indicate or imply that the device or component referred to must have this specific direction or operate with a specific direction structure, and should not be understood as a limitation of the present invention.

[0028] The technical solution of the present invention is further described below with reference to the accompanying drawings and through specific implementation methods.

[0029] Embodiment 1

[0030] Please refer to Figure 1 The embodiment of the present invention provides an optical module, which adopts a dual CPU working mode, that is, a DSP combined with an MCU working mode, and realizes the processing of high-speed PAM4 signals by combining software and hardware, providing a competitive technical solution for 5G data center optical modules. Specifically, the optical module includes a microcontroller MCU, a digital signal processor DSP, an electrically erasable programmable read-only memory EEPROM, a laser diode driver LDD, a transimpedance amplifier / limiting amplifier TIA / LA, a vertical cavity surface emitting laser VCSEL and a photodiode PD; wherein,

[0031] The SPI interface of the DSP and the SPI interface of the MCU are connected to the EEPROM respectively;

[0032] The first electrical signal transceiver interface and the second electrical signal transceiver interface of the DSP (i.e. Figure 1 The RX1, TX1 and RX2, TX2) in the DSP are connected to an external host board, the GPIO interface and the MDIO interface of the DSP are connected to the GPIO interface and the MDIO interface of the MCU respectively, and the DSP is also connected to an external crystal oscillator;

[0033] The LDD is connected to the DSP, MCU and VCSEL respectively;

[0034] The TIA / LA is connected to the DSP, MCU and PD respectively;

[0035] The VCSEL is provided with a first optical signal transmitting interface and a second optical signal transmitting interface (i.e. Figure 1 TX1 and TX2 in );

[0036] The PD is provided with a first optical signal receiving interface and a second optical signal receiving interface (i.e. Figure 1 RX1 and RX2 in the ).

[0037] It should be noted that the DSP controls two-way high-speed electrical signal processing on the host side, and transmits and receives electrical signals with the external device, namely the host side.

[0038] In this embodiment, the EEPROM stores a mirror program for loading when the DSP is powered on; and the flash memory Flash inside the MCU stores a mirror program for loading when the MCU is powered on.

[0039] Specifically, the optical module provided in this embodiment uses dual hex image files, one of which is the hex image file of DSP, which is stored in EEPROM. When the optical module is started, MCU controls DSP through GPIO interface, allowing DSP to load its own hex image program to EEPROM through SPI interface (DSP internal signal processing such as Figures 2 to 4 As shown in the figure, the DSP image program is sent to the EEPROM by the MCU through the SPI interface) for its own work use; the other is the hex image file of the MCU, which is stored in the flash inside the MCU. When the MCU is powered on and initialized, it will automatically load its own hex image program from the flash.

[0040] Preferably, the optical module adopts a new SFP-DD package, and the electrical interface of the optical module includes 40 metal finger pins, and the specific pin definitions are shown in Table 1 below.

[0041] Table 1: Optical module metal finger pin definition table

[0042] Table 1-Pad Function Definition

[0043]

[0044] The optical module provided in this embodiment adopts PAM4 encoding technology according to the SFP-DD standard protocol, and has an external 170MHz crystal oscillator, allowing the MCU to control DSP overclocking, and can achieve a maximum rate of 57.8Gbps / lane (abbreviated as 57.8G). A single module can achieve 115.6G rate transmission. The optical module can be used as a 128G FC optical module for a 128G Fibre Channel storage network link in a data center.

[0045] Specifically, the input clock of DSP is provided by an external crystal oscillator, that is, the 170MHz crystal oscillator mentioned above. MCU controls DSP through MDIO to let the DSP phase-locked loop lock the 170MHz clock. Normally, 100G PAM4 optical modules use 156.25MHz clock. This is an overclocking application and can be used for 128G FC optical modules.

[0046] In order to enhance the adaptability of the optical module, that is, to adapt to NRZ modulation and PAM4 modulation at the same time, so that the practical value of the optical module can be further exerted, the optical module provided in this embodiment can be controlled by the MCU through the MDIO interface DSP to switch between two-way PAM4 and NRZ modulation.

[0047] Preferably, the MCU and the LDD are connected via a first I2C bus (i.e. Figure 1 The MCU and the TIA / LA are connected via the second I2C bus (i.e., Figure 1 The TIA / LA is controlled via the second I2C bus.

[0048] An optical module provided in an embodiment of the present invention realizes bidirectional transmission and reception of two channels in one packaging space. Compared with existing PAM4 optical module products, the transmission rate is increased by 2 times, which can meet the requirements of high-speed data transmission in 5G networks. It has the advantages of low cost, easy mass production and wide range of use.

[0049] Thus far, the description of the above-described embodiments is provided for the purpose of illustration and description. It is not intended to be exhaustive or to limit the present disclosure. The individual elements or features of a specific embodiment are generally not subject to the limitations of the specific embodiment, but when applicable, they can be interchanged and used for selected embodiments even if not specifically shown or described. In many respects, the same element or feature also can be changed. This variation is not considered to be a departure from the present disclosure, and all such modifications are intended to be included in the scope of the present disclosure.

[0050] Example embodiments are provided so that the present disclosure will be thorough and the scope will be fully conveyed to those skilled in the art. In order to thoroughly understand the embodiments of the present disclosure, numerous details are set forth, such as examples of specific parts, devices, and methods. Obviously, for those skilled in the art, it is not necessary to use specific details, the example embodiments can be implemented in many different forms, and neither should be construed as limiting the scope of the present disclosure. In certain example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.

[0051] Here, specialized vocabulary is used only for the purpose of describing specific example embodiments, and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "a" and "the" used herein may be intended to include plural forms as well. The terms "including" and "having" are inclusive, and therefore specify the presence of the claimed features, wholes, steps, operations, elements and / or components, but do not exclude the presence or additional presence of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof. Unless the order of execution is clearly indicated, the method steps, processing and operations described herein are not interpreted as necessarily needing to be performed in the specific order discussed and shown. It should also be understood that additional or optional steps may be adopted.

[0052] When an element or layer is referred to as being "on ...", "engaged with ...", "connected to" or "coupled to" another element or layer, it may be directly on another element or layer, engaged with another element or layer, connected to or coupled to another element or layer, or there may be an intervening element or layer. In contrast, when an element or layer is referred to as being "directly on ...", "directly engaged with ...", "directly connected to" or "directly coupled to" another element or layer, there may be no intervening element or layer. Other words used to describe element relationships should be interpreted in a similar manner (e.g., "between ..." and "directly between ...", "adjacent" and "directly adjacent", etc.). The term "and / or" used herein includes any and all combinations of one or more of the associated listed items. Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts are not limited by these terms. These terms may only be used to distinguish one element, component, region or part from another element, component, region or part. Unless clearly indicated by the context, the use of terms such as "first", "second" and other numerical terms herein does not imply sequence or order. Therefore, the first element, component, region, layer or part discussed below can adopt the terminology of the second element, component, region, layer or part without departing from the teaching of the exemplary embodiment.

[0053] Spatially relative terms, such as "inside", "outside", "below", "below...", "lower", "above", "upper", etc., may be used herein for ease of description to describe the relationship between one element or feature and one or more other elements or features as shown in the figure. Spatially relative terms may be meant to include different orientations of the device in addition to the orientation depicted in the figure. For example, if the device in the figure is flipped, the elements described as "below other elements or features" or "below elements or features" will be oriented as "above other elements or features". Therefore, the example term "below..." may include both upward and downward orientations. The device can be oriented in other ways (rotated 90 degrees or other orientations) and interpreted with the spatially relative descriptions herein.

Claims

1. An optical module, characterized in that: It includes a microcontroller MCU, a digital signal processor DSP, an electrically erasable programmable read-only memory EEPROM, a laser diode driver LDD, a transimpedance amplifier / limiting amplifier TIA / LA, a vertical cavity surface emitting laser VCSEL and a photodiode PD; among which, The SPI interface of the DSP and the SPI interface of the MCU are connected to the EEPROM respectively; The first electrical signal transceiver interface and the second electrical signal transceiver interface of the DSP are both connected to an external host terminal, the GPIO interface and the MDIO interface of the DSP are respectively connected to the GPIO interface and the MDIO interface of the MCU, and the DSP is also connected to an external crystal oscillator; The LDD is connected to the DSP, MCU and VCSEL respectively; The TIA / LA is connected to the DSP, MCU and PD respectively; The VCSEL is provided with a first optical signal transmitting interface and a second optical signal transmitting interface; The PD is provided with a first optical signal receiving interface and a second optical signal receiving interface.

2. The optical module according to claim 1, characterized in that: The EEPROM stores a mirror program for loading when the DSP is powered on; The flash memory Flash inside the MCU stores an image program for loading when the MCU is powered on.

3. The optical module according to claim 1, characterized in that: The optical module is an optical module in the form of SFP-DD package.

4. The optical module according to claim 1, characterized in that: The crystal oscillator is a 170 MHz crystal oscillator.

5. The optical module according to claim 1, characterized in that: The MCU and the LDD are connected via a first I2C bus; The MCU is connected to the TIA / LA via a second I2C bus.

Citation Information

Patent Citations

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    CN211830780U