An IGBT overcurrent protection circuit
By designing an IGBT overcurrent protection circuit including a comparator, a current sink unit and a driving chip, the problems of slow response, large current and large loss during overcurrent in the prior art are solved, and the effects of fast response and effective protection are achieved.
Patent Information
- Application Number
- CN202010616083.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-06-30
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2040-06-30
AI Technical Summary
The existing IGBT overcurrent protection circuit is difficult to respond quickly when the IGBT is overcurrent, resulting in large currents and large shutdown spikes and losses, which may cause IGBT damage.
An IGBT overcurrent protection circuit is designed, including a comparator, a current absorbing unit and a driving chip. Overcurrent signals are generated through the current sampling unit and the protection threshold setting unit, and overcurrent protection is realized by using the current absorbing unit to absorb the overcurrent of the IGBT through the NMOS tube.
This circuit can quickly respond to IGBT overcurrent faults, limit the occurrence of large currents, avoid shutdown spikes and losses during overcurrent protection, and protect the IGBT device from damage.
Smart Images
Figure CN111668823B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of power electronic device protection, and in particular to an IGBT overcurrent protection circuit. Background Art
[0002] As a key component of the inverter device, IGBT (Insulated Gate Bipolar Transistor) works at high frequency and high voltage. Due to the needs of the circuit topology itself or for safety considerations, it is necessary to perform a two-level shutdown when an overcurrent occurs in the IGBT to protect the IGBT device.
[0003] When the upper and lower bridge arms of the IGBT are directly connected, since the power supply voltage is almost entirely applied to the C and E terminals of the IGBT, a large short-circuit current will be generated. The smaller the saturation voltage drop of the IGBT, the greater the current, which is likely to damage the device. When an overcurrent occurs in the device, the short-circuit current and its IV operating trajectory when it is turned off need to be limited to the short-circuit safe operating area of the IGBT, so as to turn off the IGBT before damaging the device, thereby avoiding damage to the switch tube.
[0004] Traditional overcurrent protection circuits usually perform overcurrent protection operations after the IGBT is desaturated and when the CE inter-electrode voltage increases and exceeds the set threshold. However, in this design, the increase in the CE inter-electrode voltage often means that the overcurrent of the IGBT is already very large. Performing overcurrent protection at this time will result in a large turn-off spike and loss, and may also cause the overcurrent protection action to fail, causing damage to the IGBT. Therefore, it is not possible to protect the power device well when overcurrent occurs. Summary of the invention
[0005] The purpose of the present invention is to overcome the defects of the above-mentioned prior art and provide an IGBT overcurrent protection circuit to quickly respond to the overcurrent fault of the IGBT and limit the occurrence of large current, thereby avoiding large shutdown spikes and losses during overcurrent protection and avoiding damage to the IGBT device.
[0006] The objective of the present invention can be achieved through the following technical scheme: an IGBT overcurrent protection circuit, comprising a comparator for generating an overcurrent signal, a driver chip for monitoring the overcurrent signal and controlling the IGBT, and a current absorption unit for absorbing overcurrent according to a preset absorption value, wherein the same-phase input terminal of the comparator is connected to a current sampling unit for collecting the IGBT current signal, the inverting input terminal of the comparator is connected to a protection threshold setting unit, the output terminal of the comparator is connected to the current absorption unit, the driver chip is respectively connected to the output terminal of the comparator and the IGBT, and the current absorption unit is also connected to the IGBT.
[0007] Further, the current absorption unit includes a first NMOS tube and a second NMOS tube, the D pole of the first NMOS tube and the D pole of the second NMOS tube are respectively connected to one end of the second resistor and the G pole of the IGBT, the other end of the second resistor is connected to the driving chip, the G pole of the first NMOS tube and the G pole of the second NMOS tube are respectively connected to a first voltage divider module and a second voltage divider module, one end of the first voltage divider module is connected to the G pole of the IGBT, the other end of the first voltage divider module is connected to the E pole of the IGBT, one end of the second voltage divider module is connected to the S pole of the first NMOS tube, the other end of the second voltage divider module is connected to the E pole of the IGBT, and the S pole of the second NMOS tube is connected to the E pole of the IGBT.
[0008] Furthermore, the first voltage divider module includes a third resistor and a fourth resistor connected in series, one end of the third resistor is connected to the G pole of the IGBT, the other end of the third resistor is respectively connected to the G pole of the first NMOS tube and one end of the fourth resistor, and the other end of the fourth resistor is connected to the E pole of the IGBT.
[0009] Furthermore, the second voltage divider module includes a fifth resistor and a sixth resistor connected in series, one end of the fifth resistor is connected to the S pole of the first NMOS tube, the other end of the fifth resistor is respectively connected to the G pole of the second NMOS tube and one end of the sixth resistor, and the other end of the sixth resistor is connected to the E pole of the IGBT.
[0010] Furthermore, a second capacitor is connected in parallel at both ends of the fifth resistor.
[0011] Furthermore, the desaturation pin of the driver chip is connected to the anode of the first diode, the cathode of the first diode is connected to the output end of the comparator, and the desaturation pin of the driver chip is also grounded through a first capacitor.
[0012] Furthermore, the output end of the comparator is respectively connected to the cathode of the second diode and one end of the first resistor, the anode of the second diode is connected to the G pole of the first NMOS tube, and the other end of the first resistor is connected to the working power supply.
[0013] Furthermore, the E pole of the IGBT is connected to the S pole of the second NMOS tube, the sixth resistor, and the fourth resistor respectively through the third capacitor.
[0014] Furthermore, the third capacitor, the S pole of the second NMOS tube, the sixth resistor and the fourth resistor are all connected to a -5V voltage.
[0015] Furthermore, a seventh resistor is connected between the G pole and the E pole of the IGBT.
[0016] The specific working principle of the present invention is:
[0017] When the IGBT overcurrent phenomenon does not occur, the IGBT current signal is less than the current protection threshold, that is, the voltage at the non-inverting input terminal of the comparator is lower than the voltage at the inverting input terminal, the comparator output is low level, the G pole of the first NMOS tube is connected to the ground through the first diode, and the first NMOS tube and the second NMOS tube both work in the cut-off region. At this time, the overcurrent protection action does not occur, and the G pole of the IGBT is controlled by the driver chip;
[0018] When an IGBT overcurrent occurs, the IGBT current signal is greater than or equal to the current protection threshold, that is, the voltage at the comparator's non-inverting input terminal is higher than that at the inverting input terminal, the comparator outputs a high impedance state, the first diode and the second diode are reverse biased and cut off, and the constant current source inside the driver chip charges the first capacitor, causing the voltage of the first capacitor to increase; at the same time, the GS inter-electrode voltage of the first NMOS tube and the second NMOS tube in the current absorption unit is controlled by each respective voltage divider module, so that the first NMOS tube and the second NMOS tube both work in the amplification region. Since the NMOS tube has the characteristic of a voltage-controlled current source in the amplification region, the current absorption unit can absorb a controllable constant current through the second resistor at this time, and then absorb the charge of the capacitor between the G pole and the E pole of the IGBT, thereby reducing the overcurrent of the IGBT and achieving the purpose of overcurrent protection. In addition, after the desaturation pin of the driver chip obtains the overcurrent signal from the output terminal of the comparator, the driver chip outputs a drive signal from a high voltage to a low voltage, causing the IGBT to turn off.
[0019] Compared with the prior art, the present invention has the following advantages:
[0020] 1. Limit the maximum current of IGBT overcurrent: The overcurrent protection action signal of the present invention is derived from the actual IGBT sampling current signal. The action moment of the two-level shutdown can be adjusted by adjusting the current protection threshold, which can respond to the IGBT overcurrent fault more quickly, thereby limiting the maximum current, avoiding large shutdown spikes and losses during overcurrent protection, and avoiding damage to the IGBT device.
[0021] 2. Easy to transplant and debug: The present invention can adjust the absorption current value of the current absorption unit by changing the resistance value of the voltage divider module of the two NMOS tubes in the current absorption unit, thereby adjusting the G-pole current of the IGBT. The resistance parameters can be flexibly adjusted according to different IGBT models, which is conducive to transplanting and debugging the present invention to different application scenarios.
[0022] 3. Not limited by the function of the IGBT driver chip pins, and the functions are easy to expand: The present invention obtains the overcurrent signal through the desaturation pin of the driver chip, and the requirement for the driver chip is only to have a desaturation function. It can be widely compatible with various low-cost driver chips. In addition, the actual overcurrent trigger source of the present invention is level comparison, and a variety of judgment logics can be combined using logic gate circuits, thereby realizing the IGBT two-level shutdown function in various fault situations. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 It is a schematic diagram of the structure of the IGBT overcurrent protection circuit of the present invention;
[0024] Figure 2 This is a schematic diagram of an IGBT overcurrent protection circuit in an embodiment;
[0025] Figure 3 is a schematic diagram of the absorption current waveform of the second NMOS tube when overcurrent protection occurs in the embodiment;
[0026] Description of the marks in the figure: 1. Comparator, 101. Current sampling unit, 102. Protection threshold setting unit, 2. Current absorption unit, 3. Driving chip. DETAILED DESCRIPTION
[0027] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.
[0028] Example
[0029] like Figure 1 As shown, an IGBT overcurrent protection circuit includes a comparator 1, a current absorption unit 2 and a driver chip 3. The non-inverting input terminal and the inverting input terminal of the comparator 1 are respectively connected to the current sampling unit 101 and the protection threshold setting unit 102. The current sampling unit 101 is used to collect the IGBT current signal in real time, and the protection threshold setting unit 102 is used to set the current protection threshold. The output terminal of the comparator 1 is connected to the current absorption unit 2, the driver chip 3 is respectively connected to the output terminal of the comparator 1 and the IGBT, and the current absorption unit 2 is connected to the IGBT.
[0030] Specifically, Figure 2 As shown, the current absorption unit 2 includes a first NMOS tube Q1 and a second NMOS tube Q2, the D pole of the first NMOS tube Q1 and the D pole of the second NMOS tube Q2 are respectively connected to one end of the second resistor R2 and the G pole of the IGBT, the other end of the second resistor R2 is connected to the driving chip, the G pole of the first NMOS tube Q1 is respectively connected to the third resistor R3 and the fourth resistor R4, the G pole of the second NMOS tube Q2 is respectively connected to the fifth resistor R5 and the sixth resistor R6, the third resistor R3 and the fourth resistor R4 together constitute a first voltage dividing module, and the fifth resistor R5 and the sixth resistor R6 together constitute a second voltage dividing module:
[0031] One end of the third resistor R3 is connected to the G pole of the IGBT, and the other end of the third resistor R3 is respectively connected to the G pole of the first NMOS transistor Q1 and one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the E pole of the IGBT;
[0032] One end of the fifth resistor R5 is connected to the S pole of the first NMOS tube Q1, and the other end of the fifth resistor R5 is respectively connected to the G pole of the second NMOS tube Q2 and one end of the sixth resistor R6, and the other end of the sixth resistor R6 is connected to the E pole of the IGBT. The second capacitor C2 is connected in parallel at both ends of the fifth resistor R5.
[0033] The desaturation pin of the driver chip is connected to the anode of the first diode D1 , the cathode of the first diode D1 is connected to the output end of the comparator U1 , and the desaturation pin of the driver chip is also grounded through the first capacitor C1 .
[0034] The output end of the comparator U1 is connected to the cathode of the second diode D2 and one end of the first resistor R1 respectively. The anode of the second diode D2 is connected to the G pole of the first NMOS tube Q1. The other end of the first resistor R1 is connected to the working power supply V cc .
[0035] The E pole of the IGBT is connected to the -5V power supply through the third capacitor C3, and the -5V power supply is also connected to the S pole of the second NMOS tube Q2, the sixth resistor R6, and the fourth resistor R4 respectively. The seventh resistor R7 is connected between the G pole and the E pole of the IGBT.
[0036] In summary, in the IGBT overcurrent protection circuit of the present invention, the overcurrent signal is generated by the comparator U1, wherein the current feedback sampling signal of the IGBT is connected to the in-phase input terminal of the comparator U1 after filtering, and the preset overcurrent protection threshold corresponding voltage signal is sent to the inverting input terminal of the comparator U1. The deprotection pin of the driver chip is grounded through the filter capacitor C1, and is connected to the P terminal (i.e., the anode) of the diode D1, and the N terminal (i.e., the cathode) of the diode D1 is connected to the output terminal of the comparator U1. In addition, the driving signal of the driver chip is connected to the G pole of the IGBT through the driving resistor R2. In the current absorption unit, two N-MOSFETs form a Darlington-like structure, and the G pole of the floating ground NMOS tube Q1 is pulled up to the G pole of the IGBT through the resistor R3, and is also pulled down to a -5V voltage through the resistor R4; its D pole is directly connected to the G pole of the IGBT; its S pole is connected to the G pole of the common ground NMOS tube Q2 through the parallel resistor R5 capacitor C2. In addition, the G pole of the common ground NMOS tube Q2 is also pulled down to -5V voltage through resistor R6; its D pole is directly connected to the G pole of the IGBT, and its S pole is connected to -5V voltage. The E pole of the IGBT is connected to the -5V voltage port through capacitor C3, and the G pole and E pole are connected by resistor R7.
[0037] In this embodiment, the first NMOS transistor Q1 uses BSS138, the second NMOS transistor Q2 uses SQ2308CES, the driver chip uses NCV57001, and the resistance values of the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are adjusted (respectively 2kΩ, 2kΩ, 301Ω, 100Ω), so that the preset current absorption value is 0.7633A. Figure 3 As shown, the over-current protection starts at 1.5251ms, the absorption current of the second NMOS tube Q2 starts to rise from 0A, rises to 0.7633A at 1.5254ms, and the IGBT is turned off at 1.5257ms, and the absorption current drops back to 0A.
Claims
1. An IGBT overcurrent protection circuit, characterized in that: The invention comprises a comparator (1) for generating an overcurrent signal, a drive chip (3) for monitoring the overcurrent signal and controlling the IGBT, and a current absorption unit (2) for absorbing the overcurrent according to a preset absorption value, wherein the same-phase input end of the comparator (1) is connected to a current sampling unit (101) for collecting the IGBT current signal, the inverting input end of the comparator (1) is connected to a protection threshold setting unit (102), the output end of the comparator (1) is connected to the current absorption unit (2), the drive chip (3) is respectively connected to the output end of the comparator (1) and the IGBT, and the current absorption unit (2) is also connected to the IGBT; The current absorption unit (2) comprises a first NMOS tube and a second NMOS tube, the D pole of the first NMOS tube and the D pole of the second NMOS tube are respectively connected to one end of a second resistor and a G pole of an IGBT, the other end of the second resistor is connected to a driving chip (3), the G pole of the first NMOS tube and the G pole of the second NMOS tube are respectively connected to a first voltage divider module and a second voltage divider module, one end of the first voltage divider module is connected to the G pole of the IGBT, the other end of the first voltage divider module is connected to the E pole of the IGBT, one end of the second voltage divider module is connected to the S pole of the first NMOS tube, the other end of the second voltage divider module is connected to the E pole of the IGBT, and the S pole of the second NMOS tube is connected to the E pole of the IGBT; The first voltage divider module includes a third resistor and a fourth resistor connected in series, one end of the third resistor is connected to the G pole of the IGBT, the other end of the third resistor is respectively connected to the G pole of the first NMOS tube and one end of the fourth resistor, and the other end of the fourth resistor is connected to the E pole of the IGBT; The second voltage divider module includes a fifth resistor and a sixth resistor connected in series, one end of the fifth resistor is connected to the S pole of the first NMOS tube, the other end of the fifth resistor is respectively connected to the G pole of the second NMOS tube and one end of the sixth resistor, and the other end of the sixth resistor is connected to the E pole of the IGBT.
2. An IGBT overcurrent protection circuit according to claim 1, characterized in that: Two ends of the fifth resistor are connected in parallel with a second capacitor.
3. An IGBT overcurrent protection circuit according to claim 1, characterized in that: The desaturation pin of the driving chip (3) is connected to the anode of the first diode, the cathode of the first diode is connected to the output end of the comparator (1), and the desaturation pin of the driving chip (3) is also grounded via a first capacitor.
4. An IGBT overcurrent protection circuit according to claim 3, characterized in that: The output end of the comparator (1) is respectively connected to the cathode of the second diode and one end of the first resistor, the anode of the second diode is connected to the G pole of the first NMOS tube, and the other end of the first resistor is connected to the working power supply.
5. An IGBT overcurrent protection circuit according to claim 4, characterized in that: The E pole of the IGBT is connected to the S pole of the second NMOS tube, the sixth resistor, and the fourth resistor respectively through the third capacitor.
6. An IGBT overcurrent protection circuit according to claim 5, characterized in that: The third capacitor, the S pole of the second NMOS tube, the sixth resistor and the fourth resistor are all connected to a -5V voltage.
7. An IGBT overcurrent protection circuit according to claim 6, characterized in that: A seventh resistor is connected between the G pole and the E pole of the IGBT.
Citation Information
Patent Citations
IGBT over-current protection circuit
CN212518394U