Switch-mode power supply signal reconstruction

Abstract

A switch mode power supply includes an AC power supply configured to output a voltage; a sense resistor configured to sense the voltage output from the power supply; and a current sensing processor configured to sense a current level through the sense resistor, sense a disturbance in the sense voltage, and reconstruct the sense voltage to eliminate the disturbance.

Description

Technical Field

[0001] Example embodiments disclosed herein generally relate to a method for reconstructing a disturbed signal in a switched mode power supply (SMPS) from the signal using shape information of the signal. Background Art

[0002] In a switch-mode power supply, the switching operation can interfere with certain signals due to the occurrence of large time-varying voltages (dv / dt). In some systems, a resonant power supply may include a power factor corrector (PFC) stage followed by an inductor-capacitor (LLC) resonant converter power stage. The LLC's switching node (Vhb) experiences some parasitic coupling along the current sensing path in the PFC stage via parasitic capacitance Cpar. Summary of the Invention

[0003] The following presents a brief overview of various example embodiments. Some simplifications and omissions may be made in the following overview, which is intended to highlight and introduce some aspects of the various example embodiments, rather than to limit the scope of the present invention. Detailed descriptions of example embodiments sufficient to allow one of ordinary skill in the art to make and use the inventive concepts will be described in later sections.

[0004] Various embodiments relate to a switch mode power supply comprising: an AC power supply configured to output a voltage; a sense resistor configured to sense a voltage in a power factor correction stage; and a current sense processor configured to sense a current level through the sense resistor and reconstruct the sensed voltage to eliminate disturbances in the voltage across the sense resistor.

[0005] Various embodiments are described in which the disturbances include voltage spikes in the rising and falling edges of the sense voltage.

[0006] Various embodiments are described in which a current sensing processor includes a reconstruction device configured to input a sense voltage with interference and output a reconstructed voltage signal without interference, wherein the sense voltage and the reconstructed voltage signal have substantially the same amplitude and frequency.

[0007] Various embodiments are described in which a reconstruction device is configured to take a derivative of a sensed voltage and a derivative of a reconstructed voltage and determine a difference therebetween, wherein the difference provides a first error signal that is fed back and integrated in the reconstruction device to update an output reconstructed voltage.

[0008] Various embodiments are described in which a reconstruction device is configured to take a sensed voltage and a reconstruction voltage and determine a difference therebetween, wherein the difference provides a second error signal that is fed back and integrated in the reconstruction device to update the output reconstruction voltage.

[0009] Various embodiments are described in which a reconstruction device includes a primary stroke circuit configured to generate a rising edge of a reconstruction voltage signal and a secondary stroke circuit configured to generate a falling edge of the reconstruction voltage signal.

[0010] Various embodiments are described in which a primary stroke circuit includes a plurality of switches configured to route an error signal to an integrator.

[0011] Various embodiments are described wherein the reconstruction device comprises at least one filter, wherein the at least one filter is configured to output a desired slope for the reconstructed voltage signal based on the error signal.

[0012] Various embodiments are described wherein the reconstruction device comprises at least one filter, wherein the at least one filter is configured to output a desired slope for the sensed voltage signal in the absence of errors.

[0013] Various additional embodiments relate to a method of reconstructing a power supply signal, comprising: outputting a power supply voltage; sensing the voltage in a power factor correction stage using a sense resistor; sensing a current level of the output voltage through the sense resistor, and reconstructing the sensed voltage to eliminate interference in the voltage across the sense resistor.

[0014] Various embodiments are described in which the disturbances include voltage spikes in the rising and falling edges of the sense voltage.

[0015] Various embodiments are described that additionally include inputting a sense voltage having interference and outputting a reconstructed voltage signal without interference, wherein the sense voltage and the reconstructed voltage signal have substantially the same amplitude and frequency.

[0016] Various embodiments are described that additionally include taking a derivative of the sensed voltage and a derivative of the reconstructed voltage and determining a difference therebetween, wherein the difference provides a first error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage.

[0017] Various embodiments are described that additionally include taking the sensed voltage and the reconstructed voltage and determining a difference therebetween, wherein the difference provides a second error signal that is fed back and integrated in the reconstructed device to update the output reconstructed voltage.

[0018] Various embodiments are described that additionally include using a primary stroke circuit to generate a rising edge of the reconstructed voltage signal, and using a secondary stroke circuit to generate a falling edge of the reconstructed voltage signal.

[0019] Various embodiments are described that additionally include using multiple switches to route the error signal to the integrator.

[0020] Various embodiments are described that additionally include outputting, via a filter, a desired slope for a reconstructed voltage signal based on the error signal.

[0021] Various embodiments are described that additionally include outputting a desired slope for a sense voltage signal through a filter in the absence of errors.

[0022] Various additional embodiments relate to a switch-mode power supply comprising: a Vmains power supply for generating a Vmains signal; a power factor correction stage for improving the quality of the Vmains signal; a Vmains processor configured to sense the Vmains signal, wherein the Vmains processor is configured to derive timing from the sensed Vmains signal and generate a square wave signal based on the derived timing; a first integrator for receiving the square wave signal and outputting a first integrated signal; and a second integrator configured to receive and integrate the first integrated signal and output a second integrated signal in which the sensed Vmains signal is replaced with a sine wave.

[0023] Various embodiments are described that additionally include a first reset input for the first integrator, wherein the first integrator is reset in the middle of each half of sensing the Vmains signal.

[0024] Various embodiments are described, additionally including a second reset input for the second integrator, wherein the second integrator is reset at each slope of the first integrated signal.

[0025] Various embodiments are described wherein the first integrated signal is a triangle wave.

[0026] Various embodiments are described in which the Vmains processor includes a peak detector that detects the amplitude of the sense power signal.

[0027] Various embodiments are described that additionally include an error loop comprising: a peak detector configured to compare the amplitude to a peak value of a second integrated signal; and a regulator configured to adapt a parameter of the amplitude of the second integrated signal by multiplying a power supply signal with an output of the regulator.

[0028] Various other embodiments relate to a method of reconstructing a sensed Vmains signal, comprising: receiving a Vmains signal from a Vmains power supply; improving the quality of the Vmains signal using a power factor corrector; sensing the Vmains signal and deriving timing from the sensed Vmains signal using a Vmains processor; generating a square wave signal based on the derived timing; integrating the square wave signal and outputting a first integrated signal; receiving and integrating the first integrated signal, and outputting a second integrated signal in which the sensed Vmains signal is replaced with a sine wave.

[0029] Various embodiments are described that additionally include resetting the first integrator in the middle of sensing each half of the Vmains signal.

[0030] Various embodiments are described that additionally include resetting the second integrator at each slope of the first integrated signal.

[0031] Various embodiments are described wherein the first integrated signal is a triangle wave.

[0032] Various embodiments are described that additionally include detecting the amplitude of the sense power signal.

[0033] Various embodiments are described that additionally include comparing the amplitude to a peak value of the second integrated signal and adapting a parameter of the amplitude of the second integrated signal by multiplying the power supply signal with the output of the regulator. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Additional objects and features of the present invention will become more apparent from the following detailed description and the appended claims when taken in conjunction with the accompanying drawings. Although several example embodiments are shown and described, like reference numerals represent like parts in each of the figures.

[0035] Figure 1 shows a resonant power supply according to example embodiments described herein;

[0036] Figure 2 shows a circuit configured for Vmains sensing according to example embodiments described herein;

[0037] Figure 3 shows a sensed current signal in a switch mode power supply according to example embodiments described herein;

[0038] Figure 4 Show the basis Figure 1 The sensing current and sensing voltage signals;

[0039] Figure 5 Show the basis Figure 1 A reconstruction device for a current sensing processor;

[0040] Figure 6 Show including according to Figure 5 The representative signal of Vreconstructed;

[0041] Figure 7 Show the basis Figure 5 The result of the Vreconstructed signal after the secondary stroke;

[0042] Figure 8 Show the basis Figure 2 Reconstruction of the Vmains signal; and

[0043] Figure 9 Example embodiments are shown relating to the amplitude of the reconstructed signal Vreconstructed according to example embodiments described herein. DETAILED DESCRIPTION

[0044] It should be understood that the drawings are schematic and not drawn to scale. It should also be understood that the same reference numerals are used throughout the various figures to indicate the same or similar parts.

[0045] The description and accompanying drawings illustrate the principles of various example embodiments. It will be understood that those skilled in the art will be able to design various arrangements, and although the arrangement is not explicitly described or shown herein, the arrangement embodies the principles of the present invention and is included within the scope of the present invention. In addition, all examples cited herein are primarily intended to be used for teaching purposes to help readers understand the principles of the present invention and the concepts provided by the inventors to deepen this area, and all examples should be considered as not being limited to such specific cited examples and conditions. In addition, unless otherwise specified (e.g., "or in addition" or "or in an alternative"), the term "or" as used herein refers to non-exclusive or (i.e., and / or). In addition, the various example embodiments described herein are not necessarily mutually exclusive, because some example embodiments can be combined with one or more other example embodiments to form new example embodiments. For example, descriptors such as "first", "second", and "third" are not intended to limit the order of the elements being discussed, but are used to distinguish one element from another and are generally interchangeable. Values ​​such as maximum or minimum values ​​can be predetermined and can be set to different values ​​according to application.

[0046] Figure 1A resonant power supply 100 is shown according to an example embodiment described herein. Resonant power supply 100 includes a boost converter circuit 110 followed by a resonant converter power stage 120. The resonant converter power stage may also be referred to as a power factor corrector (PFC) stage. Boost converter circuit 110 can boost an input current. Boost converter circuit 110 may include a voltage source Vin and a series inductor 112. A boost switch 114 may be connected in parallel with voltage source Vin. Boost switch 114 may be an NMOS transistor. When boost switch 114 is off, series inductor 112 may store current during a first time period. Connected in series with series inductor 112 may be a boost diode 116 and a bus capacitor 118. Boost diode 116 may regulate the amount of current that can flow to bus capacitor 118. In the on state, boost switch 114 may route current to a ground node and limit current sensing of boost converter circuit 110 to current sensing by current sensing processor 140. In the off state, the boost switch 114 may allow current to flow to the bus capacitor 118 .

[0047] The negative terminal of the voltage source Vin can be connected in series with the sense resistor 130 and the series resistor 135. The current sense processor 140 can use the voltage sensed across the sense resistor 130 to generate a signal representing an instantaneous signal 145. This instantaneous current 145 is then compared with a reference current 155 in the control block 150 and used to provide an actual switch on interval 160 of the boost switch.

[0048] The boost converter circuit 110 can be controlled in the current domain. Current sensing of the input current can be performed during the primary and secondary slopes. The current is used to control the timing of the boost switch 114. However, the resonant converter power stage 120 interferes with the current.

[0049] For reasons such as inrush current protection, a series resistor 135 may be added to the boost converter circuit 110 to prevent large currents from flowing into the input node 147 of the current sense processor 140 .

[0050] However, the additional series resistor 135 increases the resistance of the input node 147. As a result, a parasitic capacitive coupling 149 is added to the switch node 151 of the resonant converter power switch 153, which can cause interference such as voltage spikes on the sense signal 148. Such voltage spikes occur at a frequency different from the switching frequency of the boost converter 110. As a result, the current sense processor 140 sometimes makes erroneous decisions due to such spikes. Example embodiments eliminate the voltage spike interference without distorting the original current signal.

[0051] like Figure 2As shown, another example is a PFC stage 210 with an added electromagnetic interference (EMI) filter 220. In this PFC stage 210, the supply voltage 205 across Line 1 and Line 2 is sensed through a resistive path and processed by a Vmains processing block 230 to provide a signal indicative of an instantaneous Vmains value as an input to the PFC stage 210.

[0052] One concept for controlling the PFC stage 210 is to have the PFC stage 210 draw an input current 215 that is proportional to the instantaneous mains voltage. By using the sense signal, the EMI filter 220 generates a distortion of the sensed Vmains signal 205 when there is distortion in the PFC input current. This distortion can amplify itself and create instabilities. Replacing the sensed mains voltage 205 with a signal of the same shape and amplitude but without the instability can prevent such instabilities from amplifying and creating oscillations. Figure 8 and Figure 9 and other example embodiments described herein discuss replacement signals.

[0053] Figure 3 Shown is a sensed current signal in a switch mode power supply according to example embodiments described herein. Figure 3 Sense current signal 310 is shown in a switch mode power supply (SMPS) 300. SMPS 300 may be a boost converter used as a power factor correction circuit. Sense current signal 310 may be determined based on a voltage Vsense across a sense resistor Rsense 330.

[0054] The current sensing Isense processing block 340 uses the sense voltage Vsense to generate a signal 345 to represent the instantaneous current. This signal 345 is then compared with a reference signal 355 in the control block 350 and used to provide the actual switch on interval of the boost switch 314.

[0055] Figure 4 Show the basis Figure 1 The sensing current and sensing voltage signals. Figure 4 Shown is the appearance of the sensed current signal 310 at the current sense input 347 (Vsense) due to parasitic interference caused by the second stage of the power converter relative to the original current (Isense) flowing in the sense resistor.

[0056] Since the switching frequency of the second stage is different from the PFC switching frequency, spikes 410 may appear at any time during the switching cycle, which poses a serious problem for providing a conduction interval based on the sensed current. To eliminate the spikes, the current sense processor 340 includes circuits and routines configured to reconstruct the Vsense waveform, eliminate the spikes, and maintain the shape of the sensed current. Figure 5 A block diagram of the reconstruction device is shown in FIG.

[0057] Figure 5 Show the basis Figure 1 The reconstruction device 500 of the current sense processor 140 is configured to determine the Vreconstructed signal based on the sense signal Vsense. The reconstruction device 500 may include several components. The reconstruction device 500 may include a primary stroke circuit 501 and a secondary stroke circuit 503 under the guidance of a controller (not shown). The primary stroke circuit 501 can be used to construct the primary edge or rising edge of the Vreconstructed signal. The secondary stroke circuit 503 can be used to construct the secondary edge or falling edge of the Vreconstructed signal. The reconstruction device 500 may include an integrator 510 that is configured to integrate a constant to generate an output signal Vreconstructd having a well-defined shape.

[0058] The primary stroke circuit 501 can include selector switches 540 and 560 to select the corresponding error signals E1 and E2. The primary stroke circuit 501 can include an adder 565 to sum the two error signals. The summed error signal can be input to the filter 530. A third selector 545 can be used to select the control1 signal from the filter 530.

[0059] Secondary stroke circuit 503 includes similar components, including selectors 555 and 570, adder 575, filter 535, and selector 550, which operate in a similar manner to the components of primary stroke circuit 501. Whether primary stroke circuit 501 or secondary stroke circuit 503 is selected to pass integration constants (control1, control2) as inputs to integrator 510 to reconstruct the primary or secondary stroke current shape determined by a controller (not shown).

[0060] The sense current including the interference spike 410 is driven through the resistor Rsense and is represented by the signal “Vsense”.

[0061] Figure 4 The sense voltage Vsense shown in FIG has three characteristics, including, for example, the slope of the rising edge 415 of the signal, the slope of the falling edge 425 of the signal, and the DC value of the signal measured in mV. In order to reconstruct the rising and falling slopes, the reconstructed signal Vreconstructed can also have these characteristics.

[0062] In the signal reconstruction circuit for eliminating spike interference 410, at block 515, the derivative d / dt of the signal Vsense is determined as signal 515a. At block 520, the derivative d / dt of the signal Vreconstructed is determined as signal 520a. These representative signals 515a and 520a can represent the respective slopes of Vsense and Vreconstructed. The difference between the derivative signals 515a and 520a is taken in adder 525 to define a first error signal E1.

[0063] Substantially simultaneously, the difference between the voltage signal 507 from Vsense and the voltage integrated signal 509 from Vreconstructed is taken at summer 511 to generate error signal E2. To approximate the rising edge of Vreconstructed during the primary stroke of circuit 501, error signal E1 is selected by switch 540 and error signal E2 is selected by switch 560 as described herein.

[0064] Thus, the three selectors 540, 560, and 545 (indicated by the multiplier) will enable the error signal E1 to change the state of the filter 530 (control1). The output control1 of the filter 530 is the desired positive slope of the reconstructed signal. When there is no error, the output control1 of the filter 530 is the desired slope of the Vsense signal. When there is a difference between the Vreconstructed voltage and the Vsense voltage, the measured error changes the output control of the filter 530 to correct the error until the error becomes approximately zero. Control1 can then be integrated by the integrator 510 during the primary stroke circuit 501. During the primary interval 610 ( Figure 6 ), the state of filter 530 does not change and control1 is not integrated in this interval.

[0065] In the secondary stroke circuit 503 (sec), the same process is maintained through selectors 550 and 560 and filter 535. Similar to filter 530, filter 535 produces the desired negative slope of the reconstructed signal. Then, after selection by selector 550, the second control signal control2 can be integrated using integrator 510 during the secondary stroke circuit 503. Then, the initial value of Vreconstructed at the beginning of the secondary stroke circuit 503 can automatically be equal to the final value at the end of the primary stroke circuit 501 because Vreconstructed can be a continuous signal similar to the Vsense signal.

[0066] Figure 6 Show the basis Figure 5620. The control signals control1 and control2 can be adapted to achieve the appropriate slope. Control1 is used for rising slopes. Control2 is used for falling slopes. However, as shown, the DC term of Vreconstructed 620 has not yet stabilized to an appropriate value.

[0067] To define an appropriate DC term, as described herein, a second error signal E2 may be generated based on the difference between the integrated Vreconstruct and the sensed Vsense. Figure 6 As shown, the Vreconstructed signal 620 tracks the shape and magnitude of Vsense 625, but without the unwanted spikes. The E2 signal passes through a similar selector switch 560 and is then applied to the filter 530 during the primary stroke via adder 565. Similarly, the E2 signal passes through selector 570 and is then applied to the filter 535 during the secondary stroke via adder 575.

[0068] Figure 7 Show the basis Figure 5 The Vreconstructed signal is the result of using the E1 and E2 error signals. The gain of the E2 signal determines how quickly the DC value settles to the desired value. To prevent interference between the E1 and E2 signals, it is preferable to set the time constant used to set the DC value to be longer than the cycle time of the Vsense signal.

[0069] Outside the primary 710 or secondary 720 window, and assuming the boost stage is in DC operation, there is essentially no current flowing in Rsense, and the dv / dt of Vsense is essentially zero (ignoring small parasitic ringing effects). This allows the system to maintain the Vreconstructed signal equal to Vsense = 0. Figure 7 This is shown by the close overlap between Vreconstructed and Vsense. After the initial regulation period, Vreconstructed and Vsense are essentially the same, with essentially the same amplitude and frequency. Alternatively, it is possible to add an additional loop (not shown) where the E2 signal is used after the end of the secondary stroke circuit 503 to make Vreconstructed follow the Vsense ringing.

[0070] Example embodiments include signal reconstruction that can follow rapid changes in the original sense Vsense signal. The slope following the d / dt during the primary stroke 501 and secondary stroke 503 is relatively slowly adjusted. The slope is determined by the input and output voltages of the SMPS, while the output voltage is regulated, and the input voltage does not change rapidly. Changes in the on-time of the boost switch 114 and the duration of the primary stroke 501 and secondary stroke 503 can be rapid, but because the integrator 510 used for signal reconstruction is directly controlled by the timing signal, it can directly follow this rapid adaptation.

[0071] Example embodiments may be used to eliminate ringing generated by the sense current in a flyback converter. During the primary and secondary strokes of a flyback converter, ringing may occur in the sense current due to parasitic effects. Consequently, a flyback converter using Ipeak control may use a blanking time in which the sense current signal is blanked, such that the primary stroke may not complete within the blanking time, or may otherwise complete prematurely due to the ringing. This may be the case because modern flyback converters use higher switching frequencies, making such parasitic effects problematic. Therefore, replacing the sense current with a reconstructed version using the example embodiments described herein may achieve a shorter primary stroke in a well-defined manner.

[0072] Example embodiments can be used to eliminate ringing caused by sensed current in a flyback converter during the secondary stroke. A flyback converter with synchronous rectification can use the current during the secondary stroke to decide when to turn the synchronous rectifier switch on and off. Replacing the sensed secondary current with a reconfigured version according to the concepts of the reconfiguration device 500 can allow for control of the timing of the SR switches.

[0073] Figure 2 A circuit configured for Vmains sensing according to an example embodiment described herein is shown. Figure 2 In this case, the sensed Vmains signal is reconstructed.

[0074] Figure 8 Show the basis Figure 2 Reconstruction of the Vmains signal.

[0075] like Figure 8 As shown, the square wave signal 810 (V(control)) can be regarded as the input to the two integrators 815 and 820. Figure 2The Vmains processing block 230 of the sense power supply signal 205 derives timing. Double integration of the square wave 810 can produce an almost ideal sine wave 825 (sense2), which can be used as a replacement for the sense power supply voltage 205. The sense power supply voltage can be in the form of a square wave. The first integrated signal sense1 can be in the form of a triangle wave. The second integrated signal sense2 can be represented by a sine wave. To define the DC component ( Figure 8 810), two reset inputs (reset and reset1) are available for the respective integrators 815 and 820. The first integrator 815 can be reset (reset) in the middle of each half of the square wave 810, while the second integrator 820 can be reset (reset1) at each slope 830 of the triangle wave.

[0076] Figure 9 An example embodiment is shown relating to the amplitude of the reconstructed signal Vreconstructed according to example embodiments described herein. The Vmains processing block 910 may detect the amplitude of the actual sensed power supply signal 205. Internal filtering may be applied to filter out certain ringing and noise.

[0077] The detected amplitude detected by the peak detector 920 is then compared with the peak value of the sense2 signal 930 and placed in an error loop including a regulator 940, which adjusts a parameter related to the amplitude of the reconstructed signal (sense2), for example by multiplying a square wave signal (contro1) with the regulator output.

[0078] As described herein, the sense signal may be interfered with by other signals that are not desired. Example embodiments include a method for generating a Vreconstructed shape based on known characteristics and detected characteristics of a Vsense signal. A feedback loop including an integrator may be included, the feedback loop being configured to generate multiple error signals based on the difference between the Vreconstructed shape and the Vsense signal. Example embodiments may adapt the amplitude of the Vreconstructed shape based on the error signals. Example embodiments use the Vreconstructed shape signal with the adapted amplitude as a replacement for the interfered Vsense signal as part of a switch-mode power supply.

[0079] Although various exemplary embodiments have been described in detail with particular reference to certain exemplary aspects of the present invention, it will be understood that the present invention is capable of other exemplary embodiments and that the details of the present invention are capable of modification in various obvious respects. It will be apparent to those skilled in the art that changes and modifications may be made without departing from the spirit and scope of the present invention. Therefore, the foregoing disclosure, description, and drawings are for illustrative purposes only and do not in any way limit the present invention, which is defined solely by the claims.

Claims

1. A switch mode power supply, characterized in that include: an AC power source configured to output a voltage; a sense resistor configured to sense a voltage in the power factor correction stage; a current sensing processor configured to sense a current level through the sense resistor and reconstruct a sensed voltage to eliminate disturbances in the voltage across the sense resistor; The current sensing processor includes a reconstruction device configured to input a sense voltage having interference and output a reconstructed voltage signal without interference, wherein the sense voltage and the reconstructed voltage signal have substantially the same amplitude and frequency; The reconstruction device is configured to: take the derivative of the sensed voltage and the derivative of the reconstructed voltage and determine the difference therebetween, wherein the difference provides a first error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage; or take the sensed voltage and the reconstructed voltage and determine the difference therebetween, wherein the difference provides a second error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage.

2. A method for reconstructing a power supply signal, characterized in that: include: Output power supply voltage; sensing voltage in the power factor correction stage using a sense resistor; sensing a current level of an output voltage across the sense resistor and reconstructing the sensed voltage to eliminate disturbances in the voltage across the sense resistor; inputting a sensed voltage with interference and outputting a reconstructed voltage signal without interference, wherein the sensed voltage and the reconstructed voltage signal have substantially the same amplitude and frequency; Taking the derivative of the sensed voltage and the derivative of the reconstructed voltage and determining the difference therebetween, wherein the difference provides a first error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage; or taking the sensed voltage and the reconstructed voltage and determining the difference therebetween, wherein the difference provides a second error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage.

3. The method according to claim 2, characterized in that The disturbances include voltage spikes in the rising and falling edges of the sense voltage.

4. The method according to claim 2, characterized in that Additionally included is inputting the sensed voltage with interference and outputting a reconstructed voltage signal without interference, wherein the sensed voltage and the reconstructed voltage signal have substantially the same amplitude and frequency.

5. The method according to claim 4, characterized in that Further comprising taking the derivative of the sensed voltage and the derivative of the reconstructed voltage and determining a difference therebetween, wherein the difference provides a first error signal, which is fed back and integrated in the reconstruction device to update the output reconstructed voltage, or further comprising taking the sensed voltage and the reconstructed voltage and determining a difference therebetween, wherein the difference provides a second error signal, which is fed back and integrated in the reconstruction device to update the output reconstructed voltage.

6. The method according to claim 4, characterized in that The method also includes using a primary stroke circuit to generate a rising edge of the reconstructed voltage signal, and using a secondary stroke circuit to generate a falling edge of the reconstructed voltage signal.

7. The method according to claim 6, characterized in that Also included is the use of multiple switches to route the error signal to the integrator.

8. The method according to claim 4, characterized in that The method further includes outputting a desired slope for the reconstructed voltage signal based on the error signal through a filter, or outputting a desired slope for the sensed voltage signal through a filter in the absence of an error.

9. A switch mode power supply, characterized in that include: A Vmains power supply, wherein the Vmains power supply is used to generate a Vmains signal; a power factor correction stage for improving the quality of the Vmains signal; a Vmains processor configured to sense the Vmains signal, wherein the Vmains processor is configured to derive a timing from the sensed Vmains signal and generate a square wave signal based on the derived timing; a first integrator, configured to receive the square wave signal and output a first integrated signal; a second integrator configured to receive the first integrated signal, integrate the first integrated signal, and output a second integrated signal in which the sensed Vmains signal is replaced with a sine wave; a reconstruction device configured to input a sensed voltage having interference and output a reconstructed voltage signal without interference, wherein the sensed voltage and the reconstructed voltage signal have substantially the same amplitude and frequency; The reconstruction device is configured to: take the derivative of the sensed voltage and the derivative of the reconstructed voltage and determine the difference therebetween, wherein the difference provides a first error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage; or take the sensed voltage and the reconstructed voltage and determine the difference therebetween, wherein the difference provides a second error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage.

10. A method for reconstructing a sensed Vmains signal, characterized in that: include: Receive Vmains signal from Vmains power supply; Using a power factor corrector to improve the quality of the Vmains signal; sensing the Vmains signal and deriving a timing from the sensed Vmains signal using a Vmains processor; generating a square wave signal based on the derived timing sequence; Integrating the square wave signal and outputting a first integrated signal; receiving the first integrated signal, integrating the first integrated signal, and outputting a second integrated signal in which the sensed Vmains signal is replaced by a sine wave; inputting a sensed voltage with interference and outputting a reconstructed voltage signal without interference, wherein the sensed voltage and the reconstructed voltage signal have substantially the same amplitude and frequency; Taking the derivative of the sensed voltage and the derivative of the reconstructed voltage and determining the difference therebetween, wherein the difference provides a first error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage; or taking the sensed voltage and the reconstructed voltage and determining the difference therebetween, wherein the difference provides a second error signal that is fed back and integrated in the reconstruction device to update the output reconstructed voltage.

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