A novel topology recognition system for topology signal adaptation at the transmitter end
By introducing closed-loop feedback circuits and multiple acquisition circuits into the power network topology recognition system, the topological signal adaptability of the transmitting end is enhanced, the problems of topology recognition and harmonic signal adjustment in the power grid are solved, and higher signal accuracy and System adjustability.
Patent Information
- Application Number
- CN202010856962.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-08-24
- Publication Date
- 2025-01-17
- Estimated Expiration
- 2040-08-24
AI Technical Summary
The topological signal at the transmission end in the power network topology recognition system has poor adaptability, which makes it impossible to effectively identify the topological structure and change the harmonic signal in the power grid.
Design a new topology signal adaptive system for sending the topology signal of the topology recognition system. Through self-adjustment of the closed-loop feedback circuit, the topology recognition signal is collected using the direct sampling circuit and the transformer circuit, and the signal is realized through filtering, amplification and voltage raising processing. Compensation correction and adaptive adjustment.
It enhances the adaptive ability of topological identification signals, can effectively change the harmonic signals in the power grid, improves the accuracy of the closed-loop feedback circuit, and indicates the LED light group through a variety of communication methods and signals, which facilitates system debugging and parameter setting.
Smart Images

Figure CN111969727B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of transmitter adaptation of power grid topology systems, in particular to a transmitter topology signal adaptation system of a novel topology identification system. Background Art
[0002] With the continuous development of the power network, new and old equipment are constantly replaced in the network. It is difficult for power companies to have a complete archive of the topological structure in the power network, so the power network topology identification system has been derived. However, due to the unstable distance between the topological equipment at the sending end of the power network topology identification system and the power grid branch line, or the field environment makes it impossible to obtain the desired topological identification signal in the power grid, the topological signal adaptability of the sending end is poor. Summary of the invention
[0003] In view of the above problems and technical requirements, the inventors have proposed a novel topology signal adaptive system for the transmitting end of the topology identification system. The adaptive ability of the topology identification signal is enhanced through self-adjustment of the closed-loop feedback circuit, which can effectively change the harmonic signal of the power grid.
[0004] The technical solution of the present invention is as follows:
[0005] A novel topology signal adaptive system at the sending end of a topology identification system comprises a power supply module and a data processing module, a topology signal generating module, a feedback acquisition module and a feedback signal processing module connected in sequence. The feedback signal processing module is connected to the data processing module to form a closed-loop feedback circuit. The topology signal generating module receives a PWM wave sent by the data processing module and generates a topology identification signal. The topology signal generating module is connected to a power grid and inputs a topology identification signal to the power grid. The power grid is connected to the data processing module and inputs a power grid signal to the data processing module. The feedback acquisition module and the feedback signal processing module are used to collect the topology identification signal output by the topology signal generating module and perform signal processing to obtain a feedback signal. The data processing module compensates and corrects the PWM wave according to the feedback signal and the power grid signal, and sends it to the topology signal generating module for adaptive adjustment. The expected topology identification signal is obtained through the closed-loop feedback circuit.
[0006] Its further technical solution is that the feedback acquisition module includes a direct sampling circuit and a mutual inductor circuit. When the distance between the topology signal generating module and the power grid branch line is less than a preset distance, the feedback acquisition module uses the direct sampling circuit to collect the topology identification signal output by the topology signal generating module; when the distance between the topology signal generating module and the power grid branch line is greater than the preset distance, the feedback acquisition module uses the mutual inductor circuit to collect the topology identification signal output by the topology signal generating module.
[0007] Its further technical solution is that the direct sampling circuit includes multiple diodes, multiple resistors, multiple capacitors and optocouplers, the anode of the first diode is connected between the topology signal generating module and the live wire of the power grid, the cathode of the first diode is grounded through three-stage series resistors in turn, the three-stage series resistors constitute a voltage divider circuit for obtaining the frequency voltage signal of the topology identification signal, the first end of the first capacitor is connected to the common end of the second-stage resistor and the third-stage resistor, the second end of the first capacitor is respectively connected to the first end of the fourth resistor and the first end of the second capacitor, the second end of the fourth resistor is grounded, the second end of the second capacitor is connected to the anode of the light emitter of the optocoupler, the anode of the light emitter of the optocoupler is also grounded through the fifth resistor, the cathode of the light emitter of the optocoupler is connected to the anode of the second diode, the cathode of the second diode is grounded, the cathode of the light emitter of the optocoupler is also grounded through the third capacitor, the collector of the photoreceiver of the optocoupler is connected to the feedback signal processing module as a direct sampling signal collection point after passing through the fourth capacitor, the emitter of the photoreceiver of the optocoupler is grounded, and the optocoupler is used to isolate and convert the frequency voltage signal.
[0008] Its further technical solution is that the transformer circuit includes a current transformer and a sampling resistor, the current transformer is connected between the topology signal generating module and the live wire of the power grid, the signal output end of the current transformer is used as a transformer sampling signal collection point, and is respectively connected to the first end of the sampling resistor and the feedback signal processing module, and the second end of the sampling resistor is grounded.
[0009] Its further technical solution is that the feedback signal processing module includes a filtering processing circuit, an amplifying circuit and a voltage raising circuit which are connected in sequence; the input end of the filtering processing circuit is connected to the feedback acquisition module as the input end of the feedback signal processing module; the output end of the voltage raising circuit is connected to the data processing module as the output end of the feedback signal processing module; the feedback signal processing module receives the topology identification signal collected by the feedback acquisition module and performs filtering, amplification and voltage raising processing.
[0010] A further technical solution is that the filter processing circuit includes a high-pass filter circuit and a low-pass filter circuit connected to each other;
[0011] The high-pass filter circuit is used to filter out low-frequency interference signals in the topology identification signal below the preset cut-off frequency, and includes a first operational amplifier, multiple resistors and a fifth capacitor. The in-phase input terminal of the first operational amplifier is connected to the feedback acquisition module through the fifth capacitor, and the in-phase input terminal of the first operational amplifier is also grounded through the sixth resistor. The common terminal of the fifth capacitor and the feedback acquisition module is connected to the output terminal of the first operational amplifier through the seventh resistor. The inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier through the eighth resistor. The output terminal of the first operational amplifier is also connected to the input terminal of the low-pass filter circuit;
[0012] The low-pass filter circuit is used to filter out high-frequency interference signals in the topology identification signal that is higher than a preset cut-off frequency, and includes a second operational amplifier, multiple resistors and a sixth capacitor. The in-phase input terminal of the second operational amplifier is connected to the output terminal of the first operational amplifier through a ninth resistor, the in-phase input terminal of the second operational amplifier is also grounded through the sixth capacitor, the output terminal of the second operational amplifier is grounded through an eleventh resistor and a tenth resistor in sequence, the inverting input terminal of the second operational amplifier is connected to the common terminal of the eleventh resistor and the tenth resistor, and the output terminal of the second operational amplifier is also connected to the input terminal of the amplifier circuit.
[0013] Its further technical solution is that the amplifier circuit is used to amplify the filtered topology identification signal, including a third operational amplifier, multiple resistors and capacitors. The non-inverting input terminal of the third operational amplifier is connected to the filtering processing circuit as the input terminal of the amplifier circuit, and the output terminal of the third operational amplifier is connected to the ground through the thirteenth resistor and the twelfth resistor in sequence. The output terminal of the third operational amplifier is also connected to the inverting input terminal of the third operational amplifier through the common end of the seventh capacitor, the thirteenth resistor and the twelfth resistor in sequence. The output terminal of the third operational amplifier is also grounded through the eighth capacitor, and the output terminal of the third operational amplifier is also connected to the input terminal of the voltage raising circuit.
[0014] Its further technical solution is that the voltage raising circuit is used to raise the voltage of the amplified topology identification signal, including a fourth operational amplifier, a voltage regulator, multiple resistors and capacitors. The input end of the voltage regulator is connected to the power supply and is also grounded through the ninth capacitor. The output end of the voltage regulator is divided into two outputs, one is connected to the in-phase input end of the fourth operational amplifier through the fourteenth resistor and the fifteenth resistor in sequence, and the other is grounded through the tenth capacitor. The in-phase input end of the fourth operational amplifier is connected to the output end of the amplifier circuit as the input end of the voltage raising circuit after passing through the sixteenth resistor. The output end of the fourth operational amplifier is grounded through the eighteenth resistor and the seventeenth resistor in sequence. The inverting input end of the fourth operational amplifier is connected to the common end of the eighteenth resistor and the seventeenth resistor. The output end of the fourth operational amplifier outputs a feedback signal and sends it to the data processing module.
[0015] Its further technical solution is that the adaptive system also includes a communication module, the data processing module is connected to the external port through the communication module, the communication module includes an RS485 chip and an RS232 chip, which are respectively connected to the corresponding communication interfaces of the data processing module; the adaptive system performs firmware upgrades, system debugging and parameter settings through the communication module.
[0016] Its further technical solution is that the adaptive system also includes a signal indication LED light group connected to the data processing module, the signal indication LED light group is used for five signal indications, the first signal indication LED circuit is used to indicate the operation status of the data processing module, the second signal indication LED circuit is used to indicate the data receiving status of the receiving communication port of the communication module, and the third signal indication LED circuit is used to indicate the data sending status of the sending communication port of the communication module. The circuit structures of the first signal indication LED circuit, the second signal indication LED circuit and the third signal indication LED circuit are the same, and the anode of the first light emitting diode is connected to the data processing module, and the cathode is grounded through a nineteenth resistor;
[0017] The fourth signal indication LED circuit is used to indicate the feedback signal status of the feedback signal processing module, and the fifth signal indication LED circuit is used to indicate the adaptive adjustment status of the topology signal generating module. The fourth signal indication LED circuit and the fifth signal indication LED circuit have the same circuit structure. The base of both transistors is connected to the data processing module through the twentieth resistor and is also grounded through the twenty-first resistor. The collector of the transistor is connected to the cathode of the second light-emitting diode, and the anode of the second light-emitting diode is connected to the power supply through the twenty-second resistor, and the emitter of the transistor is grounded.
[0018] The beneficial technical effects of the present invention are:
[0019] A feedback acquisition module and a feedback signal processing module are added to the transmitting end of the new topology identification system to form a closed-loop feedback circuit. The feedback acquisition module and the feedback signal processing module collect the topology identification signal output by the topology signal generation module and perform signal processing to obtain a feedback signal. The data processing module compensates and corrects the PWM wave according to the feedback signal and the power grid signal, and sends it to the topology signal generation module for adaptive adjustment. The expected topology identification signal is obtained through the closed-loop feedback circuit, thereby changing the harmonic signal in the power grid. Compared with the existing power network topology identification system, the topology identification signal of the present application has enhanced adaptability and can generate and change harmonic signals in the power grid; by providing a direct sampling circuit and a mutual inductor circuit in the feedback acquisition module, a suitable feedback acquisition module is selected according to the distance between the topology signal generating module and the power grid branch line to collect the topology identification signal of the topology signal generating module; the topology identification signal is filtered, amplified and voltage-elevated by the feedback signal processing module to obtain an effective feedback signal that can be recognized by the data processing module, thereby improving the accuracy of the closed-loop feedback circuit; by providing a communication module with two communication modes, the adaptive system can cope with different communication processing locations, which is convenient for the adaptive system to perform firmware upgrades, system debugging and parameter settings; by setting a signal indication LED light group for five signal indications, it is convenient for operators to understand whether each module of the adaptive system is working normally. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 It is a principle block diagram of the transmitter topology signal adaptation system provided in this application.
[0021] Figure 2 This is the chip pin diagram of the data processing module provided in this application.
[0022] Figure 3 is a circuit diagram of a direct sampling circuit provided in this application.
[0023] Figure 4 It is a connection diagram of the mutual inductor circuit and the feedback signal processing module provided in this application.
[0024] Figure 5 It is a principle block diagram of the feedback signal processing module provided in this application.
[0025] Figure 6 It is a circuit diagram of the high-pass filter circuit provided by this application.
[0026] Figure 7 It is a circuit diagram of the low-pass filter circuit provided by this application.
[0027] Figure 8 It is a circuit diagram of the amplifier circuit provided by this application.
[0028] Fig. 9 is a circuit diagram of a voltage boosting circuit provided in this application.
[0029] Fig.10 It is a schematic diagram of the communication module provided in this application.
[0030] Fig.11 This is a circuit diagram of the signal indication LED light group provided in this application. DETAILED DESCRIPTION
[0031] The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings.
[0032] The present application discloses a novel topology identification system for transmitting end topology signal adaptation system, and its principle block diagram is as follows: Figure 1As shown, it includes a power supply module and a data processing module, a topology signal generating module, a feedback acquisition module and a feedback signal processing module connected in sequence. The feedback signal processing module is connected to the data processing module to form a closed-loop feedback circuit. The topology signal generating module receives the PWM wave sent by the data processing module and generates a topology identification signal, wherein the frequency of the PWM wave can be controlled and adjusted according to actual needs. The topology identification signal is also a harmonic signal of a certain frequency. The topology signal generating module is connected to the power grid and inputs the topology identification signal to the power grid. The power grid is connected to the data processing module and inputs the power grid signal to the data processing module. For the signal injection method in the power network, this application adopts passive signal injection. The feedback acquisition module and the feedback signal processing module are used to collect the topology identification signal output by the topology signal generating module and perform signal processing to obtain the feedback signal. The data processing module compensates and corrects the PWM wave according to the feedback signal and the power grid signal, and sends it to the topology signal generating module for adaptive adjustment. The expected topology identification signal is obtained through the closed-loop feedback circuit, thereby changing the harmonic signal in the power grid.
[0033] The power module includes an AC-DC converter, a DC-DC converter, a voltage regulator, etc., all of which are built using existing modules and will not be described in detail here. The power module is used to supply power to the remaining modules of the adaptive system.
[0034] The data processing module of this application is implemented based on the STM32L431CBT6 chip. The chip pin diagram is as follows Figure 2 As shown, the data processing module provides functions such as signal control logic, feedback signal detection and judgment, data conversion processing, output PWM waveform control correction, signal indication control, communication with external ports and debugging data transmission for the operation of the entire adaptive system.
[0035] Optionally, the topology signal generating module includes a control switch and a corresponding load, and can be implemented using an existing module. Its internal connection structure is not introduced in detail here. The topology signal generating module is used to generate and change harmonic signals in the power grid.
[0036] The feedback acquisition module includes a direct sampling circuit and a mutual inductor circuit. When the distance between the topology signal generating module and the power grid branch line is less than the preset distance, the feedback acquisition module uses the direct sampling circuit to collect the topology identification signal output by the topology signal generating module. When the distance between the topology signal generating module and the power grid branch line is greater than the preset distance, the feedback acquisition module uses the mutual inductor circuit to collect the topology identification signal output by the topology signal generating module, wherein the preset distance is specifically set according to the actual situation.
[0037] Figure 3The circuit diagram of the direct sampling circuit is shown. The direct sampling method is a low-end sampling method, which is generally placed at the voltage connection of the topology signal generating module, including multiple diodes, multiple resistors, multiple capacitors and an optocoupler U1. Specifically, the anode of the first diode D1 is connected between the topology signal generating module and the live wire L of the power grid, and the cathode of the first diode D1 is connected to the ground through three series-connected resistors (i.e., R1, R2, and R3) in sequence. The three series-connected resistors constitute a voltage divider circuit for obtaining the frequency voltage signal of the topology identification signal. The first end of the first capacitor C1 is connected to the common end of the second resistor R2 and the third resistor R3, and the second end of the first capacitor C1 is connected to the first end of the fourth resistor R4 and the first end of the second capacitor C2 respectively. The second end of the fourth resistor R4 is grounded, and the second end of the second capacitor C2 is connected to the light-emitting diode U1. The anode pin 1 of the light emitter of the optocoupler U1 is also grounded through the fifth resistor R5, the cathode pin 2 of the light emitter of the optocoupler U1 is connected to the anode of the second diode D2, the cathode of the second diode D2 is grounded, the cathode pin 2 of the light emitter of the optocoupler U1 is also grounded through the third capacitor C3, the collector pin 4 of the light receiver of the optocoupler U1 is connected to the feedback signal processing module as a direct sampling signal collection point after passing through the fourth capacitor C4, the emitter pin 3 of the light receiver of the optocoupler U1 is grounded, and the light receiver pin 5 of the optocoupler U1 is connected to the power supply VCC_1 through a resistor. The optocoupler U1 is used to isolate the conversion frequency voltage signal.
[0038] Figure 4 The connection diagram of the transformer circuit and the feedback signal processing module is shown. The transformer circuit includes a current transformer 1 and a sampling resistor R23. The current transformer 1 is connected between the topology signal generating module and the live wire L of the power grid. The signal output end of the current transformer 1 is connected to the first end of the sampling resistor R23 and the feedback signal processing module as a transformer sampling signal collection point, and the second end of the sampling resistor R23 is grounded. The current signal collected by the current transformer 1 needs to be converted by the sampling resistor R23 before entering the feedback signal processing module.
[0039] Figure 5 The principle block diagram of the feedback signal processing module is shown. The feedback signal processing module includes a filtering processing circuit, an amplifying circuit and a voltage raising circuit connected in sequence. The input end of the filtering processing circuit is connected to the feedback acquisition module as the input end of the feedback signal processing module, and the output end of the voltage raising circuit is connected to the data processing module as the output end of the feedback signal processing module. The feedback signal processing module receives the topology identification signal collected by the feedback acquisition module and performs filtering, amplification and voltage raising processing.
[0040] The filtering processing circuit includes a high-pass filtering circuit and a low-pass filtering circuit connected to each other. The high-pass filtering circuit is used to filter out low-frequency interference signals in the topology identification signal below the preset cutoff frequency. The circuit diagram is shown in FIG. Figure 6As shown, it includes a first operational amplifier U2, multiple resistors and a fifth capacitor C5, wherein the first operational amplifier U2 is implemented based on the LM358M / TR model. The in-phase input terminal of the first operational amplifier U2 is connected to the direct sampling signal acquisition point or the mutual inductor sampling signal acquisition point of the feedback acquisition module through the fifth capacitor C5, the in-phase input terminal of the first operational amplifier U2 is also grounded through the sixth resistor R6, the common terminal of the fifth capacitor C5 and the feedback acquisition module is connected to the output terminal OUT1 of the first operational amplifier U2 through the seventh resistor R7, the inverting input terminal of the first operational amplifier U2 is connected to the output terminal OUT1 of the first operational amplifier U2 through the eighth resistor R8, and the output terminal OUT1 of the first operational amplifier U2 is also connected to the input terminal of the low-pass filter circuit.
[0041] The low-pass filter circuit is used to filter out high-frequency interference signals in the topology identification signal that are higher than the preset cutoff frequency. The circuit diagram is as follows: Figure 7 As shown, it includes a second operational amplifier U3, a plurality of resistors and a sixth capacitor C6, wherein the second operational amplifier U3 is implemented based on the LM2904DR2G model. The in-phase input terminal of the second operational amplifier U3 is connected to the output terminal OUT1 of the first operational amplifier U2 through the ninth resistor R9, the in-phase input terminal of the second operational amplifier U3 is also grounded through the sixth capacitor C6, the output terminal OUT2 of the second operational amplifier U3 is grounded through the eleventh resistor R11 and the tenth resistor R10 in sequence, the inverting input terminal of the second operational amplifier U3 is connected to the common terminal of the eleventh resistor R11 and the tenth resistor R10, and the output terminal OUT2 of the second operational amplifier U3 is also connected to the input terminal of the amplifier circuit.
[0042] The amplifier circuit is used to amplify the filtered topology identification signal. The circuit diagram is as follows: Figure 8 As shown, it includes a third operational amplifier U4, a plurality of resistors and capacitors, wherein the third operational amplifier U4 is implemented based on the LMV321IDBVR model. The non-inverting input terminal of the third operational amplifier U4 is connected to the output terminal OUT2 of the filter processing circuit as the input terminal of the amplification circuit, the output terminal OUT3 of the third operational amplifier U4 is connected to the ground through the thirteenth resistor R13 and the twelfth resistor R12 in sequence, the output terminal OUT3 of the third operational amplifier U4 is also connected to the inverting input terminal of the third operational amplifier U4 through the common terminal of the seventh capacitor C7, the thirteenth resistor R13 and the twelfth resistor R12 in sequence, the output terminal OUT3 of the third operational amplifier U4 is also connected to the ground through the eighth capacitor C8, and the output terminal OUT3 of the third operational amplifier U4 is also connected to the input terminal of the voltage raising circuit.
[0043] The voltage raising circuit is used to raise the voltage of the amplified topology identification signal. The circuit diagram is as follows: Fig. 9As shown, it includes a fourth operational amplifier U5, a voltage regulator U6, a plurality of resistors and capacitors, wherein the fourth operational amplifier U5 is implemented based on the LM358S model, and the voltage regulator U6 is implemented based on the LN1134 chip. The input terminal VIN of the voltage regulator U6 is connected to the power supply VCC, and is also grounded through the ninth capacitor C9. The output terminal VOUT of the voltage regulator U6 is divided into two outputs, one of which is connected to the in-phase input terminal of the fourth operational amplifier U5 through the fourteenth resistor R14 and the fifteenth resistor R15 in sequence, and the other is grounded through the tenth capacitor C10. The in-phase input terminal of the fourth operational amplifier U5 is connected to the output terminal OUT3 of the amplifier circuit as the input terminal of the voltage raising circuit after passing through the sixteenth resistor R16. The output terminal of the fourth operational amplifier U5 is grounded through the eighteenth resistor R18 and the seventeenth resistor R17 in sequence. The inverting input terminal of the fourth operational amplifier U5 is connected to the common terminal of the eighteenth resistor R18 and the seventeenth resistor R17. The output terminal of the fourth operational amplifier U5 outputs a feedback signal and sends it to the data processing module MCU_ADC pin.
[0044] Optionally, the adaptive system further includes a communication module, a schematic diagram of which is shown in FIG. Fig.10 As shown, the data processing module is connected to an external port (such as a PC or other communication equipment) through a communication module. The communication module includes an RS485 chip and an RS232 chip, which are respectively connected to the corresponding communication interface TX / RX of the data processing module. The adaptive system performs firmware upgrades, system debugging and parameter settings through the communication module. The two communication modes are convenient for adapting to different communication interfaces. The RS485 chip is implemented based on the SIT485EESA chip, and the RS232 chip is implemented based on the ST232ECDR chip.
[0045] Optionally, the adaptive system further comprises a signal indicating LED light group connected to the data processing module, the circuit diagram of which is shown in FIG. Fig.11 As shown, the signal indicator LED light group is used for five signal indications. The first signal indicator LED circuit is used to indicate the operating status of the data processing module. The second signal indicator LED circuit is used to indicate the data receiving status of the receiving communication port of the communication module. The third signal indicator LED circuit is used to indicate the data sending status of the sending communication port of the communication module, that is, to indicate whether there is data being sent or received. The circuit structures of the first signal indicator LED circuit, the second signal indicator LED circuit and the third signal indicator LED circuit are the same. In the first signal indicator LED circuit, the anode of the first light-emitting diode LED1 is connected to the LED1 pin of the data processing module, and the cathode is grounded through the nineteenth resistor R19.
[0046] The fourth signal indicator LED circuit is used to indicate the feedback signal status of the feedback signal processing module, that is, whether the feedback circuit part works normally and whether the signal feedback can be performed normally. The fifth signal indicator LED circuit is used to indicate the adaptive adjustment status of the topology signal generating module, that is, to check whether the topology signal generating module can output the adaptive adjustment signal after receiving the correction signal. The circuit structure of the fourth signal indicator LED circuit and the fifth signal indicator LED circuit is the same. In the fourth signal indicator LED circuit, the base of the transistor Q1 is connected to the LED4 pin of the data processing module through the twentieth resistor R20, and is also grounded through the twenty-first resistor R21. The collector of the transistor Q1 is connected to the cathode of the second light-emitting diode LED4, and the anode of the second light-emitting diode LED4 is connected to the power supply VCC_LED through the twenty-second resistor R22, and the emitter of the transistor is grounded. Optionally, the present application does not limit the indication state of the signal indicator LED light group, as long as it can be realized to distinguish whether the working state of each module is normal, for example, the LED is red to indicate that the corresponding module is abnormal, the green light indicates that the module is normal, or the LED is always on to indicate that the corresponding module is normal, and the flashing indicates that the module is abnormal.
[0047] The topology signal adaptive system at the sending end sends the topology identification signal, which is transmitted through the power line. The receiving end of the topology identification system receives and identifies the topology identification signal, thereby completing the entire operation of the power grid topology system. The present application mainly discloses a topology signal adaptive system at the sending end of a novel topology identification system. In the adaptive system, the desired waveform signal injection in the power grid is completed through self-checking and self-adjustment of the topology identification signal.
[0048] The above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiments. It is understood that other improvements and changes directly derived or associated by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included in the protection scope of the present invention.
Claims
1. A novel topology recognition system for a transmitter-side topology signal adaptation system, characterized in that: The adaptive system includes a power supply module and a data processing module, a topology signal generating module, a feedback acquisition module and a feedback signal processing module which are connected in sequence. The feedback signal processing module is connected to the data processing module to form a closed-loop feedback circuit. The topology signal generating module receives the PWM wave sent by the data processing module and generates a topology identification signal. The topology signal generating module is connected to the power grid and inputs the topology identification signal to the power grid. The power grid is connected to the data processing module and inputs the power grid signal to the data processing module. The feedback acquisition module and the feedback signal processing module are used to collect the topology identification signal output by the topology signal generating module and perform signal processing to obtain a feedback signal. The data processing module compensates and corrects the PWM wave according to the feedback signal and the power grid signal, and sends it to the topology signal generating module for adaptive adjustment, and obtains the expected topology identification signal through the closed-loop feedback circuit.
2. The transmitter topology signal adaptive system of the novel topology identification system according to claim 1 is characterized in that: The feedback acquisition module includes a direct sampling circuit and a mutual inductor circuit. When the distance between the topology signal generating module and the power grid branch line is less than a preset distance, the feedback acquisition module uses the direct sampling circuit to collect the topology identification signal output by the topology signal generating module; when the distance between the topology signal generating module and the power grid branch line is greater than the preset distance, the feedback acquisition module uses the mutual inductor circuit to collect the topology identification signal output by the topology signal generating module.
3. The transmitter topology signal adaptation system of the novel topology identification system according to claim 2 is characterized in that: The direct sampling circuit includes multiple diodes, multiple resistors, multiple capacitors and optocouplers. The anode of the first diode is connected between the topology signal generating module and the live wire of the power grid. The cathode of the first diode is grounded through three series resistors in sequence. The three series resistors constitute a voltage divider circuit for obtaining the frequency voltage signal of the topology identification signal. The first end of the first capacitor is connected to the common end of the second resistor and the third resistor. The second end of the first capacitor is respectively connected to the first end of the fourth resistor and the first end of the second capacitor. The second end of the fourth resistor is grounded. The second end of the second capacitor is connected to the anode of the light emitter of the optocoupler. The anode of the light emitter of the optocoupler is also grounded through a fifth resistor. The cathode of the light emitter of the optocoupler is connected to the anode of the second diode. The cathode of the second diode is grounded. The cathode of the light emitter of the optocoupler is also grounded through the third capacitor. The collector of the photoreceiver of the optocoupler is connected to the feedback signal processing module as a direct sampling signal collection point after passing through the fourth capacitor. The emitter of the photoreceiver of the optocoupler is grounded. The optocoupler is used to isolate and convert the frequency voltage signal.
4. The transmitter topology signal adaptation system of the novel topology identification system according to claim 2 is characterized in that: The transformer circuit includes a current transformer and a sampling resistor. The current transformer is connected between the topology signal generating module and the live wire of the power grid. The signal output end of the current transformer is used as a transformer sampling signal acquisition point to connect the first end of the sampling resistor and the feedback signal processing module respectively. The second end of the sampling resistor is grounded.
5. The transmitter topology signal adaptation system of the novel topology identification system according to claim 1 is characterized in that: The feedback signal processing module includes a filtering processing circuit, an amplifying circuit and a voltage raising circuit which are connected in sequence. The input end of the filtering processing circuit is connected to the feedback acquisition module as the input end of the feedback signal processing module. The output end of the voltage raising circuit is connected to the data processing module as the output end of the feedback signal processing module. The feedback signal processing module receives the topology identification signal collected by the feedback acquisition module and performs filtering, amplification and voltage raising processing.
6. The transmitter topology signal adaptation system of the novel topology identification system according to claim 5 is characterized in that: The filtering processing circuit includes a high-pass filtering circuit and a low-pass filtering circuit connected to each other; The high-pass filter circuit is used to filter out low-frequency interference signals in the topology identification signal below the preset cut-off frequency, and includes a first operational amplifier, a plurality of resistors and a fifth capacitor, the in-phase input terminal of the first operational amplifier is connected to the feedback acquisition module through the fifth capacitor, the in-phase input terminal of the first operational amplifier is also grounded through a sixth resistor, the common terminal of the fifth capacitor and the feedback acquisition module is connected to the output terminal of the first operational amplifier through a seventh resistor, the inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier through an eighth resistor, and the output terminal of the first operational amplifier is also connected to the input terminal of the low-pass filter circuit; The low-pass filter circuit is used to filter out high-frequency interference signals in the topology identification signal that is higher than a preset cutoff frequency, and includes a second operational amplifier, multiple resistors and a sixth capacitor. The in-phase input terminal of the second operational amplifier is connected to the output terminal of the first operational amplifier through a ninth resistor, the in-phase input terminal of the second operational amplifier is also grounded through the sixth capacitor, the output terminal of the second operational amplifier is grounded through an eleventh resistor and a tenth resistor in sequence, the inverting input terminal of the second operational amplifier is connected to the common terminal of the eleventh resistor and the tenth resistor, and the output terminal of the second operational amplifier is also connected to the input terminal of the amplifier circuit.
7. The transmitter topology signal adaptation system of the novel topology identification system according to claim 5 is characterized in that: The amplifier circuit is used to amplify the filtered topology identification signal, and includes a third operational amplifier, multiple resistors and capacitors. The non-inverting input terminal of the third operational amplifier is connected to the filtering processing circuit as the input terminal of the amplifier circuit. The output terminal of the third operational amplifier is connected to the ground through the thirteenth resistor and the twelfth resistor in sequence. The output terminal of the third operational amplifier is also connected to the inverting input terminal of the third operational amplifier through the seventh capacitor, the thirteenth resistor and the common end of the twelfth resistor in sequence. The output terminal of the third operational amplifier is also grounded through the eighth capacitor. The output terminal of the third operational amplifier is also connected to the input terminal of the voltage raising circuit.
8. The transmitter topology signal adaptation system of the novel topology identification system according to claim 5 is characterized in that: The voltage raising circuit is used to raise the voltage of the amplified topology identification signal, and includes a fourth operational amplifier, a voltage regulator, multiple resistors and capacitors. The input end of the voltage regulator is connected to a power supply and is also grounded through a ninth capacitor. The output end of the voltage regulator is divided into two outputs, one of which is connected to the in-phase input end of the fourth operational amplifier through a fourteenth resistor and a fifteenth resistor in sequence, and the other is grounded through a tenth capacitor. The in-phase input end of the fourth operational amplifier is connected to the output end of the amplifier circuit as the input end of the voltage raising circuit after passing through a sixteenth resistor. The output end of the fourth operational amplifier is grounded through an eighteenth resistor and a seventeenth resistor in sequence. The inverting input end of the fourth operational amplifier is connected to the common end of the eighteenth resistor and the seventeenth resistor. The output end of the fourth operational amplifier outputs the feedback signal and sends it to the data processing module.
9. The transmitter topology signal adaptation system of the novel topology identification system according to claim 1 is characterized in that: The adaptive system also includes a communication module, and the data processing module is connected to the external port through the communication module. The communication module includes an RS485 chip and an RS232 chip, which are respectively connected to the corresponding communication interfaces of the data processing module; the adaptive system performs firmware upgrades, system debugging and parameter settings through the communication module.
10. The transmitter topology signal adaptation system of the novel topology identification system according to claim 9, characterized in that: The adaptive system further comprises a signal indicating LED light group connected to the data processing module, the signal indicating LED light group is used for five signal indications, a first signal indicating LED circuit is used for indicating the operation status of the data processing module, a second signal indicating LED circuit is used for indicating the data receiving status of the receiving communication port of the communication module, and a third signal indicating LED circuit is used for indicating the data sending status of the sending communication port of the communication module, the first signal indicating LED circuit, the second signal indicating LED circuit and the third signal indicating LED circuit have the same circuit structure, the anode of the first light emitting diode is connected to the data processing module, and the cathode is grounded through a nineteenth resistor; The fourth signal indication LED circuit is used to indicate the feedback signal status of the feedback signal processing module, and the fifth signal indication LED circuit is used to indicate the adaptive adjustment status of the topology signal generating module. The circuit structures of the fourth signal indication LED circuit and the fifth signal indication LED circuit are the same. The base of both transistors is connected to the data processing module through the twentieth resistor and is also grounded through the twenty-first resistor. The collector of the transistor is connected to the cathode of the second light-emitting diode, and the anode of the second light-emitting diode is connected to the power supply through the twenty-second resistor, and the emitter of the transistor is grounded.
Citation Information
Patent Citations
Sending end topology signal self-adaptive system of novel topology identification system
CN212462888U