Barrier-free tungsten deposition

By forming amorphous silicon or doped amorphous silicon layer on the surface of the substrate, the cyclic deposition technology is used to solve the problems of tungsten film through holes and high resistivity, and the deposition of low resistivity is achieved, thereby improving the adhesion of tungsten film and deposition uniformity.

CN112041969BActive Publication Date: 2025-01-03APPLIED MATERIALS INC
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN201880092720.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-04-24
Filing Date
2018-12-12
Publication Date
2025-01-03
Estimated Expiration
2038-12-12

AI Technical Summary

Technical Problem

The prior art has through-holes, poor step coverage and gap filling properties when depositing tungsten films. Tungsten is not easy to adhere to certain surfaces, and the ALD tungsten film has a high resistivity, making it difficult to achieve low resistivity deposition.

Method used

By forming an amorphous silicon layer or a doped amorphous silicon layer on the surface of the substrate as a glue layer or a nucleation layer, a cyclic deposition technology of silicon precursors and metal precursors is used to form a low-resistivity tungsten film to avoid the use of a barrier layer. Directly deposit the metal layer.

Benefits of technology

Low resistivity deposition of tungsten film is achieved, the adhesion and deposition uniformity of tungsten are improved, the process complexity is reduced, and the adhesion to dielectric spacers is enhanced.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN112041969B_ABST
    Figure CN112041969B_ABST
Patent Text Reader

Abstract

Methods of depositing metal films without using a barrier layer are disclosed. Some embodiments include forming an amorphous nucleation layer including one or more of silicon or boron, and forming a metal layer on the nucleation layer.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present disclosure generally relates to methods of depositing thin films. In particular, the present disclosure relates to methods of depositing tungsten films or films containing tungsten. Background Art

[0002] The semiconductor processing industry continues to demand greater production throughput while increasing the uniformity of deposited layers on substrates with larger surface areas. These same factors combined with new materials also provide higher circuit integration per unit area of ​​substrate. As circuit integration increases, the demand for greater uniformity and process control with respect to layer thickness rises. As a result, various techniques have been developed to deposit layers on substrates in a cost-effective manner while maintaining control over the layer properties.

[0003] Chemical vapor deposition (CVD) is the most common deposition process used to deposit layers on substrates. CVD is a flux-dependent deposition technique that requires precise control of substrate temperature and the precursors introduced into the processing chamber to produce the desired layer with uniform thickness. These requirements become more critical as substrate size increases, requiring more complex chamber design and gas flow techniques to maintain adequate uniformity.

[0004] A variant of CVD that exhibits excellent step coverage is cyclic deposition or atomic layer deposition (ALD). Cyclic deposition is based on atomic layer epitaxy (ALE) and uses chemical adsorption techniques to deliver precursor molecules to the substrate surface in a continuous cycle. The cycle exposes the substrate surface to a first precursor, a purge gas, a second precursor, and a purge gas. The first precursor and the second precursor react to form a product compound as a film on the substrate surface. The cycle is repeated to form a layer to a desired thickness.

[0005] Amorphous silicon is widely used in semiconductor devices, flat panel displays, and solar cells. Key technical challenges remain for the development of deposition processes for amorphous silicon deposition with conformal (i.e., good step coverage) or gap filling performance in deep-aspect ratio features. Conventional low pressure chemical vapor deposition (LPCVD) is limited to high temperature (>550°C) and low pressure, and therefore exhibits poor step coverage and / or gap filling performance; plasma enhanced chemical vapor deposition (PECVD) processes also cannot provide good step coverage and / or gap filling performance.

[0006] Due to the increasing integration density of the semiconductor industry, tungsten has been used based on excellent step coverage. As a result, tungsten deposition using CVD technology has gained widespread use in semiconductor processing due to the high throughput of the process. However, depositing tungsten by conventional CVD methods has several disadvantages.

[0007] For example, the ALD process deposits tungsten films into vias containing high aspect ratios (e.g., 20), whereas conventional CVD processes would typically result in similar vias being "pinched off" and not fully filled. Additionally, tungsten does not readily adhere to certain surfaces (e.g., dielectric spacers or oxides). To increase the adhesion of tungsten to dielectric spacers, conventional processes include a TiN layer. The deposition of the TiN film as a seed layer can be time consuming and adds additional complexity to the overall process.

[0008] Atomic layer deposition (ALD) of tungsten thin films shows very long incubation delays on silicon, silicon dioxide, and titanium nitride due to poor nucleation properties. Nucleation layers are often used to alleviate this problem. Conventionally, ALD WSi x or WB x Deposited by WF6 / Si2H6 and WF6 / B2H6, respectively. However, WF6 is directly exposed to the substrate surface (eg, Si, SiO2) and damages the substrate.

[0009] In addition, the ALD tungsten film does not adhere well directly to the surface of silicon or silicon oxide substrates. A titanium nitride glue layer is used to improve adhesion. However, the titanium nitride glue layer and WSi x / WB x The nucleation layer cannot conduct electricity well, resulting in stacking (W / WSi x / TiN) has a very high resistivity.

[0010] Therefore, there is a need in the art for improved techniques for depositing tungsten layers having reduced resistivity and without barrier / glue layers. Summary of the invention

[0011] One or more embodiments of the present disclosure are directed to a processing method. The method includes exposing a substrate surface to a boron precursor to form an amorphous boron layer. The substrate surface is substantially free of a barrier layer. The amorphous boron layer is exposed to a first metal precursor to convert the amorphous boron layer into a first metal layer. A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor.

[0012] Additional embodiments of the present disclosure are directed to a processing method. The method includes exposing a substrate surface to a silicon precursor to form an amorphous silicon layer. The substrate surface is substantially free of a barrier layer. The amorphous silicon layer is exposed to a first metal precursor to convert the amorphous silicon layer into a first metal layer. A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor.

[0013] Further embodiments of the present disclosure are directed to a processing method. The method includes exposing a substrate surface to a silicon precursor and a boron precursor to form an amorphous layer comprising silicon and boron. The substrate surface is substantially free of a barrier layer. The amorphous layer is exposed to a first metal precursor to convert the amorphous layer into a first metal layer. A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The above briefly summarizes the manner in which the above-described features of the present disclosure can be understood in detail, as well as a more specific description of the present disclosure, which can be obtained by reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only typical embodiments of the present disclosure and are not to be considered as limiting the scope of the present invention, as the present disclosure may admit to other equally effective embodiments.

[0015] Figure 1 A schematic diagram showing a membrane stack according to one or more embodiments of the present disclosure;

[0016] Figure 2A A process scheme is shown according to one or more embodiments of the present disclosure;

[0017] Figure 2B Show according to Figure 2A Schematic diagram of the membrane stack of the process scheme;

[0018] Figure 3 illustrates a process scheme according to one or more embodiments of the present disclosure;

[0019] Figure 4A A process scheme is shown according to one or more embodiments of the present disclosure;

[0020] Figure 4B Show according to Figure 4A Schematic diagram of the membrane stack of the process scheme;

[0021] Figure 5 A schematic diagram showing a membrane stack according to one or more embodiments of the present disclosure;

[0022] Fig. 6A illustrates a process scheme according to one or more embodiments of the present disclosure;

[0023] Figure 6B Show according to Fig. 6A Schematic diagram of the membrane stack of the process scheme;

[0024] Figure 7 illustrates a process scheme according to one or more embodiments of the present disclosure;

[0025] Fig. 8A illustrating a process scheme according to one or more embodiments of the present disclosure; and

[0026] Figure 8B Show according to Fig. 8A Schematic representation of the membrane stack of the process scheme.

[0027] Fig.9A illustrating a process scheme according to one or more embodiments of the present disclosure; and

[0028] Fig. 9B Show according to Fig.9A Schematic representation of the membrane stack of the process scheme. DETAILED DESCRIPTION

[0029] Before describing several embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of the structures or process steps set forth in the following description. The present disclosure can be incorporated into other embodiments and can be practiced or carried out in various ways.

[0030] As used herein, "substrate surface" means any portion of a substrate on which a film process is performed or a portion of a surface of a material formed on a substrate. For example, depending on the application, substrate surfaces on which processes may be performed include: materials such as silicon, silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire; and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials. Barrier layers, metals, or metal nitrides on the substrate surface include titanium, titanium nitride, tungsten nitride, tantalum, and tantalum nitride. The substrate surface may also include dielectric materials such as silicon dioxide and carbon-doped silicon oxide. The substrate may have various sizes, such as 200 mm or 300 mm diameter wafers, and rectangular or square grids. In some embodiments, the substrate comprises a rigid non-continuous material.

[0031] "Atomic layer deposition" or "cyclic deposition" as used herein means the continuous exposure of two or more reactive compounds to deposit a layer of material on the surface of a substrate. As used in this specification and the appended claims, the terms "reactive compound", "reactive gas", "reactive species", "precursor", "process gas" and similar terms are used interchangeably to mean a substance having a species that is capable of reacting with a substrate surface or a material on a substrate surface in a surface reaction (e.g., chemical adsorption, oxidation, reduction). A substrate or a portion of a substrate is sequentially exposed to two or more compounds in a reaction zone introduced into a processing chamber. In a time-domain ALD process, exposure to each reactive compound is separated by a time delay to allow each compound to adhere and / or react on the substrate surface. In a spatial ALD process, different portions of the substrate surface or materials on the substrate surface are simultaneously exposed to two or more reactive compounds so that any given point on the substrate is not substantially exposed to more than one reactive compound at the same time. As used in this specification and the appended claims, as understood by those skilled in the art, the term "substantially" used in this regard means that there is a possibility that a small portion of the substrate may be exposed to multiple reactive gases simultaneously due to diffusion, and that simultaneous exposure is not intended.

[0032] In one aspect of the time-domain ALD process, a first reactant gas (i.e., a first precursor or compound A) is pulsed into the reaction region, followed by a first time delay. Next, a second precursor or compound B is pulsed into the reaction region, followed by a second delay. During each time delay, a purge gas such as argon is introduced into the processing chamber to purge the reaction region or otherwise remove any remaining reactant compounds or byproducts from the reaction region. Alternatively, the purge gas may flow continuously during the entire deposition process so that only the purge gas flows during the time delay between pulses of the reactant compound. Alternatively, the reactant compound may be pulsed until a desired film or film thickness is formed on the substrate surface. In either case, the ALD process of pulsing compound A, purge gas, compound B, and purge gas is a cycle. The cycle may start with either compound A or compound B and continue the corresponding order of the cycle until a film with a desired thickness is achieved.

[0033] In one aspect of the spatial ALD process, a first reactant gas and a second reactant gas (e.g., hydrogen radicals) are delivered simultaneously into the reaction region but separated by an inert gas curtain and / or a vacuum curtain. The substrate is moved relative to the gas delivery device so that a given point on the substrate is exposed to the first reactant gas and the second reactant gas.

[0034] One or more embodiments of the present disclosure are directed to methods of depositing conformal amorphous silicon films as one or more of a glue layer, a fluorine diffusion barrier layer, and / or a nucleation layer for metal ALD (e.g., tungsten deposition). Although tungsten deposition is mentioned in many embodiments, those skilled in the art will appreciate that other metals (e.g., Mo) can be deposited by the disclosed processes. The present disclosure is not limited to ALD tungsten deposition.

[0035] Certain embodiments of the present disclosure include process integration schemes for metal ALD processes. For example, tungsten is deposited on a silicon substrate by atomic layer deposition. Figure 1 The stack 10 may include a glue layer 14 (eg, TiN), a nucleation layer 16 (eg, WSi x and W.B. x ) and a substrate 12 (e.g., SiO2) with a metal 18 (e.g., W). In one or more embodiments of the process scheme, the nucleation layer is replaced by an amorphous silicon layer. In some embodiments, the nucleation layer is replaced by an amorphous silicon layer and the TiN glue layer is made thinner. In one or more embodiments, both the nucleation layer and the glue layer are replaced by an amorphous silicon layer.

[0036] See also Figure 2A and Figure 2B , one or more embodiments of the present disclosure are directed to a processing method 300 and a film stack 200. In step 310, a substrate 220 having a substrate surface 222 is provided. In step 320, the substrate 220 is exposed to a silicon precursor to form an amorphous silicon layer 240 on the substrate surface 222.

[0037] In some embodiments, amorphous silicon (a-Si) formation can be achieved by maximizing the partial pressure of a silicon precursor while minimizing the wafer temperature. Suitable silicon precursors include, but are not limited to, polysilane (Si x H y For example, polysilane includes disilane (Si2H6), trisilane (Si3H8), tetrasilane (Si4H 10 ), isotetrasilane, neopentasilane (Si5H 12 ), cyclopentasilane (Si5H 10 ), hexasilane (C6H 14 ), cyclohexasilane (Si6H 12 ), or generally x = 2 or greater Si x H y , or a combination of the above. For example, disilane, which has a moderate processing temperature and a high vapor pressure, can be used as a silicon precursor alone or in combination with other species.

[0038] In some embodiments, the silicon precursor comprises substantially only disilane. As used in this specification and the appended claims, the term "substantially only disilane" means that at least 95% of the active species are disilane. Other gases such as carrier gases and inert gases may be included in any amount.

[0039] The thickness of the amorphous silicon layer 240 may vary depending on, for example, the substrate surface and subsequent films and processes. In some embodiments, the amorphous silicon layer 240 has a thickness in the range of about 1000 Å to about 1000 Å. to about In one or more embodiments, the amorphous silicon layer 240 has a thickness ranging from about to about or in the range of about to about or in the range of about to about In some embodiments, the thickness of the amorphous silicon layer 240 is greater than and less than or equal to approximately or

[0040] In step 330, a metal layer 280 is formed on the amorphous silicon layer 240. The metal layer 280 may be formed by any suitable technique including, but not limited to, atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PE-ALD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PE-CVD), and physical vapor deposition (PVD).

[0041] The metal layer 280 may comprise any suitable metal. In some embodiments, the metal layer 280 comprises one or more of tungsten or molybdenum. In some embodiments, the metal layer 280 consists essentially of tungsten. In some embodiments, the metal layer 280 consists essentially of molybdenum. As used herein, "consisting essentially of" means that the metal layer 280 is greater than or equal to about 80%, about 85%, about 90%, or about 95% atomic percentage of the specified component. For example, the metal layer 280 consists essentially of tungsten, which has a composition greater than or equal to, for example, about 90 atomic % tungsten.

[0042] In some embodiments, metal layer 280 is deposited by CVD. Metal precursors and reactants may be co-flowed into a processing chamber to deposit a layer on the substrate. The precursors and reactants are reacted in the gas phase.

[0043] In some embodiments, the metal layer 280 is deposited by ALD. In some embodiments, the metal layer 280 is deposited by sequentially exposing the amorphous silicon layer 240 to a metal precursor and a reactant.

[0044] The metal precursor can be any suitable precursor that can be used to deposit a metal film. In some embodiments, the metal precursor comprises a metal selected from tungsten, molybdenum, and combinations thereof. In one or more embodiments, the metal precursor comprises one or more of WF6 and MoF6. In some embodiments, the metal precursor is a fluorine-containing precursor. It is well known that fluorine can etch silicon surfaces. Some embodiments of the present disclosure advantageously allow the use of fluorine precursors because the amorphous silicon layer 240 can be formed to a thickness sufficient to ensure that the precursor does not remove all of the a-Si film.

[0045] The reactant may be any suitable reactant capable of reacting with the species formed on the surface. For example, if WF6 is used as a precursor, then there will be -WF x Species. The reactants can react with -WF x The species react to produce the W film.

[0046] Figure 3 A process flow of another embodiment of the present disclosure is shown that includes a degassing process 325 after forming the amorphous silicon layer 240. In some embodiments, the amorphous silicon layer 240 is exposed to a degassing environment to remove outgassed species before forming the metal layer 280.

[0047] The deposited amorphous silicon layer 240 may release or degas species, such as hydrogen. The degassing environment provides an opportunity for gaseous species to be released, which minimizes bubbling of the final film. The degassing environment may include any conditions that allow or encourage degassing of the film. For example, the degassing environment may consist essentially of an inert gas. As used herein, "consisting essentially of" means that there are no gaseous species that interfere with the degassing of the deposited film. Other reactive species may be present without preventing degassing of the film while still consisting essentially of an inert gas.

[0048] Suitable inert gases include, but are not limited to, one or more of argon, helium, nitrogen, and / or mixtures thereof.

[0049] In one or more embodiments, the outgassing species includes hydrogen, SiH2, SiH3, SiH4, and / or other low-order silanes.

[0050] The pressure in the processing chamber or a region of the processing chamber can be independently controlled for the precursor exposure and the degassing environment. In some embodiments, the exposure to each of the silicon precursor and the degassing environment occurs at a pressure in the range of about 10 mTorr to about 100 Torr. In some embodiments, the silicon precursor is exposed to the substrate at a pressure greater than or equal to about 500 mTorr, or greater than or equal to about 1 Torr, or greater than or equal to about 5 Torr, or greater than or equal to about 10 Torr, or greater than or equal to about 20 Torr, or greater than or equal to about 30 Torr.

[0051] The temperature at which the substrate surface is exposed to the precursor or degassing environment may vary depending on, for example, the thermal budget of the device being formed and the precursor. In some embodiments, exposure to each of the precursor and the degassing environment occurs at a temperature in the range of about 100° C. to about 700° C. In one or more embodiments, the silicon halide precursor is exposed to the substrate at a temperature in the range of about 250° C. to about 600° C., or in the range of about 400° C. to about 550° C.

[0052] The thickness of the a-Si film formed with the silicon precursor prior to exposure to the degassing environment can be varied. In some embodiments, each exposure to the silicon precursor and the degassing environment grows a film having a thickness in the range of about to about The thickness of the film between.

[0053] The precursor and the degassing environment may be repeatedly and continuously exposed to the substrate surface to form a film having a predetermined thickness. In some embodiments, the amorphous silicon film has a thickness in the range of about The total thickness is between about 1 μm.

[0054] In some embodiments, a-Si is deposited from disilane at a wafer temperature of less than about 450°C and a disilane partial pressure of greater than or equal to about 20 Torr. In an exemplary embodiment, the substrate is exposed to the silicon precursor at a pressure greater than or equal to about 20 Torr and at a temperature in a range of about 400°C to about 550°C.

[0055] See also Figure 4A and Figure 4B , some embodiments of the present disclosure further include step 360, in which a glue layer 260 is deposited on the substrate before forming the amorphous silicon layer 240. The glue layer 260 is a layer to which the amorphous silicon can adhere and has a lower likelihood of peeling than if the amorphous silicon layer is deposited directly on the substrate 220. In some embodiments, the glue layer includes TiN. In one or more embodiments, the substrate 220 has a silicon oxide surface and the glue layer includes TiN.

[0056] The thickness of the glue layer 260 may vary depending on the thickness of the substrate and the amorphous silicon to be deposited. In some embodiments, the glue layer 260 has a thickness in the range of about to about Between, or in the range of about to about In some embodiments, the adhesive layer 260 has a thickness less than or equal to about or less than or equal to approximately or less than or equal to approximately or less than or equal to approximately Thickness.

[0057] refer to Figure 4B One or more embodiments of the present disclosure are directed to a stack 200 comprising a substrate 220 having an oxide surface 222. A glue layer 260 is on the oxide surface 222. The glue layer of some embodiments comprises a thickness ranging from about to about The amorphous silicon layer 240 is on the glue layer 260 and has a range of about to about The metal layer 280 is on the amorphous silicon layer 240 and includes one or more of tungsten and molybdenum.

[0058] One or more embodiments of the present disclosure are directed to methods of depositing conformally doped amorphous silicon films as one or more of a glue layer, a fluorine diffusion barrier layer, and / or a nucleation layer for metal deposition (e.g., ALD tungsten deposition). Although tungsten deposition is mentioned in many embodiments, those skilled in the art will appreciate that other metals (e.g., Mo) can be deposited by the disclosed processes. The present disclosure is not limited to ALD tungsten deposition, ALD deposition, or tungsten deposition.

[0059] Embodiments of the present disclosure include process integration schemes for metal ALD processes. For example, tungsten is deposited on a silicon substrate by atomic layer deposition. Figure 5 The stack 10 may include a glue layer 14 (eg, TiN), a nucleation layer 16 (eg, WSi x and W.B. x ) and a substrate 12 (e.g., SiO2) with a metal 18 (e.g., W). In one or more embodiments of the process scheme, the nucleation layer is replaced with a doped amorphous silicon layer. In some embodiments, the nucleation layer is replaced with a doped amorphous silicon layer and the TiN glue layer is made thinner. In one or more embodiments, both the nucleation layer and the glue layer are replaced with a doped amorphous silicon layer.

[0060] See also Fig. 6A and Figure 6B , one or more embodiments of the present disclosure are directed to a processing method 500 and a film stack 400. A substrate 420 having a substrate surface 422 is provided in step 510. In step 520, the substrate 420 is exposed to a silicon precursor and a dopant to form a doped amorphous silicon layer 440 on the substrate surface 422.

[0061] Some embodiments of the present disclosure advantageously provide methods for reducing the deposition temperature of the nucleation layer by introducing a dopant. In some embodiments, the morphology of the nucleation layer is changed by adding a dopant during deposition of the conformal amorphous silicon layer. In some embodiments, the deposition temperature of the amorphous silicon can be reduced from greater than or equal to about 400° C. to less than or equal to 100° C. or less. In some embodiments, due to the different film properties / morphology of the doped silicon film compared to the non-doped amorphous silicon film, the tungsten film properties can be advantageously changed by changing the dopant concentration.

[0062] In some embodiments, doped amorphous silicon (doped a-Si) formation can be achieved by maximizing the partial pressure of the silicon precursor while minimizing the wafer temperature. In some embodiments, the doped amorphous silicon is deposited using a CVD deposition process in which the silicon precursor and the dopant are simultaneously exposed to the substrate.

[0063] Suitable silicon precursors include, but are not limited to, polysilane (Si x H y ) and halogenated silanes (Si z H a X b For example, polysilane includes silane, disilane (Si2H6), trisilane (Si3H8), tetrasilane (Si4H 10 ), isotetrasilane, neopentasilane (Si5H 12 ), cyclopentasilane (Si5H 10 ), hexasilane (C6H 14 ), cyclohexasilane (Si6H 12 ) or generally wherein z=1 or greater Si z H a , or a combination of the above. For example, disilane, which has a moderate processing temperature and a high vapor pressure, can be used as a silicon precursor alone or in combination with other species.

[0064] For example, halosilanes include dihalosilanes (SiH2X2), trihalosilanes (SiHX3), tetrahalosilanes (SiX4), or hexahalodisilanes (Si2X6), or generally Si wherein z=1 or greater, X is a halogen, and b=1 or greater. z H a X b , and combinations thereof. In some embodiments, the halogen present in the halosilane is independently selected from fluorine, chlorine, bromine, or iodine. In some embodiments, the halogen consists essentially of chlorine.

[0065] In some embodiments, the silicon precursor comprises substantially only disilane. In some embodiments, the silicon precursor comprises substantially only dichlorosilane. As used in this specification and the appended claims, the term "substantially only" means that at least 95% of the active species are said species. Other gases such as carrier gases and inert gases may be included in any amount.

[0066] The dopant can be any material suitable for doping the deposited amorphous silicon layer. In some embodiments, the doped amorphous silicon layer comprises one or more of boron, phosphorus, arsenic, and germanium. In some embodiments, the dopant comprises one or more of borane, diborane, phosphine, diphosphine, arsine, biarsine, germane, or digermane. In some embodiments, the dopant comprises substantially only diborane. In some embodiments, the dopant comprises substantially only diphosphine. In some embodiments, the dopant comprises substantially only biarsine. In some embodiments, the dopant comprises substantially only digermane.

[0067] The thickness of the doped amorphous silicon layer 440 may vary depending on, for example, the substrate surface and subsequent films and processes. In some embodiments, the thickness of the doped amorphous silicon layer 440 is greater than or equal to about In one or more embodiments, the thickness of the doped amorphous silicon layer 440 is about to about within the range of, or about to about within the range of, or about to about within the range of, or about to about In some embodiments, the thickness of the doped amorphous silicon layer 440 is about To about In some embodiments, the thickness of the doped amorphous silicon layer 440 is greater than and less than or equal to approximately or In some embodiments, the doped amorphous silicon layer 440 has a minimum thickness sufficient to form a continuous layer. As used herein, the term "continuous" means a layer that covers the entire exposed surface without gaps or bare spots that expose material located below the deposited layer. The continuous layer may have gaps or bare spots with a surface area of ​​less than about 1% of the total surface area of ​​the film.

[0068] In some embodiments, the doped amorphous silicon layer 440 is conformally formed on the substrate 420. As used herein, the term "conformal" or "conformally" means that the layer adheres to and uniformly covers the exposed surface with a thickness that has a variation of less than 1% relative to the average thickness of the film. For example, A thick film will have a thickness less than This thickness and variation includes the edges, corners, sides, and bottom of the grooves. For example, the conformal layer deposited in various embodiments of the present disclosure will provide coverage over the deposition area of ​​substantially uniform thickness on complex surfaces.

[0069] In step 530, a metal layer 480 is formed on the doped amorphous silicon layer 440. The metal layer 480 may be formed by any suitable technique including, but not limited to, atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PE-ALD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PE-CVD), and physical vapor deposition (PVD).

[0070] The metal layer 480 may comprise any suitable metal. In some embodiments, the metal layer 480 comprises one or more of tungsten or molybdenum. In some embodiments, the metal layer 480 consists essentially of tungsten. In some embodiments, the metal layer 480 consists essentially of molybdenum. As used herein, "consisting essentially of" means that the metal layer 480 is greater than or equal to about 80%, about 85%, about 90%, or about 95% atomic percentage of the specified component. For example, the metal layer 480 consists essentially of tungsten, which has a composition greater than or equal to, for example, about 90 atomic % tungsten.

[0071] In some embodiments, metal layer 480 is deposited by CVD. Metal precursors and reactants may be co-flowed into a processing chamber to deposit a layer on a substrate. The precursors and reactants are reacted in the gas phase.

[0072] In some embodiments, the metal layer 480 is deposited by ALD. In some embodiments, the metal layer 480 is deposited by sequentially exposing the doped amorphous silicon layer 440 to a metal precursor and a reactant.

[0073] The metal precursor can be any suitable precursor that can be used to deposit a metal film. In some embodiments, the metal precursor comprises a metal selected from tungsten, molybdenum, and a combination of the two. In one or more embodiments, the metal precursor comprises one or more of WF6 and MoF6. In some embodiments, the metal precursor is a fluorine-containing precursor. It is well known that fluorine can etch silicon surfaces. Some embodiments of the present disclosure advantageously allow the use of fluorine precursors because the doped amorphous silicon layer 240 can be formed to a thickness sufficient to ensure that the precursor does not remove all of the doped amorphous silicon film.

[0074] The reactant can be any suitable reactant that can react with the species formed on the surface. For example, in an ALD process, if WF6 is used as a precursor, there will be -WFx species on the surface. The reactant can react with the -WFx species to produce a W film.

[0075] Figure 7 A process flow of another embodiment of the present disclosure is shown that includes a degassing process 125 after forming the doped amorphous silicon layer 440. In some embodiments, the doped amorphous silicon layer 440 is exposed to a degassing environment to remove outgassed species before forming the metal layer 480.

[0076] The deposited doped amorphous silicon layer 440 may release or degas species, such as hydrogen. The degassing environment provides an opportunity for gaseous species to be released, which minimizes bubbling of the final film. The degassing environment may include any conditions that allow or encourage degassing of the film. For example, the degassing environment may consist essentially of an inert gas. As used herein, "consisting essentially of" means that there are no gaseous species that interfere with the degassing of the deposited film. Other reactive species may exist without preventing degassing of the film while still consisting essentially of an inert gas.

[0077] Suitable inert gases include, but are not limited to, one or more of argon, helium, nitrogen, and / or mixtures thereof.

[0078] In one or more embodiments, the outgassing species includes hydrogen, SiH2, SiH3, SiH4, and / or other lower silanes.

[0079] The pressure in the processing chamber or region of the processing chamber can be independently controlled for the precursor exposure and degassing environment. In some embodiments, exposure to each of the silicon precursor, dopant, and degassing environment occurs at a pressure in the range of about 100 mTorr to about 600 Torr. In some embodiments, the silicon precursor and / or dopant are exposed to the substrate at a pressure of about 500 mTorr or greater, or about 1 Torr or greater, or about 5 Torr or greater, or about 10 Torr or greater, or about 20 Torr or greater, or about 30 Torr or greater.

[0080] The temperature at which the substrate surface is exposed to the silicon precursor, dopant, and / or degassing environment may vary depending on, for example, the thermal budget of the device being formed and the silicon precursor and / or dopant. In some embodiments, exposure to each of the silicon precursor, dopant, and / or degassing environment occurs at a temperature in the range from about 25°C to about 700°C. In one or more embodiments, the doped polysilicon layer 440 is formed at a temperature in the range from about 25°C to about 700°C, or in the range from about 50°C to about 600°C, or in the range from about 100°C to about 550°C. In some embodiments, the doped polysilicon layer 440 is formed at a temperature greater than or equal to about 25°C and less than or equal to about 550°C, less than or equal to about 400°C, less than or equal to about 250°C, less than or equal to about 200°C, or less than or equal to about 100°C.

[0081] The thickness of the doped amorphous silicon layer 440 formed with the silicon precursor and the dopant can be varied prior to exposure to the degassing environment. In some embodiments, each exposure to the silicon precursor, the dopant, and the degassing environment grows a film having a thickness between about to about about to about or about to about in the range of.

[0082] The precursor, dopant, and degassing environment may be repeatedly and continuously exposed to the substrate surface to form a film having a predetermined thickness. In some embodiments, the amorphous silicon film has a thickness in the range of about The total thickness is between about 1 μm.

[0083] See also Fig. 8A and Figure 8B , some embodiments of the present disclosure further include step 560 in which a glue layer 460 is deposited on the substrate before forming the doped amorphous silicon layer 440. The glue layer 460 is a layer to which the doped amorphous silicon can adhere and has a lower likelihood of peeling off than if the doped amorphous silicon layer is deposited directly on the substrate 420. In some embodiments, the glue layer includes TiN. In one or more embodiments, the substrate 420 has a silicon oxide surface and the glue layer includes TiN.

[0084] The thickness of the glue layer 460 may vary depending on the thickness of the substrate and the doped amorphous silicon to be deposited. In some embodiments, the glue layer 460 has a thickness in the range of about to about Between, or in the range of about to about In some embodiments, the adhesive layer 460 has a thickness less than or equal to about or less than or equal to approximately or less than or equal to approximately or less than or equal to approximately Thickness.

[0085] See also Figure 8B One or more embodiments of the present disclosure are directed to a stack 400 comprising a substrate 420 having an oxide surface 422. A glue layer 460 is on the oxide surface 422. The glue layer of some embodiments comprises a thickness ranging from about to about The doped amorphous silicon layer 440 is on the glue layer 460 and has a range of about to about The metal layer 480 is on the doped amorphous silicon layer 440 and includes one or more of tungsten and molybdenum.

[0086] One or more embodiments of the present disclosure are directed to methods of depositing a metal layer on a thin film comprising one or more of boron or silicon as one or more of a glue layer, a fluorine diffusion barrier layer, and / or a nucleation layer without the use of a barrier layer. Although deposition of tungsten metal is mentioned in many embodiments, those skilled in the art will appreciate that other metals (e.g., Mo) can be deposited by the disclosed processes. Additionally, the present disclosure is not limited to metal deposition by ALD deposition or tungsten deposition.

[0087] Some embodiments of the present disclosure advantageously provide methods for depositing a metal layer on a substrate surface substantially free of a barrier layer. The relative absence of a barrier layer allows the formation of a metal line or structure having a relatively lower resistance than a similar structure containing a barrier layer. Without being bound by theory, it is believed that the absence of a barrier layer allows a larger amount of metal to be deposited in the same volume and reduces the resistance of the metal block. In some embodiments, the metal layer is deposited as part of a metal stack. In some embodiments, a nucleation layer is formed directly on the substrate surface without a barrier layer. In some embodiments, the nucleation layer comprises one or more of silicon or boron.

[0088] Those skilled in the art will recognize that fluorine-containing compounds can etch certain surfaces (e.g., silicon surfaces). Some embodiments of the present disclosure advantageously allow the use of fluorine-containing metal precursors without a barrier layer. Without being bound by theory, it is believed that the nucleation layer 830 can be formed to a thickness sufficient to ensure that the metal precursor does not remove the entire nucleation layer and does not etch or otherwise damage the substrate surface.

[0089] In some embodiments, the metal precursor exposed to the nucleation layer contains substantially no fluorine. Without being bound by theory, it is believed that by using the metal precursor in the absence of fluorine, the effects of fluorine attack on the substrate surface may be minimized or eliminated.

[0090] See also Fig.9A and Fig. 9B , one or more embodiments of the present disclosure are directed to a processing method 700 for forming a film stack 800. At 710, a substrate 820 having a substrate surface 822 is exposed to a nucleation precursor to form a nucleation layer 830. In some embodiments, the nucleation layer 830 is formed by thermal decomposition of the nucleation precursor.

[0091] In some embodiments, the substrate 820 comprises a dielectric. In some embodiments, the substrate 820 comprises one or more of silicon dioxide or aluminum oxide. In some embodiments, the substrate 820 consists essentially of silicon oxide or aluminum oxide. As used herein, "consisting essentially of" means that the substrate contains greater than 95%, 98%, 99%, or 99.5% of the material on an atomic basis. Those skilled in the art will recognize that the terms "silicon oxide" and "aluminum oxide" do not convey any specific atomic ratios. These materials can be stoichiometric or non-stoichiometric.

[0092] In some embodiments, the substrate surface 822 is substantially free of a barrier layer. As used herein, "substantially free of a barrier layer" means that less than 5%, 2%, 1%, or 0.5% of the substrate surface comprises a barrier layer. In some embodiments, the substrate surface 822 is substantially free of a barrier layer comprising one or more of TiN, TaN, SiN, TiSiN, or SiCN.

[0093] In some embodiments, the nucleation precursor comprises a boron precursor and the nucleation layer is a boron layer. In some embodiments, the nucleation precursor consists essentially of the boron precursor. In some embodiments, the boron layer is an amorphous boron layer.

[0094] Suitable boron precursors include, but are not limited to, boranes, alkylboranes, and haloboranes. In some embodiments, the boron precursor comprises a boron precursor having the general formula B c H d X e R f One or more species of, wherein each X is a halogen independently selected from F, Cl, Br and I, each R is an independently selected C1-C4 alkyl, c is any integer greater than or equal to 2, each of d, e and f is less than or equal to c+2 and d+e+f equals c+2.

[0095] In some embodiments, the nucleation precursor comprises a silicon precursor and the nucleation layer is a silicon layer. In some embodiments, the nucleation precursor consists essentially of a silicon precursor. In some embodiments, the silicon layer is an amorphous silicon layer.

[0096] Suitable silicon precursors include, but are not limited to, polysilanes and halogenated silanes. In some embodiments, the silicon precursor comprises a compound having the general formula Si g H h X i wherein each X is a halogen independently selected from F, Cl, Br and I, g is any integer greater than or equal to 1, h and i are each less than or equal to 2g+2 and h+i is equal to 2g+2.

[0097] In some embodiments, the nucleation precursor comprises a silicon precursor and a boron precursor, and the nucleation layer comprises silicon and boron. In some embodiments, the nucleation layer is amorphous. In some embodiments, the amorphous layer comprises no more than 5 atomic percent silicon. In some embodiments, the amorphous layer comprises no more than 5 atomic percent boron.

[0098] The thickness of the nucleation layer 830 may vary depending on, for example, the substrate surface 822 and subsequent films and processes. In some embodiments, the thickness of the nucleation layer 830 is greater than or equal to about In one or more embodiments, the thickness of the nucleation layer 830 is about to about within the range of, or about to about within the range of, or about to about within the range of, or about to about In some embodiments, the thickness of the nucleation layer 830 is about To about In some embodiments, the thickness of the nucleation layer 830 is greater than and less than or equal to approximately or

[0099] In some embodiments, the nucleation layer 830 has a minimum thickness sufficient to form a continuous layer. As used herein, the term "continuous" means a layer that covers the entire exposed surface without gaps or bare spots that expose material located below the deposited layer. The continuous layer may have gaps or bare spots with a surface area of ​​less than about 1% of the total surface area of ​​the film.

[0100] In some embodiments, the nucleation layer 830 is conformally formed on the substrate surface 822. As used herein, the term "conformal" or "conformally" means that the layer adheres to and uniformly covers the exposed surface with a thickness that varies less than 1% relative to the average thickness of the film. For example, A thick film will have a thickness less than This thickness and variation includes the edges, corners, sides, and bottom of the grooves. For example, the conformal layer deposited in various embodiments of the present disclosure will provide coverage over the deposition area of ​​substantially uniform thickness on complex surfaces.

[0101] At 720, the nucleation layer 830 is exposed to a first metal precursor to form a first metal layer 840. The first metal precursor comprises a first metal. In some embodiments, the first metal layer is formed by converting the nucleation layer into the first metal layer. In some embodiments, the conversion process involves replacing atoms of the nucleation layer with atoms of the first metal. In some embodiments, H2 is added as a co-reactant with the first metal precursor.

[0102] The first metal can be any suitable metal. In some embodiments, the first metal comprises tungsten or molybdenum. In some embodiments, the first metal precursor comprises one or more ligands selected from halides, carbonyls, or cyclopentadiene. In some embodiments, the first metal precursor comprises one or more of WF6, WCl6, WCl5, W(CO)5, MoF6, MoCl5, or Mo(CO)6, or consists essentially of one or more of the above substances. In some embodiments, the first metal precursor consists essentially of W(CO)5. As used herein, "consisting essentially of..." means that the first metal precursor contains greater than 95%, 98%, 99%, or 99.5% of the species.

[0103] In some embodiments, the first metal precursor contains substantially no fluorine. As used herein, "substantially no fluorine" means that the first metal precursor contains greater than 2%, 1%, 0.5%, or 0.1% fluorine atoms on an atomic basis.

[0104] At 730, a second metal layer 850 is formed on the first metal layer 840 by exposing the substrate 820 to a second metal precursor. The second metal precursor comprises a second metal. The second metal can be any suitable metal. In some embodiments, the second metal comprises tungsten or molybdenum. In some embodiments, the second metal layer 850 consists essentially of tungsten. In some embodiments, the second metal layer 850 consists essentially of molybdenum. As used herein, "consisting essentially of" means that the second metal layer 850 contains greater than 95%, 98%, 99% or 99.5% of the specified element on an atomic basis. In some embodiments, the first metal precursor and the second metal precursor comprise the same metal. In some embodiments, the first metal precursor and the second metal precursor comprise different metals.

[0105] In some embodiments, the second metal precursor comprises one or more ligands selected from halides, carbonyls, or cyclopentadiene. In some embodiments, the second metal precursor comprises one or more of WF6, WCl6, WCl5, W(CO)5, MoF6, MoCl5, or Mo(CO)6, or consists essentially of one or more of the foregoing substances. In some embodiments, the second metal precursor consists essentially of W(CO)5. As used herein, "consisting essentially of..." means that the first metal precursor contains greater than 95%, 98%, 99%, or 99.5% of the species.

[0106] The second metal layer 850 may be formed by any suitable technique including, but not limited to, atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PE-ALD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PE-CVD), and physical vapor deposition (PVD).

[0107] In some embodiments, the second metal layer 850 is deposited by CVD. A second metal precursor and a reactant may be co-flowed into a processing chamber to deposit the second metal layer 850 on the substrate 820. The second metal precursor and the reactant are reacted in a gas phase.

[0108] In some embodiments, the second metal layer 850 is deposited by ALD. In some embodiments, the second metal layer is formed by exposing the substrate surface to a second tungsten precursor and a reactant, respectively.

[0109] The reactant may be any suitable reactant capable of reacting with the species formed on the surface. For example, in an ALD process, if WF6 is used as a precursor, there will be -WF x Species. The reactants can react with -WF x The species react to produce a W film. In some embodiments, the reactants include hydrogen (H2) or nitrogen (N2).

[0110] In some embodiments, an inert gas may be added to the processing chamber during processing. In some embodiments, the inert gas is added during the formation of the first metal film 840. In some embodiments, the inert gas is added during the formation of the second metal film 850. The inert gas may flow into the processing chamber with the first or second metal precursor or may flow separately. In some embodiments, the inert gas includes one or more of Ar, He, or nitrogen (N2).

[0111] The temperature at which the substrate surface is exposed to the nucleation precursor, the first metal precursor, and / or the second metal precursor may vary depending on, for example, the thermal budget of the device being formed and the selected precursors. In some embodiments, exposure to each precursor occurs at a temperature in the range from about 25°C to about 700°C. In one or more embodiments, the substrate is exposed at a temperature in the range from about 25°C to about 700°C, or in the range from about 50°C to about 600°C, or in the range from about 100°C to about 550°C. In some embodiments, the substrate is exposed at a temperature greater than or equal to about 25°C and less than or equal to about 550°C, less than or equal to about 400°C, less than or equal to about 250°C, less than or equal to about 200°C, or less than or equal to about 100°C. In some embodiments, the nucleation layer 830 and the first metal film 840 are formed at a temperature in the range from about 300°C to about 550°C, and the second metal film is formed at a temperature in the range from about 200°C to about 550°C.

[0112] The pressure at which the substrate surface is exposed to the nucleation precursor, the first metal precursor, and / or the second metal precursor may vary depending on, for example, the selected precursors and other process conditions. In some embodiments, exposure to each precursor occurs at a pressure in the range of about 0.01 torr to about 100 torr. In some embodiments, the substrate is exposed at a pressure in the range of about 0.01 torr to about 100 torr, or in the range of about 0.1 torr to about 80 torr, or in the range of about 1 torr to about 60 torr. In some embodiments, the substrate is exposed at a pressure greater than or equal to about 1 torr and less than or equal to about 100 torr, less than or equal to about 80 torr, less than or equal to about 60 torr, less than or equal to about 40 torr, or less than or equal to about 25 torr. In some embodiments, the substrate is exposed at a pressure in the range of about 4 torr to about 100 torr.

[0113] One or more embodiments of the present disclosure are directed to methods for depositing high quality a-Si layers with lower hydrogen content. In some embodiments, the a-Si layer is deposited at relatively high pressure and relatively high temperature. In some embodiments, deposition occurs at a pressure of greater than or equal to 200 Torr, greater than or equal to 225 Torr, greater than or equal to 250 Torr, greater than or equal to 275 Torr, greater than or equal to 300 Torr, greater than or equal to 325 Torr, or greater than or equal to 350 Torr. In some embodiments, the substrate surface is maintained at a temperature of greater than or equal to about 450°C, greater than or equal to about 475°C, greater than or equal to about 500°C, greater than or equal to about 525°C, or greater than or equal to about 550°C.

[0114] The quality of the amorphous silicon film is determined based on the hydrogen content of the film, as measured by Rutherford backscattering spectrometry (RBS). In some embodiments, the hydrogen content of the a-Si layer is less than or equal to 6 atomic percent, less than or equal to 5 atomic percent, less than or equal to 4 atomic percent, less than or equal to 3 atomic percent, less than or equal to 2 atomic percent, less than or equal to 1 atomic percent, less than or equal to 0.5 atomic percent,.

[0115] According to some embodiments, the nucleation layer (i.e., a high-quality amorphous silicon film) is transformed into a metal (e.g., tungsten) film at low temperature to provide a film with less fluorine penetration (i.e., fluorine content) to reduce film peeling and reduce film resistivity. In some embodiments, the nucleation layer is exposed to the first metal precursor at a temperature of less than or equal to about 450°C, less than or equal to about 425°C, less than or equal to about 400°C, less than or equal to about 375°C, or less than or equal to about 350°C. In some embodiments, the nucleation layer is exposed to the first metal precursor at a temperature greater than or equal to about 250°C, greater than or equal to about 275°C, greater than or equal to about 300°C, greater than or equal to about 325°C, or greater than or equal to about 350°C. In some embodiments, the nucleation layer is exposed to the first metal precursor at a temperature in a range from about 250°C to about 450°C, or in a range from about 275°C to about 425°C, or in a range from about 300°C to about 400°C.

[0116] Without being bound by theory, it is believed that the relatively low fluorine permeation of some embodiments provides better film adhesion (e.g., less film peeling) and lower resistivity for the resulting first metal film. In some embodiments, the fluorine concentration of the resulting first metal film is less than or equal to about 1×10 21 Atom / cm 3 , less than or equal to approximately 7.5x10 20 Atom / cm 3 , or less than or equal to approximately 5x10 20 Atom / cm 3 , less than or equal to approximately 2.5x10 20 Atom / cm 3 , or less than or equal to 1x10 20 Atom / cm 3 In some embodiments, the resistivity of the resulting first metal film having a thickness of about 20 nm is less than or equal to about 20 μΩ·cm, less than or equal to about 19 μΩ·cm, less than or equal to about 18 μΩ·cm, less than or equal to about 17 μΩ·cm, less than or equal to about 16 μΩ·cm, or less than or equal to about 15 μΩ·cm.

[0117] One or more embodiments of the present disclosure are directed to methods of depositing low-fluorine tungsten bulk films by atomic layer deposition with relatively large tungsten grain size, as measured by x-ray diffraction. In some embodiments, the deposition of low-fluorine bulk tungsten is performed by atomic layer deposition while the substrate is maintained at a temperature of greater than or equal to about 450° C., greater than or equal to about 475° C., greater than or equal to about 500° C., or greater than or equal to about 525° C.

[0118] The inventors have discovered that the grain size of low fluorine bulk tungsten films is proportional to the temperature at which the film is deposited. For example, a higher deposition temperature will form a film with a higher grain size. Without being bound by theory, it is believed that smaller tungsten grains result in electron scattering. In some embodiments, the average grain size of the low fluorine bulk tungsten is greater than or equal to about Greater than or equal to approximately Greater than or equal to approximately Greater than or equal to approximately Greater than or equal to approximately Greater than or equal to approximately Greater than or equal to approximately or greater than or equal to approximately The grain size of low-fluorine bulk tungsten film formed at low temperature (300°C to 400°C) is smaller than

[0119] The inventors have found that when the deposition of low-fluorine bulk tungsten is performed for every 10°C below 500°C, the resistivity of the low-fluorine bulk tungsten film increases by greater than or equal to about 0.5 μΩ·cm, greater than or equal to about 0.75 μΩ·cm, or greater than or equal to about 1.0 μΩ·cm. For example, if a low-fluorine bulk tungsten film deposited at 500°C has a resistivity of 15 μΩ·cm, then a similar film deposited at 480°C may have a resistivity of greater than or equal to 17 μΩ·cm.

[0120] According to one or more embodiments, the substrate is processed before and / or after processing according to the present disclosure. This processing can be performed in the same chamber or in one or more separate processing chambers. In some embodiments, the substrate is moved from a first chamber to a separate second chamber for further processing. The substrate can be moved directly from the first chamber to the separate processing chamber, or the substrate can be moved from the first chamber to one or more transfer chambers and then to the separate processing chamber. Thus, the processing device may include multiple chambers connected to a transfer station. Such a device may be referred to as a "cluster tool" or "cluster system", and similar devices.

[0121] Typically, a cluster tool is a modular system that includes multiple chambers that perform various functions, including substrate centering and orientation, degassing, annealing, deposition and / or etching. According to one or more embodiments, the cluster tool includes at least a first chamber and a central transfer chamber. The central transfer chamber can accommodate a robot that can move substrates back and forth between or within a processing chamber and a load lock chamber. The transfer chamber is typically maintained under vacuum conditions and provides an intermediate platform for moving substrates from one chamber to another and / or to a load lock chamber located at the front end of the cluster tool. Two well-known cluster tools that may be suitable for use in the present disclosure are Applied Materials, Inc., both available from Santa Clara, California. and However, the exact arrangement and combination of chambers may vary for the purpose of performing specific steps of the processes as described herein. Other processing chambers that may be used include, but are not limited to, cyclical layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, pre-cleaning, thermal processing such as rapid thermal processing (RTP), plasma nitridation, degassing, orientation, hydroxylation, and other substrate processes. By performing the processes in chambers on a cluster tool, surface contamination of the substrate by atmospheric impurities without oxidation prior to deposition of subsequent films may be avoided.

[0122] According to one or more embodiments, the substrate is continuously under vacuum or "load lock" conditions and is not exposed to ambient air when the substrate moves from one chamber to the next. The transfer chamber is thus "pumped" under vacuum and at vacuum pressure. An inert gas may be present in the processing chamber of the transfer chamber. In some embodiments, an inert gas is used as a purge gas to remove some or all of the reactants. According to one or more embodiments, a purge gas is injected at the outlet of the deposition chamber to prevent reactants from moving from the deposition chamber to the transfer chamber and / or to another processing chamber. Thus, the flow of the inert gas forms a curtain at the chamber outlet.

[0123] Substrates may be processed in a single substrate deposition chamber, where a single substrate is loaded, processed, and unloaded before another substrate is processed. Similar to the conveyor system, substrates may also be processed in a continuous manner, where multiple substrates are individually loaded into a first portion of the chamber, passed through the chamber, and unloaded from a second portion of the chamber. The shape of the chamber and associated conveyor system may form a straight path or a curved path. Additionally, the processing chamber may be a carousel, where multiple substrates move around a central axis and are exposed to deposition, etching, annealing, cleaning, etc. processes throughout the carousel conveyor path.

[0124] During processing, the substrate may be heated or cooled. This heating or cooling may be achieved by any suitable means, including but not limited to changing the temperature of the substrate support and flowing the heated or cooled gas to the substrate surface. In some embodiments, the substrate support includes a heater / cooler that can be controlled to conductively change the substrate temperature. In one or more embodiments, the gas used (reactive gas or inert gas) is heated or cooled to locally change the substrate temperature. In some embodiments, the heater / cooler is located in a chamber adjacent to the substrate surface to convectively change the substrate temperature.

[0125] The substrate may also be stationary or rotated during processing. The rotating substrate may be rotated continuously or in discrete steps. For example, the substrate may be rotated during the entire process, or the substrate may be rotated a small amount between exposures to different reactive or purge gases. Rotating the substrate (continuously or stepwise) during processing can help produce a more uniform deposition or etching by minimizing the effects of local variations in, for example, gas flow geometry.

[0126] References throughout this specification to "one embodiment," "certain embodiments," "one or more embodiments," or "an embodiment" mean that a particular feature, structure, material, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present disclosure. Thus, phrases such as "in one or more embodiments," "in certain embodiments," "in an embodiment," or "in an embodiment" appearing in various places throughout this specification do not necessarily mean the same embodiment of the present disclosure. Furthermore, in one or more embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner.

[0127] Although the disclosure herein has been described with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the disclosure. It will be apparent to those skilled in the art that various modifications and variations may be made to the methods and apparatus of the disclosure without departing from the spirit and scope of the disclosure. Therefore, the disclosure is intended to include modifications and variations within the scope of the appended claims and their equivalents.

Claims

1. A process for barrier-free tungsten deposition, comprising: exposing a substrate surface to a boron precursor to form an amorphous boron layer, the substrate surface being substantially free of a barrier layer; exposing the amorphous boron layer to a first metal precursor to transform the amorphous boron layer into a first metal layer; A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor.

2. The method of claim 1, wherein the boron precursor comprises one or more of borane, alkylborane or haloborane.

3. The method of claim 1, wherein the boron precursor comprises a compound having the general formula B c H d X e R f One or more species of, wherein each X is a halogen independently selected from F, Cl, Br and I, each R is an independently selected C1-C4 alkyl, c is any integer greater than or equal to 2, each of d, e and f is less than or equal to c+2 and d+e+f equals c+2. The method of claim 1 , wherein the amorphous boron layer forms a continuous layer. The method of claim 1 , wherein the amorphous boron layer forms a conformal layer.

6. The method of claim 1, wherein the amorphous boron layer has a value less than or equal to Thickness.

7. The method of claim 1, wherein the first metal precursor and the second metal precursor independently comprise one or more of WF6, WCl6, WCl5, MoF6, MoCl5, or Mo(CO)6.

8. The method of claim 1, wherein the first metal precursor contains substantially no fluorine.

9. The method of claim 1, wherein the first metal precursor and the second metal precursor comprise the same metal.

10. The method of claim 1, wherein the second metal layer is formed by exposing the substrate surface to a second metal precursor and a reactant, respectively.

11. A process for barrier-free tungsten deposition, comprising: exposing a substrate surface to a silicon precursor to form an amorphous silicon layer, the substrate surface being substantially free of a barrier layer; exposing the amorphous silicon layer to a first metal precursor to transform the amorphous silicon layer into a first metal layer; A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor.

12. The method of claim 11, wherein the silicon precursor comprises one or more of polysilane or halosilane.

13. The method of claim 11, wherein the silicon precursor comprises a silicon precursor having the general formula Si g H h X i wherein each X is a halogen independently selected from F, Cl, Br and I, g is any integer greater than or equal to 1, h and i are each less than or equal to 2g+2 and h+i is equal to 2g+2. The method of claim 11 , wherein the amorphous silicon layer forms a continuous layer. The method of claim 11 , wherein the amorphous silicon layer forms a conformal layer.

16. The method according to claim 11, wherein the amorphous silicon layer has a thickness less than or equal to Thickness.

17. The method of claim 11, wherein the first metal precursor and the second metal precursor independently comprise one or more of WF6, WCl6, WCl5, MoF6, MoCl5, or Mo(CO)6.

18. The method of claim 11, wherein the first metal precursor comprises substantially no fluorine.

19. The method of claim 11, wherein the first metal precursor and the second metal precursor comprise the same metal.

20. The method of claim 11, wherein the second metal layer is formed by exposing the substrate surface to a second metal precursor and a reactant, respectively.