Method for operating storage device, storage device and storage system including the same

Abstract

A method for operating a storage device including a plurality of non-volatile memories, each of the plurality of non-volatile memories including a temperature sensor, the method comprising: checking whether a predetermined temperature check cycle of the plurality of non-volatile memories has been reached; in response to the check result, monitoring temperature information of at least some of the plurality of non-volatile memories using the temperature sensor; obtaining standby time information of the plurality of non-volatile memories by applying a temperature acceleration condition based on the monitored temperature information; and changing at least one of a plurality of driving parameters required for operating each of the plurality of non-volatile memories based on at least one of the monitored temperature information and the obtained standby time information.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority under 35 USC 119 to Korean Patent Application No. 10-2019-0070989 filed on June 14, 2019, in the Korean Intellectual Property Office (KIPO), the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] Example embodiments relate to a semiconductor integrated circuit, and more particularly, to a method of operating a memory device, a memory device performing the method, and a memory system including the memory device. Background Art

[0004] Some types of data storage devices include one or more semiconductor memory devices. Examples of such data storage devices include solid-state drives (SSDs). These types of data storage devices may have various design and / or performance advantages compared to hard disk drives (HDDs). Examples of potential advantages include the absence of moving mechanical parts, higher data access speeds, higher stability, higher durability, and / or low power consumption. Recently, various systems (e.g., laptops, cars, airplanes, drones, etc.) have adopted SSDs for data storage.

[0005] These types of data storage devices may include nonvolatile memory devices (e.g., flash memory). As the use time of the data storage device increases, the characteristics of the nonvolatile memory device (such as flash memory) included in the data storage device may change due to temperature, so there may be a problem that errors occur more frequently. Summary of the invention

[0006] At least one example embodiment of the present disclosure provides a method of operating a memory device capable of having improved or enhanced performance and reliability based on temperature monitoring.

[0007] At least one example embodiment of the present disclosure provides a memory device capable of having improved or enhanced performance and reliability based on temperature monitoring.

[0008] At least one example embodiment of the present disclosure provides a storage system including a storage device.

[0009] According to an example embodiment, a method for operating a storage device including a plurality of nonvolatile memories, each of the plurality of nonvolatile memories including a temperature sensor, the method comprising: checking whether a predetermined temperature check cycle of the plurality of nonvolatile memories has been reached; monitoring temperature information of at least one of the plurality of nonvolatile memories in response to a check result of whether the predetermined temperature check cycle has been reached; obtaining standing time information of each of the plurality of nonvolatile memories by applying a temperature acceleration condition based on the monitored temperature information; and changing at least one of a plurality of driving parameters required to operate each of the plurality of nonvolatile memories based on at least one of the monitored temperature information and the obtained standing time information.

[0010] According to an example embodiment, a storage device includes a plurality of nonvolatile memories and a storage controller. Each of the plurality of nonvolatile memories includes a temperature sensor. The storage controller controls the operation of the plurality of nonvolatile memories, checks whether a predetermined temperature check cycle of the plurality of nonvolatile memories has been reached, monitors temperature information of at least one of the plurality of nonvolatile memories using the temperature sensor in response to a check result of whether the predetermined temperature check cycle has been reached, obtains standby time information of each of the plurality of nonvolatile memories by applying a temperature acceleration condition based on the monitored temperature information, and changes at least one of a plurality of driving parameters required to operate each of the plurality of nonvolatile memories based on at least one of the monitored temperature information and the obtained standby time information.

[0011] According to an example embodiment, a storage system includes a host and a storage device, which is accessed by the host and includes a plurality of nonvolatile memories and a storage controller. Each of the plurality of nonvolatile memories includes a temperature sensor. The storage controller controls the operation of the plurality of nonvolatile memories, checks whether a predetermined temperature check cycle of the plurality of nonvolatile memories has been reached, monitors temperature information of at least one of the plurality of nonvolatile memories using the temperature sensor in response to a check result of whether the predetermined temperature check cycle has been reached, obtains standby time information of each of the plurality of nonvolatile memories by applying a temperature acceleration condition based on the monitored temperature information, and changes at least one of the plurality of driving parameters required to operate each of the plurality of nonvolatile memories based on at least one of the monitored temperature information and the obtained standby time information.

[0012] In a method of operating a storage device, a storage device, and a storage system according to example embodiments, each of a plurality of nonvolatile memories includes a temperature sensor, a storage controller periodically monitors temperature information of each of the plurality of nonvolatile memories using the temperature sensor without an external command, and adaptively changes a plurality of driving parameters required to operate the plurality of nonvolatile memories for each nonvolatile memory based on the monitored temperature information. Therefore, the storage device can have improved or enhanced performance and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Illustrative, non-limiting example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0014] Figure 1 is a flowchart illustrating a method of operating a storage device according to example embodiments.

[0015] Figure 2 is a block diagram illustrating a storage device and a storage system including the storage device according to example embodiments.

[0016] Figure 3 is a block diagram illustrating an example of a memory controller included in a memory device according to example embodiments.

[0017] Figure 4 is a block diagram illustrating an example of a nonvolatile memory included in a storage device according to example embodiments.

[0018] Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 It is shown Figure 1 A flow chart of an example of adaptively changing at least one driving parameter among a plurality of driving parameters.

[0019] Fig.13 is a plan view of an example in which a memory controller and a nonvolatile memory are provided in a memory device according to example embodiments.

[0020] Fig.14 , Fig.15 , Fig.16 and Fig.17 It is shown Figure 1 An example of monitoring temperature information internally in Figure 1 A flow chart of an example of adaptively changing at least one driving parameter among a plurality of driving parameters.

[0021] Fig.18 is a flowchart illustrating a method of operating a storage device according to example embodiments.

[0022] Fig.19 is a plan view of another example in which a memory controller and a nonvolatile memory are provided in a memory device according to example embodiments.

[0023] Fig. 20 , Fig.21 , Fig. 22 and Fig.23 It is shown Fig.18 A flow chart of an example of adaptively changing at least one driving parameter among a plurality of driving parameters.

[0024] Fig.24 is a block diagram illustrating a storage server including a storage device according to example embodiments. DETAILED DESCRIPTION

[0025] Various example embodiments will be described more fully with reference to the accompanying drawings in which the embodiments are shown. However, the present disclosure can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. In this application, the same reference numerals refer to the same elements.

[0026] Figure 1 is a flowchart illustrating a method of operating a storage device according to example embodiments.

[0027] refer to Figure 1 , a storage device according to an example embodiment may include a plurality of nonvolatile memories storing data and a storage controller controlling operations of the plurality of nonvolatile memories. In addition, each of the plurality of nonvolatile memories may include a temperature sensor. Figure 2 Configurations of storage devices and storage systems including the storage devices are described.

[0028] In the method of operating a storage device according to an example embodiment, it is checked (or determined) whether a predetermined temperature check cycle (or period) of a plurality of non-volatile memories has been reached (step S100). For example, the temperature check cycle may be set and stored when or while manufacturing the storage device, and the temperature check cycle may be changed based on a user setting signal received from the outside. In an example embodiment, after manufacturing the storage device, the predetermined temperature check cycle may be set based on a user setting signal from the outside.

[0029] When the temperature check cycle has not been reached (step S100: No), the storage device may wait until the temperature check cycle has been reached (step S150). In some example embodiments, the storage device may wait while performing at least one general operation of the storage device (e.g., performing a program / erase / read operation based on a command received from an external host, performing a garbage collection operation alone without any command, etc.). In other example embodiments, the storage device may wait without performing a general operation.

[0030] When the temperature check cycle has been reached (step S100: yes), the temperature information of at least some of the plurality of non-volatile memories is internally monitored using a temperature sensor (step S200). In some example embodiments, the temperature information from each of all the plurality of non-volatile memories may be monitored. In other example embodiments, as will be described with reference to FIG. Fig.14 As described, only the temperature information of each of some of the plurality of nonvolatile memories may be monitored.

[0031] The operation of monitoring the temperature information internally may indicate that the temperature information is monitored by the storage controller itself without receiving any command from an external host. By monitoring the temperature information without an external command, the performance degradation or deterioration of the storage device may be prevented.

[0032] Based on the monitored temperature information, standby time information of a plurality of non-volatile memories is obtained by applying a temperature acceleration condition (step S300). The standby time information may be associated with the time when the non-volatile memory is ignored (i.e., not accessed), used, or driven under a specific use condition (e.g., temperature condition), and the standby time information may be referred to as leaving time information, use time information, or waiting time information. In an example embodiment, the standby time information may be determined for each non-volatile memory using Equation 1.

[0033] [Equation 1]

[0034] Tu=∑[Tcycle*TAF]

[0035] In Equation 1, Tu represents standby time information, Tcycle represents a temperature check cycle, and TAF represents a temperature acceleration coefficient. TAF can be a function of the temperature measured by a temperature sensor. The temperature check cycle Tcycle is adjusted by the coefficient TAF. According to Equation 1, the adjusted temperature check cycle (i.e., the value of Tcycle*TAF) is added to obtain the standby time information. In an example embodiment, TAF can be determined empirically. For example, TAF can be obtained based on the Arrhenius equation, and a detailed description thereof will be omitted because it is well known in the technical field of storage devices. In an example embodiment, the values ​​of Tcycle*TAF are summed until the summed value reaches a predetermined value. However, the example embodiment is not limited to this, and TAF can be obtained based on at least one of a variety of algorithms.

[0036] Based on at least one of the monitored temperature information and the obtained standby time information, at least one of the multiple driving parameters required to operate the multiple non-volatile memories is adaptively changed (step S400). For each non-volatile memory, at least one of the multiple driving parameters is adaptively and selectively changed. For example, the driving parameters can be set and optimized for temperature and standby time. In some example embodiments, when the temperature information of each non-volatile memory in all the multiple non-volatile memories is monitored in step S200, each non-volatile memory can change the driving parameters based on its own temperature information. In other example embodiments, when the temperature information of each non-volatile memory in some of the multiple non-volatile memories is monitored in step S200, some non-volatile memories can change the driving parameters based on their own temperature information, and other non-volatile memories can change the driving parameters based on the temperature information of non-volatile memories other than themselves and a predefined table (PDT).

[0037] In some example embodiments, as will be referred to Figure 5 As described, the plurality of driving parameters may include parameters associated with the defense codes of the plurality of non-volatile memories. In some example embodiments, as will be referred to in Fig. 9 As described, the plurality of driving parameters may include parameters associated with general operations (eg, program / erase operations) of the plurality of nonvolatile memories.

[0038] Although not in Figure 1 As shown in the figure, after the drive parameters are changed in step S400, the storage device can perform at least one general operation (e.g., program / erase / read operation, garbage collection operation, etc.) based on the changed drive parameters with and / or without a request from the external host.

[0039] In a method of operating a storage device according to an example embodiment, each of a plurality of nonvolatile memories included in the storage device may include a temperature sensor, a storage controller included in the storage device may periodically monitor temperature information of each of the plurality of nonvolatile memories using the temperature sensor without an external command, and a plurality of driving parameters required to operate the plurality of nonvolatile memories may be adaptively changed for each nonvolatile memory based on the monitored temperature information. Therefore, the storage device may have improved or enhanced performance and reliability.

[0040] Figure 2 is a block diagram illustrating a storage device and a storage system including the storage device according to example embodiments.

[0041] refer to Figure 2 , the storage system 100 includes a host 200 and a storage device 300 .

[0042] The host 200 controls the overall operation of the storage system 100. Figure 2 3. Although not shown in the figure, the host 200 may include a host processor and a host memory. The host processor may control the operation of the host 200. For example, the host processor may run an operating system (OS). The host memory may store instructions and / or data executed and / or processed by the host processor. For example, the operating system run by the host processor may include a file system for file management and a device driver for controlling peripheral devices including the storage device 300 at the operating system level.

[0043] The storage device 300 is accessed through the host 200. The storage device 300 includes a storage controller 310, a plurality of nonvolatile memories 320a, 320b, and 320c, and a buffer memory 330.

[0044] The memory controller 310 may control operations of the memory device 300 and / or operations of the plurality of nonvolatile memories 320 a , 320 b , and 320 c based on commands and data received from the host 200 .

[0045] The storage controller 310 may perform a reference Figure 1The method described. For example, the storage controller 310 may check whether a predetermined temperature check cycle of the plurality of non-volatile memories 320a, 320b, and 320c has been reached, monitor the temperature information of each of at least some of the plurality of non-volatile memories 320a, 320b, and 320c internally when the temperature check cycle has been reached, obtain (or calculate) the standby time information of the plurality of non-volatile memories 320a, 320b, and 320c by applying a temperature acceleration condition based on the monitored temperature information, and adaptively change at least one of the plurality of drive parameters required to operate the storage device 300 and / or the plurality of non-volatile memories 320a, 320b, and 320c based on at least one of the monitored temperature information and the obtained (or calculated) standby time information. For each non-volatile memory, at least one of the plurality of drive parameters may be adaptively and selectively changed. In other words, the storage controller 310 may monitor the temperature information independently of the control of the host 200, and may set the optimized drive parameter based on the monitored temperature information. In addition, the storage controller 310 may also execute the reference Fig.18 Describe the method.

[0046] The storage controller 310 includes a period measurer 311 that checks or determines whether the temperature check cycle has been reached. For example, the period measurer 311 may include at least one of a timer and a counter. Figure 2 , but the memory controller 310 may change the temperature check cycle based on a user setting signal received from the outside.

[0047] The plurality of nonvolatile memories 320a, 320b, and 320c may store a plurality of data. For example, the plurality of nonvolatile memories 320a, 320b, and 320c may store metadata, various user data, and the like.

[0048] The plurality of nonvolatile memories 320a, 320b, and 320c include a plurality of temperature sensors 322a, 322b, and 322c that monitor temperature information. For example, each nonvolatile memory includes a temperature sensor. For example, each of the plurality of temperature sensors 322a, 322b, and 322c may be an on-chip sensor (or on-die sensor) including an on-chip metal resistor, thereby having a smaller and simpler configuration and lower manufacturing cost.

[0049] Each non-volatile memory may be disposed on a corresponding semiconductor die and may form a corresponding non-volatile memory chip. Fig.13As described, the storage device 300 may include a plurality of memory packages, and each of the plurality of memory packages may include at least one of the plurality of non-volatile memories 320a, 320b, and 320c. In other words, each of the plurality of non-volatile memories 320a, 320b, and 320c may be included in a corresponding one of the plurality of memory packages.

[0050] In some example embodiments, each of the plurality of nonvolatile memories 320a, 320b, and 320c may include a NAND flash memory. In other example embodiments, each of the plurality of nonvolatile memories 320a, 320b, and 320c may include one of an electrically erasable programmable read-only memory (EEPROM), a phase change random access memory (PRAM), a resistive random access memory (RRAM), a nano floating gate memory (NFGM), a polymer random access memory (PoRAM), a magnetic random access memory (MRAM), a ferroelectric random access memory (FRAM), and the like.

[0051] In some example embodiments, temperature information may be periodically monitored for each non-volatile memory, and temperature information may be stored and / or determined for each chip or die. For example, temperature information may be periodically monitored during the operation time of the storage device 300, the temperature periodically monitored during the operation time of the storage device 300 may be converted by applying a temperature acceleration condition, and the accumulated temperature information may be stored when the storage device 300 is powered off.

[0052] In some example embodiments, when the temperature of a specific nonvolatile memory is significantly higher or lower than the average temperature, the temperature information of the specific nonvolatile memory may be appropriately treated or processed. For example, when the temperature information is different only in a specific nonvolatile memory in the same memory package, the temperature information of the specific nonvolatile memory may be excluded or excluded, and the temperature information of the excluded specific nonvolatile memory may not be checked later.

[0053] The buffer memory 330 may store instructions and / or data executed and / or processed by the memory controller 310, and may temporarily store data stored or to be stored in the plurality of non-volatile memories 320a, 320b, and 320c. For example, the buffer memory 330 may include at least one of various volatile memories, such as a dynamic random access memory (DRAM), a static random access memory (SRAM), and the like.

[0054] In some example embodiments, the storage device 300 may be a solid state drive (SSD). In other example embodiments, the storage device 300 may be one of a universal flash memory (UFS), a multimedia card (MMC), an embedded multimedia card (eMMC), a secure digital (SD) card, a micro SD card, a memory stick, a chip card, a universal serial bus (USB) card, a smart card, a compact flash (CF) card, etc.

[0055] In some example embodiments, the storage device 300 may be connected to the host 200 through a block accessible interface, which may include, for example, a UFS bus, an eMMC bus, a Serial Advanced Technology Attachment (SATA) bus, a Non-Volatile Memory Express (NVMe) bus, a Serial Attached SCSI (SAS) bus, etc. The storage device 300 may provide the host 200 with a block accessible interface using a block accessible address space corresponding to an access size of the plurality of non-volatile memories 320a, 320b, and 320c, for allowing access in units of memory blocks to data stored in the plurality of non-volatile memories 320a, 320b, and 320c.

[0056] In some example embodiments, the storage system 100 may be any mobile system, such as a mobile phone, a smart phone, a tablet computer, a laptop computer, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital camera, a portable game console, a music player, a camcorder, a video player, a navigation device, a wearable device, an Internet of Things (IoT) device, an Internet of Everything (IoE) device, an e-book reader, a virtual reality (VR) device, an augmented reality (AR) device, a robotic device, etc. In other example embodiments, the storage system 100 may be any computing system, such as a personal computer (PC), a server computer, a workstation, a digital television, a set-top box, a navigation system, etc.

[0057] Figure 3 is a block diagram illustrating an example of a memory controller included in a memory device according to example embodiments.

[0058] refer to Figure 3 , the storage controller 400 includes at least one processor 410, a memory 420, a period measurer 430, a host interface 440, an error correction code (ECC) block 450, and a memory interface 460. In an example embodiment, the storage controller 400 corresponds to Figure 2 A storage controller 310 of the storage device 300.

[0059] Processor 410 may respond to a request from a host (eg, Figure 2 The processor 410 may control the operation of the storage controller 400 by using commands received from the host 200 in the storage device. In some example embodiments, the processor 410 may control the operation of the storage controller 400 by using a method for operating a storage device (e.g., Figure 2 The firmware of the storage device 300) in the storage device 300 is used to control the corresponding components.

[0060] The memory 420 may store instructions and data executed and processed by the processor 410. For example, the memory 420 may be implemented with a volatile memory device having a relatively small capacity and high speed, such as a static random access memory (SRAM), a cache memory, etc.

[0061] The period measuring device 430 for checking whether the temperature check cycle has been reached can be connected with Figure 2 The period measurer 430 is substantially the same as the period measurer 311 in FIG. In some example embodiments, at least a portion of the period measurer 430 may be implemented as hardware. In other example embodiments, at least a portion of the period measurer 430 may be implemented as an instruction code or a program routine (e.g., a software program) and may be stored in a memory.

[0062] The ECC block 450 for error correction may perform coding modulation using Bose-Chaudhuri-Hockenghem (BCH) code, low density parity check (LDPC) code, turbo code, Reed-Solomon code, convolutional code, recursive systematic code (RSC), trellis-coded modulation (TCM), block coded modulation (BCM), etc., or may perform ECC encoding and ECC decoding using the above codes or other error correction codes.

[0063] The host interface 440 may provide a physical connection between the host 200 and the storage device 300. The host interface 440 may provide an interface corresponding to the bus format of the host for communication between the host 200 and the storage device 300. In some example embodiments, the bus format of the host 200 may be a small computer system interface (SCSI) or a serial attached SCSI (SAS) interface. In other example embodiments, the bus format of the host 200 may be a USB, a peripheral component interconnect (PCI) Express (PCIe), an advanced technology attachment (ATA), a parallel ATA (PATA), a serial ATA (SATA), a non-volatile memory (NVM) Express (NVMe), and the like.

[0064] The memory interface 460 can communicate with a non-volatile memory (eg, Figure 2 The memory interface 460 may be connected to the nonvolatile memories 320a, 320b, and 320c via one channel. In other example embodiments, the memory interface 460 may be connected to the nonvolatile memories 320a, 320b, and 320c via two or more channels.

[0065] Figure 4 is a block diagram illustrating an example of a nonvolatile memory included in a storage device according to example embodiments.

[0066] refer to Figure 4 , the nonvolatile memory 500 includes a memory cell array 510 , a row decoder 520 , a page buffer circuit 530 , a data input / output (I / O) circuit 540 , a voltage generator 550 , a control circuit 560 , and a temperature sensor 570 .

[0067] The memory cell array 510 is connected to the row decoder 520 via a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL. The memory cell array 510 is also connected to the page buffer circuit 530 via a plurality of bit lines BL. The memory cell array 510 may include a plurality of memory cells (e.g., a plurality of nonvolatile memory cells) connected to a plurality of word lines WL and a plurality of bit lines BL. The memory cell array 510 may be divided into a plurality of memory blocks BLK1, BLK2, ..., BLKz, each of which includes memory cells. In addition, each of the plurality of memory blocks BLK1, BLK2, ..., BLKz may be divided into a plurality of pages.

[0068] In some example embodiments, a plurality of memory cells may be arranged in a two-dimensional (2D) array structure or a three-dimensional (3D) vertical array structure. The three-dimensional vertical array structure may include a vertical cell string that is vertically positioned so that at least one memory cell is located above another memory cell. The at least one memory cell may include a charge trap layer. The following patent documents, which are incorporated herein by reference in their entirety, describe suitable configurations of memory cell arrays including a 3D vertical array structure, wherein the three-dimensional memory array is configured as a plurality of levels, and word lines and / or bit lines are shared between the plurality of levels: U.S. Patent Nos. 7,679,133; 8,553,466; 8,654,587; 8,559,235; and U.S. Patent Publication No. 2011 / 0233648.

[0069] The control circuit 560 receives the signal from the outside (eg, Figure 2 The host 200 and / or storage controller 310 in the non-volatile memory 500 receives the command CMD and the address ADDR, and controls the erase, program and read operations of the non-volatile memory 500 based on the command CMD and the address ADDR. The erase operation may include performing a series of erase cycles. In an example embodiment, the erase operation may be performed in units of blocks. The programming operation may include performing a series of programming cycles. Each programming cycle may include a programming operation and a programming verification operation. Each erase cycle may include an erase operation and an erase verification operation. The read operation may include a normal read operation and a data recovery read operation.

[0070] For example, the control circuit 560 may generate a first control signal CON for controlling the voltage generator 550, and may generate a second control signal PBC for controlling the page buffer circuit 530 based on the command CMD, and may generate a row address R_ADDR and a column address C_ADDR based on the address ADDR. The control circuit 560 may provide the row address R_ADDR to the row decoder 520, and may provide the column address C_ADDR to the data I / O circuit 540.

[0071] In addition, the control circuit 560 may change the driving parameters under the control of the memory controller 310. For example, the control circuit 560 may receive a temperature value from the memory controller 310, and may change the driving parameters by itself based on the received temperature value. For another example, the control circuit 560 may receive a value associated with the changed driving parameter (e.g., a changed voltage level, cycle, etc.) from the memory controller 310, and may control the elements of the nonvolatile memory 500 based on the received value of the changed driving parameter.

[0072] The row decoder 520 may be connected to the memory cell array 510 via a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL.

[0073] For example, in a data erase / write / read operation, based on the row address R_ADDR, the row decoder 520 can determine at least one of the multiple word lines WL as a selected word line, and can determine the rest or remaining parts of the multiple word lines WL except the selected word line as unselected word lines.

[0074] In addition, in data erase / write / read operations, based on the row address R_ADDR, the row decoder 520 can determine at least one of the multiple string selection lines SSL as a selected string selection line, and can determine the rest or remaining parts of the multiple string selection lines SSL except the selected string selection line as unselected string selection lines.

[0075] In addition, in data erase / write / read operations, based on the row address R_ADDR, the row decoder 520 can determine at least one of the multiple ground selection lines GSL as a selected ground selection line, and can determine the rest or remaining parts of the multiple ground selection lines GSL except the selected ground selection line as unselected ground selection lines.

[0076] The voltage generator 550 may generate a voltage VS required for the operation of the nonvolatile memory 500 based on the power PWR and the first control signal CON. The voltage VS may be applied to a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL via the row decoder 520. In addition, the voltage generator 550 may generate an erase voltage VERS required for a data erase operation based on the power PWR and the first control signal CON. The erase voltage VERS may be applied to the memory cell array 510 directly or via the bit line BL.

[0077] For example, during an erase operation, the voltage generator 550 may apply an erase voltage VERS to a common source line and / or a bit line BL of a memory block (e.g., a selected memory block), and may apply an erase enable voltage (e.g., a ground voltage) to all or part of the word lines of the memory block via the row decoder 520. In addition, during an erase verification operation, the voltage generator 550 may apply an erase verification voltage to all word lines of the memory block simultaneously, or sequentially to the word lines one by one.

[0078] For example, during a program operation, the voltage generator 550 may apply a program voltage to a selected word line via the row decoder 520, and may apply a program pass voltage to unselected word lines via the row decoder 520. In addition, during a program verification operation, the voltage generator 550 may apply a program verification voltage to a selected word line via the row decoder 520, and may apply a verification pass voltage to unselected word lines via the row decoder 520.

[0079] Furthermore, during a normal read operation, the voltage generator 550 may apply a read voltage to a selected word line via the row decoder 520, and may apply a read pass voltage to unselected word lines via the row decoder 520. During a data recovery read operation, the voltage generator 550 may apply a read voltage to word lines adjacent to the selected word line via the row decoder 520, and may apply a recovery read voltage to the selected word line via the row decoder 520.

[0080] The page buffer circuit 530 may be connected to the memory cell array 510 via a plurality of bit lines BL. The page buffer circuit 530 may include a plurality of page buffers. In some example embodiments, each page buffer may be connected to one bit line. In other example embodiments, each page buffer may be connected to two or more bit lines.

[0081] The page buffer circuit 530 may store data DAT to be programmed into the memory cell array 510 or may read data DAT sensed from the memory cell array 510. In other words, the page buffer circuit 530 may operate as a write driver or a sense amplifier according to an operation mode of the nonvolatile memory 500.

[0082] The data I / O circuit 540 may be connected to the page buffer circuit 530 via the data line DL. Based on the column address C_ADDR, the data I / O circuit 540 may provide data DAT from the outside of the nonvolatile memory 500 to the memory cell array 510 via the page buffer circuit 530, or may provide data DAT from the memory cell array 510 to the outside of the nonvolatile memory 500.

[0083] The temperature sensor 570 that monitors temperature information can be connected to Figure 2 The multiple temperature sensors 322a, 322b and 322c in are basically the same.

[0084] Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 It is shown Figure 1 A flow chart of an example of adaptively changing at least one driving parameter among a plurality of driving parameters.

[0085] Figure 5 , Figure 6 and Figure 7 An example is shown in which a plurality of driving parameters are associated with a prevention code among defense codes of a plurality of nonvolatile memories. In an example embodiment, the plurality of driving parameters associated with the prevention code may include a patrol read cycle, a refresh cycle, or a read voltage based on a temperature bump table. Figure 8 An example is shown in which a plurality of driving parameters are associated with a recovery code among defense codes of a plurality of nonvolatile memories. Fig. 9 , Fig.10 , Fig.11 and Fig.12 An example is shown in which a plurality of driving parameters are associated with a plurality of general operations (eg, program / erase operations) of nonvolatile memories.

[0086] refer to Figure 5 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is adaptively changing the patrol read cycle. Figure 5 In an example embodiment, it may be checked or determined whether the first temperature information and / or the first standby time information of a first non-volatile memory among a plurality of non-volatile memories are within a first reference range (step S410). When the first temperature information is within the first reference range of the first temperature information, when the first standby time information is within the first reference range of the first standby time information, or when the first temperature information and the first standby time information are respectively within the first reference range of the first temperature information and within the first reference range of the first standby time information (step S410: yes), a patrol read cycle associated with a patrol read operation of the first non-volatile memory may be maintained (step S411). In an example embodiment, when at least one of the first temperature information and the first standby time information is outside the first reference range (step S410: no), the patrol read cycle of the first non-volatile memory may be changed (step S412). In an example embodiment, the first reference range of the first standby time information may have a value different from a value of the first reference range of the first temperature information.

[0087] The patrol read operation may indicate an operation of checking whether stored data is abnormal by sequentially reading from the first memory block to the last memory block of the nonvolatile memory at each predetermined time interval, and the time interval between the time point of reading the first memory block and the time point of reading the last memory block may indicate a patrol read cycle. The patrol read operation may be referred to as a background scan recovery operation.

[0088] In some example embodiments, the patrol read cycle may decrease as the temperature of the first nonvolatile memory increases, and the patrol read cycle may increase as the temperature of the first nonvolatile memory decreases. In other example embodiments, the patrol read cycle may decrease as the standby time of the first nonvolatile memory increases, and the patrol read cycle may increase as the standby time of the first nonvolatile memory decreases.

[0089] refer to Figure 6 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is adaptively changing the refresh cycle. Figure 6 In the example embodiment, it can be checked whether the first temperature information and / or the first standby time information of the first non-volatile memory is within the second reference range (step S420). When the first temperature information is within the second reference range of the first temperature information, when the first standby time information is within the second reference range of the first standby time information, or when the first temperature information and the first standby time information are respectively within the second reference range of the first temperature information and the second reference range of the first standby time information (step S420: yes), the refresh cycle associated with the refresh operation of the first non-volatile memory can be maintained (step S421). In an example embodiment, when at least one of the first temperature information and the first standby time information is outside the second reference range (step S420: no), the refresh cycle of the first non-volatile memory can be changed (step S422). For example, the second reference range may be equal to or different from the first reference range. In an example embodiment, the second reference range of the first standby time information may have a value different from the value of the second reference range of the first temperature information.

[0090] The refresh operation may indicate an operation of reprogramming stored data before the stored data is damaged or destroyed, and a time interval between a time point of programming the data and a time point of reprogramming the stored data may indicate a refresh cycle. The refresh operation may be referred to as a recycling operation according to a standby time.

[0091] In some example embodiments, the refresh cycle may decrease as the temperature of the first nonvolatile memory increases, and the refresh cycle may increase as the temperature of the first nonvolatile memory decreases. In other example embodiments, the refresh cycle may decrease as the standby time of the first nonvolatile memory increases, and the refresh cycle may increase as the standby time of the first nonvolatile memory decreases.

[0092] refer to Figure 7 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is adaptively changing the level of the read voltage. Figure 7 In the example embodiment, when at least one of the first temperature information and the first standby time information is outside the third reference range (step S430), the level of the read voltage associated with the read operation of the first non-volatile memory may be maintained (step S431). In an example embodiment, when at least one of the first temperature information and the first standby time information is outside the third reference range (step S430: no), the level of the read voltage of the first non-volatile memory may be changed based on the temperature fluctuation table (step S432). For example, the third reference range may be equal to one of the first reference range and the second reference range, or may be different from the first reference range and the second reference range. In an example embodiment, the third reference range of the first standby time information may have a value different from that of the third reference range of the first temperature information.

[0093] The temperature fluctuation table may indicate the relationship between the temperature and the level of the read voltage, so that the optimal level of the read voltage according to the temperature of the first nonvolatile memory may be set or determined based on the temperature fluctuation table. For example, when data in a memory block programmed under a relatively high temperature environment is to be read under a relatively low temperature environment, the level of the read voltage may be reduced based on the temperature fluctuation table.

[0094] refer to Figure 8 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is adaptively changing the order of applying the plurality of restoration algorithms. Figure 8In the example, it can be checked whether the first temperature information and / or the first standby time information of the first non-volatile memory are within the fourth reference range (step S440). When the first temperature information is within the fourth reference range of the first temperature information, when the first standby time information is within the fourth reference range of the first standby time information, or when the first temperature information and the first standby time information are respectively within the fourth reference range of the first temperature information and the fourth reference range of the first standby time information (step S440: yes), the application order (or sequence) of the multiple recovery algorithms of the first non-volatile memory can be maintained (step S441). In an example embodiment, the fourth reference range of the first standby time information may have a value different from the value of the fourth reference range of the first temperature information. In an example embodiment, when at least one of the first temperature information and the first standby time information is outside the fourth reference range (step S440: no), the application order of the multiple recovery algorithms of the first non-volatile memory can be changed (step S442). For example, the fourth reference range may be equal to one of the first reference range, the second reference range, and the third reference range, or may be different from all reference ranges in the first reference range, the second reference range, and the third reference range.

[0095] Multiple recovery algorithms can include reference Figure 3 The various error correction codes described may include various codes for changing the level of the read voltage. For example, if the three algorithms are set to be applied in the order of 1-2-3 at the initial operation time, then in step S442, the setting may be changed to be applied in the order of 2-1-3.

[0096] In some example embodiments, as shown in FIG. Figure 4 The first nonvolatile memory may include a plurality of memory blocks, and the application order of the plurality of recovery algorithms may be set differently for each memory block. In other example embodiments, each of the plurality of memory blocks may include a plurality of pages, and the application order of the plurality of recovery algorithms may be set differently for each page. In other words, the application order of the plurality of recovery algorithms may be set differently in units of memory blocks or in units of pages.

[0097] refer to Fig. 9 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is adaptively changing the programming conditions. Fig. 9In the example, it can be checked whether the first temperature information and / or the first standby time information of the first non-volatile memory are within the fifth reference range (step S450). When the first temperature information is within the fifth reference range of the first temperature information, when the first standby time information is within the fifth reference range of the first standby time information, or when the first temperature information and the first standby time information are respectively within the fifth reference range of the first temperature information and the fifth reference range of the first standby time information (step S450: yes), the programming condition associated with the programming operation of the first non-volatile memory can be maintained (step S451). In an example embodiment, the fifth reference range of the first standby time information may have a value different from the value of the fifth reference range of the first temperature information. In an example embodiment, when at least one of the first temperature information and the first standby time information is outside the fifth reference range (step S450: no), the programming condition of the first non-volatile memory can be changed (step S452). For example, the fifth reference range may be equal to one of the first reference range, the second reference range, the third reference range, and the fourth reference range, or may be different from all reference ranges in the first reference range, the second reference range, the third reference range, and the fourth reference range. For example, the programming conditions may include a level of a programming voltage (e.g., a start programming voltage level when programming with an incremental step pulse program (ISPP) scheme), a programming verification condition (e.g., a level of a programming verification voltage), a maximum programming loop setting condition (e.g., a condition for determining a programming failure when programming is not performed even under corresponding loop conditions), etc. At least one such programming condition may be changed (e.g., may be increased or decreased).

[0098] In some example embodiments, the level of the program voltage may decrease as the temperature of the first nonvolatile memory increases (eg, at a high temperature), and the level of the program voltage may increase as the temperature of the first nonvolatile memory decreases.

[0099] refer to Fig.10 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is to change the programming condition based on the program / erase cycle. Fig.10In the embodiment, a program / erase cycle indicating the number of program / erase operations may be additionally considered together with the temperature information and / or the standby time information. For example, it may be checked whether the first program / erase cycle of the first nonvolatile memory is within a first reference number of times (step S455). When the first program / erase cycle of the first nonvolatile memory is within the first reference number of times (step S455: yes), the programming condition of the first nonvolatile memory may be maintained (step S456). When the first program / erase cycle of the first nonvolatile memory exceeds the first reference number of times (step S455: no), the programming condition of the first nonvolatile memory may be changed (step S457).

[0100] In some example embodiments, the level of the program voltage may decrease as the first program / erase cycle of the first nonvolatile memory increases, and the level of the program voltage may increase as the first program / erase cycle of the first nonvolatile memory decreases.

[0101] refer to Fig.11 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is changing the erasing condition. Fig.11In the example embodiment, it can be checked or determined whether the first temperature information and / or the first standby time information of the first non-volatile memory are within the sixth reference range (step S460). When the first temperature information is within the sixth reference range of the first temperature information, when the first standby time information is within the sixth reference range of the first standby time information, when the first temperature information and the first standby time information are respectively within the sixth reference range of the first temperature information and the sixth reference range of the first standby time information (step S460: yes), the erase condition associated with the erase operation of the first non-volatile memory can be maintained (step S461). In an example embodiment, the sixth reference range of the first standby time information can have a value different from the value of the sixth reference range of the first temperature information. In an example embodiment, when at least one of the first temperature information and the first standby time information is outside the sixth reference range (step S460: no), the erase condition of the first non-volatile memory can be changed (step S462). For example, the sixth reference range may be equal to one of the first reference range, the second reference range, the third reference range, the fourth reference range, and the fifth reference range, or may be different from all of the first reference range, the second reference range, the third reference range, the fourth reference range, and the fifth reference range. For example, the erase condition may include an erase voltage level (e.g., a start erase voltage level when erasing with an incremental step pulse erase (ISPE) scheme), an erase verification condition (e.g., an erase verification voltage level), a maximum erase cycle setting condition (e.g., a condition for determining an erase failure when the erase is not erased even under a corresponding cycle condition), etc. At least one such erase condition may be changed.

[0102] In some example embodiments, the level of the erase voltage may decrease as the temperature of the first nonvolatile memory decreases (eg, at a low temperature), and the level of the erase voltage may increase as the temperature of the first nonvolatile memory increases.

[0103] refer to Fig.12 An example of adaptively changing at least one of the plurality of driving parameters (step S400) is to change the erase condition based on the program / erase cycle. Fig.12In the embodiment of the present invention, the program / erase cycle may be additionally considered. For example, it may be checked or determined whether the first program / erase cycle of the first nonvolatile memory is within the second reference number of times (step S465). When the first program / erase cycle of the first nonvolatile memory is within the second reference number of times (step S465: yes), the erase condition of the first nonvolatile memory may be maintained (step S466). When the first program / erase cycle of the first nonvolatile memory exceeds the second reference number of times (step S465: no), the erase condition of the first nonvolatile memory may be changed (step S467). For example, the second reference number of times may be equal to or different from the first reference number of times.

[0104] In some example embodiments, the level of the erase voltage may decrease as the first program / erase cycle of the first nonvolatile memory decreases, and the level of the erase voltage may increase as the first program / erase cycle of the first nonvolatile memory increases. In other example embodiments, the level of the erase voltage may increase as the first program / erase cycle of the first nonvolatile memory decreases, and the level of the erase voltage may decrease as the first program / erase cycle of the first nonvolatile memory increases.

[0105] Although not in Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 Figure and Fig.12 As shown in FIG. 1 , dynamic thermal throttling (DTT) may be performed based on monitored temperature information.

[0106] In some example embodiments, reference Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 Two or more of the described examples may be combined to implement a method of operating a storage device according to an example embodiment. In this case, two or more drive parameters may be changed. In an example embodiment, two or more drive parameters may be changed substantially simultaneously or concurrently.

[0107] Although the example has been based on changing only the driving parameters of the first nonvolatile memory, referring to Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 The exemplary embodiment is described, but the exemplary embodiment is not limited thereto, and the driving parameters of the nonvolatile memories other than the first nonvolatile memory among the plurality of nonvolatile memories may also be changed in a similar manner. In particular, when the temperature information from all the plurality of nonvolatile memories is monitored, the driving parameters for each of the plurality of nonvolatile memories may be changed, so that the plurality of nonvolatile memories may have different driving parameters.

[0108] Although the examples have been described above in which each driving parameter is changed based on a reference range (or reference value) or a reference number of times, the reference Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 The exemplary embodiment is described, but the exemplary embodiment is not limited thereto, and the driving parameter may be changed based on a plurality of reference ranges or a plurality of reference times. In addition, the reference has been made based on a specific way of changing a specific driving parameter. Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 The example embodiments are described, but the example embodiments are not limited thereto, and the manner of changing the driving parameters may be implemented in various ways.

[0109] As described above, the period and / or sequence of the defense code can be adaptively applied based on the temperature information and / or standby time information of each non-volatile memory, and the read / program / erase operation can be performed using the optimized read level, programming condition and / or erasing condition compensated based on the temperature change. Therefore, the storage device can have improved or enhanced performance and reliability.

[0110] Fig.13 is a plan view of an example in which a memory controller and a nonvolatile memory are provided in a memory device according to example embodiments.

[0111] refer to Fig.13 , the storage device includes a printed circuit board (PCB) 710, a storage controller 720, and a plurality of memory packages (PKG1, PKG2, ..., PKGN) 730, 740, and 750. For ease of explanation, the buffer memory (e.g., Figure 2 Buffer memory 330 in).

[0112] The storage controller 720 can communicate with Figure 2 The storage controller 310 and Figure 3 The memory controller 400 in the embodiment is substantially the same as that in the embodiment, and may include a period measurer PM for checking whether the temperature check cycle has been reached. The plurality of memory packages 730, 740, and 750 may include a plurality of non-volatile memories (NVM1-1, ..., NVM1-M, NVM2-1, ..., NVM2-M, NVMN-1, ..., NVMN-M) 732, 734, 743, 744, 752, and 754. The plurality of non-volatile memories 732, 734, 743, 744, 752, and 754 may be connected to the memory package 730, 740, and 750. Figure 2 The plurality of non-volatile memories 320a, 320b and 320c and Figure 4 The nonvolatile memories 732, 734, 743, 744, 752, and 754 are substantially the same, and each of the plurality of nonvolatile memories 732, 734, 743, 744, 752, and 754 may include a temperature sensor TS that monitors temperature information.

[0113] The memory controller 720 and the plurality of memory packages 730, 740, and 750 may be mounted on the printed circuit board 710. Due to size or space limitations (or constraints), it may be difficult to evenly arrange the plurality of memory packages 730, 740, and 750 on the printed circuit board 710, so that there may be memory packages or nonvolatile memories relatively close to or far from the memory controller 720 within the memory device.

[0114] although Fig.13 An example of N memory packages each including M nonvolatile memories is shown (each of N and M is a natural number greater than or equal to 2), but example embodiments are not limited thereto, and the number of memory packages and the number of nonvolatile memories may vary. Fig.13 An example is shown in which memory packages 730, 740, and 750 are disposed only on a first surface (e.g., a front surface) of the printed circuit board 710, but example embodiments are not limited thereto, and the memory packages may also be disposed on a second surface (e.g., a rear surface) of the printed circuit board 710 opposite to the first surface.

[0115] Fig.14 , Fig.15 , Fig.16 and Fig.17 It is shown Figure 1 An example of monitoring temperature information internally in Figure 1 A flow chart of an example of adaptively changing at least one driving parameter among a plurality of driving parameters. Fig.14 and Fig.16 shows an example of monitoring temperature information internally, Fig.15 and Fig.17 An example of adaptively changing at least one driving parameter among a plurality of driving parameters is shown.

[0116] refer to Fig.13 and Fig.14 , when the memory controller 720 monitors the temperature information internally (step S200), at least one of the plurality of memory packages 730, 740, and 750 may be selected as a reference memory package (step S210). For example, a memory package that is closest to the memory controller among the plurality of memory packages may be selected as a reference memory package. Fig.13 In the arrangement of , the first memory package 730 may be selected as a reference memory package. In some example embodiments, two or more memory packages may be selected as reference memory packages.

[0117] Only the reference package temperature information of the reference memory package may be monitored (step S211). For example, only the temperature information of at least some (e.g., all or some) non-volatile memories included in the reference memory package may be monitored. In other words, only the temperature information of some non-volatile memories from the plurality of non-volatile memories may be monitored.

[0118] refer to Fig.15 , when the memory controller 720 adaptively changes at least one of the plurality of driving parameters (step S400), the driving parameters required to operate the reference memory package (e.g., the driving parameters of the nonvolatile memory included in the reference memory package) may be changed based on the reference package temperature information (step S470), and the driving parameters required to operate the remaining memory packages other than the reference memory package (e.g., the driving parameters of the nonvolatile memory included in the remaining memory packages) may be changed based on the reference package temperature information and the predefined table (step S471). For example, during a programming / reading operation, only the temperature information of the reference memory package may be periodically checked, and temperature compensation may be performed on other memory packages using the predefined table without checking their temperature information. The predefined table may include corresponding temperature information of each package and / or memory according to the reference temperature information.

[0119] Each of steps S470 and S471 may be referred to as Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 may be implemented by at least one of the described examples.

[0120] refer to Fig.16, when the temperature information is monitored internally (step S200), at least one nonvolatile memory among the plurality of nonvolatile memories may be selected as a reference nonvolatile memory (step S220). For example, the reference nonvolatile memory may be a specific nonvolatile memory included in a specific memory package, may be several nonvolatile memories included in several memory packages, or may be several nonvolatile memories included in a specific memory package.

[0121] Only the reference memory temperature information of the reference nonvolatile memory may be monitored (step S221). In other words, only the temperature information of some nonvolatile memories among the plurality of nonvolatile memories may be monitored.

[0122] refer to Fig.17 , when at least one of the plurality of driving parameters is adaptively changed (step S400), the driving parameters required to operate the reference nonvolatile memory may be changed based on the reference memory temperature information (step S480), and the driving parameters required to operate the remaining nonvolatile memories other than the reference nonvolatile memory may be changed based on the reference memory temperature information and the predefined table (step S481). Each of steps S480 and S481 may be modified with reference Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 may be implemented by at least one of the described examples.

[0123] In some example embodiments, reference Fig.14 and Fig.15 Described examples and references Fig.16 and Fig.17 The described examples may be combined to implement a method of operating a memory device according to example embodiments.

[0124] Fig.18 is a flowchart illustrating a method of operating a storage device according to an example embodiment. Figure 1 Duplicate description.

[0125] refer to Fig.18 According to an example embodiment, a storage device includes a storage controller and a plurality of nonvolatile memories, each of which includes a temperature sensor. The storage device may also include a set temperature sensor that is different from, distinguished from, and distinct from the temperature sensors of the plurality of nonvolatile memories.

[0126] In a method of operating a storage device according to example embodiments, Fig.18Steps S100, S150, S200 and S300 in Figure 1 Steps S100, S150, S200 and S300 in the embodiment are substantially the same.

[0127] When the temperature check cycle has been reached (step S100: yes), the temperature information of at least one memory package is internally monitored using a temperature sensor integrated therein (step 200), and the set temperature information of the memory device is internally monitored using a set temperature sensor (step S500). Step S500 may be similar to step S200, except that a set temperature sensor is used.

[0128] Based on at least one of the monitored temperature information, the monitored set temperature information, and the obtained standby time information, at least one of the plurality of driving parameters required to operate the plurality of non-volatile memories (or memory packages) is adaptively changed (step S400a). For each non-volatile memory (or each memory package), at least one of the plurality of driving parameters is adaptively and selectively changed. Fig.18 Step S400a in may be similar to Figure 1 In step S400, a set temperature sensor is also used.

[0129] Fig.19 1 is a plan view of an example in which a memory controller and a plurality of memory packages are provided in a memory device according to an example embodiment, each memory package having at least one nonvolatile memory. Fig.13 Duplicate description.

[0130] refer to Fig.19 , Fig.19 The storage device can be used with Fig.13 The storage devices are basically the same, except Fig.19 The storage device also includes a set temperature sensor STS.

[0131] Unlike the temperature sensor TS included in each of the plurality of nonvolatile memories 732, 734, 743, 744, 752, and 754, the set temperature sensor STS may not be included in the memory controller 720 or the plurality of nonvolatile memories 732, 734, 743, 744, 752, and 754, and may be separately formed and mounted on the printed circuit board 710. For example, the set temperature sensor STS may be disposed relatively closer to the memory controller 720 than the temperature sensor TS of each of the plurality of nonvolatile memories 732, 734, 743, 744, 752, and 754.

[0132] The distances between the set temperature sensor STS and the plurality of memory packages 730, 740, and 750 may be different from each other. Fig.19 As shown, the distance between the set temperature sensor STS and the memory package 730 may be a first distance d1, and the distance between the set temperature sensor STS and the memory package 750 may be a second distance d2 that is longer than the first distance d1. For example, the first distance d1 may be shorter than the reference distance, and the second distance d2 may be longer than the reference distance. For another example, the first distance d1 may be shorter than the first reference distance, and the second distance d2 may be longer than the second reference distance, which is longer than the first reference distance.

[0133] Fig. 20 , Fig.21 , Fig. 22 and Fig.23 It is shown Fig.18 A flow chart of an example of adaptively changing at least one driving parameter among a plurality of driving parameters.

[0134] refer to Fig.19 and Fig. 20 , when at least one of the multiple driving parameters is adaptively changed (step S400a), the driving parameters required to operate the first memory package can be changed based on the set temperature information (step S490), and the driving parameters required to operate the second memory package can be changed based on the first temperature information (step S491). The distance between the set temperature sensor and the first memory package can be shorter than the reference distance, and the distance between the set temperature sensor and the second memory package can be longer than the reference distance. The first temperature information can be obtained from the second memory package. In other words, the temperature information of the memory package (or at least one non-volatile memory therein) that is relatively close to the set temperature sensor STS can be replaced by using the set temperature information of the set temperature sensor, and the temperature information of the memory package (or at least one non-volatile memory therein) that is relatively far from the set temperature sensor can be applied by checking its own temperature information.

[0135] refer to Fig.19 and Fig.21 , when at least one of the plurality of driving parameters is adaptively changed (step S400a), Fig.21 Step S490 in Fig. 20 The step S490 in the embodiment is basically the same. The driving parameters of the second memory package can be changed based on the set temperature information and the predefined table (step S492). In other words, the temperature information of the memory package relatively far from the set temperature sensor STS can be applied according to the temperature of the set temperature sensor and with reference to the predefined table.

[0136] refer to Fig. 22 , when at least one of the plurality of driving parameters is adaptively changed (step S400a), Fig. 22 Step S490 in Fig. 20 The step S490 in FIG. 4 is substantially the same as that in FIG. 4. The driving parameters of the second memory package may be changed based on the first temperature information and the predefined table (step S493). The predefined table may include a compensation temperature according to the temperature of the first temperature information.

[0137] refer to Fig.19 and Fig.23 , at least one of the plurality of driving parameters is adaptively changed (step S400a), a driving parameter required for operating the third memory package may be changed based on the set temperature information (step S494), a driving parameter required for operating the fourth memory package may be changed based on the reference memory temperature information (step S495), and a driving parameter required for operating the fifth memory package may be changed based on the set temperature information, the reference memory temperature information, and a predefined table (step S496). The distance between the set temperature sensor STS and the third memory package may be shorter than the first reference distance, the distance between the set temperature sensor STS and the fourth memory package may be longer than the second reference distance, the second reference distance is longer than the first reference distance, and the distance between the set temperature sensor STS and the fifth memory package may be between the first reference distance and the second reference distance. The reference memory temperature information may be obtained from the fourth memory package.

[0138] Fig. 20 , Fig.21 , Fig. 22 and Fig.23 Each of steps S490, S491, S492, S493, S494, S495 and S496 in can be referred to as Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 and Fig.12 The invention may be implemented by at least one of the examples described.

[0139] Although the nonvolatile memory has been described Fig. 20 , Fig.21 , Fig. 22 and Fig.23 , but example embodiments are not limited thereto, and Fig. 20 , Fig.21 , Fig. 22 and Fig.23 Examples of may be implemented for a memory package.

[0140] As will be appreciated by those skilled in the art, the present invention may be embodied as a system, method, computer program product, and / or the computer program product may be embodied in one or more computer-readable media having computer-readable program code embodied thereon. The computer-readable program code may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be any tangible medium that may contain or store a program used by or in conjunction with an instruction execution system, device, or apparatus. For example, a computer-readable medium may be a non-transitory computer-readable medium.

[0141] Fig.24 is a block diagram illustrating a storage server including a storage device according to example embodiments.

[0142] refer to Fig.24 The storage server 1100 may include a server 1110 , a plurality of storage devices 1000 storing data for operating the server 1110 , and a redundant array of independent drives (RAID) controller 1150 for controlling the plurality of storage devices 1000 .

[0143] RAID technology is mainly used in data servers where important data can be replicated in more than one location on multiple storage devices. RAID controller 1150 can enable one of multiple RAID levels according to RAID information and can interface data between server 1110 and multiple storage devices 1000.

[0144] Each of the plurality of storage devices 1000 may include a storage controller 1010 including a period measurer PM, a plurality of nonvolatile memories 1020 including a temperature sensor TS, and a buffer memory 1030. Each of the plurality of storage devices 1000 may correspond to the storage device 300 according to example embodiments, and may be configured according to the above reference. Figures 1 to 23 The server 1110 may correspond to Figure 2 A host 200 can control multiple storage devices 1000.

[0145] The inventive concept can be applied to various electronic devices and / or systems, including storage devices and storage systems. For example, the inventive concept can be applied to systems such as mobile phones, smart phones, tablet computers, laptop computers, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, portable game consoles, music players, camcorders, video players, navigation devices, wearable devices, Internet of Things (IoT) devices, Internet of Everything (IoE) devices, e-book readers, virtual reality (VR) devices, augmented reality (AR) devices, robotic devices, etc.

[0146] The foregoing is an illustration of example embodiments and should not be construed as limiting thereof. Although some example embodiments have been described, those skilled in the art will readily appreciate that many modifications are possible in the example embodiments without substantially departing from the novel teachings and advantages of the example embodiments. Therefore, all such modifications are intended to be included within the scope of the example embodiments defined in the claims. Therefore, it should be understood that the foregoing is an illustration of various example embodiments and should not be construed as being limited to the specific example embodiments disclosed, and modifications to the disclosed example embodiments as well as other example embodiments are intended to be included within the scope of the appended claims.

Claims

1. A method of operating a storage device comprising a plurality of non-volatile memories, each of the plurality of non-volatile memories comprising a temperature sensor, the method comprising: checking whether a predetermined temperature check period of the plurality of non-volatile memories has been reached; monitoring temperature information of at least one nonvolatile memory of the plurality of nonvolatile memories using the temperature sensor in response to a check result of whether the predetermined temperature check period has been reached; obtaining, based on the monitored temperature information, standby time information of each of the plurality of non-volatile memories by applying a temperature acceleration condition; as well as At least one driving parameter among a plurality of driving parameters required to operate each of the plurality of nonvolatile memories is changed based on at least one of the monitored temperature information and the obtained standby time information.

2. The method according to claim 1, wherein: The storage device further includes a storage controller configured to control operations of the plurality of non-volatile memories, and The monitoring of the temperature information is performed by the storage controller without receiving a command from an external host.

3. The method according to claim 1, in, The plurality of driving parameters include parameters associated with a prevention code among the defense codes of the plurality of nonvolatile memories.

4. The method according to claim 3, in, The parameters associated with the prevention code include a patrol read cycle of a patrol read operation on a first non-volatile memory among the plurality of non-volatile memories.

5. The method according to claim 3, in, The parameters associated with the prevention code include a refresh operation on a first non-volatile memory among the plurality of non-volatile memories.

6. The method according to claim 3, in, The parameters associated with the prevention code include a level of a read voltage of a read operation on a first nonvolatile memory among the plurality of nonvolatile memories based on a temperature fluctuation table.

7. The method according to claim 1, in, The plurality of driving parameters include parameters associated with a recovery code among the defense codes of the plurality of nonvolatile memories.

8. The method according to claim 7, in, The parameters associated with the recovery code include an order of applying a plurality of recovery algorithms to a first non-volatile memory among the plurality of non-volatile memories.

9. The method according to claim 8, wherein: The first non-volatile memory includes a plurality of memory blocks, and The application order of the plurality of recovery algorithms is set differently for each memory block.

10. The method according to claim 8, wherein: The first non-volatile memory includes a plurality of memory blocks, Each memory block of the plurality of memory blocks includes a plurality of pages, and For each page, the application order of the plurality of recovery algorithms is set differently.

11. The method according to claim 1, in, The plurality of driving parameters include at least one parameter associated with a program condition of a program operation on a first nonvolatile memory among the plurality of nonvolatile memories or at least one parameter associated with an erase condition of an erase operation on the first nonvolatile memory.

12. The method according to claim 2, wherein: The plurality of nonvolatile memories are arranged in a plurality of memory packages such that each of the plurality of memory packages includes at least one nonvolatile memory of the plurality of nonvolatile memories, and The monitoring of the temperature information includes: selecting a first memory package from among the plurality of memory packages as a reference memory package; and Only the first memory package is monitored to obtain first temperature information from at least one nonvolatile memory included in the first memory package as the temperature information.

13. The method according to claim 12, in, The changes of the plurality of driving parameters include: Based on the first temperature information, changing driving parameters required to operate the first memory package; and Based on the first temperature information and a predefined table, driving parameters required to operate each of the remaining memory packages except the first memory package are changed.

14. The method according to claim 1, in, The monitoring of the temperature information includes: selecting a first nonvolatile memory from among the plurality of nonvolatile memories as a reference nonvolatile memory; and Only the first nonvolatile memory is monitored to obtain first temperature information from the first nonvolatile memory as the temperature information.

15. The method according to claim 14, in, The changing of at least one driving parameter among the plurality of driving parameters comprises: Based on the first temperature information, changing a driving parameter required to operate the first nonvolatile memory; and Based on the first temperature information and a predefined table, a driving parameter required to operate each of the remaining nonvolatile memories except the first nonvolatile memory is changed.

16. The method of claim 12, wherein: The storage device further includes a set temperature sensor disposed between the storage controller and the plurality of nonvolatile memories, and The method further comprises: In response to the inspection result, the set temperature information of the storage device is monitored using the set temperature sensor.

17. The method according to claim 16, in, The changing of at least one driving parameter among the plurality of driving parameters comprises: A driving parameter required to operate a first nonvolatile memory is changed based on the set temperature information, and a distance between the set temperature sensor and the first nonvolatile memory is shorter than a reference distance.

18. The method according to claim 17, in, The changing of at least one of the plurality of driving parameters further comprises: A driving parameter required to operate a second nonvolatile memory is changed based on a predefined table and one of the set temperature information and the temperature information, a distance between the set temperature sensor and the second nonvolatile memory being longer than a reference distance.

19. A storage device comprising: a plurality of non-volatile memories, each of the plurality of non-volatile memories comprising a temperature sensor; as well as A storage controller is configured to control the operation of the multiple non-volatile memories, thereby: checking whether a predetermined temperature check cycle of the multiple non-volatile memories has been reached, using the temperature sensor to monitor temperature information of at least one non-volatile memory among the multiple non-volatile memories in response to a check result of whether the predetermined temperature check cycle has been reached, obtaining standby time information of each non-volatile memory among the multiple non-volatile memories based on the monitored temperature information and by applying a temperature acceleration condition, and changing at least one driving parameter among a plurality of driving parameters required to operate each non-volatile memory among the multiple non-volatile memories based on at least one of the monitored temperature information and the obtained standby time information.

20. A storage system comprising: Host; as well as a storage device accessed by the host and comprising a plurality of nonvolatile memories and a storage controller, each of the plurality of nonvolatile memories comprising a temperature sensor, the storage controller being configured to control operations of the plurality of nonvolatile memories, Wherein, the storage controller is configured to: check whether a predetermined temperature check cycle of the multiple non-volatile memories has been reached, use the temperature sensor to monitor the temperature information of at least one non-volatile memory among the multiple non-volatile memories in response to the check result of whether the predetermined temperature check cycle has been reached, obtain the standby time information of each non-volatile memory among the multiple non-volatile memories based on the monitored temperature information and by applying a temperature acceleration condition, and change at least one driving parameter among the multiple driving parameters required to operate each non-volatile memory among the multiple non-volatile memories based on at least one of the monitored temperature information and the obtained standby time information.

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