Memory access method, microprocessor, client and computer storage medium

Abstract

A memory access method, a microprocessor, a client, and a computer storage medium. The method comprises: obtaining a memory access request, wherein the memory access request comprises an address to be accessed and an access key (S101); determining a memory area and a standard key corresponding to the address to be accessed (S102); and when the access key matches the standard key, adjusting the memory attribute of the memory area to an access-allowed state using a memory protection unit (S103). By obtaining the memory access request, when the access key passes the verification, the memory attribute of the memory area is adjusted to an access-allowed state, so that the user can perform corresponding data processing operations on the memory area, which not only prevents the memory from being accidentally accessed or modified, but also realizes effective protection of the memory.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of communication technology, and in particular to a memory access method, a microprocessor, a client, and a computer storage medium. Background Art

[0002] In the field of microprocessors, memory protection is an essential security measure. The existing memory access methods in the prior art have their own advantages and disadvantages. Some are easily restricted by the hardware structure of the microprocessor, some are complex to operate and easily reduce system efficiency, and some can only achieve the role of protection but cannot provide a means of detecting abnormal access. Summary of the invention

[0003] The embodiments of the present invention provide a memory access method, a microprocessor, a client, and a computer storage medium, which can prevent the memory from being accidentally accessed or modified, and can also detect abnormal operations in protected areas in real time, thereby improving the security of memory access.

[0004] A first aspect of the present invention is to provide a memory access method, comprising:

[0005] Obtaining a memory access request, wherein the memory access request includes an address to be accessed and an access key;

[0006] Determining a memory area and a standard key corresponding to the address to be accessed;

[0007] When the access key matches the standard key, a memory protection unit is used to adjust the memory attribute of the memory area to an access-allowed state.

[0008] A second aspect of the present invention is to provide a microprocessor, comprising:

[0009] Memory for storing computer programs;

[0010] A processor, configured to run the computer program stored in the memory to implement:

[0011] Obtaining a memory access request, wherein the memory access request includes an address to be accessed and an access key;

[0012] Determining a memory area and a standard key corresponding to the address to be accessed;

[0013] When the access key matches the standard key, a memory protection unit is used to adjust the memory attribute of the memory area to an access-allowed state.

[0014] A third aspect of the present invention is to provide a memory access method, comprising:

[0015] Sending a memory protection request to the microprocessor, wherein the memory protection request includes address information to be protected;

[0016] The key information and the memory access channel sent by the microprocessor according to the memory protection request are received, wherein the key information corresponds to the address information.

[0017] A fourth aspect of the present invention is to provide a client, comprising:

[0018] Memory for storing computer programs;

[0019] A processor, configured to run the computer program stored in the memory to implement:

[0020] Sending a memory protection request to the microprocessor, wherein the memory protection request includes address information to be protected;

[0021] The key information and the memory access channel sent by the microprocessor according to the memory protection request are received, wherein the key information corresponds to the address information.

[0022] A fifth aspect of the present invention is to provide a computer-readable storage medium, wherein the storage medium is a computer-readable storage medium, and program instructions are stored in the computer-readable storage medium, and the program instructions are used for the memory access method described in the first aspect.

[0023] The sixth aspect of the present invention is to provide a computer-readable storage medium, wherein the storage medium is a computer-readable storage medium, and program instructions are stored in the computer-readable storage medium, and the program instructions are used for the memory access method described in the third aspect.

[0024] The memory access method, microprocessor, client and computer storage medium provided in the embodiments of the present invention obtain a memory access request, determine the memory area and standard key corresponding to the address to be accessed, and when the access key matches the standard key, use the memory protection unit to adjust the memory attribute of the memory area to an access-allowed state, and then use the memory protection unit to adjust the memory access state based on the secret key. This not only prevents the memory from being accidentally accessed or modified, but also realizes effective protection of the memory, thereby ensuring the security and reliability of memory access, and effectively improving the practicality of the method. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0026] Figure 1A schematic diagram of the upper and lower bound protection method provided by the prior art;

[0027] Figure 2 A schematic diagram of a process stack protection method provided by the prior art;

[0028] Figure 3 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 1 ;

[0029] Figure 4 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 2 ;

[0030] Figure 5 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 3 ;

[0031] Figure 6 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 4 ;

[0032] Figure 7 A schematic diagram of a process for identifying an illegal access user to the memory area provided by an embodiment of the present invention;

[0033] Figure 8 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 5 ;

[0034] Fig. 9 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 6 ;

[0035] Fig.10 Schematic diagram of another memory access method provided by an embodiment of the present invention Figure 1 ;

[0036] Fig.11 Schematic diagram of another memory access method provided by an embodiment of the present invention Figure 2 ;

[0037] Fig.12 A schematic diagram of a memory access method provided for an application embodiment of the present invention Figure 1 ;

[0038] Fig.13 A schematic diagram of a memory access method provided by an application embodiment of the present invention Figure 1 ;

[0039] Fig.14 A schematic diagram of a memory access method provided for an application embodiment of the present invention Figure 2 ;

[0040] Fig.15 A schematic diagram of a memory access method provided by an application embodiment of the present invention Figure 2 ;

[0041] Fig.16 A schematic diagram of the structure of a microprocessor provided by an embodiment of the present invention;

[0042] Fig.17 A schematic diagram of the structure of a client provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0045] In order to facilitate understanding of the specific implementation process of the technical solution in this embodiment, the working principle of the microprocessor is described below:

[0046] In the field of microprocessor technology, memory protection is an enduring proposition. Regardless of the type of memory protection method, each has its own advantages and disadvantages: some are limited by the hardware structure of the microprocessor, some memory protection processes are complicated and reduce data processing efficiency; some can only achieve protection but cannot provide detection for abnormal access.

[0047] Microprocessors may include high-end microprocessors and low-end microprocessors, wherein high-end microprocessors contain a memory management unit (MMU), which is used to implement virtual memory management, thereby dividing memory addresses into virtual addresses and physical addresses. For users, users can view virtual addresses, which are isolated from actual physical addresses, thereby achieving the purpose of memory protection.

[0048] In low-end microprocessors, there is no MMU, but a memory protection unit (MPU) is provided. Specifically, MPU is a hardware structure that provides memory area attribute settings based on regions. Usually, MPU can have 8 or more regions. Each region is correspondingly provided with a memory region and memory attributes, wherein the memory attributes include read and write (whether the region can be read and written), execution (whether the region can be directly addressed and executed), cache and write cache and other attributes. At the same time, different regions are allowed to overlap when setting memory regions, and different regions can have different priorities. When the memory regions of the regions overlap, the high-priority region will overwrite the attributes set by the low-priority region. When the memory operation is different from the attributes set by the region, an abnormal operation of the hardware will be generated immediately and the microprocessor will be notified. Therefore, the setting of read and write attributes can be used to implement memory protection, and abnormal operations can be used to discover illegal operations of memory.

[0049] For low-end microprocessors, two memory protection methods can be used. One method is to not use the MPU and only use the memory protection method implemented by software processing algorithms, such as the upper and lower bounds protection method; the other method is to use the MPU protection method, such as the process stack protection method combined with the operating system (OS).

[0050] Specifically, the process of the upper and lower bound protection method includes: pre-setting upper and lower bound registers, wherein the upper and lower bound registers store the starting address and the ending address of the memory used by the executing program. During the data execution process, the memory operation is checked by a unified software processing algorithm to determine whether the accessed address is within the range of the upper and lower bounds. If not, the current access is determined to be an illegal access; otherwise, it is a legal access. Figure 1 As shown, the memory access addresses of "1#" and "3#" exceed the upper and lower bounds of the memory area. Therefore, it can be determined that the memory access operations of "1#" and "3#" are illegal operations; while the memory access address of "2#" meets the address requirements and can be accessed successfully.

[0051] In addition, the process stack protection method is a stack memory protection method that uses the operating system OS and hardware. This method can protect the stack memory of the currently running process from the stack memory of other processes, effectively preventing the occurrence of stack overflow and protecting the space in the stack. Figure 2 As shown, the specific implementation principle is as follows:

[0052] (1) A piece of memory space is allocated in advance as the stack background space of the process stack, and the stacks of all processes are allocated in this space.

[0053] (2) Use the low-priority area (background area) of the MPU to set the stack space to be non-readable, non-writable, and non-executable.

[0054] (3) When starting a process, the stack space of the process to be started is set to be readable and writable but not executable using the high-priority area (process area) of the MPU. At this time, due to the principle that the high priority of the MPU overrides the low priority, only the stack space of the started process can be read and written, while the stacks of other processes cannot be read and written, thereby protecting the stacks of other processes and preventing stack overflow or abnormal pointer modification.

[0055] (4) When the process is switched, the process area is set to the stack space to be switched, so that the next process to be started becomes readable and writable, and the process that has been switched out becomes unreadable and writable.

[0056] However, the above memory protection method has the following defects:

[0057] (1) Most memory protection methods in the microprocessor field are based on software-level protection, such as the upper and lower bounds protection method mentioned above. However, software-level protection methods have the risk of abnormal operation, which may cause the protection function to fail.

[0058] (2) For software-level protection measures, the access efficiency is reduced because the address of each operation needs to be checked.

[0059] (3) The implementation mechanism of software-level protection measures is based on the check of access addresses (for example, upper and lower bounds protection method). Therefore, when memory is accessed, it needs to be accessed through a fixed software channel. Therefore, when the system's abnormal access does not pass through its fixed memory channel, its protection measures will fail. For example, the widespread abnormal pointer memory access. When the abnormal pointer points to the protected area, it does not pass through the fixed memory channel, so the protection effect is not achieved.

[0060] (4) Most protection methods using MPU only implement the protection of the process stack and it is difficult to implement the protection of arbitrary memory addresses.

[0061] (5) The above memory protection methods are basically based on process memory protection, and there are no effective measures for protection within the process.

[0062] (6) The above memory protections are all protection measures for a single process or a single user. It is difficult to achieve memory sharing and shared protection among multiple users.

[0063] In the following, some embodiments of the present invention are described in detail in conjunction with the accompanying drawings. In the case where there is no conflict between the embodiments, the following embodiments and features in the embodiments can be combined with each other.

[0064] Figure 3 A schematic diagram of a memory access method provided by an embodiment of the present invention; see attached Figure 3 As shown, in order to solve the above problems, this embodiment provides a memory access method, which can prevent the memory from being accidentally accessed or modified, and can also detect abnormal operations in protected areas in real time, thereby improving the security of memory access. In specific applications, the execution subject of the memory access method can be a microprocessor, which can be a low-end microprocessor, and the microprocessor can be implemented as software, or a combination of software and hardware. Specifically, the method may include:

[0065] S101: Obtain a memory access request, where the memory access request includes an address to be accessed and an access key.

[0066] The memory access request may be sent by a first virtual user. The first virtual user may be in any of the following forms: a process, a software module independently running on a central processing unit, an application, a terminal device, etc., and the number of the first virtual users may be one or more. It is understandable that in different application scenarios, the first virtual user may have different forms of expression. Specifically, when the first virtual user sends a memory access request to the microprocessor, the microprocessor may obtain the memory access request, which includes an address to be accessed and an access key, wherein the access key is used to implement a memory access operation for the address to be accessed.

[0067] S102: Determine a memory area and a standard key corresponding to the address to be accessed.

[0068] After obtaining the address to be accessed, the address to be accessed can be analyzed and processed to determine the memory area and standard key corresponding to the access address. Specifically, the specific implementation method for determining the memory area and standard key corresponding to the address to be accessed is not limited in this embodiment, and those skilled in the art can set it according to specific application scenarios and application requirements, for example: obtaining address identification information corresponding to the address to be accessed, determining the memory area and standard key corresponding to the address to be accessed according to the address identification information, and the standard key is used to verify the legitimacy of the memory access request; when the standard key matches the access key included in the memory access request, the memory access request is determined to be a legal request; when the standard key does not match the access key included in the memory access request, the memory access request is determined to be an illegal request.

[0069] S103: When the access key matches the standard key, the memory attribute of the memory area is adjusted to an access-allowed state using the memory protection unit.

[0070] The access allowed state includes: a state in which the first virtual user is allowed to perform a corresponding data processing operation on the memory area.

[0071] In another optional implementation, other virtual users associated with the first virtual user identity may be allowed to access the memory area and perform corresponding data processing operations.

[0072] When the access key matches the standard key, the memory access request is determined to be a legitimate request. At this time, the memory protection unit can be used to adjust the memory attributes in the memory area to an access-allowed state, wherein the memory attributes may include at least one of the following: read-write attributes, address execution attributes, and cache attributes, so that the first virtual user can perform data processing operations corresponding to the memory access request on the memory area; wherein the memory protection unit in this embodiment can be integrated in a microprocessor.

[0073] For example: before receiving a memory access request, the memory attribute of the memory area is in an access-prohibited state. When the memory access request is a read-write request sent for a first address, the first access key included in the read-write request can be obtained, and the standard key corresponding to the first address can be determined. When the first access key matches the standard key, the memory protection unit is used to adjust the read-write attribute of the memory area to an allowed state, so that the first virtual user can perform data read and write operations corresponding to the read-write request for the memory area. Alternatively, when the memory access request is an address execution request sent for a second address, the second access key included in the address execution request can be obtained, and the standard key corresponding to the second address can be determined. When the second access key matches the standard key, the memory protection unit is used to adjust the address execution attribute of the memory area to an allowed state, so that the first virtual user can perform the address execution operation corresponding to the address execution request for the memory area.

[0074] The memory access method provided in this embodiment obtains a memory access request, determines the memory area and the standard key corresponding to the address to be accessed, and when the access key matches the standard key, uses a memory protection unit to adjust the memory attribute of the memory area to an access-allowed state, and then uses the memory protection unit to adjust the memory access state based on the secret key. This not only prevents the memory from being accidentally accessed or modified, but also achieves effective protection of the memory, thereby ensuring the security and reliability of memory access and effectively improving the practicality of the method.

[0075] Figure 4 A flowchart of another memory access method provided by an embodiment of the present invention; based on the above embodiment, continue to refer to the attached Figure 4 As shown, before obtaining the memory access request, the method in this embodiment may further include:

[0076] S201: Acquire a memory protection request sent by a second virtual user, where the memory protection request includes address information to be protected.

[0077] The second virtual user may be any of the following forms: a process, a software module running independently on a central processing unit, an application program, etc., and the number of the second virtual users may be one or more. It is understandable that in different application scenarios, the second virtual user may have different forms of expression. In a specific application scenario, the second virtual user may be the same as or different from the first virtual user.

[0078] Before obtaining a memory access request, in order to achieve effective protection of the memory, the second virtual user can send a memory protection request to the microprocessor. The memory protection request at this time may include address information to be protected. Specifically, the address information to be protected may include one of the following: address information of a process stack, address information of a non-process stack; wherein the memory area corresponding to the address information of the non-process stack is used to store at least one of the following: authentication information, device information, configuration information, operation information, and status information.

[0079] S202: Allocate a corresponding memory area for the address information according to the memory protection request.

[0080] After obtaining the memory protection request, a corresponding memory area may be allocated to the address information to be protected based on the memory protection request. At this time, the memory area may correspond to a memory attribute, and the memory attribute may include at least one of the following: read-write attribute, address execution attribute, cache attribute, etc.

[0081] S203: Using the memory protection unit, adjust the memory attribute of the memory area to a prohibited access state.

[0082] After allocating the corresponding memory area for the address information, the memory protection unit can be used to adjust the memory attribute of the memory area to the access-prohibited state. It can be understood that after the memory attribute of the memory area is adjusted to the access-prohibited state, no user can access the memory area, for example: the user cannot perform data read and write operations, cannot perform data cache operations, and cannot implement address execution operations; thereby achieving effective protection of the memory area.

[0083] S204: Generate key information corresponding to the address information, and send the key information to the second virtual user.

[0084] After the memory attribute of the memory area is adjusted to the access-forbidden state, in order to enable a legitimate user to perform an access operation on the memory area, key information corresponding to the address information may be generated. Specifically, generating the key information corresponding to the address information may include:

[0085] S2041: Generate a random key information corresponding to the address information using a random number generator.

[0086] Specifically, a random number generator is pre-set, and the random number generator can be integrated in a microprocessor. After the memory attribute of the memory area of ​​the address information is adjusted to a prohibited access state, the random number generator can be used to generate a random key information corresponding to the address information. It can be imagined that since the random key information is generated by the random number generator, it is effectively guaranteed that the key information corresponding to the address information is not fixed, and the strength of the protection of the memory area is further guaranteed.

[0087] After the key information is obtained, the key information can be sent to the second virtual user, so that the second virtual user can implement a legal access operation to the memory area based on the key information. In addition, after the second virtual user obtains the corresponding relationship between the key information and the address information, the corresponding relationship between the key information and the address information can be shared with other virtual users. For example, the second virtual user can share the corresponding relationship between the key information and the address information with the first virtual user, so that the first virtual user can perform a legal access operation to the memory area based on the shared key information. Specifically, the first virtual user can send a memory access request to the microprocessor, and the memory access request includes an access key. At this time, the access key of the first virtual user can be determined based on the key information shared by the second virtual user to the first virtual user, so that the first virtual user can effectively implement a legal access operation to the memory area based on the key information shared by the second virtual user under the authorization of the second virtual user. When other virtual users do not use the correct key information to send a memory access request to the microprocessor, the microprocessor can identify the virtual user as an illegal user, thereby realizing that illegal access operations to the memory area can be discovered.

[0088] In this embodiment, by obtaining a memory protection request sent by the second virtual user, a corresponding memory area is allocated to the address information according to the memory protection request, a memory attribute of the memory area is adjusted to an access-prohibited state using a memory protection unit, and key information corresponding to the address information is generated, and the key information is sent to the second virtual user, thereby effectively protecting the memory area corresponding to the address information to be protected, and allowing the second virtual user to perform legal access operations on the memory area based on the key information, effectively preventing the memory from being accidentally accessed or modified, and also detecting abnormal access operations to the protected area in real time, that is, obtaining illegal access operations of the virtual user, thereby improving the security of access to the memory.

[0089] Based on the above embodiments, continue to refer to the attached Figure 3 As shown, this embodiment does not limit the specific implementation method for obtaining the memory access request, and those skilled in the art can set it according to specific application requirements and design requirements. Preferably, obtaining the memory access request in this embodiment includes:

[0090] S1011: Obtain a memory access request sent by a first virtual user through a memory access channel.

[0091] Among them, the memory access channel can be a pre-configured legal access channel corresponding to the address information. When the first virtual user sends a memory access request, the first virtual user can send the memory access request through the memory access channel corresponding to the address information, so that the microprocessor can obtain the memory access request sent by the first virtual user through the memory access channel, thereby effectively ensuring the legality of the memory access request.

[0092] Figure 5 A flowchart of another memory access method provided by an embodiment of the present invention; based on the above embodiment, continue to refer to the attached Figure 5 As shown, before obtaining the memory access request sent by the first virtual user through the memory access channel, the method in this embodiment may further include:

[0093] S301: Allocate a corresponding memory access channel for address information according to a memory protection request.

[0094] S302: Send the memory access channel to the second virtual user.

[0095] After obtaining the memory protection request, a corresponding memory access channel can be allocated according to the address information in the memory protection request. It can be imagined that different address information can correspond to the same or different memory access channels; and then the memory access channel is sent to the second virtual user so that the second virtual user can achieve legal access to the memory area through the memory access channel.

[0096] In addition, after the second virtual user obtains the correspondence between the memory access channel and the address information, the correspondence between the memory access channel and the address information can be shared with other virtual users. For example, the second virtual user can share the correspondence between the memory access channel and the address information with the first virtual user, so that the first virtual user can perform legal access operations on the memory area based on the shared memory access channel. Specifically, the first virtual user can send a memory access request to the microprocessor through the memory access channel and for the address information. At this time, the memory access channel of the first virtual user is the memory access channel shared by the second virtual user to the first virtual user. In this way, the first virtual user can perform legal access operations on the memory area based on the memory access channel shared by the second virtual user.

[0097] It is understandable that when the second virtual user performs an access operation on the memory area, it is necessary to use the key information corresponding to the address information and the memory access channel to access the memory area, and only after the memory access channel and the key information are verified, can the legal access operation to the memory area be realized. On the contrary, if the key information fails to pass the verification and the memory access channel passes the verification, or the memory access channel fails to pass the verification and the key information passes the verification, the second virtual user cannot realize the legal access operation to the memory area.

[0098] In this embodiment, by allocating a corresponding memory access channel to the address information according to the memory protection request, and sending the memory access channel to the second virtual user, the strength of protection of the memory area corresponding to the address information to be protected is effectively increased, so that the second virtual user can perform legal access operations on the memory area based on the memory access channel, effectively preventing the memory from being accidentally accessed or modified, and at the same time, abnormal access operations to the protected area can be discovered in real time, that is, illegal access operations of the virtual user can be obtained, thereby improving the security of access to the memory.

[0099] Based on any of the above embodiments, after generating the key information corresponding to the address information, the method in this embodiment may further include:

[0100] S205: Store the key information in a preset area.

[0101] The preset area may include an area in the memory area and located before the address information; or the preset area may be adjacent to the memory area. For example, the preset areas are A0-A10, where the A0 area is the area located before the address information. After the key information is obtained, the key information can be stored in the A0 area. Alternatively, the preset area is A, and the areas adjacent to the preset area A include area B and area C. After the key information is obtained, the key information can be stored in area B or area C.

[0102] Of course, those skilled in the art may select other preset areas according to specific application scenarios, as long as the key information can be stored in the preset area, so that the stored key information can be easily obtained through the preset area.

[0103] Figure 6 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 4 Based on any of the above embodiments, refer to the attached Figure 6 As shown, the method in this embodiment may further include:

[0104] S401: Identify users who illegally access the memory area.

[0105] S402: Generate illegal access information corresponding to the illegal access user.

[0106] For a microprocessor, a virtual user accessing a memory area may be a legal access user or an illegal access user, wherein a legal access user may refer to a virtual user whose access key in a sent memory access request matches a standard key and whose access channel matches a preset memory access channel; and an illegal access user may refer to a virtual user whose access key in a sent memory access request does not match the standard key and / or whose access channel does not match a preset memory access channel. Specifically, a method for identifying illegal access users to a memory area may include:

[0107] S500: When the access key does not match the standard key, determining that the first virtual user is an illegal access user.

[0108] Specifically, after obtaining the memory access request sent by the first virtual user, the access key included in the memory access request can be obtained, and then the access key and the standard key are analyzed and matched. When the access key and the standard key do not match, it means that the access key sent by the first virtual user is different from the preset standard key, and it can be determined that the first virtual user at this time is an illegal access user.

[0109] In addition, refer to the attached Figure 7As shown, this implementation also provides another method for identifying illegal access users to the memory area, specifically including:

[0110] S501: Using a memory protection unit to identify an access channel through which a first virtual user sends a memory access request.

[0111] S502: When the access channel does not match the preset memory access channel, determine that the first virtual user is an illegal access user.

[0112] Specifically, after obtaining the memory access request sent by the first virtual user, the memory protection unit can be used to identify the access channel through which the first virtual user sends the memory access request, and then the access channel is analyzed and matched with the preset memory access channel. When the access channel does not match the memory access channel, it means that the access channel of the memory access request sent by the first virtual user is different from the preset memory access channel, and it can be determined that the first virtual user at this time is an illegal access user.

[0113] On the contrary, when the access channel matches the memory access channel, the access key included in the memory access request can be obtained, and then the access key is analyzed and matched with the standard key. When the access key matches the standard key, it means that the access key sent by the first virtual user is the same as the preset standard key, and it can be determined that the first virtual user at this time is a legitimate access user.

[0114] After identifying the illegal access user, illegal access information corresponding to the illegal access user can be generated, and the illegal access information may include the user identification, access record, access time and other information of the illegal access user; the user can be prompted by the generated illegal access information so that the user can obtain the abnormal access operation in the microprocessor in time, effectively preventing the memory from being accidentally accessed or modified, and at the same time, the abnormal operation of the protected area can be discovered in real time, further improving the quality and effect of protecting the memory area.

[0115] Figure 8 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 5 Based on any of the above embodiments, continue to refer to the attached Figure 8 As shown, the memory protection request includes a first request and a second request, the first request includes a first access address, the second request includes a second access address, and there is an overlapping address between the first access address and the second access address; at this time, in this embodiment, the corresponding memory area is allocated to the address information according to the memory protection request and the memory attribute corresponding to the memory area may include:

[0116] S601: Allocate a first memory area corresponding to a first access address and a first memory attribute corresponding to the first memory area according to a first request.

[0117] S602: Allocate a corresponding second memory area and a second memory attribute corresponding to the second memory area to the second access address according to the second request.

[0118] S603: Obtain a first attribute priority of the first memory area and a second attribute priority of the second memory area.

[0119] S604: Determine the overlapping memory attribute of the overlapping address according to the first attribute priority and the second attribute priority.

[0120] Specifically, when the memory protection request includes a first request and a second request, the first request and the second request may be sent to the microprocessor by two different virtual users. At this time, after the microprocessor receives the first request and the second request, the first memory area corresponding to the first access address may be allocated according to the first request. At this time, the first memory area may correspond to the first memory attribute, and the second memory area corresponding to the second access address may be allocated according to the second request. At this time, the second memory area may correspond to the second memory attribute. Since there is an overlapping address between the first access address to be protected and the second access address, there will also be an overlapping area between the first memory area allocated to the first access address and the second memory area allocated to the second access address; and for the memory attributes of the overlapping area, it is necessary to identify the attribute priority between the first memory area and the second memory attribute, that is, the first attribute priority of the first memory area and the second attribute priority of the second memory area may be determined according to a preset rule; and then the overlapping memory attributes of the overlapping addresses are determined based on the first attribute priority and the second attribute priority. Specifically, determining the overlapping memory attributes of the overlapping addresses according to the first attribute priority and the second attribute priority may include:

[0121] S6041: When the first attribute priority is higher than the second attribute priority, determining the overlapping memory attribute of the overlapping address as the first memory attribute. Or,

[0122] S6042: When the first attribute priority is lower than the second attribute priority, determine the overlapping memory attribute of the overlapping address as the second memory attribute.

[0123] When the first attribute priority and the second attribute priority are obtained, the higher attribute priority can be determined, and then the overlapping memory attribute of the overlapping address is determined to be consistent with the higher attribute priority. Specifically, when the first attribute priority is higher than the second attribute priority, the overlapping memory attribute of the overlapping address is determined to be the first memory attribute, or when the first attribute priority is lower than the second attribute priority, the overlapping memory attribute of the overlapping address is determined to be the second memory attribute.

[0124] For example: the first access address included in the first request is: 192.168.1.1-192.168.1.154; the second access address included in the second request is: 192.168.1.100-192.168.1.254; at this time, the overlapping address between the first access address and the second access address is: 192.168.1.100-192.168.1.154. Then the first memory area allocated to the first access address is area A, and the second memory area allocated to the second access address is area B, wherein there is an overlapping area C between area A and area B, and the overlapping area C is used to store the above-mentioned overlapping address; at this time, all areas formed by area A and area B can be divided into three parts: area A1 for storing the non-overlapping address part of the first access address, overlapping area C for storing the overlapping address, and area B1 for the non-overlapping address part of the second access address, wherein area A1 and overlapping area C constitute area A, and area B1 and overlapping area C constitute area B.

[0125] For the above-mentioned area A1, overlapping area C and area B1, the memory attribute of area A1 complies with the first attribute priority, and the memory attribute of area B1 complies with the second attribute priority, wherein the first attribute priority corresponds to the first request and the second attribute priority corresponds to the second request. The memory attribute of overlapping area C complies with the attribute information with a higher priority among the first attribute priority and the second attribute priority, so that virtual users with high priority can access the overlapping area, while virtual users with low priority cannot access the overlapping area, thus realizing the setting of different memory protection strategies for virtual users of different priority levels, and further improving the flexibility and reliability of the use of memory protection methods.

[0126] Fig. 9 A schematic diagram of a memory access method provided by an embodiment of the present invention Figure 6 Based on any of the above embodiments, continue to refer to the attached Fig. 9 As shown, the memory protection request includes a first request and a second request, the first request includes a first access address and an identity of a first virtual user, and the second request includes a second access address and an identity of a second virtual user; at this time, generating key information corresponding to the address information in this embodiment may include:

[0127] S701: Determine a first access priority corresponding to a first access address according to an identity identifier of a first virtual user, and determine a second access priority corresponding to a second access address according to an identity identifier of a second virtual user.

[0128] S702: Generate first key information corresponding to the first access address, where the first key information satisfies a first access priority.

[0129] S703: Generate second key information corresponding to the second access address, where the second key information satisfies the second access priority.

[0130] Specifically, when the memory protection request includes a first request and a second request, the first request and the second request may be sent to the microprocessor by the first virtual user and the second virtual user respectively. At this time, after the microprocessor receives the first request and the second request, the identity of the first virtual user included in the first request may be identified, and then the first access priority corresponding to the first access address may be determined according to the identity of the first virtual user. Similarly, the identity of the second virtual user included in the second request may be identified, and then the second access priority corresponding to the second access address may be determined according to the identity of the second virtual user. When there is no overlapping address between the first access address and the second access address, the first key information corresponding to the first access address may be directly generated, and the first key information satisfies the first access priority; and the second key information corresponding to the second access address is generated, and the second key information satisfies the second access priority.

[0131] When there is an overlapping address between the first access address and the second access address, the overlapping address portion will correspond to the first key information that meets the first access priority and the second key information that meets the second access priority. At this time, the key information with a higher access priority will overwrite the key information with a lower access priority. For example: the overlapping area corresponds to the first key information with a higher access priority and the second key information with a lower access priority, then the key information corresponding to the overlapping area is the first key information, so that virtual users with high priority can access the overlapping area, while virtual users with low priority cannot access the overlapping area, which realizes the setting of different memory protection policies for virtual users of different priority levels, and further improves the flexibility and reliability of the use of memory protection methods.

[0132] Fig.10 A flowchart of another memory access method provided by an embodiment of the present invention; see attached Fig.10As shown, in order to solve the above problems, this embodiment provides a memory access method, which can prevent the memory from being accidentally accessed or modified, and can also detect abnormal operations in protected areas in real time, thereby improving the security of memory access. In specific applications, the execution subject of the memory access method can be a client, and it can be understood that the client can be implemented as software, or a combination of software and hardware. Specifically, the method may include:

[0133] S801: Send a memory protection request to a microprocessor, where the memory protection request includes address information to be protected.

[0134] S802: receiving key information and a memory access channel sent by the microprocessor according to a memory protection request, wherein the key information corresponds to the address information.

[0135] Specifically, when the client has a memory protection requirement for the address information to be protected, a memory protection request for the address information to be protected can be generated, and then the memory protection request can be sent to the microprocessor, so that the microprocessor can allocate a corresponding memory area to the address information to be protected based on the memory protection request, and perform memory protection operations on the memory area, and then return the key information and memory access channel corresponding to the address information to be protected, so that the client can receive the key information and memory access channel corresponding to the memory protection request. At this time, the key information and memory access channel correspond to the address information to be protected, thereby enabling the client to perform legal data access operations through the memory access channel and the key information.

[0136] The memory access method provided in this embodiment, by sending a memory protection request to the microprocessor and receiving the key information and memory access channel sent by the microprocessor according to the memory protection request, effectively enables the client to perform legal data access operations based on the memory access channel and key information, further prevents the memory from being accidentally accessed or modified, thereby improving the security of memory access and effectively ensuring the practicality of the memory access method.

[0137] Based on the above embodiments, continue to refer to the attached Fig.10 As shown, in order to improve the flexibility and reliability of the use of the method, the method in this embodiment may further include:

[0138] S901: Share the key information and the address information with other clients, so that the other clients can perform corresponding data access operations on the memory area corresponding to the address information.

[0139] Specifically, after the client obtains the correspondence between the key information and the address information, the key information and the address information can be shared with other clients, so that other clients can perform corresponding data access operations on the memory area corresponding to the address information under the authorization of the client, effectively ensuring that clients with legitimate permissions can perform corresponding data access operations on the memory area, while clients without legitimate permissions cannot perform corresponding data access operations on the memory area, further preventing the memory from being accidentally accessed or modified, and improving the quality and effectiveness of protecting memory access.

[0140] Fig.11 Schematic diagram of another memory access method provided by an embodiment of the present invention Figure 2 Based on the above embodiments, continue to refer to the attached Fig.11 As shown, the method in this embodiment may further include:

[0141] S1001: Send a memory access request to the microprocessor based on a memory access channel, wherein the memory access request includes an address to be accessed and an access key, so that the microprocessor adjusts the memory attribute of the memory area corresponding to the address to be accessed to an access-allowed state according to the access key.

[0142] S1002: Execute a data processing operation corresponding to the memory access request on the memory area.

[0143] Specifically, after requesting the microprocessor to perform corresponding memory protection operations on the address information to be protected, the client can also request access to the corresponding memory area through the microprocessor. Specifically, the client can send a memory access request to the microprocessor based on a memory access channel, and the memory access request includes the address to be accessed and an access key. After the microprocessor receives the memory access request, it can identify the legitimacy of the client based on the access key included in the memory access request. After determining that the client is a legitimate access user, it can adjust the memory attributes of the memory area corresponding to the address to be accessed to the running access state according to the access key, so that the client can perform data processing operations corresponding to the memory access request on the memory area.

[0144] In this embodiment, a memory access request is sent to the microprocessor based on the memory access channel. After the microprocessor adjusts the memory attribute of the memory area corresponding to the address to be accessed to the access allowed state according to the access key, the client performs the data processing operation corresponding to the memory access request on the memory area, so that the client with legal authority can perform the data processing operation corresponding to the memory access request on the memory area. This not only prevents the memory from being accidentally accessed or modified, but also realizes the effective protection of the memory, thereby ensuring the security and reliability of the application of the memory, and effectively improving the practicality of the method.

[0145] In specific applications, this application embodiment provides a memory access method, which uses a combination of software and hardware to implement memory protection, and has high reliability, high performance, small granularity, and sharable functions. At the same time, it can retain information about illegal memory access, discover the cause of illegal access, and prevent illegal addressing operations in protected areas. In addition, while implementing legal access to memory, this method can also implement the setting of memory attributes and write cache attributes, which is conducive to solving the problem of memory data synchronization. Specifically, if Fig.12 As shown, the method comprises the following steps:

[0146] Step 1: Get the memory protection request sent by the user, which includes the address information to be protected.

[0147] Step 2: Allocate the corresponding memory area for the address information according to the memory protection request.

[0148] step3: Configure the address information of the memory area.

[0149] Step 4: Use the memory protection unit to adjust the memory attributes of the memory area to a prohibited access state.

[0150] Step 5: Generate key information corresponding to the address information and send the key information to the user.

[0151] Specifically, the user can use the address that needs to be protected to apply for a memory area from the memory protection unit MPU. When the memory area is allocated successfully, the memory attribute of the address can be adjusted to a prohibited access state, for example: read and write permissions are closed (i.e. locked), cache permissions are closed, etc. The memory area in the prohibited access state will not be accessible. If access occurs, abnormal access information will be generated immediately, thereby locating the illegal access information. Then, a random number generator is used to generate a random key, and the random key is bound to the address, that is, the key information corresponding to the address information is obtained, and the key information can be stored in the position before the address of the memory area. At the same time, the obtained key information can also be sent to the user, such as Fig.13As shown, the user can unlock and access the memory area according to the key information he holds, thereby achieving legal access operations to the memory area.

[0152] Furthermore, after the user obtains the key information, the key information can also be shared, such as Fig.14 As shown, the user can give his or her key information to other users, thereby realizing memory sharing in a protected state, thereby realizing that other authorized users can legally access the memory area through the shared key information.

[0153] For details, please refer to the attached Fig.15 As shown, when a user accesses a memory area, the following steps are included:

[0154] step11: Get the sent memory access request, which includes the address to be accessed and the access key.

[0155] Step 12: Determine the memory area and standard key corresponding to the address to be accessed, and use the standard key to verify the access key.

[0156] step 13: When the standard key and the access key do not match, it means that the access key has not been verified, and feedback information can be sent to the user; when the standard key and the access key match, it means that the access key has been verified.

[0157] Step 14: After the access key is verified, the memory attribute of the memory area can be adjusted to allow access. At this time, the user can access the memory area through the access key.

[0158] step 15: After performing the access operation on the memory area, the memory attribute of the memory area can be adjusted to the access-prohibited state again, thereby realizing the safe access operation to the memory area.

[0159] The memory access method provided by this application embodiment performs protection operations on the memory area based on the memory protection request after receiving the memory protection request sent by the virtual user, thereby realizing the application of the memory protection area in units of the virtual user's request, thereby realizing small-grained memory protection, and realizing the memory division and protection within the process; in addition, the microprocessor in this embodiment adopts the MPU hardware unit for memory protection, which has higher read and write efficiency than the memory protection measures at the software level due to the reduction of the secondary read and write address check; and, by setting the read and write attributes through the MPU, memory protection is realized, which is equivalent and reliable compared to the memory protection at the software level. In addition, the method can also detect abnormal memory operations caused by abnormal access operations, and has a stronger protection effect. Specifically, when an illegal access operation to the memory occurs, the abnormal access operation can be immediately triggered by the MPU, and the microprocessor can be notified so that the microprocessor can perform abnormal processing, thereby locating the abnormal memory operation. On the other hand, the method in this embodiment can realize the sharing of key information, so that the data of the protected memory can be shared, further improving the flexibility and reliability of the method.

[0160] Fig.16 A schematic diagram of the structure of a microprocessor provided in an embodiment of the present invention; Fig.16 As shown, this embodiment provides a microprocessor for executing the above Figure 3 Specifically, the microprocessor may include:

[0161] A first memory 12, used for storing computer programs;

[0162] The first processor 11 is configured to run the computer program stored in the first memory 12 to implement:

[0163] Obtain a memory access request, where the memory access request includes an address to be accessed and an access key;

[0164] Determine the memory area and standard key corresponding to the address to be accessed;

[0165] When the access key matches the standard key, the memory protection unit is used to adjust the memory attribute of the memory area to an access-permitting state.

[0166] Furthermore, the memory access request is sent by a first virtual user, and the access allowed state includes: a state in which the first virtual user is allowed to perform a corresponding data processing operation on the memory area.

[0167] The structure of the microprocessor may further include a first communication interface 13 for the electronic device to communicate with other devices or a communication network.

[0168] Furthermore, the memory attribute includes at least one of the following: a read-write attribute, an address execution attribute, and a cache attribute.

[0169] Furthermore, before obtaining a memory access request, the first processor 11 is also used to: obtain a memory protection request sent by a second virtual user, the memory protection request including address information to be protected; allocate a corresponding memory area to the address information according to the memory protection request; use a memory protection unit to adjust the memory attribute of the memory area to an access-prohibited state; generate key information corresponding to the address information, and send the key information to the second virtual user.

[0170] Furthermore, the access key of the first virtual user is determined according to the key information shared by the second virtual user with the first virtual user.

[0171] Furthermore, the address information to be protected includes one of the following: address information of a process stack and address information of a non-process stack.

[0172] Further, when the first processor 11 generates key information corresponding to the address information, the first processor 11 is used to: generate random key information corresponding to the address information using a random number generator.

[0173] Further, when the first processor 11 obtains a memory access request, the first processor 11 is used to: obtain a memory access request sent by the first virtual user through the memory access channel.

[0174] Furthermore, before obtaining the memory access request sent by the first virtual user through the memory access channel, the first processor 11 is further used to: allocate a corresponding memory access channel to the address information according to the memory protection request; and send the memory access channel to the second virtual user.

[0175] Furthermore, the memory access channel of the first virtual user is a memory access channel shared by the second virtual user to the first virtual user.

[0176] Furthermore, after generating the key information corresponding to the address information, the first processor 11 is further configured to: store the key information in a preset area.

[0177] Furthermore, the preset area includes an area in the memory area that is located before the address information.

[0178] Furthermore, the preset area is adjacent to the memory area.

[0179] Furthermore, the first processor 11 is further configured to: identify an illegal access user to the memory area; and generate illegal access information corresponding to the illegal access user.

[0180] Further, when the first processor 11 identifies an illegal access user to the memory area, the first processor 11 is used to: when the access key does not match the standard key, determine that the first virtual user is an illegal access user.

[0181] Furthermore, when the first processor 11 identifies an illegal access user to the memory area, the first processor 11 is used to: use the memory protection unit to identify the access channel through which the first virtual user sends a memory access request; when the access channel does not match the preset memory access channel, determine that the first virtual user is an illegal access user.

[0182] Furthermore, the memory protection request includes a first request and a second request, the first request includes a first access address, the second request includes a second access address, and there is an overlapping address between the first access address and the second access address; when the first processor 11 allocates a corresponding memory area and a memory attribute corresponding to the memory area to the address information according to the memory protection request, the first processor 11 is also used to: allocate a corresponding first memory area and a first memory attribute corresponding to the first memory area to the first access address according to the first request; allocate a corresponding second memory area and a second memory attribute corresponding to the second memory area to the second access address according to the second request; obtain a first attribute priority of the first memory area and a second attribute priority of the second memory area; and determine the overlapping memory attributes of the overlapping addresses according to the first attribute priority and the second attribute priority.

[0183] Furthermore, when the first processor 11 determines the overlapping memory attribute of the overlapping address according to the first attribute priority and the second attribute priority, the first processor 11 is also used to: when the first attribute priority is higher than the second attribute priority, determine the overlapping memory attribute of the overlapping address as the first memory attribute; or, when the first attribute priority is lower than the second attribute priority, determine the overlapping memory attribute of the overlapping address as the second memory attribute.

[0184] Furthermore, the memory protection request includes a first request and a second request, the first request includes a first access address and an identity of a first virtual user, and the second request includes a second access address and an identity of the second virtual user; when the first processor 11 generates key information corresponding to the address information, the first processor 11 is also used to: determine a first access priority corresponding to the first access address according to the identity of the first virtual user, and determine a second access priority corresponding to the second access address according to the identity of the second virtual user; generate first key information corresponding to the first access address, and the first key information satisfies the first access priority; generate second key information corresponding to the second access address, and the second key information satisfies the second access priority.

[0185] Fig.16The microprocessor shown can execute Figure 3-Figure 9 , Figure 12-Figure 15 For the method of the embodiment shown in the figure, the part not described in detail in this embodiment can be referred to Figure 3-Figure 9 , Figure 12-Figure 15 The implementation process and technical effects of this technical solution refer to Figure 3-Figure 9 , Figure 12-Figure 15 The description in the illustrated embodiment will not be repeated here.

[0186] In addition, an embodiment of the present invention provides a computer storage medium for storing computer software instructions used by electronic devices, which includes instructions for executing the above Figure 3-Figure 9 , Figure 12-Figure 15 The program involved in the memory access method in the method embodiment shown.

[0187] Fig.17 A schematic diagram of the structure of a client provided by an embodiment of the present invention; Fig.17 As shown, this embodiment provides a client, which is used to execute the above Fig.10 Specifically, the client may include:

[0188] A second memory 22, for storing computer programs;

[0189] The second processor 21 is configured to run the computer program stored in the second memory 22 to implement:

[0190] Sending a memory protection request to the microprocessor, wherein the memory protection request includes address information to be protected;

[0191] The key information and the memory access channel sent by the microprocessor according to the memory protection request are received, and the key information corresponds to the address information.

[0192] The structure of the client may further include a second communication interface 23 for the electronic device to communicate with other devices or a communication network.

[0193] Furthermore, the second processor 21 is further configured to share the key information and the address information with other clients, so that the other clients can perform corresponding data access operations on the memory area corresponding to the address information.

[0194] Furthermore, the second processor 21 is also used to: send a memory access request to the microprocessor based on the memory access channel, the memory access request including the address to be accessed and the access key, so that the microprocessor adjusts the memory attribute of the memory area corresponding to the address to be accessed to an access-allowed state according to the access key; and execute data processing operations corresponding to the memory access request for the memory area.

[0195] Fig.17 The client shown can execute Figure 10-15 For the method of the embodiment shown in the figure, the part not described in detail in this embodiment can be referred to Figure 10-15 The implementation process and technical effects of this technical solution refer to Figure 10-15 The description in the illustrated embodiment will not be repeated here.

[0196] In addition, an embodiment of the present invention provides a computer storage medium for storing computer software instructions used by electronic devices, which includes instructions for executing the above Figure 10-15 The program involved in the memory access method in the method embodiment shown.

[0197] The technical solutions and technical features in the above embodiments can be used separately or in combination when they conflict with this invention. As long as they do not exceed the cognitive scope of those skilled in the art, they are equivalent embodiments within the protection scope of this application.

[0198] In the several embodiments provided by the present invention, it should be understood that the disclosed related remote control devices and methods can be implemented in other ways. For example, the remote control device embodiments described above are only schematic, for example, the division of the modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the remote control device or unit can be electrical, mechanical or other forms.

[0199] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0200] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0201] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including several instructions for a computer processor to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program code.

[0202] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

[0203] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A memory access method, characterized in that: include: Obtaining a memory access request, wherein the memory access request includes an address to be accessed and an access key; Determining a memory area and a standard key corresponding to the address to be accessed; When the access key matches the standard key, adjusting the memory attribute of the memory area to an access-allowed state using a memory protection unit; The memory access request is sent by the first virtual user, and the access permission status includes: A state in which the first virtual user is allowed to perform corresponding data processing operations on the memory area, and a state in which other virtual users associated with the first virtual user identity are allowed to access the memory area and perform corresponding data processing operations; wherein the access key of the first virtual user is determined based on key information shared by a second virtual user to the first virtual user, and the second virtual user is a virtual user who requests protection for the memory area.

2. The method according to claim 1, characterized in that Before obtaining the memory access request, the method further includes: Acquire a memory protection request sent by the second virtual user, wherein the memory protection request includes address information to be protected; Allocate a corresponding memory area for the address information according to the memory protection request; Using the memory protection unit to adjust the memory attribute of the memory area to a prohibited access state; Generate key information corresponding to the address information, and send the key information to the second virtual user.

3. The method according to claim 2, characterized in that The address information to be protected includes one of the following: address information of a process stack and address information of a non-process stack.

4. The method according to claim 2, characterized in that: The generating key information corresponding to the address information includes: A random number generator is used to generate random key information corresponding to the address information.

5. The method according to claim 2, characterized in that: The obtaining of the memory access request comprises: A memory access request sent by the first virtual user through the memory access channel is obtained.

6. The method according to claim 5, characterized in that Before obtaining the memory access request sent by the first virtual user through the memory access channel, the method further includes: Allocate a corresponding memory access channel for the address information according to the memory protection request; The memory access channel is sent to the second virtual user.

7. The method according to claim 6, characterized in that The memory access channel of the first virtual user is a memory access channel shared by the second virtual user to the first virtual user.

8. The method according to any one of claims 2 to 7, characterized in that: After generating key information corresponding to the address information, the method further includes: The key information is stored in a preset area.

9. The method according to claim 8, characterized in that The preset area includes an area in the memory area that is located before the address information.

10. The method according to claim 8, characterized in that The preset area is adjacent to the memory area.

11. The method according to any one of claims 1 to 7, characterized in that: The method further comprises: Identifying illegal access users to the memory area; The illegal access information corresponding to the illegal access user is generated.

12. The method according to claim 11, characterized in that The identifying of the illegal access user to the memory area includes: When the access key does not match the standard key, it is determined that the first virtual user is an illegal access user.

13. The method according to claim 11, characterized in that The identifying of the illegal access user to the memory area includes: Using the memory protection unit to identify the access channel through which the first virtual user sends a memory access request; When the access channel does not match the preset memory access channel, it is determined that the first virtual user is an illegal access user.

14. The method according to any one of claims 2 to 7, characterized in that: The memory protection request includes a first request and a second request, the first request includes a first access address, the second request includes a second access address, and there is an overlapping address between the first access address and the second access address; The allocating a corresponding memory area and a memory attribute corresponding to the memory area to the address information according to the memory protection request includes: Allocate a corresponding first memory area and a first memory attribute corresponding to the first memory area to the first access address according to the first request; Allocate a corresponding second memory area and a second memory attribute corresponding to the second memory area to the second access address according to the second request; Obtaining a first attribute priority of the first memory area and a second attribute priority of the second memory area; The overlapping memory attribute of the overlapping address is determined according to the first attribute priority and the second attribute priority.

15. The method according to claim 14, characterized in that Determining the overlapping memory attribute of the overlapping address according to the first attribute priority and the second attribute priority includes: When the first attribute priority is higher than the second attribute priority, determining the overlapping memory attribute of the overlapping address as the first memory attribute; or, When the first attribute priority is lower than the second attribute priority, the overlapping memory attribute of the overlapping address is determined as the second memory attribute.

16. The method according to any one of claims 2 to 7, characterized in that: The memory protection request includes a first request and a second request, the first request includes a first access address and an identity identifier of the first virtual user, and the second request includes a second access address and an identity identifier of the second virtual user; Generating key information corresponding to the address information, including: Determine a first access priority corresponding to the first access address according to the identity identifier of the first virtual user, and determine a second access priority corresponding to the second access address according to the identity identifier of the second virtual user; generating first key information corresponding to the first access address, wherein the first key information satisfies the first access priority; Second key information corresponding to the second access address is generated, and the second key information satisfies the second access priority.

17. A memory access method, characterized in that: include: Sending a memory protection request to the microprocessor, wherein the memory protection request includes address information to be protected; receiving key information and a memory access channel sent by the microprocessor according to the memory protection request, wherein the key information corresponds to the address information; Sending a memory access request to the microprocessor based on the memory access channel, wherein the memory access request includes an address to be accessed and an access key, so that the microprocessor adjusts the memory attribute of the memory area corresponding to the address to be accessed to an access-allowed state according to the access key; executing a data processing operation corresponding to the memory access request for the memory area; The access permission state further includes: a state in which other associated clients are allowed to access the memory area and perform corresponding data processing operations; The method further comprises: The key information and the address information are shared with other clients, so that the other clients can perform corresponding data access operations on the memory area corresponding to the address information.

18. A microprocessor, characterized in that: include: Memory for storing computer programs; A processor, configured to run the computer program stored in the memory to implement: Obtaining a memory access request, wherein the memory access request includes an address to be accessed and an access key; Determining a memory area and a standard key corresponding to the address to be accessed; When the access key matches the standard key, adjusting the memory attribute of the memory area to an access-allowed state using a memory protection unit; The memory access request is sent by the first virtual user, and the access permission status includes: A state in which the first virtual user is allowed to perform corresponding data processing operations on the memory area, and a state in which other virtual users associated with the first virtual user identity are allowed to access the memory area and perform corresponding data processing operations; wherein the access key of the first virtual user is determined based on key information shared by a second virtual user to the first virtual user, and the second virtual user is a virtual user who requests protection for the memory area.

19. The microprocessor according to claim 18, characterized in that: Before obtaining the memory access request, the processor is further configured to: Acquire a memory protection request sent by the second virtual user, wherein the memory protection request includes address information to be protected; Allocate a corresponding memory area for the address information according to the memory protection request; Using the memory protection unit to adjust the memory attribute of the memory area to a prohibited access state; Generate key information corresponding to the address information, and send the key information to the second virtual user.

20. The microprocessor according to claim 19, characterized in that The address information to be protected includes one of the following: address information of a process stack and address information of a non-process stack.

21. The microprocessor according to claim 19, characterized in that When the processor generates key information corresponding to the address information, the processor is configured to: A random number generator is used to generate random key information corresponding to the address information.

22. The microprocessor according to claim 19, characterized in that When the processor obtains a memory access request, the processor is configured to: A memory access request sent by the first virtual user through the memory access channel is obtained.

23. The microprocessor according to claim 22, characterized in that: Before obtaining the memory access request sent by the first virtual user through the memory access channel, the processor is further configured to: Allocate a corresponding memory access channel for the address information according to the memory protection request; The memory access channel is sent to the second virtual user.

24. The microprocessor according to claim 23, characterized in that The memory access channel of the first virtual user is a memory access channel shared by the second virtual user to the first virtual user.

25. The microprocessor according to any one of claims 19 to 24, characterized in that: After generating the key information corresponding to the address information, the processor is further configured to: The key information is stored in a preset area.

26. The microprocessor according to claim 25, characterized in that The preset area includes an area in the memory area that is located before the address information.

27. The microprocessor according to claim 25, characterized in that The preset area is adjacent to the memory area.

28. The microprocessor according to any one of claims 18 to 24, characterized in that: The processor is further configured to: Identifying illegal access users to the memory area; The illegal access information corresponding to the illegal access user is generated.

29. The microprocessor according to claim 28, characterized in that When the processor identifies an illegal access user to the memory area, the processor is configured to: When the access key does not match the standard key, it is determined that the first virtual user is an illegal access user.

30. The microprocessor according to claim 28, characterized in that When the processor identifies an illegal access user to the memory area, the processor is configured to: Using the memory protection unit to identify the access channel through which the first virtual user sends a memory access request; When the access channel does not match the preset memory access channel, it is determined that the first virtual user is an illegal access user.

31. The microprocessor according to any one of claims 19 to 24, characterized in that: The memory protection request includes a first request and a second request, the first request includes a first access address, the second request includes a second access address, and there is an overlapping address between the first access address and the second access address; when the processor allocates a corresponding memory area and a memory attribute corresponding to the memory area to the address information according to the memory protection request, the processor is further used to: Allocate a corresponding first memory area and a first memory attribute corresponding to the first memory area to the first access address according to the first request; Allocate a corresponding second memory area and a second memory attribute corresponding to the second memory area to the second access address according to the second request; Obtaining a first attribute priority of the first memory area and a second attribute priority of the second memory area; The overlapping memory attribute of the overlapping address is determined according to the first attribute priority and the second attribute priority.

32. The microprocessor according to claim 31, characterized in that When the processor determines the overlapping memory attribute of the overlapping address according to the first attribute priority and the second attribute priority, the processor is further configured to: When the first attribute priority is higher than the second attribute priority, determining the overlapping memory attribute of the overlapping address as the first memory attribute; or, When the first attribute priority is lower than the second attribute priority, the overlapping memory attribute of the overlapping address is determined as the second memory attribute.

33. The microprocessor according to any one of claims 19 to 24, characterized in that: The memory protection request includes a first request and a second request, the first request includes a first access address and an identity of the first virtual user, and the second request includes a second access address and an identity of the second virtual user; when the processor generates key information corresponding to the address information, the processor is further used to: Determine a first access priority corresponding to the first access address according to the identity identifier of the first virtual user, and determine a second access priority corresponding to the second access address according to the identity identifier of the second virtual user; generating first key information corresponding to the first access address, wherein the first key information satisfies the first access priority; Second key information corresponding to the second access address is generated, and the second key information satisfies the second access priority.

34. A client, characterized in that: include: Memory for storing computer programs; A processor, configured to run the computer program stored in the memory to implement: Sending a memory protection request to the microprocessor, wherein the memory protection request includes address information to be protected; receiving key information and a memory access channel sent by the microprocessor according to the memory protection request, wherein the key information corresponds to the address information; The processor is further configured to: Sending a memory access request to the microprocessor based on the memory access channel, wherein the memory access request includes an address to be accessed and an access key, so that the microprocessor adjusts the memory attribute of the memory area corresponding to the address to be accessed to an access-allowed state according to the access key; executing a data processing operation corresponding to the memory access request for the memory area; The access permission state further includes: a state in which other associated clients are allowed to access the memory area and perform corresponding data processing operations; The processor is further configured to: The key information and the address information are shared with other clients, so that the other clients can perform corresponding data access operations on the memory area corresponding to the address information.

35. A computer-readable storage medium, characterized in that: The storage medium is a computer-readable storage medium, in which program instructions are stored, and the program instructions are used to implement the memory access method described in any one of claims 1-16.

36. A computer-readable storage medium, characterized in that: The storage medium is a computer-readable storage medium, in which program instructions are stored, and the program instructions are used to implement the memory access method described in claim 17.

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