Laser local annealing amorphous polycrystalline composite optoelectronic integration method

Abstract

The present invention discloses a method for laser local annealing amorphous polycrystalline composite optoelectronic integration, the method steps are as follows: growing an amorphous silicon film on a silicon wafer (silicon wafer covered with a waveguide lower cladding) and depositing a protective layer, preparing a metal pattern on the protective layer, etching the protective layer of the uncovered part of the metal pattern, and injecting doping ions into the amorphous silicon film; scanning the laser beam over the metal pattern at a certain rate, the metal pattern covered area reflects most of the energy of the laser beam, and the amorphous silicon in the uncovered area absorbs a large amount of laser beam energy to form a molten state, and activates the injected doping ions, and finally annealing and crystallizing to form polycrystalline silicon, and then performing a conventional process of CMOS compatible silicon optical devices. The method of the present invention can realize the preparation of amorphous polycrystalline composite photonic devices under low temperature process, can directly integrate low-loss high-speed photonic links on electronic chips, and realize high-performance monolithic integrated optoelectronic fusion chips.

Description

Technical Field

[0001] The invention belongs to the field of optoelectronic integration, and in particular relates to a laser local annealing amorphous polycrystalline composite optoelectronic integration method. Background Art

[0002] With the development of society, the demand for data transmission and data processing in the era of big data has exploded, and chip computing power needs to be improved urgently. Through optoelectronic fusion, optical interconnection replaces electrical interconnection, which is the key to improving the bandwidth density of traditional electronic chips and further reducing their power consumption. It is of great significance to break the computing access wall, communication wall, reliability wall and energy consumption wall. The CMOS back-end compatible integrated optoelectronic devices on electronic chips will greatly save chip space, reasonably allocate process technology, and realize high-performance optoelectronic fusion systems.

[0003] However, the CMOS integrated photonic links at the back end of electronic chips are still facing major technical challenges. The current silicon-on-insulator (SOI) platform process for integrated photonic links involves high-temperature processes, such as silicon film epitaxial growth, ion injection activation, etc. The process temperature is above 900°C, far exceeding the temperature range of electronic components, and has become the main limiting factor in the path of monolithic integrated optoelectronic fusion. Although methods such as chemical vapor deposition (CVD) can grow a variety of dielectric layers at lower temperatures, many of the materials grown do not have the excellent performance of single-crystal silicon (such as silicon nitride), and there are major obstacles in achieving both low-loss and high-speed active devices.

[0004] Amorphous silicon is a material that can be grown at low temperature via CVD, and it has the advantage of low loss. However, due to the low carrier concentration and low electron mobility of amorphous silicon, its modulation and detection performance is poor, making it difficult to realize high-speed active optoelectronic integrated devices. In contrast, the crystal form of amorphous silicon, polycrystalline silicon, can have a higher electron mobility after doping, which can be obtained by CVD growth or thermal annealing of amorphous silicon as a whole. However, the loss caused by polycrystalline grain boundaries is large, and polycrystalline silicon in all-photonic links cannot achieve low-loss photonic integration; at the same time, the thermal annealing temperature of amorphous silicon crystallization is very high, and the activation process of implanted ions to ensure high carrier mobility is also carried out at extremely high temperatures. Traditional thermal annealing crystallization technology and high-temperature implanted ion activation technology are incompatible with the back-end of CMOS process. Therefore, all-amorphous or all-polycrystalline optoelectronic links cannot meet the needs, and building an amorphous-polycrystalline composite optoelectronic integrated platform has become an effective solution, but its implementation method still needs to be developed and solved. Summary of the invention

[0005] In order to realize commercial active and passive optoelectronic fusion compatible with CMOS backend, the present invention proposes a laser local annealing amorphous polycrystalline composite optoelectronic integration method. On the one hand, the method realizes highly integrated photonic chips through amorphous silicon under low temperature process, reduces the loss of on-chip optical signals, and improves the fidelity of signals; on the other hand, amorphous silicon ion doping and laser annealing are used to realize local crystallization and ion activation of amorphous silicon to ensure the performance of high-speed active devices. The method of the present invention can realize the preparation of amorphous polycrystalline composite photonic devices under low temperature process, and can directly integrate low-loss high-speed photonic links on electronic chips to realize high-performance monolithic integrated optoelectronic fusion chips.

[0006] The present invention adopts the following technical solutions:

[0007] A laser local annealing amorphous polycrystalline composite optoelectronic integration method comprises the following steps:

[0008] Step 1, growing an amorphous silicon film on a silicon wafer and covering it with a protective layer; the silicon wafer is covered with a waveguide lower cladding;

[0009] Step 2: using photolithography to define the ion implantation area (active area), etching the protective layer in the area, and then implanting ions into the amorphous silicon active area for doping;

[0010] Step 3, preparing a metal pattern (or covering an optical mask) on the protective layer, the area not covered by the metal pattern (or optical mask) is the ion implantation area, that is, the location of the local annealing of amorphous silicon;

[0011] Step 4: Provide a high-energy laser beam to project onto the metal pattern (or optical mask), and the metal pattern (or optical mask) reflects most of the laser light; the amorphous silicon film in the hollow area absorbs the energy of the laser beam to form a molten state and is annealed, thereby achieving the activation of the injected ions and the crystallization of the polysilicon in one step.

[0012] Step 5: Remove the protective layer and metal pattern by dry or wet method (or directly remove the optical mask), and carry out the conventional steps of CMOS-compatible silicon photonic devices, including photonic link patterning, upper cladding deposition, opening of vias, metal electrode plate deposition, etc., or other process flows of some special optical devices.

[0013] In the above technical solution, the order of step 2 and step 3 can be swapped, and the other steps remain unchanged; the step 2 and step 3 are respectively:

[0014] Step 2: preparing a metal pattern on the protective layer (or covering an optical mask);

[0015] Step three, etching away the protective layer of the portion not covered by the metal pattern (or optical mask), and injecting ions into the amorphous silicon film.

[0016] As a preferred solution, the laser beam is an excimer laser xenon fluoride (XeF) laser beam or an equivalent laser beam that can be absorbed by the amorphous silicon film.

[0017] As a preferred solution, the protective layer material is an equivalent protective layer such as silicon dioxide, silicon nitride, hafnium oxide, aluminum oxide, etc. The protective layer material is more preferably silicon dioxide or silicon nitride.

[0018] As a preferred solution, the ions implanted into the polysilicon film are boron, phosphorus or equivalent ions, and p-type boron doping or n-type phosphorus doping can be performed, and various concentrations and types of doping can be performed to form various junction regions.

[0019] As a preferred embodiment, the metal pattern is an aluminum metal pattern deposited during the integration process or an equivalent metal pattern that can reflect the laser used for annealing and crystallization; the optical mask is a graphic plate that is independently prepared and separated from the wafer, and can achieve selective exposure and shielding when closely aligned and bonded.

[0020] As a preferred solution, the metal pattern is prepared by a photolithography process.

[0021] The key technical principles of the present invention are:

[0022] The present invention is based on the crystallization process of low-loss amorphous silicon under the action of local laser annealing. The energy of the short-wavelength laser pulse is absorbed by the surface of the amorphous silicon, causing the active area doped amorphous silicon exposed at the hollowed-out portion of the mask to melt and crystallize during the cooling process. Since the heat generated by local laser annealing is small and the heat is concentrated in the amorphous silicon, it will not affect the temperature of the entire chip, thereby achieving a low-temperature crystallization process. The polycrystalline silicon produced after the crystallization of amorphous silicon can have a carrier mobility that is more than 3 orders of magnitude higher than that of amorphous silicon, and the activation of the injected ions is also achieved simultaneously, thereby ensuring the rapid response of the amorphous-polycrystalline composite device.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1) This method can achieve CMOS back-end compatible optoelectronic fusion at low temperature, and directly integrate high-performance photonic links with low loss and fast response characteristics on top of electronic devices and chips;

[0025] 2) This method can select the location and area of ​​the annealing area by designing a metal mask pattern or an optical mask according to the needs of the optoelectronic device, thereby improving the flexibility of local annealing. Most of the passive areas in the photonic link still maintain the amorphous silicon state and its low-loss characteristics, which will greatly improve the performance of the current full-link polysilicon integrated optical device.

[0026] 3) Local laser annealing can simultaneously activate the implanted ions and avoid the need to anneal the entire amorphous silicon wafer to activate the implanted ions in amorphous silicon through furnaces and rapid thermal processing (RTP), which leads to problems such as implanted ion diffusion and wafer-level crystallization of amorphous silicon.

[0027] 4) Localized laser annealing can achieve high-quality, high-carrier-concentration, and low-defect-density localized polysilicon. Combined with the synchronous activation of injected ions, photonic devices with extremely high response speeds (up to picoseconds) can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 The present invention is a flowchart of an example of the steps of the laser local annealing amorphous polycrystalline composite optoelectronic integration method;

[0029] Figure 2 It is a side cross-sectional schematic diagram of the local amorphous silicon annealing according to an example of the present invention;

[0030] Figure 3 is a schematic top view of a metal pattern according to an example of the present invention;

[0031] Description of labels:

[0032] 2-1: Silicon wafer, 2-2: Waveguide lower cladding, 2-3: Amorphous silicon film, 2-4: Doped amorphous silicon, 2-5: Protective layer, 2-6: Metal pattern, 2-7: Laser beam DETAILED DESCRIPTION

[0033] The amorphous silicon annealing method for optoelectronic integrated design proposed in the present invention covers an amorphous silicon film with a silicon oxide or silicon nitride protective layer and a metal pattern, and is applied to the amorphous silicon annealing crystallization and the activation of doped ions.

[0034] Embodiment 1:

[0035] Figure 1 The present invention is a flowchart of an embodiment of an amorphous silicon annealing method for optoelectronic integration, wherein the specific example steps include: providing a silicon wafer (step 1-1, the silicon wafer is covered with a waveguide lower cladding 2-2), covering the silicon wafer with an amorphous silicon film 2-3, and covering it with a silicon oxide or silicon nitride protective layer 2-5 (step 1-2), performing photolithography on the protective layer 2-5 to define an ion implantation area, and corroding the protective layer 2-5 in the area, injecting doping ions into the amorphous silicon film 2-3 (step 1-3) to obtain doped amorphous silicon 2-4, preparing a metal pattern 2-6 on the surface of the silicon oxide or silicon nitride protective layer 2-5 (step 1-4), then performing laser annealing to achieve doping activation and crystallization (step 1-5), and finally removing the metal pattern 2-6 and the silicon oxide or silicon nitride protective layer 2-5 (step 1-6).

[0036] From the above steps, it can be seen that the structure of the present invention is composed of a silicon wafer, an amorphous silicon film, a silicon oxide or silicon nitride protective layer and a metal pattern. Figure 2 , which is a side view schematic diagram of an example of the present invention; an amorphous silicon film 2-3 is coated on the waveguide lower cladding 2-2 on the silicon wafer 2-1, and the waveguide lower cladding 2-2 is made of silicon oxide or silicon nitride. A silicon oxide or silicon nitride protective layer 2-5 is coated on the amorphous silicon film 2-3, and a metal pattern 2-6 is prepared on the protective layer 2-5. After etching the silicon oxide or silicon nitride protective layer 2-5 at the ion implantation area, doping ions are injected into the amorphous silicon film 2-3 to form local doped amorphous silicon 2-4. When laser annealing is performed, a high-energy laser beam 2-7 is irradiated from top to bottom at the wafer, wherein the metal pattern 2-6 reflects most of the laser energy, so that the amorphous silicon film 2-3 covered by it is not directly exposed to the laser beam; while the amorphous silicon 2-4 injected with doped ions is directly irradiated by the laser, fully absorbs energy to form a molten state, and activates the doped ions. At the same time, due to the decrease in temperature after annealing, it gradually crystallizes and nucleates to form local polycrystalline silicon.

[0037] Embodiment 2:

[0038] Please refer to Figure 3 . Prepare an optical mask whose pattern is Figure 3 The metal pattern 2-6 is consistent with that of the semiconductor wafer 2-1, wherein the hollowed-out area is the doped amorphous silicon 2-4 area, i.e., the crystallized area. The passive area of ​​the amorphous silicon photonic link is shielded by an optical mask, and a high-energy laser beam 2-7 is used to scan the silicon wafer 2-1 to crystallize the exposed active area to improve carrier mobility.

[0039] The above are specific implementations of the present invention, but are by no means limitations of the present invention. Any equivalent replacement or adjustment made within the spirit of the present invention is within the protection scope of the present invention.

Claims

1. A laser local annealing amorphous polycrystalline composite optoelectronic integration method, characterized in that: Here are the steps: Step 1, growing an amorphous silicon film on a silicon wafer and covering it with a protective layer; the silicon wafer is covered with a waveguide lower cladding layer; Step 2, preparing a metal pattern on the protective layer or covering an optical mask; Step 3, etching away the protective layer of the portion not covered by the metal pattern or the optical mask, and injecting ions into the amorphous silicon film; Step 4: projecting a laser beam onto the metal pattern, the metal pattern or the optical mask reflects most of the laser light; the amorphous silicon film in the hollowed-out area of ​​the metal pattern or the optical mask absorbs the energy of the laser beam to form a molten state and is annealed, thereby achieving activation of the implanted ions and crystallization of the polysilicon in one step; Step 5, removing the protective layer by dry or wet method, and removing the metal pattern or directly removing the optical mask, and performing conventional steps of CMOS compatible silicon optical devices; The optical mask is a pattern plate that is independently prepared and separated from the silicon wafer, and can achieve selective exposure and shielding when closely aligned and bonded.

2. The laser local annealing amorphous polycrystalline composite optoelectronic integration method according to claim 1, characterized in that: The order of step 2 and step 3 is swapped, and the other steps remain unchanged; the steps 2 and 3 are respectively: Step 2: using photolithography to define the ion implantation area, etching the protective layer in the area, and then implanting ions into the amorphous silicon film for doping; Step three: prepare a metal pattern or cover an optical mask on the protective layer, and the area not covered by the metal pattern or the optical mask is the ion implantation area in step two.

3. The laser local annealing amorphous polycrystalline composite optoelectronic integration method according to claim 1 or 2, characterized in that: The laser beam is an excimer laser xenon fluoride laser beam or an equivalent laser beam that can be absorbed by an amorphous silicon film.

4. The laser local annealing amorphous polycrystalline composite optoelectronic integration method according to claim 1 or 2, characterized in that: The metal pattern is an aluminum metal pattern deposited during the integration process or an equivalent metal pattern that can reflect laser light used for annealing and crystallization.

5. The laser local annealing amorphous polycrystalline composite optoelectronic integration method according to claim 1 or 2, characterized in that: The protective layer is a silicon dioxide, silicon nitride, hafnium oxide or aluminum oxide protective layer.

6. The laser local annealing amorphous polycrystalline composite optoelectronic integration method according to claim 1 or 2, characterized in that: The ions implanted into the polysilicon film are boron, phosphorus or equivalent ions.

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