Fingerprint recognition circuit structure, device and driving method

Abstract

The present invention relates to the field of fingerprint recognition technology, and proposes a fingerprint recognition circuit structure, device and driving method. The fingerprint recognition circuit structure includes an ultrasonic transmitting and receiving element, a detection circuit and a signal output circuit; the ultrasonic transmitting and receiving element includes a transmitting electrode, a piezoelectric layer and a receiving electrode stacked in sequence, the receiving electrode is electrically connected to a sampling node, and the ultrasonic transmitting and receiving element is configured to emit an ultrasonic wave when receiving a predetermined electrical signal, and output a corresponding voltage signal according to the received ultrasonic wave; the detection circuit is electrically connected to the sampling node, and the detection circuit is configured to save the peak value of the voltage signal output by the receiving electrode at the sampling node as a sensing voltage; the signal output circuit is electrically connected to the sampling node, and the signal output circuit is configured to amplify the sensing voltage, and flow an amplified sensing current into the output node according to the amplified sensing voltage. Amplifying the sensing voltage through the signal output circuit reduces the on-resistance and reduces the power consumption.

Description

Technical Field

[0001] The present invention relates to the field of fingerprint recognition technology, and in particular to a fingerprint recognition circuit structure, a fingerprint recognition device including the fingerprint recognition circuit structure, and a driving method of the fingerprint recognition circuit structure. Background Art

[0002] Fingerprint recognition has been widely used as a convenient and secure way of authentication. Among them, fingerprint recognition devices based on piezoelectric ultrasonic principle have more development prospects in mobile devices. Piezoelectric ultrasonic fingerprint recognition uses the positive piezoelectric and inverse piezoelectric effects of piezoelectric materials to detect fingerprint images by detecting the difference in reflection intensity of ultrasonic signals at the glass-finger interface.

[0003] When implementing a large-scale fingerprint recognition device, there are hundreds or even tens of thousands of identical fingerprint detection units, i.e., pixels; the signal detection and processing circuit cannot process the output signals of all pixel circuits at the same time, so a corresponding circuit unit is generally set under each pixel, and the piezoelectric element of each pixel converts the sound pressure into an electrical signal, which enters the corresponding circuit unit to realize the collection, retention and transmission of the electrical signal. At present, the circuit unit using the TFT (Thin Film Transistor) process has the advantages of low cost and easy large-scale integration, but the TFT switching characteristics are poor: slow speed, unable to directly process signals in the megahertz frequency band; large leakage current, not conducive to signal preservation; large on-resistance, high power consumption, especially large-scale arrays consume more power.

[0004] The above information disclosed in the Background section is only for enhancement of understanding of the background of the present disclosure and therefore it may include information that does not constitute the prior art that is already known to one of ordinary skill in the art. Summary of the invention

[0005] The object of the present invention is to overcome the disadvantage of large on-resistance in the above-mentioned prior art and to provide a fingerprint recognition circuit structure with small on-resistance, a fingerprint recognition device including the fingerprint recognition circuit structure and a driving method of the fingerprint recognition circuit structure.

[0006] Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

[0007] According to one aspect of the present disclosure, a fingerprint recognition circuit structure is provided, comprising:

[0008] An ultrasonic transmitting and receiving element, comprising a transmitting electrode, a piezoelectric layer and a receiving electrode stacked in sequence, wherein the receiving electrode is electrically connected to a sampling node, and the ultrasonic transmitting and receiving element is configured to emit an ultrasonic wave when receiving a predetermined electrical signal, and output a corresponding voltage signal according to the received ultrasonic wave;

[0009] a detection circuit, electrically connected to a sampling node, wherein the detection circuit is configured to store a peak value of the voltage signal output by the receiving electrode at the sampling node as a sensing voltage;

[0010] The signal output circuit is electrically connected to the sampling node, and is configured to amplify the sensing voltage and flow an amplified sensing current into the output node according to the amplified sensing voltage.

[0011] In an exemplary embodiment of the present disclosure, the signal output circuit includes:

[0012] a boost subcircuit, electrically connected to the sampling node and the detection control terminal, configured to boost the sensing voltage of the sampling node according to a signal of the detection control terminal;

[0013] a detection subcircuit, electrically connected to the sampling node, the power supply terminal and the intermediate node, and configured to output the amplified sensing current to the intermediate node according to the boosted sensing voltage;

[0014] The first switch sub-circuit is electrically connected to the detection control terminal, the intermediate node and the output node, and is configured to control the connection and disconnection between the intermediate node and the output node in response to a signal from the detection control terminal.

[0015] In an exemplary embodiment of the present disclosure, the boost subcircuit includes a bootstrap capacitor, a first electrode of the bootstrap capacitor is electrically connected to the detection control terminal, and a second electrode of the bootstrap capacitor is electrically connected to the sampling node.

[0016] In an exemplary embodiment of the present disclosure, the boost subcircuit includes a boost transistor, a first electrode and a second electrode of the boost transistor are both electrically connected to the detection control terminal, and a control electrode of the boost transistor is electrically connected to the sampling node.

[0017] In an exemplary embodiment of the present disclosure, the detection subcircuit includes a detection transistor, a control electrode of the detection transistor is electrically connected to the sampling node, a first electrode of the detection transistor is electrically connected to the power supply terminal, and a second electrode of the detection transistor is electrically connected to the intermediate node;

[0018] The first switch subcircuit includes a first switch transistor, a control electrode of the first switch transistor is electrically connected to the detection control terminal, a first electrode of the first switch transistor is electrically connected to the intermediate node, and a second electrode of the first switch transistor is electrically connected to the output node.

[0019] In an exemplary embodiment of the present disclosure, the detection circuit includes a reset subcircuit, which is electrically connected to a bias terminal, a reset control terminal and the sampling node, and is configured to provide a bias voltage provided by the bias terminal to the sampling node in response to control of the reset control terminal.

[0020] In an exemplary embodiment of the present disclosure, the detection circuit also includes a second switch subcircuit, which is electrically connected to the first sampling node, the second sampling node and the switch control terminal, and is configured to control the on-off between the first sampling node and the second sampling node in response to a signal from the switch control terminal; the first sampling node is closer to the ultrasonic transmitting and receiving element than the second sampling node, and the reset subcircuit is electrically connected to the first sampling node.

[0021] According to one aspect of the present disclosure, a fingerprint recognition device is provided, comprising any one of the above-mentioned fingerprint recognition circuit structures, wherein the fingerprint recognition circuit structures are in plurality and arranged in an array.

[0022] According to one aspect of the present disclosure, a driving method of a fingerprint recognition circuit structure is provided, which is applied to any of the above-mentioned fingerprint recognition circuit structures. The driving method comprises: in one recognition cycle:

[0023] In the emission phase, an AC voltage signal is provided to the emission electrode, and the voltage of the sampling node is set to a fixed voltage through the detection circuit;

[0024] In the sampling phase, a fixed voltage is provided to the transmitting electrode, and the peak value of the voltage signal output by the receiving electrode is stored at the sampling node as a sensing voltage through the detection circuit;

[0025] In the reading phase, the fixed voltage provided to the emitting electrode remains unchanged, the sensing voltage is amplified by the signal output circuit, and an amplified sensing current is output to an output node according to the amplified sensing voltage.

[0026] In an exemplary embodiment of the present disclosure, applied to any one of the above-mentioned fingerprint recognition circuit structures, the driving method further comprises in one recognition cycle:

[0027] Before the sampling phase begins, a high voltage is provided to the switch control terminal of the second switch subcircuit to conduct the first sampling node and the second sampling node;

[0028] At a set time after the sampling phase is completed, a low voltage is provided to the switch control terminal of the second switch sub-circuit to disconnect the first sampling node from the second sampling node.

[0029] It can be seen from the above technical solution that the present invention has at least one of the following advantages and positive effects:

[0030] The fingerprint recognition circuit structure of the present invention transmits ultrasonic waves through ultrasonic transmitting and receiving elements and receives ultrasonic waves reflected back by fingerprints. The peak value of the voltage signal output by the receiving electrode is stored in the sampling node as the sensing voltage through the detection circuit; the sensing voltage is amplified through the signal output circuit, and the amplified sensing current flows into the output node according to the amplified sensing voltage. The sensing voltage is amplified by the signal output circuit to reduce the on-resistance and thus reduce the power consumption, and the output sensing current is amplified. There is no need to set an amplification circuit in the subsequent circuit, which reduces the process flow and reduces the cost; and there is no need to reduce the power consumption by increasing the voltage at the power supply end. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.

[0032] Figure 1 is a schematic structural diagram of an exemplary implementation of a fingerprint recognition circuit structure of the present invention;

[0033] Figure 2 yes Figure 1 A schematic diagram of the structure of a fingerprint recognition device formed by a fingerprint recognition circuit structure;

[0034] Figure 3 yes Figure 2 A schematic diagram of the structure of the insulating layer and the receiving electrode;

[0035] Figure 4 is a structural schematic diagram of another exemplary embodiment of the fingerprint recognition circuit structure of the present invention;

[0036] Figure 5 is a structural schematic diagram of another exemplary implementation of the fingerprint recognition circuit structure of the present invention;

[0037] Figure 6 is a structural schematic diagram of another exemplary implementation of the fingerprint recognition circuit structure of the present invention;

[0038] Figure 7 is a schematic flow chart of an exemplary embodiment of a driving method of a fingerprint recognition circuit structure of the present invention;

[0039] Figure 8 yes Figure 1The timing diagram of the fingerprint recognition circuit structure driving process;

[0040] Fig. 9 yes Figure 1 The equivalent circuit diagram of the fingerprint recognition circuit structure in the transmitting stage;

[0041] Fig.10 yes Figure 1 The equivalent circuit diagram of the fingerprint recognition circuit structure in the holding stage;

[0042] Fig.11 yes Figure 5 Timing diagram of the fingerprint recognition circuit structure driving process.

[0043] The main components in the figure are described as follows:

[0044] 1. Ultrasonic transmitting and receiving elements; Tx, transmitting electrode; P, piezoelectric layer; Rx, receiving electrode;

[0045] 2. Detection circuit; M1, reset subcircuit (reset transistor); M4, second switch subcircuit (second switch transistor);

[0046] 3. Signal output circuit; 31. Boost subcircuit; C1. Bootstrap capacitor; M5. Boost transistor; 32. Detection subcircuit; M2. Detection transistor; 33. First switch subcircuit; M3. First switch transistor;

[0047] 4. Protective layer; 5. Array substrate; 6. Other functional layers; 7. Insulating layer;

[0048] N1, sampling node; N11, first sampling node; N12, second sampling node; N2, intermediate node; N3, output node;

[0049] V1, bias terminal; V2, reset control terminal; V3, detection control terminal; V4, switch control terminal; Vdd, power supply terminal; Vtx, transmitting terminal. DETAILED DESCRIPTION

[0050] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present invention will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted.

[0051] A human fingerprint includes a raised fingerprint ridge F1 and a concave fingerprint valley F2. When the finger is located above the fingerprint recognition device, the distance between the fingerprint ridge F1 and the surface of the fingerprint recognition device is smaller than the distance between the fingerprint valley F2 and the surface of the fingerprint recognition device.

[0052] Therefore, the propagation path of the ultrasonic wave reaching the fingerprint ridge F1 and then reflected by the fingerprint ridge F1 back to the fingerprint recognition device is shorter than the propagation path of the ultrasonic wave reaching the fingerprint valley F2 and then reflected by the fingerprint valley F2 back to the fingerprint recognition device. Therefore, the time when the echo reflected by the fingerprint ridge F1 reaches the fingerprint recognition device is different from the time when the echo reflected by the fingerprint valley F2 reaches the fingerprint recognition device, which also leads to the difference in the amount of echo reflected by the fingerprint ridge F1 and the amount of echo reflected by the fingerprint valley F2. By analyzing the difference in signal amount, the fingerprint morphology of the finger covering the fingerprint recognition device can be restored.

[0053] This exemplary embodiment first provides a fingerprint recognition circuit structure. Figure 1 , Figure 4 and Figure 5 The structure diagram of an example implementation of a fingerprint recognition circuit structure is shown; the fingerprint recognition circuit structure may include an ultrasonic transmitting and receiving element 1, a detection circuit 2 and a signal output circuit 3; the ultrasonic transmitting and receiving element 1 may include a transmitting electrode Tx, a piezoelectric layer P and a receiving electrode Rx which are stacked in sequence, the receiving electrode Rx is electrically connected to the sampling node N1, the ultrasonic transmitting and receiving element 1 is configured to emit an ultrasonic wave when receiving a predetermined electrical signal, and output a corresponding voltage signal according to the received ultrasonic wave; the detection circuit 2 is electrically connected to the sampling node N1, and the detection circuit 2 is configured to store the peak value of the voltage signal output by the receiving electrode Rx at the sampling node N1 as a sensing voltage; the signal output circuit 3 is electrically connected to the sampling node N1, and the signal output circuit 3 is configured to amplify the sensing voltage, and flow an amplified sensing current into the output node N3 according to the amplified sensing voltage.

[0054] The fingerprint recognition circuit structure of the present invention amplifies the sensing voltage through the signal output circuit 3 to reduce the on-resistance and thus reduce the power consumption, and the output sensing current is amplified. There is no need to set an amplification circuit in the subsequent circuit, thereby reducing the process flow and reducing the cost; and there is no need to reduce the power consumption by increasing the voltage of the power supply terminal Vdd.

[0055] In this example implementation, refer to Figure 2 shown Figure 1 The fingerprint recognition device is formed by the fingerprint recognition circuit structure in FIG. 1 . The fingerprint recognition device may include a protective layer 4, an ultrasonic transmitting and receiving element 1, an array substrate 5 and other functional layers 6.

[0056] The ultrasonic transmitting and receiving element 1 includes a transmitting electrode Tx, a piezoelectric layer P and a receiving electrode Rx which are stacked in sequence. The transmitting electrode Tx is arranged on one side of the protective layer 4, and the protective layer 4 provides protection for the transmitting electrode Tx. The material of the transmitting electrode Tx may be silver. Of course, the material of the transmitting electrode Tx may also be a conductive material such as gold or copper. The transmitting electrodes Tx of multiple ultrasonic transmitting and receiving elements 1 are arranged as one body. The piezoelectric layer P is arranged on the side of the transmitting electrode Tx away from the protective layer 4. The material of the piezoelectric layer P is, for example, polyvinylidene fluoride (PVDF), aluminum nitride (AlN), lead zirconate titanate piezoelectric ceramics (PZT), zinc oxide (ZnO), etc. The piezoelectric layers P of multiple ultrasonic transmitting and receiving elements 1 are arranged as one body. An insulating layer 7 is arranged on the side of the piezoelectric layer P away from the protective layer 4, see Figure 3 As shown, through holes with M rows and N columns can be provided on the insulating layer 7, and the receiving electrodes Rx are provided in the through holes and contact the piezoelectric layer P, so that the receiving electrodes Rx of each ultrasonic transmitting and receiving element 1 are arranged at intervals, and a plurality of receiving electrodes Rx are arranged in an array, and adjacent receiving electrodes Rx are insulated and isolated by the insulating layer 7. Each receiving electrode Rx forms a pixel of fingerprint recognition. The material of the receiving electrode Rx can be indium tin oxide (ITO), and of course, the material of the transmitting electrode Tx can also be conductive materials such as gold, copper, and indium zinc oxide (IZO).

[0057] The detection circuit 2 and the signal output circuit 3 are arranged on the array substrate 5. The array substrate 5 is arranged on a side of the receiving electrode Rx away from the protection layer 4, so that the receiving electrode Rx is electrically connected to the sampling node N1.

[0058] Please continue to refer to Figure 1 As shown, the receiving electrode Rx of the ultrasonic transmitting and receiving element 1 is electrically connected to the sampling node N1, and the transmitting electrode Tx is electrically connected to the transmitting terminal Vtx. The detection circuit 2 may include a reset subcircuit M1, which is electrically connected to the bias terminal V1, the reset control terminal V2 and the sampling node N1, and is configured to provide the bias voltage provided by the bias terminal V1 to the sampling node N1 in response to the control of the reset control terminal V2. Specifically, the reset subcircuit M1 is a reset transistor M1, the control electrode of the reset transistor M1 is electrically connected to the reset control terminal V2, the first electrode of the reset transistor M1 is electrically connected to the bias terminal V1, and the second electrode of the reset transistor M1 is electrically connected to the sampling node N1.

[0059] The signal output circuit 3 may include a boost subcircuit 31, a detection subcircuit 32 and a first switch subcircuit 33; the boost subcircuit 31 is electrically connected to the sampling node N1 and the detection control terminal V3, and is configured to boost the sensing voltage of the sampling node N1 according to the signal of the detection control terminal V3; the detection subcircuit 32 is electrically connected to the sampling node N1, the power supply terminal Vdd and the intermediate node N2, and is configured to output an amplified sensing current to the intermediate node N2 according to the boosted sensing voltage; the first switch subcircuit 33 is electrically connected to the detection control terminal V3, the intermediate node N2 and the output node N3, and is configured to control the on-off between the intermediate node N2 and the output node N3 in response to the signal of the detection control terminal V3.

[0060] Specifically, the boost subcircuit 31 may include a bootstrap capacitor C1, a first electrode (negative end) of the bootstrap capacitor C1 is electrically connected to the detection control terminal V3, and a second electrode (positive end) of the bootstrap capacitor C1 is electrically connected to the sampling node N1. The detection subcircuit 32 may include a detection transistor M2, a control electrode of the detection transistor M2 is electrically connected to the sampling node N1, a first electrode of the detection transistor M2 is electrically connected to the power supply terminal Vdd, and a second electrode of the detection transistor M2 is electrically connected to the intermediate node N2. The first switch subcircuit 33 may include a first switch transistor M3, a control electrode of the first switch transistor M3 is electrically connected to the detection control terminal V3, a first electrode of the first switch transistor M3 is electrically connected to the intermediate node N2, and a second electrode of the first switch transistor M3 is electrically connected to the output node N3.

[0061] The bootstrap capacitor C1 uses the characteristic that the voltage at both ends of the capacitor cannot change suddenly. When a certain voltage is maintained at both ends of the capacitor, the voltage at the negative end of the capacitor is increased, and the voltage at the positive end is still maintained at the original voltage difference at the negative end, which is equivalent to the voltage at the positive end being raised by the negative end. It is actually a positive feedback capacitor used to raise the power supply voltage. Therefore, the sensed voltage of the sampling node N1 can be raised through the bootstrap capacitor C1, that is, the sensed voltage can be amplified through the bootstrap capacitor C1.

[0062] Reference Figure 4 FIG. 1 is a schematic diagram showing another exemplary embodiment of the fingerprint recognition circuit structure of the present invention. Figure 1 The main difference of the example implementation in is that the boost subcircuit 31 includes a boost transistor M5, and the first electrode and the second stage (source and drain) of the boost transistor M5 are both electrically connected to the detection control terminal V3, that is, the first electrode and the second stage (source and drain) of the boost transistor M5 are connected to form a MOS capacitor, which can play the same role as the bootstrap capacitor C1, that is, it can raise the sensing voltage of the sampling node N1, that is, it can amplify the sensing voltage; the control electrode of the boost transistor M5 is electrically connected to the sampling node N1.

[0063] Reference Figure 5FIG. 1 is a schematic diagram showing another exemplary embodiment of the fingerprint recognition circuit structure of the present invention; Figure 1 The main difference of the example implementation in is that the detection circuit 2 of the fingerprint recognition circuit structure can also include a second switch subcircuit M4, the second switch subcircuit M4 is electrically connected to the first sampling node N11, the second sampling node N12 and the switch control terminal V4, and is configured to control the on-off between the first sampling node N11 and the second sampling node N12 in response to the signal of the switch control terminal V4.

[0064] Specifically, the second switch subcircuit M4 includes a second switch transistor M4, a control electrode of the second switch transistor M4 is electrically connected to the switch control terminal V4, a first electrode of the second switch transistor M4 is electrically connected to the first sampling node N11, and a second electrode of the second switch transistor M4 is electrically connected to the second sampling node N12. In this case, the second electrode of the reset subcircuit M1 is electrically connected to the first sampling node N11, and the first sampling node N11 is closer to the ultrasonic transmitting and receiving element than the second sampling node N12. The second switch transistor M4 can prevent the bootstrap capacitor C1 from leaking charge through the reset transistor M1, thereby reducing signal attenuation.

[0065] Of course, refer to Figure 6 As shown, it can also be Figure 4 In the exemplary embodiment shown, a second switch subcircuit M4 is added, that is, Figure 6 In the exemplary embodiment shown, the boost subcircuit 31 includes a boost transistor M5, and the detection circuit 2 may further include a second switch subcircuit M4; the position and connection relationship of the second switch subcircuit M4 are similar to Figure 5 The same, therefore, will not be repeated here.

[0066] Furthermore, the present invention also discloses a fingerprint recognition device, which may include any one of the above-mentioned fingerprint recognition circuit structures. The specific structure of the fingerprint recognition circuit structure has been described in detail above, so it will not be repeated here.

[0067] The fingerprint recognition device includes a plurality of fingerprint recognition circuit structures, and the plurality of fingerprint recognition circuit structures can be arranged in an array.

[0068] The fingerprint recognition device is specifically, for example, a display panel with a fingerprint recognition function, an electronic product with a fingerprint recognition function (such as a mobile phone, a tablet computer), a fingerprint lock with a fingerprint recognition function, or any other product or component with a fingerprint recognition function.

[0069] It should be noted that, in addition to the fingerprint recognition circuit structure, the fingerprint recognition device also includes other necessary components and components, such as a display panel, a casing, a circuit board, a power cord, etc. Taking a mobile phone as an example, these components and components may be supplemented accordingly by those skilled in the art according to the specific usage requirements of the fingerprint recognition device, which will not be elaborated here.

[0070] Furthermore, the present invention also discloses a driving method of a fingerprint recognition circuit structure, which is applied to any of the above-mentioned fingerprint recognition circuit structures, referring to Figure 7 The driving method of the fingerprint recognition circuit structure shown in the figure is a schematic block diagram of the driving method process. The driving method may include the following steps in one recognition cycle:

[0071] Step S10 , in the transmission phase, providing an AC voltage signal to the transmission electrode Tx, and setting the voltage of the sampling node N1 to a fixed voltage through the detection circuit 2 .

[0072] Step S20 , in the sampling phase, a fixed voltage is provided to the transmitting electrode Tx, and the peak value of the voltage signal output by the receiving electrode Rx is stored at the sampling node N1 as a sensing voltage through the detection circuit 2 .

[0073] Step S30, in the reading phase, the fixed voltage provided to the transmitting electrode Tx remains unchanged, the sensing voltage is amplified by the signal output circuit 3, and an amplified sensing current is output to the output node N3 according to the amplified sensing voltage.

[0074] Combine the following Figure 1 and Figure 8 A detailed driving process in one embodiment is described. Figure 1 The transistors in are all N-type transistors, and the effective voltage of the corresponding control electrode is a high-level voltage.

[0075] In the transmitting stage, i.e., stage t0 to t1, an AC voltage signal is provided to the transmitting terminal Vtx of the transmitting electrode Tx. The AC voltage signal may be a high-frequency high-voltage signal. The AC voltage signal may be a 5 to 30 MHz sine wave or square wave. The number of pulses is controllable, and is 1 to 10. An effective voltage is provided to the reset control terminal V2 to turn on the reset transistor M1, and a fixed bias voltage close to the ground potential or the ground potential is provided to the bias terminal V1 to form a Fig. 9 As shown in the equivalent circuit diagram. Thus, the voltage of the receiving electrode Rx is fixed to a bias voltage close to the ground potential or the ground potential, and the voltage difference between the transmitting electrode Tx and the receiving electrode Rx changes in an alternating current, inducing the piezoelectric layer P to vibrate and produce sound. Since the transmission is finished, there is still a certain oscillation in the circuit, as well as the ultrasonic interference signal reflected back from the piezoelectric layer P earlier, so the effective voltage of the reset control terminal V2 is maintained for a certain period of time to eliminate the above interference.

[0076] In the receiving stage, i.e., the section from t1 to t2, a fixed voltage is provided to the transmitting end Vtx of the transmitting electrode Tx, and the ultrasonic wave is reflected by the fingerprint, and the ultrasonic wave reflected back on the receiving electrode Rx generates an AC voltage signal Vecho; a high level Vbase is provided to the bias end V1, and the process of the gate potential of the detection transistor M2 rising is the process of receiving the echo (ultrasonic wave reflected back by the fingerprint) signal, and the gate DC potential of the detection transistor M2 Vin = Vbase + Vecho; at t2, the voltage of the reset control end V2 is reduced to close to the ground potential or the ground potential, so that the reset transistor M1 is turned off, and the sampling is ended. After the reset transistor M1 is completely turned off for about 10μs, the voltage of the bias end V1 is reduced to the ground potential. When collecting the echo signal, only half of the wavelength is taken and maintained, and the sampling time is short and the power consumption is low. The voltage of the sampling node N1 will remain the peak voltage during the fluctuation of the fingerprint film signal.

[0077] During the period from t2 to t3, which is the signal blocking period, waiting reading period or holding period, the circuit no longer samples the received signal. The equivalent circuit diagram at this time is as follows: Fig.10 As shown in FIG. 1 , Cp is the node parasitic capacitance. The main function of this stage is to stabilize the voltage of the sampling node N1.

[0078] In the reading phase, i.e., phase t3-t4, the fixed voltage provided to the transmitting end Vtx of the transmitting electrode Tx remains unchanged. After the voltage of the sampling node N1 reaches stability, an effective voltage is provided to the detection control end V3. Due to the existence of the bootstrap capacitor C1, the gate voltage of the detection transistor M2 will be pulled up to reach the turn-on voltage of the detection transistor M2. At the same time, the switch transistor M3 will also be turned on, and the detection transistor M2 outputs the amplified sensing current to the output node N3. The magnitude of the sensing current is related to the gate voltage of the detection transistor M2, and the gate voltage of the detection transistor M2 is related to the ultrasonic voltage, specifically:

[0079] The drain current I of the detection transistor M2 when it is saturated is:

[0080] I=(1 / 2)UnCox(W / L)*(Vgs-Vth) 2 ,

[0081] Where: Un is the electron migration rate; Cox is the gate oxide capacitance per unit area; W / L oxide layer width-to-length ratio; Vth is the threshold voltage; all of the above are fixed values. Vgs-Vth is the overdrive voltage; Vgs = Vbase + Vecho + V3, so the drain current is only related to the gate voltage Vgs of the detection transistor M2. The gate voltage Vgs of the detection transistor M2 is increased by the bootstrap capacitor C1 or the boost transistor, thereby increasing the drain current I, so that the current flowing out of the detection transistor M2 is amplified.

[0082] Figure 4 The specific driving method of another exemplary embodiment of the fingerprint recognition circuit structure of the present invention is the same as the above, so it will not be repeated here.

[0083] Combine the following Figure 5 and Fig.11 A detailed driving process in another embodiment is described. Figure 5 The transistors in are all N-type transistors, and the effective voltage of the corresponding control electrode is a high-level voltage.

[0084] In the transmitting stage, i.e., stage t0-t1, an AC voltage signal is provided to the transmitting terminal Vtx of the transmitting electrode Tx. The AC voltage signal can be a high-frequency high-voltage signal. The AC voltage signal can be a sine wave or square wave of 5-30MHz, and the number of pulses can be controlled to be 1-10; an effective voltage is provided to the reset control terminal V2 to turn on the reset transistor M1, and a fixed bias voltage close to the ground potential or the ground potential is provided to the bias terminal V1. Thus, the voltage of the receiving electrode Rx is fixed to a bias voltage close to the ground potential or the ground potential, and the voltage difference between the transmitting electrode Tx and the receiving electrode Rx changes in an AC manner, which induces the piezoelectric layer P to vibrate and sound. Since the transmission is over, there is still a certain oscillation in the circuit, as well as the ultrasonic interference signal reflected back from the piezoelectric layer P earlier, so the effective voltage of the reset control terminal V2 is maintained for a certain period of time to eliminate interference.

[0085] Before time t1, that is, before the sampling phase starts, a high voltage is provided to the gate of the second switch transistor M4 (that is, the switch control terminal V4), so that the second switch transistor M4 is turned on, and the first sampling node N11 is connected to the second sampling node N12, so that the voltage of the first sampling node N11 is the same as the voltage of the second sampling node N12.

[0086] In the receiving stage, i.e., the period from t1 to t2, a fixed voltage is provided to the transmitting end Vtx of the transmitting electrode Tx, and the ultrasonic wave is reflected by the fingerprint, and the ultrasonic wave reflected back on the receiving electrode Rx generates an AC voltage signal Vecho; a high level Vbase is provided to the bias end V1, and the process of the gate potential of the detection transistor M2 rising is the process of receiving the echo signal, and the gate DC potential Vin of the detection transistor M2 is Vbase+Vecho; at time t2, the voltage of the reset control end V2 is reduced to close to the ground potential or the ground potential, so that the reset transistor M1 is turned off, and the sampling is ended. After the reset transistor M1 is completely turned off for about 10μs, the voltage of the bias end V1 and the gate of the second switch transistor M4 (i.e., the switch control end V4) is reduced to the ground potential, so that the second switch transistor M4 is turned off. When collecting the echo signal, only half of the wavelength is taken and maintained, and the sampling time is short and the power consumption is low. The voltage of the sampling node N1 will remain the peak voltage during the fluctuation of the fingerprint film signal.

[0087] During the period from t2 to t3, which is the signal blocking period, waiting reading period or holding period, the circuit no longer samples the received signal. The equivalent circuit diagram at this time is as follows: Fig. 9 As shown in FIG. 1 , Cp is the node parasitic capacitance. The main function of this stage is to stabilize the voltage of the sampling node N1.

[0088] During the period t2 to t4 , the second switch transistor M4 is in a closed state, preventing the bootstrap capacitor C1 from leaking charges through the reset transistor M1 , thereby reducing signal attenuation.

[0089] The specific process of the reading phase is Figure 7 The process is the same, so I will not repeat it again.

[0090] Figure 6 The specific driving method of another exemplary embodiment of the fingerprint recognition circuit structure shown is the same as the above, so it will not be repeated here.

[0091] The features, structures or characteristics described above may be combined in one or more embodiments in any suitable manner, and if possible, the features discussed in each embodiment are interchangeable. In the above description, many specific details are provided to provide a full understanding of the embodiments of the present invention. However, those skilled in the art will appreciate that the technical solution of the present invention may be practiced without one or more of the specific details, or other methods, components, materials, etc. may be adopted. In other cases, known structures, materials or operations are not shown or described in detail to avoid blurring various aspects of the present invention.

[0092] The terms "about" and "approximately" used in this specification generally mean within 20%, preferably within 10%, and more preferably within 5% of a given value or range. The numbers given here are approximate numbers, which means that in the absence of specific instructions, the meanings of "about", "approximately", "roughly" and "approximately" can still be implied.

[0093] Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of the illustration to another component, these terms are used in this specification only for convenience, such as the orientation of the examples described in the drawings. It is understood that if the device of the illustration is turned over so that it is upside down, the component described as being "upper" will become the component "lower". Other relative terms, such as "high", "low", "top", "bottom", etc., are also used to have similar meanings. When a structure is "on" other structures, it may mean that the structure is formed integrally on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0094] In this specification, the terms "a", "an", "the" and "said" are used to indicate the presence of one or more elements / components / etc.; the terms "comprising", "including" and "having" are used to express an open-ended inclusion and mean that there may be additional elements / components / etc. in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0095] It should be understood that the present invention is not limited in its application to the detailed structure and arrangement of the components proposed in this specification. The present invention can have other embodiments and can be implemented and executed in a variety of ways. The aforementioned variations and modifications fall within the scope of the present invention. It should be understood that the present invention disclosed and defined in this specification extends to all alternative combinations of two or more individual features mentioned or evident in the text and / or the drawings. All these different combinations constitute multiple alternative aspects of the present invention. The embodiments described in this specification illustrate the best mode known for implementing the present invention and will enable those skilled in the art to utilize the present invention.

Claims

1. A fingerprint recognition circuit structure, characterized in that: include: An ultrasonic transmitting and receiving element, comprising a transmitting electrode, a piezoelectric layer and a receiving electrode stacked in sequence, wherein the receiving electrode is electrically connected to a sampling node, and the ultrasonic transmitting and receiving element is configured to emit an ultrasonic wave when receiving a predetermined electrical signal, and output a corresponding voltage signal according to the received ultrasonic wave; a detection circuit, electrically connected to a sampling node, wherein the detection circuit is configured to store a peak value of the voltage signal output by the receiving electrode at the sampling node as a sensing voltage; a signal output circuit, electrically connected to the sampling node, the signal output circuit being configured to amplify the sensing voltage and flow an amplified sensing current into an output node according to the amplified sensing voltage; The signal output circuit comprises: a boost subcircuit, electrically connected to the sampling node and the detection control terminal, configured to boost the sensing voltage of the sampling node according to a signal of the detection control terminal; a detection subcircuit, electrically connected to the sampling node, the power supply terminal and the intermediate node, and configured to output the amplified sensing current to the intermediate node according to the boosted sensing voltage; The first switch sub-circuit is electrically connected to the detection control terminal, the intermediate node and the output node, and is configured to control the connection and disconnection between the intermediate node and the output node in response to a signal from the detection control terminal.

2. The fingerprint recognition circuit structure according to claim 1, characterized in that: The boost subcircuit includes a bootstrap capacitor, a first electrode of the bootstrap capacitor is electrically connected to the detection control terminal, and a second electrode of the bootstrap capacitor is electrically connected to the sampling node.

3. The fingerprint recognition circuit structure according to claim 1, characterized in that: The boost subcircuit comprises a boost transistor, a first electrode and a second electrode of the boost transistor are both electrically connected to the detection control terminal, and a control electrode of the boost transistor is electrically connected to the sampling node.

4. The fingerprint recognition circuit structure according to claim 2 or 3, characterized in that: The detection subcircuit comprises a detection transistor, a control electrode of the detection transistor is electrically connected to the sampling node, a first electrode of the detection transistor is electrically connected to the power supply terminal, and a second electrode of the detection transistor is electrically connected to the intermediate node; The first switch subcircuit includes a first switch transistor, a control electrode of the first switch transistor is electrically connected to the detection control terminal, a first electrode of the first switch transistor is electrically connected to the intermediate node, and a second electrode of the first switch transistor is electrically connected to the output node.

5. The fingerprint recognition circuit structure according to claim 1, characterized in that: The detection circuit includes a reset subcircuit, which is electrically connected to a bias terminal, a reset control terminal and the sampling node and is configured to provide a bias voltage provided by the bias terminal to the sampling node in response to control of the reset control terminal.

6. The fingerprint recognition circuit structure according to claim 5, characterized in that: The detection circuit also includes a second switch subcircuit, which is electrically connected to the first sampling node, the second sampling node and the switch control terminal, and is configured to control the on-off between the first sampling node and the second sampling node in response to a signal from the switch control terminal; the first sampling node is closer to the ultrasonic transmitting and receiving element than the second sampling node, and the reset subcircuit is electrically connected to the first sampling node.

7. A fingerprint recognition device, characterized in that: It comprises the fingerprint recognition circuit structure according to any one of claims 1 to 6, wherein the fingerprint recognition circuit structure is in multiple numbers and arranged in an array.

8. A driving method of a fingerprint recognition circuit structure, characterized in that: The fingerprint recognition circuit structure according to any one of claims 1 to 6, wherein the driving method comprises: In the emission phase, an AC voltage signal is provided to the emission electrode, and the voltage of the sampling node is set to a fixed voltage through the detection circuit; In the sampling phase, a fixed voltage is provided to the transmitting electrode, and the peak value of the voltage signal output by the receiving electrode is stored at the sampling node as a sensing voltage through the detection circuit; In the reading phase, the fixed voltage provided to the emitting electrode remains unchanged, the sensing voltage is amplified by the signal output circuit, and an amplified sensing current is output to an output node according to the amplified sensing voltage.

9. The driving method of the fingerprint recognition circuit structure according to claim 8, characterized in that: Applied to the fingerprint recognition circuit structure of claim 6, the driving method further comprises in one recognition cycle: Before the sampling phase begins, a high voltage is provided to the switch control terminal of the second switch subcircuit to conduct the first sampling node and the second sampling node; At a set time after the sampling phase is completed, a low voltage is provided to the switch control terminal of the second switch sub-circuit to disconnect the first sampling node from the second sampling node.

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