GaN high electron mobility transistor with protrusion and field plate

Abstract

Certain aspects of the present disclosure provide a high electron mobility transistor (HEMT). The HEMT generally includes a gallium nitride (GaN) layer (206); and an aluminum gallium nitride (AlGaN) layer (208), which is disposed above the GaN layer. The HEMT also includes a source electrode (210), a gate electrode (212), and a drain electrode (214), which are disposed above the AlGaN layer. The HEMT also includes (a plurality of) n-doped protrusions (240A, 240B), which are disposed above the AlGaN layer and between at least one of the following: a gate electrode and a drain electrode, or a source electrode and a gate electrode. Each of the n-doped protrusions is separated from the gate electrode, the drain electrode, and the source electrode.

Description

[0001] Priority claim

[0002] This patent application claims priority to application Ser. No. 16 / 058,388, filed Aug. 8, 2018, entitled “HIGH POWER PERFORMANCE GALLIUM NITRIDE HIGH ELECTRON MOBILITY TRANSISTOR WITH PROTRUSION AND FIELD PLATE,” which is assigned to the present assignee and is expressly incorporated herein by reference. Technical Field

[0003] Certain aspects of the present disclosure relate generally to electronic circuits, and more particularly to a gallium nitride (GaN) high electron mobility transistor (HEMT) with protrusion(s) between the gate and source / drain, such as for use in high-performance power electronic chips, radio frequency (RF) components, etc. Background Art

[0004] High electron mobility transistors (HEMTs) are important components of devices used for high power, high data rate and other similar applications. For example, HEMTs can be found in many high-performance radio frequency front-end (RFFE) devices, power electronic chips, millimeter wave (mmW) circuits, etc. HEMTs are typically field effect transistors (FETs) that use a junction between two materials with different bandgaps as the channel rather than a doped region (e.g., as is often the case with metal oxide semiconductor FETs (MOSFETs)).

[0005] Today, HEMTs are often made of gallium nitride (GaN)-based materials, for example, to support high-power and high-data-rate applications. Compared to silicon (Si) and other III-V materials, GaN typically has a higher bandgap, higher electron peak velocity, higher breakdown electric field, etc., making GaN suitable for such high-power and high-data-rate applications. Summary of the invention

[0006] Certain aspects of the present disclosure provide a high electron mobility transistor (HEMT). The HEMT generally includes a gallium nitride (GaN) layer; an aluminum gallium nitride (AlGaN) layer disposed above the GaN layer; and a source electrode, a gate electrode, and a drain electrode disposed above the AlGaN layer. The HEMT also includes one or more n-doped protrusions disposed above the AlGaN layer and disposed between at least one of the following: a gate electrode and a drain electrode, or a source electrode and a gate electrode. Each of the one or more n-doped protrusions is separated from the gate electrode, the drain electrode, and the source electrode.

[0007] Certain aspects of the present disclosure provide a method for manufacturing a high electron mobility transistor (HEMT). The method generally includes: forming a gallium nitride (GaN) layer; forming an aluminum gallium nitride (AlGaN) layer above the GaN layer; and forming a source electrode, a gate electrode, and a drain electrode above the AlGaN layer. The method also includes: forming one or more n-doped protrusions above the AlGaN layer and between at least one of the gate electrode and the drain electrode or the source electrode and the gate electrode. Each of the one or more n-doped protrusions is separated from the gate electrode, the drain electrode, and the source electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order that the manner in which the above-recited features of the present disclosure can be understood in detail, a more particular description of what has been briefly summarized above may be achieved by reference to various aspects, some of which are illustrated in the accompanying drawings. It should be noted, however, that the drawings illustrate only certain typical aspects of the present disclosure and are therefore not to be considered limiting of its scope, as the description may admit to other equally effective aspects.

[0009] Figure 1 A cross-sectional view of an example high electron mobility transistor (HEMT) is illustrated.

[0010] Figure 2 Illustrated is a cross-sectional view of an example structure of a gallium nitride (GaN) based HEMT with a protrusion according to certain aspects of the present disclosure.

[0011] Figure 3 Illustrated is a cross-sectional view of an example structure of another GaN-based HEMT with a protrusion according to certain aspects of the present disclosure.

[0012] Figure 4 Illustrated is a cross-sectional view of an example structure of a GaN-based HEMT with a protrusion and a field plate according to certain aspects of the present disclosure.

[0013] Figure 5 Illustrated is a cross-sectional view of an example structure of a GaN-based metal oxide semiconductor (MOS) HEMT with a protrusion and a field plate according to certain aspects of the present disclosure.

[0014] Figure 6 is a flow chart of example operations for fabricating a GaN-based HEMT with protrusion(s) according to certain aspects of the present disclosure. DETAILED DESCRIPTION

[0015] Various aspects of the present disclosure provide gallium nitride (GaN) based high electron mobility transistors (HEMTs) suitable for high performance power electronic chips, radio frequency (RF) components, etc. More specifically, various aspects presented herein can reduce surface states in GaN based HEMTs and / or increase breakdown voltage therein so as to increase, for example, power switching efficiency and RF performance. In some aspects, the GaN based HEMTs described herein can include (multiple) n-doped protrusions disposed above an aluminum gallium nitride (AlGaN) layer (or region) to reduce surface states, which in turn can increase the channel electron density in the channel at the heterojunction of the HEMT and reduce the on-resistance (R on ).

[0016] The following description provides examples and does not limit the scope, applicability or embodiments set forth in the claims. Changes may be made to the functions and arrangements of the elements discussed without departing from the scope of the present disclosure. Various processes or components may be omitted, substituted or added to each example as appropriate. For example, the described method may be performed in an order different from the order described, and various steps may be added, omitted or combined. In addition, the features described with respect to some examples may be combined in some other examples. For example, a device may be implemented or a method may be practiced using any number of aspects set forth herein. In addition, the scope of the present disclosure is intended to cover such a device or method, which is practiced using other structures, functionality, or structures and functionality other than or in addition to the various aspects of the present disclosure set forth herein. It should be understood that any aspect of the present disclosure disclosed herein may be embodied by one or more elements of a claim.

[0017] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0018] As used herein, the term "connected with" in various tenses of the verb "connect" may mean that element A is directly connected to element B or other elements may be connected between elements A and B (i.e., element A is indirectly connected to element B). In the case of electrical components, the term "connected with" may also be used herein to mean that wires, traces, or other conductive materials are used to electrically connect elements A and B (and any components electrically connected therebetween).

[0019] Figure 11. A cross-sectional view of an example HEMT 100 is illustrated. The HEMT 100 includes a substrate 102; a buffer layer 104 disposed over the substrate 102; a semiconductor region 106 disposed over the buffer layer 104; and a semiconductor region 108 disposed over the semiconductor region 106. The HEMT also includes a source (metal) electrode 110, a gate (metal) electrode 112, and a drain (metal) electrode 114 disposed over the semiconductor region 108.

[0020] In the HEMT 100, the semiconductor region 106 and the semiconductor region 108 may be different bandgap semiconductor regions, thereby forming a dense electron region (or channel) 130 at the interface (e.g., heterojunction) between the semiconductor region 106 and the semiconductor region 108. For example, the semiconductor region 106 may include GaN, and the semiconductor region 108 may include AlGaN. Certain implementations of the HEMT 100 may use a dielectric layer and / or a passivation layer that is disposed over the semiconductor region 108. In this example, the HEMT 100 includes a passivation layer 116 that is disposed between the source electrode 110 and the gate electrode 112, and / or between the gate electrode 112 and the drain electrode 114. The passivation layer 116 may include any of a variety of suitable passivation materials, such as, for example, silicon nitride (Si3N4).

[0021] In a HEMT with a semiconductor region 108 having a first band gap (e.g., with AlGaN) disposed above a semiconductor region 106 having a second, different band gap (e.g., with GaN), the surface (e.g., at the semiconductor region 108) may be negatively charged. Such negatively charged surface states may reduce the electron density in a region (or channel) 130 between the semiconductor region 106 and the semiconductor region 108. Figure 1 A reference example is shown in which the electron density at portion 120 of region 130 is reduced due to the negatively charged surface state of semiconductor region 108. This reduction in electron density may make HEMT 100 unsuitable or at least undesirable for power devices that rely on high breakdown voltage, high switching efficiency, and high frequency transistors. Thus, in order to provide significantly higher performance of HEMTs for power electronic devices or RFFE devices used today, in order to reduce the on-resistance (R on ) and increase the efficiency of the HEMT, it may be desirable that the electron density (e.g., in region 130) be as high as possible. Additionally, it may also be desirable to allow for a smaller gate charge (Q g ) in order to operate the HEMT at a faster switching speed.

[0022] Certain aspects of the present disclosure provide a GaN-based HEMT with, for example, reduced surface states and / or increased breakdown voltage for improving power switching efficiency and RF performance. In particular, as described in more detail below, the GaN-based HEMT may include one or more n-doped protrusions (e.g., (multiple) protrusions) between the gate electrode and the source / drain electrode. The (multiple) n-doped protrusions may reduce surface states, which in turn may increase channel electron density and reduce R on . For RFFE, power electronic chips, mmW circuits, etc., the GaN-based HEMTs described herein (e.g., with protrusion(s) and / or field plate(s)) can provide significantly higher performance (relative to GaN-based HEMTs without protrusion(s) and / or field plate(s)).

[0023] Figure 2 A cross-sectional view of an example GaN-based HEMT 200 with n-doped protrusion(s) 240A and 240B according to certain aspects of the present disclosure is illustrated. Protrusion(s) 240A and 240B (as well as other protrusions described throughout the present disclosure) represent specific shapes for n-doped protrusion(s). However, the reader is to understand that any of a variety of other suitable shapes may also be used for the protrusion(s) for any of the protrusions described herein. The HEMT 200 includes a substrate 202; a buffer layer 204 disposed over the substrate 202; a semiconductor region 206 (e.g., having GaN) disposed over the buffer layer 204; and a semiconductor region 208 (e.g., having AlGaN) disposed over the semiconductor region 206, for example, a region (or channel) 230 with dense electrons (e.g., high electron density) may be formed at an interface between the semiconductor region 206 and the semiconductor region 208 due to different bandgap semiconductor regions. HEMT 200 further includes a source (metal) electrode 210, a gate (metal) electrode 212, and a drain (metal) electrode 214, which are disposed on (or over) semiconductor region 208. Buffer layer 204 may include, for example, GaN. Substrate 202 may include any of various suitable materials for growing (or forming) GaN, such as silicon (Si), silicon carbide (SiC), aluminum oxide (Al2O3), etc.

[0024] As shown, in contrast to HEMT 100, HEMT 200 includes one or more n-doped protrusions 240A and / or 240B disposed on (or over) semiconductor region 208. In this particular example, n-doped protrusion 240A is disposed between source electrode 210 and gate electrode 212, while n-doped protrusion 240B is disposed between gate electrode 212 and drain electrode 214. Although only one n-doped protrusion 240A is shown disposed between source electrode 210 and gate electrode 212 in the illustrated example, the reader will understand that for other aspects, more than one n-doped protrusion (or other protrusion) may be disposed between source electrode 210 and gate electrode 212. Likewise, although only one n-doped protrusion 240B is shown disposed between gate electrode 212 and drain electrode 214, the reader will understand that more than one n-doped protrusion (or other protrusion) may be disposed between gate electrode 212 and drain electrode 214. Further, these multiple protrusions may have the same or different shapes. Passivation layer 216 may be disposed on (or over) n-doped protrusion(s) 240A and / or 240B. Passivation layer 216 may include any of a variety of suitable passivation materials, such as, for example, silicon nitride (Si3N4). In some aspects, HEMT 200 may include a dielectric layer (not shown) disposed over n-doped protrusion(s) 240A and / or 240B.

[0025] Furthermore, as shown, each of the n-doped protrusions 240A and 240B is separated from (e.g., not directly coupled to) the source electrode 210, the gate electrode 212, and the drain electrode 214. This separation between the n-doped protrusion and the ohmic contact and the gate contact can reduce the amount of leakage and / or coupling between the n-doped protrusion and the ohmic contact and the gate contact that may exist if the n-doped protrusion is directly coupled to the ohmic contact and the gate contact.

[0026] The n-doped protrusions 240A and 240B may include at least one of GaN, indium gallium nitride (InGaN), AlGaN, or aluminum nitride (AlN). The n-doped protrusions 240A and 240B may reduce the (negatively) charged surface states (of the semiconductor region 208), which in turn may increase the channel electron density in the region 230, thereby reducing R on In some aspects, the doping amount within each of n-doped protrusions 240A and 240B can be uniform. In some aspects, one or more dimensions (such as height, width, etc.) of each n-doped protrusion 240A and 240B can be based in part on the doping amount within the corresponding n-doped protrusion. For example, thinner n-doped protrusions can be used for higher doping levels, while thicker n-doped protrusions can be used for smaller doping levels.

[0027] Figure 3 1 illustrates a cross-sectional view of another example GaN-based HEMT 300 having n-doped protrusion(s) 340A and 340B in accordance with certain aspects of the present disclosure. Figure 2 In comparison to HEMT 200 of the present invention, HEMT 300 includes n-doped protrusions 340A and 340B, wherein the doping amount within each of n-doped protrusions 340A and 340B is non-uniform. In some aspects, the doping amount within each of n-doped protrusions 340A and 340B is vertically non-uniform (e.g., planar doping, incremental doping, etc.). As shown, for example, n-doped protrusion 340A may include n-doped incremental region 302A, and n-doped protrusion 340B may include n-doped incremental region 302B. N-doped incremental regions 302A and 302B represent regions of n-doped protrusions 340A and 340B, respectively, which have a high doping concentration relative to other regions of the corresponding n-doped protrusions 340A and 340B. In some aspects, n-doped incremental regions 302A and 302B may be planar regions of n-doped protrusions 340A and 340B, respectively. Compared to a protrusion with a uniform doping level (as in HEMT 200), a protrusion with a concentrated doping amount (e.g., as in HEMT 300) may allow for a further reduction in surface states and may also prevent a breakdown voltage (V db ) decrease.

[0028] In some aspects, for example, the GaN-based HEMTs described herein may also include a field plate (in addition to the n-doped protrusion(s)) to improve the performance of the HEMT for power electronics. A field plate is typically a conductive (e.g., metal) plate electrically coupled to a gate electrode or a source electrode. In some cases, the field plate may be an independent electrode with an external bias or may be a floating electrode. Figure 4A cross-sectional view of an example GaN-based HEMT 400 having n-doped protrusion(s) 440A, 440B, 440C, and 440D and a field plate 402 according to certain aspects of the present disclosure is illustrated. In contrast to HEMTs 200 and 300, HEMT 400 includes a first n-doped protrusion 440A disposed between source electrode 210 and gate electrode 212, and a plurality of n-doped protrusions 440B, 440C, and 440D disposed between gate electrode 212 and drain electrode 214. Although three n-doped protrusions 440B, 440C, and 440D are shown in this particular example, the reader will appreciate that one, two, or more than three n-doped protrusions (having the same or different shapes) may be disposed between gate electrode 212 and drain electrode. Likewise, although only one n-doped protrusion 440A is shown in this example implementation, the reader will appreciate that more than one n-doped protrusion (having the same or different shapes) may be disposed between the source electrode 210 and the gate electrode 212. In some aspects, the amount of doping within each of the n-doped protrusions 440A, 440B, 440C, and 440D may be uniform (e.g., similar to the n-doped protrusions 240A and 240B of the HEMT 200) or non-uniform (e.g., similar to the n-doped protrusions 340A and 340B of the HEMT 300). In some aspects, the HEMT 400 may include n-doped protrusion(s) having a uniform doping level and n-doped protrusion(s) having a non-uniform doping level.

[0029] Field (metal) plates 402 are disposed above n-doped protrusions 440B, 440C, and 440D. Field plates 402 may be electrically coupled (not shown) to source electrode 210 or gate electrode 212 and may be used to reduce the peak electric field (e.g., within region 230), thereby increasing the breakdown voltage (V db ). The passivation layer 216 may be disposed over the n-doped protrusions 440A, 440B, 440C, and 440D, and also disposed between the field plate 402 and the n-doped protrusions 440B, 440C, and 440D.

[0030] In some aspects, field plate 402 can extend into a trench formed between at least two n-doped protrusions. As shown, for example, trench 442 can be formed between n-doped protrusions 440B and 440C, and trench 444 can be formed between n-doped protrusions 440C and 440D. In this aspect, field plate 402 can include one or more protrusions 450 and 452 extending into trenches 442 and 444, respectively. Using field plate 402 to divide different regions of protrusions 440A, 440B, and 440C in this manner can also increase the uniformity of the electric field distribution (e.g., within region 230).

[0031] Figure 5 A cross-sectional view of an example of a metal oxide semiconductor (MOS) GaN-based HEMT 500 with n-doped protrusion(s) 540A, 540B, 540C, and 540D and a field plate 502 according to certain aspects of the present disclosure is illustrated. Similar to HEMT 400, MOS HEMT 500 includes a source (metal) electrode 510, a gate (metal) electrode 512, and a drain (metal) electrode 514, which are disposed over semiconductor region 208. However, in contrast to gate electrode 212 of HEMT 400, gate electrode 512 of MOS HEMT 500 is disposed over layer 516, which is disposed between gate electrode 512 and semiconductor region 208. In some aspects, layer 516 can include a passivation layer (e.g., with SiN). In some aspects, layer 516 can include a dielectric layer. Note that n-doped protrusions 540A, 540B, 540C, and 540D may be similar to n-doped protrusions 240A and 240B of HEMT 200, n-doped protrusions 340A and 340B of HEMT 300, or 440A, 440B, 440C, and 440D of HEMT 400. Likewise, field plate 502 may be similar to field plate 402 of HEMT 400.

[0032] Figure 6 is a flow chart of example operations 600 for fabricating a HEMT, in accordance with certain aspects of the present disclosure. Operations 600 may be performed, for example, by a semiconductor processing chamber.

[0033] At block 602, operation 600 may begin by forming a GaN layer (e.g., semiconductor region 106). At block 604, an AlGaN layer (e.g., semiconductor region 108) is formed over the GaN layer. At block 606, a source electrode (e.g., source electrode 210), a gate electrode (e.g., gate electrode 212), and a drain electrode (e.g., drain electrode 214) are formed over the AlGaN layer. At block 608, n-doped protrusion(s) (e.g., n-doped protrusion(s) 240, 340, 440, 540) are formed over the AlGaN layer. The n-doped protrusion(s) are also formed between at least one of: a gate electrode and a drain electrode, or a source electrode and a gate electrode. Each of the n-doped protrusion(s) is separated from the gate electrode, the drain electrode, and the source electrode.

[0034] In some aspects, forming (multiple) n-doped protrusions may include forming a plurality of n-doped protrusions. In some aspects, operation 600 may include forming a passivation layer (e.g., passivation layer 216) and / or a dielectric layer over the (multiple) n-doped protrusions. In some aspects, forming a passivation layer may include forming a passivation layer over the AlGaN layer such that the passivation layer is also disposed between the gate electrode (e.g., gate electrode 512) and the AlGaN layer. In some aspects, operation 600 may include forming a dielectric layer over the AlGaN layer and between the gate electrode (e.g., gate electrode 512) and the AlGaN layer. In some aspects, forming a gate electrode may include forming a gate electrode (e.g., gate electrode 212) directly adjacent to the AlGaN layer.

[0035] In some aspects, operation 600 may include forming a metal plate (e.g., field plate 402, field plate 502) over the n-doped protrusion(s). In some aspects, operation 600 may include forming two or more n-doped protrusions (e.g., n-doped protrusions 440B, 440C, and 440D) with one or more trenches (e.g., trenches 442 and 444) therebetween, and forming the metal plate (e.g., field plate 402) by forming one or more protrusions (e.g., protrusions 450 and 452) extending into the one or more trenches between the two or more n-doped protrusions. In some aspects, operation 600 may include forming a passivation layer (e.g., passivation layer 216) over the n-doped protrusion(s) and between the metal plate and the n-doped protrusion(s).

[0036] In some aspects, the doping level within one or more n-doped protrusions can be non-uniform (eg, n-doped protrusion 340). Additionally or alternatively, in some aspects, the doping level within one or more n-doped protrusions can be uniform (eg, n-doped protrusion 240).

[0037] The various operations of the method described above can be performed by any suitable device capable of performing the corresponding function. The device may include one or more various hardware and / or software components and / or modules, including but not limited to circuits, application specific integrated circuits (ASICs), or processors. Typically, where operations are shown in the accompanying drawings, those operations may have counterparts with similar numbering corresponding devices plus functional components.

[0038] As used herein, the term "determining" encompasses a wide variety of actions. For example, "determining" may include calculating, computing, processing, deriving, investigating, searching (e.g., searching in a table, a database, or another data structure), determining, etc. In addition, "determining" may include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory), etc. In addition, "determining" may include parsing, selecting, choosing, establishing, etc.

[0039] As used herein, a phrase referring to "at least one of" a list of items refers to any combination of those items, including single members. For example, "at least one of a, b, or c" is intended to cover a, b, c, ab, ac, bc, and abc, as well as any combination with multiples of the same element (e.g., aa, aaa, aab, aac, abb, cc, bb, bbb, bbc, cc, and ccc, or any other ordering of a, b, and c).

[0040] The method disclosed herein includes one or more steps or actions for implementing the described method. Without departing from the scope of the claims, the method steps and / or actions can be interchangeable with each other. In other words, unless a specific order of steps or actions is specified, the order and / or use of specific steps and / or actions can be modified without departing from the scope of the claims.

[0041] It is to be understood that the claims are not limited to the precise configuration and components illustrated above. Various modifications, changes and variations may be made in the arrangement, operation and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. A high electron mobility transistor, comprising: Gallium nitride layer; an aluminum gallium nitride layer, disposed above the gallium nitride layer; A source electrode, a gate electrode and a drain electrode are arranged above the aluminum gallium nitride layer; as well as One or more n-doped protrusions disposed above the aluminum gallium nitride layer and between at least one of: the gate electrode and the drain electrode; or the source electrode and the gate electrode, wherein each of the one or more n-doped protrusions is separated from the gate electrode, the drain electrode and the source electrode, wherein at least one n-doped protrusion comprises two or more n-doped sub-protrusions having one or more trenches therebetween, The high electron mobility transistor further includes a metal plate disposed above the two or more n-doped sub-protrusions and including one or more protrusions extending into the corresponding trenches. 2 . The high electron mobility transistor of claim 1 , further comprising a passivation layer disposed between the metal plate and the one or more n-doped protrusions. 3 . The HEMT of claim 1 , wherein the metal plate is electrically coupled to the source electrode or the gate electrode. 4 . The HEMT of claim 1 , wherein the gate electrode is further disposed directly adjacent to the aluminum gallium nitride layer. 5 . The HEMT of claim 1 , wherein the doping level within the one or more n-doped protrusions is uniform or vertically non-uniform. 6 . The HEMT of claim 1 , wherein the one or more n-doped protrusions include two or more n-doped protrusions. 7 . The high electron mobility transistor of claim 1 , further comprising a passivation layer disposed over the one or more n-doped protrusions. 8 . The high electron mobility transistor according to claim 7 , wherein the passivation layer is further disposed between the gate electrode and the aluminum gallium nitride layer. 9 . The HEMT of claim 7 , wherein the passivation layer comprises silicon nitride. 10 . The high electron mobility transistor of claim 1 , further comprising a dielectric layer disposed between the gate electrode and the aluminum gallium nitride layer. 11 . The high electron mobility transistor of claim 1 , wherein the one or more n-doped protrusions comprise at least one of: gallium nitride, indium gallium nitride, aluminum gallium nitride, or aluminum nitride.

12. A method for manufacturing a high electron mobility transistor, comprising: forming a gallium nitride layer; forming an aluminum gallium nitride layer on the gallium nitride layer; forming a source electrode, a gate electrode and a drain electrode on the aluminum gallium nitride layer; as well as One or more n-doped protrusions are formed above the aluminum gallium nitride layer and between at least one of: the gate electrode and the drain electrode; or the source electrode and the gate electrode, Each of the one or more n-doped protrusions is separated from the gate electrode, the drain electrode and the source electrode, wherein forming at least one n-doped protrusion includes forming two or more n-doped sub-protrusions with one or more grooves therebetween; the method also includes forming a metal plate above the two or more n-doped sub-protrusions, wherein forming the metal plate includes forming one or more protrusions extending into the corresponding grooves.

13. The method according to claim 12, further comprising: A passivation layer is formed over the one or more n-doped protrusions, the passivation layer being disposed between the metal plate and the one or more n-doped protrusions.

14. The method according to claim 12, wherein forming the gate electrode comprises: The gate electrode is formed directly adjacent to the aluminum gallium nitride layer.

15. The method of claim 12, wherein forming the one or more n-doped protrusions comprises: Two or more n-doped protrusions are formed. The method of claim 12 , wherein the doping level within the one or more n-doped protrusions is non-uniform.

17. The method according to claim 12, further comprising: A passivation layer is formed over the one or more n-doped protrusions.

18. The method of claim 17, wherein forming the passivation layer comprises: The passivation layer is formed over the aluminum gallium nitride layer such that the passivation layer is also disposed between the gate electrode and the aluminum gallium nitride layer. The method of claim 17 , wherein the passivation layer comprises silicon nitride.

20. The method of claim 12, further comprising: A dielectric layer is formed over the aluminum gallium nitride layer, and the dielectric layer is disposed between the gate electrode and the aluminum gallium nitride layer.

21. The method of claim 12, wherein the one or more n-doped protrusions comprise at least one of: gallium nitride, indium gallium nitride, aluminum gallium nitride, or aluminum nitride.

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