Dicing tape and dicing die-bonding film

By optimizing the material performance of the cutting tape and cutting chip bonding film at -10°C, the cutting difficulties and insufficient cut-off maintenance caused by the large number of cutting lines are solved, and efficient cutting and cut-off stability of semiconductor wafers are achieved.

CN112778922BActive Publication Date: 2024-12-31NITTO DENKO CORP
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Patent Information

Application Number
CN202011175219.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-11-07
Filing Date
2020-10-28
Publication Date
2024-12-31
Estimated Expiration
2040-10-28

AI Technical Summary

Technical Problem

In the case of a large number of cutting lines, it is difficult to fully stretch the cutting tape or the cutting chip bonding film, resulting in the semiconductor wafer being unable to be well cut into multiple semiconductor chips, and the cutout is insufficient.

Method used

A cutting tape and cutting chip bonding film with a tensile energy storage modulus of 50MPa or more and 250MPa or less at -10°C, a loss coefficient of 0.07 or more and 0.18 or less, and an elongation of break of 450% or more and 600% or less are used. Breakage is suppressed by moderate elasticity and hardness, and cured using hot air cooling during the incision maintenance process.

Benefits of technology

It is achieved that the cutting into multiple semiconductor chips can be well cut in the case of a large number of cutting lines, and the cut is fully maintained, reducing the risk of breaking the cutting tape.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a dicing tape and a dicing die bonding film. The dicing tape of the present invention is a dicing tape having an adhesive layer laminated on a base layer, and has a tensile storage modulus of 50 MPa or more and 250 MPa or less at -10°C.
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Description

[0001] Cross-references to related applications

[0002] This application claims the priority of Japanese Patent Application No. 2019-202485, which is incorporated by reference into the description of the present application specification. Technical Field

[0003] The present invention relates to a dicing tape and a dicing die-bonding film. Background Art

[0004] Conventionally, it is known that a dicing tape or a dicing die-bonding film is used to obtain a semiconductor chip for die bonding in the production of a semiconductor device.

[0005] The dicing tape is configured by laminating an adhesive layer on a base material layer, and the dicing die-bonding film is configured by laminating a die-bonding layer on the adhesive layer of the dicing tape in a releasable manner.

[0006] Furthermore, as a method for obtaining a semiconductor chip (Die) for chip bonding using the aforementioned cutting chip bonding film, a method having the following steps is known: a half-cutting step of forming a groove on a semiconductor wafer to be processed into a chip (Die) by cutting the semiconductor wafer; a back grinding step of grinding the semiconductor wafer after the half-cutting step to reduce the thickness; a mounting step of attaching one side of the semiconductor wafer after the back grinding step (for example, the side opposite to the circuit side) to the chip bonding layer and fixing the semiconductor wafer to the cutting tape; an expansion step of enlarging the interval between the semiconductor chips processed by half-cutting; a cut maintaining step of maintaining the interval between the semiconductor chips; a picking-up step of peeling off the chip bonding layer and taking out the semiconductor chip in a state where the chip bonding layer is attached; and a chip bonding step of bonding the semiconductor chip in a state where the chip bonding layer is attached to an adherend (for example, a mounting substrate, etc.).

[0007] It should be noted that in the aforementioned cut maintaining step, hot air (eg, 100 to 130° C.) is blown onto the dicing tape to thermally shrink the dicing tape, which is then cooled and solidified to maintain the distance (cut) between adjacent semiconductor chips being cut.

[0008] Furthermore, in the expansion step, the die bonding layer is cut into a size corresponding to the size of the plurality of singulated semiconductor chips.

[0009] Regarding a method for obtaining a semiconductor chip for chip bonding using a cutting chip bonding film as described above, Patent Document 1 discloses: by using a cutting tape having specific physical properties (a cutting tape having an initial elastic modulus of 200 MPa or more and 380 MPa or less at -10°C, and a Tanδ (loss elastic modulus / storage modulus) of 0.080 or more and 0.3 or less at -10°C), and performing the aforementioned expansion process under low temperature conditions of -15 to 5°C, the cutting properties (e.g., ease of cutting, uniformity of cutting, etc.) of cutting the aforementioned semiconductor wafer into a plurality of semiconductor chips can be improved in the aforementioned expansion process.

[0010] Prior art literature

[0011] Patent Literature

[0012] Patent Document 1: Japanese Patent Application Publication No. 2015-185591 Summary of the invention

[0013] Problem that the invention aims to solve

[0014] However, the required size of a semiconductor chip varies depending on the application.

[0015] Moreover, the smaller the required size of the semiconductor chip is, the more grooves (cutting lines) are formed in the semiconductor wafer when the semiconductor wafer of the same size is expanded and singulated into multiple semiconductor chips. The more the number of cutting lines is, the more it is necessary to further stretch the cutting tape or the cutting chip bonding film in order to fully widen the interval between the semiconductor chips during the expansion process.

[0016] Therefore, depending on the physical properties of the dicing tape or the dicing die bonding film, when it is necessary to further stretch the dicing tape or the dicing die bonding film, it may not be stretched sufficiently, and as a result, the interval between the semiconductor chips cannot be sufficiently widened in the expansion process. In other words, it may not be possible to properly cut a semiconductor wafer into a plurality of semiconductor chips.

[0017] Furthermore, in the incision maintaining step, the incision may not be sufficiently maintained.

[0018] However, sufficient research has not been conducted on how to satisfactorily cut a semiconductor wafer into a plurality of semiconductor chips even when the dicing tape or the dicing die-bonding film needs to be further stretched in the expansion process, that is, when the number of dicing lines is large.

[0019] Furthermore, in the incision maintenance step, sufficient research has not been conducted on how to adequately maintain the incision.

[0020] Therefore, an object of the present invention is to provide a dicing tape and a dicing die-bonding film which can satisfactorily dicing a semiconductor wafer into a plurality of semiconductor chips and can sufficiently maintain cuts even when the number of dicing lines is large.

[0021] Solutions for solving problems

[0022] The dicing tape of the present invention is a dicing tape having an adhesive layer laminated on a base material layer.

[0023] The tensile storage modulus thereof at -10°C is 50 MPa or more and 250 MPa or less.

[0024] The dicing tape preferably has a loss factor of 0.07 or more and 0.18 or less at -10°C.

[0025] The dicing tape preferably has a breaking elongation at -10°C of 450% or more and 600% or less.

[0026] The dicing die bonding film of the present invention comprises:

[0027] A dicing tape having an adhesive layer laminated on a base material layer; and

[0028] a die bonding layer laminated on the adhesive layer of the dicing tape,

[0029] The dicing die-bonding film has a tensile storage modulus at -10°C of 50 MPa or more and 250 MPa or less. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a cross-sectional view showing the structure of a dicing tape according to one embodiment of the present invention.

[0031] Figure 2 It is a cross-sectional view showing the structure of a dicing die-bonding film according to one embodiment of the present invention.

[0032] Figure 3A This is a cross-sectional view schematically showing a state of half-cutting processing in a method of manufacturing a semiconductor integrated circuit.

[0033] Figure 3B The figure is a cross-sectional view schematically showing a half-cut process in a method for manufacturing a semiconductor integrated circuit.

[0034] Figure 3C The figure is a cross-sectional view schematically showing a backside grinding process in a method for manufacturing a semiconductor integrated circuit.

[0035] Figure 3D The figure is a cross-sectional view schematically showing a backside grinding process in a method for manufacturing a semiconductor integrated circuit.

[0036] Figure 4A It is a cross-sectional view schematically showing a mounting step in a method of manufacturing a semiconductor integrated circuit.

[0037] Figure 4B It is a cross-sectional view schematically showing a mounting step in a method of manufacturing a semiconductor integrated circuit.

[0038] Figure 5A This is a cross-sectional view schematically showing a state of a low-temperature expansion step in a method of manufacturing a semiconductor integrated circuit.

[0039] Figure 5B This is a cross-sectional view schematically showing a state of a low-temperature expansion step in a method of manufacturing a semiconductor integrated circuit.

[0040] Figure 5C This is a cross-sectional view schematically showing a state of a low-temperature expansion step in a method of manufacturing a semiconductor integrated circuit.

[0041] Fig. 6A It is a cross-sectional view schematically showing a state of an expansion process at room temperature in a method for manufacturing a semiconductor integrated circuit.

[0042] Figure 6B It is a cross-sectional view schematically showing a state of an expansion process at room temperature in a method for manufacturing a semiconductor integrated circuit.

[0043] Figure 7 This is a cross-sectional view schematically showing a state of a cutout maintaining step in a method of manufacturing a semiconductor integrated circuit.

[0044] Figure 8 This is a cross-sectional view schematically showing a pickup step in a method of manufacturing a semiconductor integrated circuit.

[0045] Description of Reference Numerals

[0046] 1. Substrate

[0047] 2 Adhesive layer

[0048] 3 Chip bonding layer

[0049] 10 Cutting tape

[0050] 20 Cutting die bonding film

[0051] 1a First resin layer

[0052] 1b Second resin layer

[0053] 1c The third resin layer

[0054] G Back Grinding Tape

[0055] H retainer

[0056] J Suction fixture

[0057] P pin component

[0058] R cutting ring

[0059] T Wafer Processing Tape

[0060] U lifting member

[0061] W Semiconductor Wafer DETAILED DESCRIPTION

[0062] Hereinafter, one embodiment of the present invention will be described.

[0063] [Cutting tape]

[0064] like Figure 1 As shown, the dicing tape 10 according to the present embodiment is a dicing tape in which the adhesive layer 2 is laminated on the base material layer 1, and has a tensile storage modulus of 50 MPa to 250 MPa at -10°C.

[0065] It should be noted that, as described in the embodiment described later, by making the tensile storage modulus of the dicing tape 10 at -10°C be greater than 50 MPa and less than 250 MPa, it is particularly possible to well cut a semiconductor wafer (for example, a semiconductor wafer with a diameter of 200 mm (8 inches) or more) into a 10 mm area wafer such as that used by a NAND memory controller. 2 The following extremely small semiconductor chips (for example, a semiconductor chip with a roughly rectangular surface, 4 mm in length and 2 mm in width (8 mm in area) 2 )).

[0066] The present inventors speculate the reason as follows.

[0067] The required size of a semiconductor chip varies depending on the application. As mentioned above, a semiconductor chip such as that used in a NAND memory controller has an area of ​​10 mm. 2 In contrast, the semiconductor chip used in NAND flash memory is usually 40mm in size. 2 The above chips (for example, the surface is roughly rectangular, the length is 12mm × the width is 4mm (the area is 48mm 2 ), a chip with a length of 10 mm and a width of 5 mm (area of ​​50 mm 2 )).

[0068] Here, when semiconductor wafers of the same size are cut into semiconductor chips, the smaller the size of the semiconductor chips after cutting, the narrower the intervals between grooves (cutting lines) formed on the semiconductor wafer in the half-cutting process, and therefore the greater the number of grooves formed on the semiconductor wafer.

[0069] Furthermore, when a semiconductor wafer having narrow groove intervals is cut into a plurality of semiconductor chips, the dicing tape needs to be sufficiently stretched in an expansion step (eg, expansion at room temperature (23±2° C.)) in order to sufficiently space adjacent semiconductor chips.

[0070] When a semiconductor wafer is cut into larger chips such as semiconductor chips used in NAND flash memories, the number of grooves formed in the semiconductor wafer is small. Therefore, even if a cutting tape with an initial elastic modulus of greater than 200 MPa and less than 380 MPa at -10°C as described in Patent Document 1 is used, sufficient space can be left between adjacent semiconductor chips.

[0071] However, when a semiconductor wafer is cut into extremely small chips with a relatively small area, such as those used in a NAND memory controller, the number of grooves formed in the semiconductor wafer is large. Therefore, if a dicing tape having an initial elastic modulus of 200 MPa or more and 380 MPa or less at -10°C is used in an expansion process (e.g., expansion at room temperature), the dicing tape may not be sufficiently stretched to sufficiently provide a gap between adjacent extremely small chips. In particular, the dicing tape is more difficult to break during expansion at room temperature, for example. Therefore, when the initial elastic modulus at -10°C is set to a value near the upper limit of the above-mentioned numerical range, the dicing tape becomes harder and cannot be fully stretched. In addition, when a dicing tape is used to singulate a semiconductor wafer into a plurality of semiconductor chips, from the perspective of emphasizing the cutting property, the initial elastic modulus of the dicing tape at -10°C is often selected to be a higher value (e.g., a value near the upper limit of the numerical range described in Patent Document 1) in order to easily apply stress to the dicing tape. However, in this case, as described above, the dicing tape becomes harder and cannot be fully stretched.

[0072] In contrast, the dicing tape 10 according to the present embodiment has a tensile storage modulus of 50 MPa to 250 MPa at -10°C and has moderate elasticity, so it is considered that the dicing tape 10 can be sufficiently stretched even when diced into extremely small chips such as semiconductor chips used in NAND memory controllers.

[0073] Therefore, it can be considered that the interval between adjacent microchips can be sufficiently spaced in the expansion process.

[0074] By appropriately setting the material constituting the base layer 1 , the layer structure of the base layer 1 , and the thickness of the base layer 1 , the tensile storage modulus at -10°C can be set to 50 MPa or more and 250 MPa or less.

[0075] The dicing tape 10 according to the present embodiment preferably has a loss factor of 0.07 or more and 0.18 or less at -10°C.

[0076] Therefore, the cutting tape 10 has moderate hardness in addition to moderate elasticity.

[0077] Therefore, when the dicing tape 10 is adhered to a semiconductor wafer and expanded to cut the semiconductor wafer into multiple semiconductor chips (especially extremely small chips such as those used in NAND memory controllers), the dicing tape 10 can be further stretched and the breakage during the stretching can be relatively suppressed.

[0078] The tensile storage modulus at -10°C and the loss factor at -10°C can be determined as follows.

[0079] Specifically, a diced tape having a length of 40 mm (measurement length) and a width of 10 mm is used as a test piece, and a solid viscoelasticity measuring device (e.g., model RSAIII, manufactured by Rheometric Scientific) is used to measure the tensile storage modulus and loss elastic modulus of the test piece in a temperature range of -50 to 100°C under the conditions of a frequency of 1 Hz, a strain of 0.1%, a heating rate of 10°C / min, and a distance between chucks of 22.5 mm. At this time, by reading the value at -10°C, the tensile storage modulus at -10°C and the loss elastic modulus at -10°C can be obtained, and the loss coefficient at -10°C can be obtained by dividing the value of the tensile storage modulus at -10°C by the value of the loss elastic modulus at -10°C.

[0080] In addition, the said measurement is performed by stretching the said test piece in MD direction (resin flow direction).

[0081] The breaking elongation of the dicing tape 10 according to the present embodiment at -10°C is preferably 450% or more and 600% or less.

[0082] Therefore, the cutting tape 10 has moderate hardness in addition to moderate elasticity.

[0083] Therefore, when the dicing tape 10 is adhered to a semiconductor wafer and expanded to cut the semiconductor wafer into multiple semiconductor chips (especially extremely small chips such as those used in NAND memory controllers), the dicing tape 10 can be further stretched and the breakage during the stretching can be relatively suppressed.

[0084] The elongation at break at -10°C can be determined as follows.

[0085] Specifically, a cut tape having a length of 120 mm (measurement length L0) and a width of 10 mm was used as a test piece. A tensile testing machine (AUTOGRAPH AG-IS, manufactured by Shimadzu Corporation) was used. The test piece was stretched along the length direction at a temperature of -10°C, a distance between chucks of 50 mm, and a stretching speed of 100 mm / min, and the length (L1) at which the test piece broke was measured.

[0086] Then, the elongation at break E at -10°C was calculated based on the following formula.

[0087] Elongation at break E = (L1-L0) / L0×100

[0088] The substrate layer 1 supports the adhesive layer 2. The substrate layer 1 contains a resin. Examples of the resin contained in the substrate layer 1 include polyolefins, polyesters, polyurethanes, polycarbonates, polyetheretherketones, polyimides, polyetherimides, polyamides, wholly aromatic polyamides, polyvinyl chloride, polyvinylidene chloride, polyphenylene sulfide, fluororesins, cellulose resins, and silicone resins.

[0089] Examples of the polyolefin include homopolymers of α-olefins, copolymers of two or more α-olefins, block polypropylene, random polypropylene, and copolymers of one or more α-olefins and other vinyl monomers.

[0090] The homopolymer of α-olefin is preferably a homopolymer of α-olefin having a carbon number of 2 to 12. Examples of such a homopolymer include ethylene, propylene, 1-butene, and 4-methyl-1-pentene.

[0091] Examples of copolymers of two or more α-olefins include ethylene / propylene copolymers, ethylene / 1-butene copolymers, ethylene / propylene / 1-butene copolymers, ethylene / α-olefin copolymers having 5 to 12 carbon atoms, propylene / ethylene copolymers, propylene / 1-butene copolymers, and propylene / α-olefin copolymers having 5 to 12 carbon atoms.

[0092] Examples of the copolymer of one or more α-olefins and other vinyl monomers include ethylene-vinyl acetate copolymers (EVA) and the like.

[0093] The polyolefin may be a so-called α-olefin thermoplastic elastomer. Examples of the α-olefin thermoplastic elastomer include a combination of a propylene-ethylene copolymer and a propylene homopolymer, or a propylene-ethylene-α-olefin terpolymer having 4 or more carbon atoms.

[0094] Examples of commercially available α-olefin-based thermoplastic elastomers include Vistamaxx 3980 (manufactured by ExxonMobil Chemical Company), which is a propylene-based elastomer resin.

[0095] The base material layer 1 may contain one kind of the above-mentioned resin, or may contain two or more kinds of the above-mentioned resin.

[0096] When the pressure-sensitive adhesive layer 2 includes a UV-curable pressure-sensitive adhesive described below, the base layer 1 is preferably configured to have ultraviolet light transmittance.

[0097] The substrate layer 1 may be a single-layer structure or a laminated structure. The substrate layer 1 may be obtained by non-stretching forming or by stretching forming, preferably by stretching forming. When the substrate layer 1 is a laminated structure, the substrate layer 1 preferably has a layer containing an elastomer (hereinafter referred to as an elastomer layer) and a layer containing a non-elastic body (hereinafter referred to as a non-elastic body layer).

[0098] By making the base layer 1 have an elastic layer and a non-elastic layer, the elastic layer can function as a stress relaxation layer for relaxing tensile stress. That is, since the tensile stress generated in the base layer 1 can be relatively reduced, the base layer 1 can have appropriate hardness and be relatively easy to stretch.

[0099] This can improve the dicing performance of dicing a semiconductor wafer into a plurality of semiconductor chips.

[0100] Furthermore, it is possible to suppress the base material layer 1 from being broken and damaged during expansion in the cutting step.

[0101] It should be noted that, in this specification, the elastomer layer refers to a low elastic modulus layer having a tensile storage modulus at room temperature lower than that of the non-elastic layer. As the elastomer layer, an elastomer layer having a tensile storage modulus at room temperature of 10 MPa or more and 100 MPa or less can be listed, and as the non-elastic layer, a non-elastic layer having a tensile storage modulus at room temperature of 200 MPa or more and 500 MPa or less can be listed.

[0102] The elastomer layer may contain one type of elastomer or two or more types of elastomers, and preferably contains an α-olefin-based thermoplastic elastomer.

[0103] The non-elastic layer may contain one non-elastic layer or two or more non-elastic layers, and preferably contains the metallocene PP described below.

[0104] When the substrate layer 1 has an elastomer layer and a non-elastic layer, the substrate layer 1 is preferably formed into a three-layer structure (non-elastic layer / elastic layer / non-elastic layer) with the elastomer layer as the center layer and the non-elastic layers on the two opposite sides of the center layer (refer to Figure 1 ). It should be noted that Figure 1 , one non-elastic layer is shown as a first resin layer 1a, the elastic layer is shown as a second resin layer 1b, and the other non-elastic layer is shown as a third resin layer 3c.

[0105] In addition, as described above, in the incision maintaining process, since the dicing die bonding film is thermally shrunk by blowing hot air (e.g., 100-130°C) at room temperature (e.g., 23°C) to the dicing die bonding film maintained in an expanded state, and then cooled and solidified, the outermost layer of the base material layer 1 preferably contains a resin having a melting point close to the temperature of the hot air blown to the dicing tape. Thus, the outermost layer melted by blowing the hot air can be solidified more quickly.

[0106] As a result, the incision can be more fully maintained in the incision maintaining step.

[0107] The substrate layer 1 is a laminated structure of an elastomer layer and a non-elastic layer. When the elastomer layer includes an α-olefin thermoplastic elastomer and the non-elastic layer includes a polyolefin such as metallocene PP described later, the elastomer layer preferably includes an α-olefin thermoplastic elastomer of 50% by mass or more and 100% by mass or less relative to the total mass of the elastomer forming the elastomer layer, more preferably 70% by mass or more and 100% by mass or less, further preferably 80% by mass or more and 100% by mass or less, particularly preferably 90% by mass or more and 100% by mass or less, and most preferably 95% by mass or more and 100% by mass or less. By including an α-olefin thermoplastic elastomer in the aforementioned range, the affinity between the elastomer layer and the non-elastic layer becomes high, so that the substrate layer 1 can be extruded relatively easily. In addition, the elastomer layer can function as a stress relaxation layer, so that the semiconductor wafer attached to the dicing tape can be efficiently cut.

[0108] When the substrate layer 1 is a laminated structure of an elastomer layer and a non-elastic layer, the substrate layer 1 is preferably obtained by coextrusion molding of a laminated structure of an elastomer layer and a non-elastic layer by coextruding an elastomer and a non-elastic body. As coextrusion molding, any and appropriate coextrusion molding commonly performed in the manufacture of films, sheets, etc. can be adopted. Among the coextrusion molding, from the viewpoint of being able to efficiently and cheaply obtain the substrate layer 1, it is preferred to adopt an inflation method or a coextrusion T-die method.

[0109] When the substrate layer 1 forming a laminated structure is obtained by co-extrusion molding, the aforementioned elastomer layer and the aforementioned non-elastic layer are heated and contacted in a molten state, so it is preferred that the difference in melting point between the aforementioned elastomer and the aforementioned non-elastic body is small. By making the difference in melting point small, it is suppressed that the aforementioned elastomer or any of the aforementioned non-elastic body with a low melting point is overheated, so that it is possible to suppress the generation of by-products due to thermal degradation of the aforementioned elastomer or any of the aforementioned non-elastic body with a low melting point. In addition, it is also possible to suppress the occurrence of poor lamination between the aforementioned elastomer layer and the aforementioned non-elastic body layer due to excessive reduction in viscosity of the aforementioned elastomer or any of the aforementioned non-elastic body with a low melting point. The difference in melting point between the aforementioned elastomer and the aforementioned non-elastic body is preferably above 0°C and below 70°C, and more preferably above 0°C and below 55°C.

[0110] The melting points of the elastomer and the non-elastic body can be measured by differential scanning calorimetry (DSC) analysis. For example, the melting points can be measured by using a differential scanning calorimeter (manufactured by TA INSTRUMENTS, model: DSC Q2000), heating to 200°C at a heating rate of 5°C / min under a nitrogen flow, and determining the peak temperature of the endothermic peak.

[0111] The thickness of the base material layer 1 is preferably 55 μm to 195 μm, more preferably 55 μm to 190 μm, further preferably 55 μm to 170 μm, and most preferably 60 μm to 160 μm. By making the thickness of the base material layer 1 within the above range, the dicing tape can be efficiently manufactured, and the semiconductor wafer attached to the dicing tape can be efficiently diced.

[0112] The thickness of the base material layer 1 can be determined by, for example, measuring the thickness at five points selected at random using a direct-reading thickness meter (manufactured by PEACOCK, model: R-205) and calculating the arithmetic average of these thicknesses.

[0113] In the base material layer 1 formed by laminating an elastomer layer and a non-elastic layer, the ratio of the thickness of the non-elastic layer to the thickness of the elastomer layer is preferably 1 / 25 or more and 1 / 3 or less, more preferably 1 / 25 or more and 1 / 3.5 or less, further preferably 1 / 25 or more and 1 / 4 or less, particularly preferably 1 / 22 or more and 1 / 4 or less, and most preferably 1 / 20 or more and 1 / 4 or less. By setting the ratio of the thickness of the non-elastic layer to the thickness of the elastomer layer to the above range, the semiconductor wafer attached to the dicing tape can be cut more efficiently.

[0114] The elastomer layer may be a single layer (1 layer) structure or a laminated structure. The elastomer layer is preferably a structure of 1 to 5 layers, more preferably a structure of 1 to 3 layers, further preferably a structure of 1 to 2 layers, and the best is a 1-layer structure. When the elastomer layer is a laminated structure, all layers may contain the same elastomer, or at least 2 layers may contain different elastomers.

[0115] The non-elastic layer may be a single layer (1 layer) structure or a laminated structure. The non-elastic layer is preferably a structure of 1 to 5 layers, more preferably a structure of 1 to 3 layers, further preferably a structure of 1 to 2 layers, and most preferably a 1-layer structure. When the non-elastic layer is a laminated structure, all layers may contain the same non-elastic body, or at least 2 layers may contain different non-elastic bodies.

[0116] The non-elastic layer preferably contains a polypropylene resin (hereinafter referred to as metallocene PP) as a polymerization product obtained by using a metallocene catalyst as a non-elastic. As the metallocene PP, a propylene / α-olefin copolymer as a polymerization product of a metallocene catalyst can be cited. By making the non-elastic layer contain metallocene PP, a dicing tape can be efficiently manufactured, and a semiconductor wafer attached to the dicing tape can be efficiently cut.

[0117] In addition, as a commercially available metallocene PP, WINTEC WFX4M (made by Japan Polypropylene Co., Ltd.) is mentioned.

[0118] Here, the metallocene catalyst is a catalyst comprising a transition metal compound of Group 4 of the periodic table (so-called metallocene compound), wherein the transition metal compound of Group 4 of the periodic table comprises a ligand having a cyclopentadienyl skeleton, and a cocatalyst capable of reacting with the metallocene compound to activate the metallocene compound into a stable ionic state, and the metallocene catalyst comprises an organic aluminum compound as required. The metallocene compound is a cross-linked metallocene compound capable of stereoregular polymerization of propylene.

[0119] Among the aforementioned propylene / α-olefin copolymers as polymerization products of metallocene catalysts, preferred are propylene / α-olefin random copolymers as polymerization products of metallocene catalysts. Among the aforementioned propylene / α-olefin random copolymers as polymerization products of metallocene catalysts, preferred are copolymers selected from propylene / α-olefin random copolymers having 2 carbon atoms as polymerization products of metallocene catalysts, propylene / α-olefin random copolymers having 4 carbon atoms as polymerization products of metallocene catalysts, and propylene / α-olefin random copolymers having 5 carbon atoms as polymerization products of metallocene catalysts. Among these, the most suitable is the propylene / ethylene random copolymer as a polymerization product of metallocene catalysts.

[0120] The propylene / α-olefin random copolymer as the polymerization product of the metallocene catalyst preferably has a melting point of 80°C to 140°C, particularly 100°C to 130°C, from the viewpoint of co-extrusion film-forming property with the elastomer layer and cutting property of the semiconductor wafer attached to the dicing tape.

[0121] The melting point of the propylene / α-olefin random copolymer which is a polymerization product of the metallocene catalyst can be measured by the above-mentioned method.

[0122] Here, if the aforementioned elastomer layer is arranged at the outermost layer of the substrate layer 1, when the substrate layer 1 is made into a roll, the aforementioned elastomer layers arranged at the outermost layer are easily adhered to each other (easy to stick together). Therefore, it becomes difficult to unwind the substrate layer 1 from the roll. In contrast, the preferred form of the substrate layer 1 of the aforementioned laminated structure is non-elastic layer / elastic layer / non-elastic layer, that is, the non-elastic layer is arranged at the outermost layer, so the substrate layer 1 of this form has excellent anti-blocking property. As a result, it is possible to suppress the delay caused by blocking in the manufacture of semiconductor devices using the dicing tape 10.

[0123] The non-elastic layer preferably contains a resin having a melting point of 100° C. to 130° C. and a molecular weight dispersion (mass average molecular weight / number average molecular weight) of 5 or less. Examples of such a resin include metallocene PP.

[0124] By making the non-elastic layer contain the resin as described above, the non-elastic layer can be cooled and solidified more quickly in the incision maintaining step, so that the shrinkage of the base layer 1 after the dicing tape is thermally shrunk can be more fully suppressed.

[0125] Thereby, in the incision maintaining step, the incision can be more fully maintained.

[0126] The adhesive layer 2 contains an adhesive. The adhesive layer 2 holds the semiconductor wafer to be singulated into semiconductor chips by bonding.

[0127] Examples of the adhesive include adhesives whose adhesive force can be reduced by an external action during use of the dicing tape 10 (hereinafter referred to as an adhesive-reducing type adhesive).

[0128] When an adhesive of an adhesion-reducing type is used as an adhesive, the adhesive layer 2 can be used separately in a state showing a higher adhesive force (hereinafter referred to as a high adhesive state) and a state showing a lower adhesive force (hereinafter referred to as a low adhesive state) during the use of the dicing tape 10. For example, when a semiconductor wafer attached to the dicing tape 10 is provided for cutting, the high adhesive state is used to suppress the floating or peeling of a plurality of semiconductor chips singulated by cutting the semiconductor wafer from the adhesive layer 2. In contrast, after cutting the semiconductor wafer, the low adhesive state is used to pick up a plurality of singulated semiconductor chips so that the plurality of semiconductor chips can be easily picked up from the adhesive layer 2.

[0129] Examples of the adhesion-reducing adhesive include an adhesive that can be cured by irradiation with radiation during use of the dicing tape 10 (hereinafter referred to as a radiation-curing adhesive).

[0130] Examples of the radiation-curable adhesive include adhesives that are cured by irradiation with electron beams, ultraviolet rays, α rays, β rays, γ rays, or X rays. Of these, adhesives that are cured by irradiation with ultraviolet rays (ultraviolet curable adhesives) are preferably used.

[0131] Examples of the radiation-curable adhesive include additive-type radiation-curable adhesives comprising a base polymer such as an acrylic polymer, and a radiation-polymerizable monomer component or a radiation-polymerizable oligomer component having a radiation-polymerizable carbon-carbon double bond or other functional group.

[0132] Examples of the acrylic polymer include acrylic polymers containing monomer units derived from (meth)acrylic acid esters, and examples of (meth)acrylic acid esters include alkyl (meth)acrylates, cycloalkyl (meth)acrylates, and aryl (meth)acrylates.

[0133] The adhesive layer 2 may contain an external crosslinking agent. As the external crosslinking agent, any type can be used as long as it can react with the acrylic polymer as the base polymer to form a crosslinked structure. As such an external crosslinking agent, for example, polyisocyanate compounds, epoxy compounds, polyol compounds, aziridine compounds, and melamine-based crosslinking agents can be cited.

[0134] Examples of the radiation-polymerizable monomer component include urethane (meth)acrylate, trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, pentaerythritol tetra(meth)acrylate, dipentaerythritol monohydroxypenta(meth)acrylate, dipentaerythritol hexa(meth)acrylate, and 1,4-butanediol di(meth)acrylate. Examples of the radiation-polymerizable oligomer component include various oligomers such as urethane, polyether, polyester, polycarbonate, and polybutadiene. The content ratio of the radiation-polymerizable monomer component and the radiation-polymerizable oligomer component in the radiation-curable adhesive can be selected within a range that appropriately reduces the adhesiveness of the adhesive layer 2.

[0135] The radiation-curable adhesive preferably contains a photopolymerization initiator. Examples of the photopolymerization initiator include α-ketol compounds, acetophenone compounds, benzoin ether compounds, ketal compounds, aromatic sulfonyl chloride compounds, photoactive oxime compounds, benzophenone compounds, thioxanthone compounds, camphorquinone, haloketones, acylphosphine oxides, and acylphosphonates.

[0136] The pressure-sensitive adhesive layer 2 may contain, in addition to the above-mentioned components, a cross-linking accelerator, a tackifier, an antioxidant, a colorant such as a pigment or a dye, and the like.

[0137] The thickness of the adhesive layer 2 is preferably 1 μm or more and 50 μm or less, more preferably 2 μm or more and 30 μm or less, and further preferably 5 μm or more and 25 μm or less.

[0138] [Dicing Die Bonding Film]

[0139] Afterwards, refer to Figure 2 The dicing die-bonding film 20 will be described. In the description of the dicing die-bonding film 20 , the parts that overlap with the dicing tape 10 will not be described repeatedly.

[0140] like Figure 2 As shown, the dicing die-bonding film 20 of the present embodiment includes a dicing tape 10 in which an adhesive layer 2 is laminated on a base layer 1 , and a die-bonding layer 3 laminated on the adhesive layer 2 of the dicing tape 10 .

[0141] In the dicing die-bonding film 20 , a semiconductor wafer is attached to the die-bonding layer 3 .

[0142] When the semiconductor wafer is cut using the dicing die-bonding film 20, the die-bonding layer 3 is also cut together with the semiconductor wafer. The die-bonding layer 3 is cut into a size corresponding to the size of the plurality of singulated semiconductor chips. Thus, a semiconductor chip with the die-bonding layer 3 can be obtained.

[0143] As described above, the tensile storage modulus of the dicing tape 10 for dicing the die-bonding film 20 at -10°C is 50 MPa or more and 250 MPa or less.

[0144] The loss factor of the dicing tape 10 for dicing the die-bonding film 20 at -10°C is preferably 0.07 or more and 0.18 or less.

[0145] Furthermore, the breaking elongation at -10°C of the dicing tape 10 for dicing the die-bonding film 20 is preferably 450% or more and 600% or less.

[0146] The die bonding layer 3 preferably has thermosetting properties. The die bonding layer 3 can be given thermosetting properties by including at least one of a thermosetting resin and a thermoplastic resin having a thermosetting functional group.

[0147] When the die bonding layer 3 contains a thermosetting resin, examples of such thermosetting resins include epoxy resins, phenolic resins, amino resins, unsaturated polyester resins, polyurethane resins, silicone resins, and thermosetting polyimide resins, etc. Among these, epoxy resins are preferably used.

[0148] Examples of the epoxy resin include bisphenol A type, bisphenol F type, bisphenol S type, brominated bisphenol A type, hydrogenated bisphenol A type, bisphenol AF type, biphenyl type, naphthalene type, fluorene type, phenol novolac type, o-cresol novolac type, trihydroxyphenylmethane type, tetraphenolethane type, hydantoin type, triglycidyl isocyanurate type, and glycidylamine type epoxy resins.

[0149] Examples of the phenol resin used as a curing agent for the epoxy resin include novolac-type phenol resins, resol-type phenol resins, and polyoxystyrene such as polyparaoxystyrene.

[0150] When the die bonding layer 3 includes a thermoplastic resin having a thermosetting functional group, such a thermoplastic resin may include, for example, an acrylic resin containing a thermosetting functional group. Among the acrylic resins containing a thermosetting functional group, an acrylic resin containing a monomer unit derived from a (meth)acrylate may be included.

[0151] For a thermosetting resin having a thermosetting functional group, a curing agent can be selected according to the type of the thermosetting functional group.

[0152] The die bonding layer 3 may contain a thermal curing catalyst from the viewpoint of sufficiently advancing the curing reaction of the resin component or increasing the curing reaction rate. Examples of the thermal curing catalyst include imidazole compounds, triphenylphosphine compounds, amine compounds, and trihaloborane compounds.

[0153] The chip bonding layer 3 may include a thermoplastic resin. The thermoplastic resin acts as a binder. As thermoplastic resins, for example, natural rubber, butyl rubber, isoprene rubber, chloroprene rubber, ethylene-vinyl acetate copolymer, ethylene-acrylic acid copolymer, ethylene-acrylate copolymer, polybutadiene resin, polycarbonate resin, thermoplastic polyimide resin, polyamide 6, polyamide 6,6 and other polyamide resins, phenoxy resins, acrylic resins, saturated polyester resins such as PET and PBT, polyamide-imide resins, fluororesins, etc. The above-mentioned thermoplastic resins may be used alone or in combination of two or more. As the above-mentioned thermoplastic resin, acrylic resins are preferred from the viewpoint of having few ionic impurities and high heat resistance, thereby easily ensuring the connection reliability based on the chip bonding layer.

[0154] The acrylic resin is preferably a polymer containing monomer units derived from (meth)acrylate as the largest monomer units in terms of mass ratio. Examples of (meth)acrylate include alkyl (meth)acrylate, cycloalkyl (meth)acrylate, and aryl (meth)acrylate. The acrylic resin may include monomer units derived from other components that can be copolymerized with (meth)acrylate. Examples of other components include functional group-containing monomers such as carboxyl-containing monomers, anhydride monomers, hydroxyl-containing monomers, glycidyl-containing monomers, sulfonic acid-containing monomers, phosphoric acid-containing monomers, acrylamide, and acrylonitrile, and various multifunctional monomers. From the viewpoint of achieving high cohesion in the chip bonding layer, the above-mentioned acrylic resin is preferably a copolymer of (meth)acrylate (especially (meth)acrylate alkyl ester having an alkyl group with a carbon number of 4 or less) and a carboxyl group-containing monomer, a nitrogen atom-containing monomer, or a polyfunctional monomer (especially a polyglycidyl-based polyfunctional monomer), and more preferably a copolymer of ethyl acrylate and butyl acrylate, acrylic acid, acrylonitrile, or polyglycidyl (meth)acrylate.

[0155] The die bonding layer 3 may contain one or more other components as necessary. Examples of other components include flame retardants, silane coupling agents, and ion scavengers.

[0156] The thickness of the die bond layer 3 is not particularly limited, and is, for example, 1 μm to 200 μm. The thickness may be 3 μm to 150 μm, or 5 μm to 100 μm.

[0157] The dicing die-bonding film 20 of the present embodiment can be used as an auxiliary tool for manufacturing a semiconductor integrated circuit, for example. A specific example of using the dicing die-bonding film 20 will be described below.

[0158] Hereinafter, an example using the dicing die-bonding film 20 including a single base material layer 1 will be described.

[0159] The method for manufacturing a semiconductor integrated circuit has the following steps: a half-cutting step of forming grooves in a semiconductor wafer to be processed into a die by dicing the semiconductor wafer; a back grinding step of grinding the semiconductor wafer after the half-cutting step to reduce the thickness; a mounting step of attaching one side (e.g., the side opposite to the circuit side) of the semiconductor wafer after the back grinding step to a die bonding layer 3 and fixing the semiconductor wafer to a dicing tape 10; an expansion step of expanding the interval between the semiconductor chips processed by the half-cutting process; a cut-out maintaining step of maintaining the interval between the semiconductor chips; a pick-up step of peeling the die bonding layer 3 from the adhesive layer 2 and taking out the semiconductor die with the die bonding layer 3 attached; and a die bonding step of attaching the semiconductor die with the die bonding layer 3 attached to an adherend. When implementing these steps, the dicing tape (dicing die bonding film) of the present embodiment is used as a manufacturing auxiliary tool.

[0160] In the half-cutting process, Figure 3A and Figure 3B As shown in FIG. 1 , a half-cutting process is performed to cut the semiconductor integrated circuit into small pieces (dies). Specifically, a wafer processing tape T (see FIG. 1 ) is attached to the surface of the semiconductor wafer W opposite to the circuit surface. Figure 3A ). In addition, the dicing ring R is mounted on the wafer processing tape T (refer to Figure 3A ). A groove for dividing is formed in a state where the wafer processing tape T is attached (refer to Figure 3B ). In the back grinding process, such as Figure 3C and Figure 3D Specifically, the back grinding tape G is attached to the surface where the grooves are formed, and the wafer processing tape T attached initially is peeled off (see Figure 3C ). Grinding is performed with the back grinding tape G attached until the semiconductor wafer W reaches a predetermined thickness (see Figure 3D ).

[0161] During the installation process, Figure 4A to Figure 4B As shown, after the dicing ring R is attached to the adhesive layer 2 of the dicing tape 10, the semiconductor wafer W (see FIG. 1 ) which has been half-cut is attached to the exposed surface of the die bonding layer 3. Figure 4A ). Thereafter, the back grinding tape G is peeled off from the semiconductor wafer W (see Figure 4B ).

[0162] In the expansion process, Figure 5A to Figure 5CAs shown, the dicing ring R is fixed to the holder H of the expansion device. The dicing die bonding film 20 is lifted from the lower side using the lifting member U provided in the expansion device, thereby stretching the dicing die bonding film 20 and expanding it in the surface direction (see Figure 5B ). Thus, the semiconductor wafer W that has been half-cut is cut under a specific temperature condition. The temperature condition is, for example, -20 to 5°C, preferably -15 to 0°C, and more preferably -10 to -5°C. The extended state is released by lowering the lifting member U (see Figure 5C ).

[0163] Furthermore, in the expansion process, Figure 6A to Figure 6B As shown, the dicing tape 10 is stretched under a higher temperature condition (for example, room temperature (23° C.)) to expand the area. Thus, the cut adjacent semiconductor chips are separated in the plane direction of the film surface, and the interval is further increased.

[0164] Here, in the dicing chip bonding film 20 described in this embodiment, the tensile storage modulus of the dicing tape 10 at -10°C is greater than 50 MPa and less than 250 MPa, so that, in particular, a semiconductor wafer (for example, a semiconductor wafer with a diameter of 200 mm (8 inches)) can be more fully cut into a 10 mm area wafer such as that used by a NAND memory controller. 2 The following extremely small semiconductor chip (for example, a semiconductor chip with a substantially rectangular surface and a length of 4 mm and a width of 2 mm).

[0165] Furthermore, if the loss coefficient of the dicing tape 10 at -10°C is set to be greater than 0.07 and less than 0.18, the dicing tape 10 can be more fully cut into extremely small semiconductor chips as described above, and when the dicing tape 10 is stretched and broken into extremely small semiconductor chips as described above, the dicing tape 10 can be relatively suppressed from breaking.

[0166] Furthermore, if the elongation at break of the dicing tape 10 at -10°C is set to be greater than 450% and less than 600%, the dicing tape 10 can be more fully cut into extremely small semiconductor chips as described above, and when the dicing tape 10 is stretched and broken into extremely small semiconductor chips as described above, the dicing tape 10 can be relatively suppressed from breaking.

[0167] In the incision maintenance process, Figure 7 As shown, hot air (eg, 100 to 130° C.) is blown toward the dicing tape 10 to heat-shrink the dicing tape 10 , and then the dicing tape 10 is cooled and solidified, thereby maintaining the distance (kerf) between the cut adjacent semiconductor chips.

[0168] Here, in the dicing die-bonding film 20 according to the present embodiment, since the tensile storage modulus of the dicing tape 10 at -10°C is 50 MPa or more and 250 MPa or less, the cut edge can be sufficiently maintained after dicing into extremely small semiconductor chips.

[0169] In the picking process, Figure 8 As shown, the semiconductor chip with the die bonding layer 3 attached thereto is peeled off from the adhesive layer 2 of the dicing tape 10. Specifically, the pin member P is raised to lift up the semiconductor chip to be picked up through the dicing tape 10. The lifted semiconductor chip is held by the suction jig J.

[0170] In the die bonding step, the semiconductor chip with the die bonding layer 3 attached thereto is bonded to an adherend.

[0171] In the above-mentioned manufacture of the semiconductor integrated circuit, an example in which the dicing die-bonding film 20 is used as an auxiliary tool is described. However, when the dicing tape 10 is used as an auxiliary tool, the semiconductor integrated circuit can be manufactured in the same manner as described above.

[0172] Matters disclosed by this specification include the following. (1)

[0174] A dicing tape comprising a base material layer and an adhesive layer laminated thereon.

[0175] The tensile storage modulus thereof at -10°C is 50 MPa or more and 250 MPa or less.

[0176] According to this configuration, the dicing tape has a tensile storage modulus of 50 MPa or more and 250 MPa or less at -10°C, and therefore the dicing tape has appropriate elasticity.

[0177] Therefore, when the dicing tape is attached to a semiconductor wafer and the dicing tape is expanded to cut the semiconductor wafer into a plurality of semiconductor chips, the dicing tape can be further stretched.

[0178] Thus, even when the number of dicing lines is large, a semiconductor wafer can be favorably diced into a plurality of semiconductor chips.

[0179] Furthermore, the incision can be sufficiently maintained. (2)

[0181] The dicing tape according to (1) above, wherein the loss factor at -10°C is 0.07 or more and 0.18 or less.

[0182] According to this configuration, the loss coefficient at -10°C is 0.07 or more and 0.18 or less, and therefore the dicing tape has moderate hardness in addition to moderate elasticity.

[0183] Therefore, when the dicing tape is attached to a semiconductor wafer and the dicing tape is expanded to cut the semiconductor wafer into a plurality of semiconductor chips, the dicing tape can be further stretched, and breakage of the dicing tape during stretching can be relatively suppressed.

[0184] Thus, even when the number of dicing lines is large, a semiconductor wafer can be favorably diced into a plurality of semiconductor chips, the cut edges can be sufficiently maintained, and the breakage of the dicing tape during dicing can be relatively suppressed. (3)

[0186] The dicing tape according to (1) or (2) above, wherein the elongation at break at -10°C is 450% to 600%.

[0187] According to this configuration, the elongation at break at -10°C is 450% or more and 600% or less, and therefore the dicing tape has moderate hardness in addition to moderate elasticity.

[0188] Therefore, when the dicing tape is attached to a semiconductor wafer and the dicing tape is expanded to cut the semiconductor wafer into a plurality of semiconductor chips, the dicing tape can be further stretched, and breakage of the dicing tape during stretching can be relatively suppressed.

[0189] Thus, even when the number of dicing lines is large, a semiconductor wafer can be favorably diced into a plurality of semiconductor chips, the cut edges can be sufficiently maintained, and the breakage of the dicing tape during dicing can be relatively suppressed. (4)

[0191] A dicing die bonding film comprising:

[0192] A dicing tape having an adhesive layer laminated on a base material layer; and

[0193] a die bonding layer laminated on the adhesive layer of the dicing tape,

[0194] The dicing die-bonding film has a tensile storage modulus at -10°C of 50 MPa or more and 250 MPa or less.

[0195] According to this configuration, when the dicing tape is attached to a semiconductor wafer and the dicing tape is expanded to cut the semiconductor wafer into a plurality of semiconductor chips, the dicing tape can be further stretched.

[0196] Thus, even when the number of dicing lines is large, a semiconductor wafer can be favorably diced into a plurality of semiconductor chips.

[0197] Furthermore, the incision can be sufficiently maintained. (5)

[0199] The dicing die-bonding film according to the above (4), wherein the loss factor at -10°C is 0.07 or more and 0.18 or less.

[0200] Even when the number of dicing lines is large, a semiconductor wafer can be well diced into a plurality of semiconductor chips.

[0201] Furthermore, the incision can be sufficiently maintained. (6)

[0203] The dicing die-bonding film according to (4) or (5) above, wherein the elongation at break at -10°C is 450% or more and 600% or less.

[0204] According to this configuration, even when the number of dicing lines is large, a semiconductor wafer can be favorably diced into a plurality of semiconductor chips, the cut edges can be sufficiently maintained, and breakage of the dicing tape during dicing can be relatively suppressed.

[0205] It should be noted that the dicing tape and dicing die bonding film of the present invention are not limited to the aforementioned embodiments. In addition, the dicing tape and dicing die bonding film of the present invention are not limited by the aforementioned effects. The dicing tape and dicing die bonding film of the present invention can be variously modified within the scope of the present invention.

[0206] Example

[0207] The following examples are provided to further illustrate the present invention in detail, but are not intended to limit the scope of the present invention.

[0208] [Example 1]

[0209] <Formation of Base Material Layer>

[0210] Two types of three-layer extrusion T-die molding machines were used to mold a substrate layer having a three-layer structure of layer A / layer B / layer C (a three-layer structure in which layer B is the center layer and layers A and C are laminated on both sides of layer B as outer layers). Metallocene PP (trade name: WINTEC WFX4M, manufactured by Japan Polypropylene Co., Ltd.) was used as the resin for layer A and layer C, and EVA (trade name: EVAFLEX EV250, manufactured by Dupont-Mitsui Polychemicals Co., Ltd.) was used as the resin for layer B.

[0211] The extrusion molding was performed at a die temperature of 190°C. That is, the A layer, the B layer, and the C layer were extruded at 190°C. The thickness of the substrate layer obtained by extrusion molding was 100 μm. It should be noted that the thickness ratio (layer thickness ratio) of the A layer, the B layer, and the C layer was A layer: B layer: C layer = 1:10:1.

[0212] After the formed base material layer is sufficiently cured, the cured base material layer is wound into a roll to obtain a roll body.

[0213] <Production of cutting tape>

[0214] The adhesive composition was applied from the roll substrate layer to one surface of the substrate layer using an applicator to a thickness of 10 μm. The substrate layer coated with the adhesive composition was heated and dried at 110° C. for 3 minutes to form an adhesive layer, thereby obtaining a dicing tape.

[0215] The above-mentioned adhesive composition was prepared as follows.

[0216] First, 173 parts by mass of INA (isononyl acrylate), 54.5 parts by mass of HEA (hydroxyethyl acrylate), 0.46 parts by mass of AIBN (2,2′-azobisisobutyronitrile), and 372 parts by mass of ethyl acetate were mixed to obtain a first resin composition.

[0217] Thereafter, the first resin composition was added to the round-bottomed separable flask of the polymerization experimental apparatus equipped with a round-bottomed separable flask (capacity 1 L), a thermometer, a nitrogen inlet tube and a stirring blade, and the liquid temperature of the first resin composition was brought to room temperature (23° C.) while stirring the first resin composition, and the atmosphere in the round-bottomed separable flask was purged with nitrogen for 6 hours.

[0218] Next, while nitrogen was flowing into the round-bottom separable flask, the first resin composition was kept at a liquid temperature of 62° C. for 3 hours while being stirred, and then further kept at 75° C. for 2 hours to polymerize the INA, HEA, and AIBN to obtain a second resin composition. Thereafter, the flow of nitrogen into the round-bottom separable flask was stopped.

[0219] The second resin composition was cooled until the liquid temperature reached room temperature, and then 52.5 parts by mass of 2-isocyanatoethyl methacrylate (manufactured by Showa Denko K.K., trade name "Karenz MOI (registered trademark)") as a compound having a polymerizable carbon-carbon double bond and 0.26 parts by mass of dibutyltin IV dilaurate (manufactured by Wako Pure Chemical Industries, Ltd.) were added to the second resin composition to obtain a third resin composition, and the obtained third resin composition was stirred in an air atmosphere at a liquid temperature of 50°C for 24 hours.

[0220] Thereafter, 0.75 parts by mass of CORONATE L (isocyanate compound) and 2 parts by mass of Omnirad 127 (photopolymerization initiator) were added to the third resin composition based on 100 parts by mass of the polymer solid content, and the third resin composition was diluted with ethyl acetate to a solid content concentration of 20% by mass to prepare an adhesive composition.

[0221] <Production of Dicing Die Bonding Film>

[0222] 100 parts by mass of an acrylic resin (manufactured by Nagase Chemical Co., Ltd., trade name "SG-P3", glass transition temperature 12°C), 46 parts by mass of an epoxy resin (manufactured by Mitsubishi Chemical Corporation, trade name "JER1001"), 51 parts by mass of a phenolic resin (manufactured by Meiwa Chemicals Co., Ltd., trade name "MEH-7851ss"), 191 parts by mass of spherical silica (manufactured by Admatechs, trade name "SO-25R"), and 0.6 parts by mass of a curing catalyst (manufactured by Shikoku Chemicals Co., Ltd., trade name "CUREZOL PHZ") are added to methyl ethyl ketone and mixed to obtain a chip bonding composition having a solid content concentration of 20% by mass.

[0223] Afterwards, the chip bonding composition is applied to the silicone-treated surface of a PET-based separator (50 μm thick) serving as a release liner using an applicator in a manner to a thickness of 10 μm, and the composition is dried at 130°C for 2 minutes to remove the solvent from the chip bonding composition, thereby obtaining a chip bonding sheet having a chip bonding layer stacked on the release liner.

[0224] Thereafter, the side of the die-bonding sheet on which the release sheet is not laminated is bonded to the pressure-sensitive adhesive layer of the dicing tape, and then the release liner is peeled from the die-bonding layer to obtain a dicing die-bonding film having a die-bonding layer.

[0225] The tensile storage modulus at -10°C and the loss elastic modulus at -10°C of the dicing tape obtained as described above were measured as follows, and the loss factor at -10°C was calculated.

[0226] Furthermore, the elongation at break at -10°C was calculated by measuring the length of the test piece when it broke as follows.

[0227] Furthermore, the dicing property and the kerf maintenance property when dicing into micro-chips using a dicing die-bonding film during expansion were evaluated.

[0228] (Tensile storage modulus and loss factor)

[0229] A test piece with a length of 40 mm (measurement length) × a width of 10 mm was cut out from the cutting tape described in Example 1, and the tensile storage modulus and loss elastic modulus of the test piece were measured in the temperature range of -50 to 100°C using a solid viscoelasticity measuring apparatus (model RSAIII, manufactured by Rheometric Scientific Co., Ltd.) at a frequency of 1 Hz, a strain of 0.1%, a heating rate of 10°C / min, and a chuck distance of 22.5 mm.

[0230] At this time, the tensile storage modulus at -10°C and the loss elastic modulus at -10°C were determined by reading the values ​​at -10°C.

[0231] Furthermore, the loss factor at -10°C was calculated by dividing the value of the tensile storage modulus at -10°C by the value of the loss factor at -10°C.

[0232] (Elongation at break)

[0233] A test piece of 120 mm in length (measurement length, L0) × 10 mm in width is cut out from the cutting tape described in Example 1. Using a tensile testing machine (AUTOGRAPH AG-IS, manufactured by Shimadzu Corporation), the test piece is stretched along the length direction under the conditions of a measuring temperature (-10°C), a chuck distance of 50 mm and a stretching speed of 100 mm / min, and the length (L1) of the test piece when it breaks is measured.

[0234] Then, the elongation at break E at -10°C was calculated based on the following formula.

[0235] Elongation at break E = (L1-L0) / L0×100

[0236] (Division into very small chips)

[0237] A bare wafer (300 mm in diameter) and a dicing ring were attached to the dicing die bonding film described in Example 1. Next, the semiconductor wafer and the die bonding layer were diced using a die separation device DDS2300 (manufactured by DISCO Corporation), and the dicing properties of the dicing into very small chips were evaluated. The bare wafer was diced into bare chips (very small chips) of a size of 2 mm in length × 2 mm in width × 0.030 mm in thickness.

[0238] Specifically, the cutting property was evaluated as follows.

[0239] First, a cold expansion unit is used to cut the bare wafer and the chip bonding layer under the conditions of an expansion temperature of -15°C, an expansion speed of 100 mm / sec, and an expansion amount of 14 mm to obtain a semiconductor chip with a chip bonding layer.

[0240] Next, the expansion was performed at room temperature, at an expansion speed of 1 mm / sec, and at an expansion distance of 8 mm. Furthermore, while maintaining the expansion state, the dicing die bonding film at the boundary with the outer edge of the bare wafer was thermally shrunk at a heating temperature of 250°C, a heating distance of 18 mm, and a rotation speed of 5° / sec.

[0241] Next, the cut portion of the semiconductor chip with the die bonding layer was observed under a microscope to calculate the cut rate, and a cut rate of 90% or more was evaluated as 0, and a cut rate of less than 90% was evaluated as ×.

[0242] (Evaluation of incision maintenance)

[0243] A bare wafer (300 mm in diameter, hereinafter also referred to as a circular wafer) and a dicing ring were attached to the dicing die-bonding film described in Example 1. Next, the bare wafer and the die-bonding layer were diced using a die separation device DDS2300 (manufactured by DISCO Corporation), and the cut retention after dicing was evaluated.

[0244] The bare wafer is cut into bare chips (ultra-small chips) of a size of 2 mm in length×2 mm in width×0.030 mm in thickness.

[0245] Specifically, the incision maintainability was evaluated in the following manner.

[0246] First, a cold expansion unit is used to cut the bare wafer and the chip bonding layer under the conditions of an expansion temperature of -15°C, an expansion speed of 100 mm / sec, and an expansion amount of 14 mm to obtain a plurality of bare chips with chip bonding layers.

[0247] Next, normal temperature expansion was performed at room temperature, with an expansion speed of 1 mm / sec and an expansion distance of 5 mm. Furthermore, while maintaining the expansion state, the dicing die bonding film at the boundary with the outer edge of the bare wafer was thermally shrunk at a heating temperature of 250°C, a heating distance of 18 mm and a rotation speed of 5° / sec.

[0248] Next, a digital microscope (VHX-6000, manufactured by Keyence Corporation) was used to measure the incision. Specifically, after the heat expansion was completed (after heat shrinkage), the interval between one chip and other chips in the cut portion (hereinafter also referred to as the interval length) was observed using a digital microscope to measure the interval length. The interval length was measured at 5 random locations in the MD direction and the TD direction. As the incision, the minimum value among the measured values ​​of the interval length was used.

[0249] If the notch was 30 μm or more, it was evaluated as ○ (notch was maintained), and if the notch was less than 30 μm, it was evaluated as × (notch was not maintained).

[0250] It should be noted that the above-mentioned five optional locations refer to: four locations at the outermost circumference of the circular wafer and spaced apart from each other by approximately 90° along the circumferential direction, and the vicinity of the center of the circular wafer.

[0251] [Example 2]

[0252] The dicing tape and dicing die bonding film described in Example 2 were obtained in the same manner as in Example 1 except that the first polymer blend (a blend of EVAFLEX EV250 and HDPE (high-density polyethylene). The mass ratio is EV250:HDPE=90:10. Made by Dupont-Mitsui Polychemicals) was used in layer B of the substrate layer.

[0253] In addition, the dicing tape described in Example 2 was subjected to the same operation as in Example 1, and the tensile storage modulus at -10°C and the loss modulus at -10°C were measured, and the elongation at break at -10°C and the loss factor at -10°C were calculated.

[0254] Furthermore, in the same manner as in Example 1, the dicing property and the dicing retention property of the microchips obtained by dicing the die-bonding film during expansion were evaluated.

[0255] [Example 3]

[0256] A dicing tape and a dicing die-bonding film described in Example 3 were obtained in the same manner as in Example 1 except that the base layer had a single-layer structure and EVAFLEX P1007 (manufactured by Dupont-Mitsui Polychemicals) was used as the resin constituting the resin layer.

[0257] In addition, the dicing tape described in Example 3 was measured in the same manner as in Example 1 to measure the tensile storage modulus at -10°C and the loss modulus at -10°C, and to calculate the elongation at break at -10°C and the loss factor at -10°C.

[0258] Furthermore, in the same manner as in Example 1, the dicing property and the dicing retention property of the microchips obtained by dicing the die-bonding film during expansion were evaluated.

[0259] [Comparative Example 1]

[0260] The dicing tape and dicing die bonding film described in Comparative Example 1 were obtained in the same manner as in Example 1 except that a second polymer blend (a blend of EVAFLEX EV250 and HDPE (high-density polyethylene). The mass ratio is EV250:HDPE=80:20. Made by Dupont-Mitsui Polychemicals) was used in layer B of the substrate layer.

[0261] In addition, the dicing tape described in Comparative Example 1 was measured for its tensile storage modulus at -10°C and its loss modulus at -10°C in the same manner as in Example 1, and its elongation at break at -10°C and its loss factor at -10°C were calculated.

[0262] Furthermore, in the same manner as in Example 1, the dicing property and the dicing retention property of the microchips obtained by dicing the die-bonding film during expansion were evaluated.

[0263] [Comparative Example 2]

[0264] A dicing tape and a dicing die-bonding film described in Comparative Example 2 were obtained in the same manner as in Example 1 except that EVAFLEX V523 (manufactured by Dupont-Mitsui Polychemicals) was used as the layer B of the base material layer.

[0265] In addition, the dicing tape described in Comparative Example 2 was measured in the same manner as in Example 1 to measure the tensile storage modulus at -10°C and the loss modulus at -10°C, and to calculate the elongation at break at -10°C and the loss factor at -10°C.

[0266] Furthermore, in the same manner as in Example 1, the dicing property and the dicing retention property of the microchips obtained by dicing the die-bonding film during expansion were evaluated.

[0267] The following Table 1 shows the results of measuring the tensile storage modulus at -10°C and the loss elastic modulus at -10°C for the dicing tape described in each example, as well as the results of calculating the elongation at break at -10°C and the loss coefficient at -10°C, and the results of evaluating the dicing properties and cut retention properties of extremely small chips cut using the dicing chip bonding film described in each example.

[0268] [Table 1]

[0269]

[0270] As shown in Table 1, the values ​​of tensile storage modulus of the dicing tapes described in Examples 1 to 3 at -10°C all fall within the range of 50 MPa to 250 MPa, and the dicing die bonding films described in Examples 1 to 3 are excellent in the evaluation of dicing properties into extremely small chips and the evaluation of cut maintenance properties.

[0271] Furthermore, according to Table 1, the loss coefficient values ​​of the dicing tapes described in Examples 1 to 3 at -10°C all fall within the range of 0.07 to 0.18, and the elongation at break values ​​at -10°C fall within the range of 450% to 600%.

[0272] In contrast, it can be seen that the values ​​of the tensile storage modulus of the dicing tapes described in Comparative Examples 1 and 2 at -10°C deviate from the range of more than 50 MPa and less than 250 MPa, and the dicing chip bonding films described in Comparative Examples 1 and 2 are poor in the evaluation of dicing properties into extremely small chips and the evaluation of cut maintenance properties.

[0273] In addition, according to Table 1, the loss coefficient values ​​of the dicing tapes described in Comparative Examples 1 and 2 at -10°C deviate from the range of more than 0.07 and less than 0.18, and the elongation at break values ​​at -10°C deviate from the range of more than 450% and less than 600%. In particular, when the dicing chip bonding film described in Comparative Example 1 was used to evaluate the dicing properties and cut maintenance properties of cutting into extremely small chips, breakage (damage) that became a practical problem was observed in the dicing tape.

[0274] It should be noted that although the evaluation of dicing properties into micro-chips and the evaluation of cut maintenance properties described in Table 1 are for dicing die-bonding films, it is expected that the same results as those shown in Table 1 can be obtained for dicing tapes included in dicing die-bonding films.

Claims

1. A dicing tape comprising a base material layer and an adhesive layer laminated thereon, Its tensile storage modulus at -10°C is 50 MPa or more and 250 MPa or less, Its loss factor at -10°C is 0.07 or more and 0.18 or less, Its elongation at break at -10°C is 450% or more and 600% or less, The substrate layer has an elastomer layer and a non-elastic layer, and has a structure in which the non-elastic layers are arranged on both sides of the elastomer layer, the elastomer layer contains an elastomer, and the non-elastic layer contains a polypropylene resin that is a polymerization product obtained using a metallocene catalyst.

2. A dicing die bonding film comprising: A dicing tape having an adhesive layer laminated on a base material layer; and a die bonding layer laminated on the adhesive layer of the dicing tape, The dicing tape has a tensile storage modulus of 50 MPa or more and 250 MPa or less at -10°C, The loss coefficient of the dicing tape at -10°C is 0.07 or more and 0.18 or less, The breaking elongation of the cutting tape at -10°C is 450% or more and 600% or less, The substrate layer has an elastomer layer and a non-elastic layer, and has a structure in which the non-elastic layers are arranged on both sides of the elastomer layer, the elastomer layer contains an elastomer, and the non-elastic layer contains a polypropylene resin that is a polymerization product obtained using a metallocene catalyst.