Semiconductor device and method for forming the same

Abstract

The invention relates to a semiconductor device and a method for forming the same, which can solve the problem that the device formed in the through hole is easy to fall off and improve the yield of the final product. The semiconductor device includes a substrate; at least three stacked support layers formed above the substrate; at least two through holes, one end of which is arranged on the upper surface of the topmost support layer and extends downward in a direction perpendicular to the substrate surface, and at least two through holes have different lengths; the distribution of the support layer gradually becomes sparse downward in a direction perpendicular to the substrate surface.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and in particular to a semiconductor device and a method for forming the same. Background Art

[0002] In the process of wafer production and processing, stacking structures are often formed on the surface of the substrate, and through holes are formed in the stacking structure to enter the stacking structure. These through holes can be used to form some devices that enter the stacking structure to achieve specific functions. For example, the capacitor of the memory is produced on the basis of the capacitor hole. The capacitor hole passes through several layers of support layers, and the support layer through which the capacitor hole passes provides support for the capacitor device in the capacitor hole to prevent the capacitor device from falling off and affecting the yield of the memory finally produced.

[0003] However, in the prior art, even if a support layer is provided, the device formed in the through hole may still fall off, which will seriously affect the yield of the final product. Summary of the invention

[0004] The object of the present invention is to provide a semiconductor device and a method for forming the same, which can solve the problem that the device formed in the through hole is easy to fall off and improve the yield of the final product.

[0005] In order to solve the above technical problems, a semiconductor device is provided below, comprising: a substrate; at least three stacked support layers formed above the substrate; at least two through holes, one end of which is arranged on the upper surface of the topmost support layer and extends downward in a direction perpendicular to the surface of the substrate, and there are at least two through holes with different lengths; the distribution of the support layer gradually becomes sparse downward in a direction perpendicular to the surface of the substrate.

[0006] Optionally, the number of the supporting layers is more than 4, and each supporting layer is separated by a dielectric layer, and the distance between the lower surface of the uppermost supporting layer and the upper surface of the lowermost supporting layer is the maximum distance.

[0007] Optionally, a distance between an intermediate supporting layer closest to the lowest supporting layer and the lowest supporting layer is half of the maximum distance.

[0008] Optionally, the distance between an intermediate supporting layer closest to the lowest supporting layer and the lowest supporting layer is increased or decreased by an adjustment distance based on half of the maximum distance.

[0009] Optionally, the maximum distance is 1500nm to 2500nm, and the adjustment distance is less than or equal to 600nm.

[0010] Optionally, the support layer has a thickness ranging from 10 to 200 nm.

[0011] Optionally, the thickness of the support layer gradually increases downward along a direction perpendicular to the surface of the substrate.

[0012] Optionally, the distance between two adjacent support layers ranges from 100 to 1000 nm.

[0013] Optionally, the support layer includes carbon-containing silicon nitride, or at least one of silicon nitrides, and the dielectric layer includes at least one of boron- and phosphorus-containing silicon oxide, tetraethyl orthosilicate, and silane.

[0014] In order to solve the above technical problems, the following provides a method for forming a semiconductor device, comprising the following steps: forming at least three stacked support layers above a substrate, and the distribution of the support layers gradually becomes sparse downward in a direction perpendicular to the surface of the substrate; etching downward from the upper surface of the topmost support layer in a direction perpendicular to the surface of the substrate to form at least two through holes, and there are at least two through holes with different lengths.

[0015] The semiconductor device and the method for forming the same of the present invention form at least three stacked support layers above the substrate, and the distribution of the support layers gradually becomes sparse downward in a direction perpendicular to the surface of the substrate. Therefore, when a through hole is provided with the top arranged on the upper surface of the uppermost support layer, when the through hole extends downward from the upper surface of the uppermost support layer in a direction perpendicular to the surface of the substrate, it first passes through an area where the support layers are more densely distributed. Even if the length of the through hole is short, it is more likely to pass through more support layers, so that when other devices are subsequently formed in the through hole, the other devices can obtain support from more support layers, thereby making it less likely for the other devices formed in the through hole to fall off.

[0016] The semiconductor device and the method for forming the same can be applied to situations where through holes have different lengths. For many through holes of different lengths and types formed on a substrate, enough supporting layers can be provided to support devices formed in various types of through holes to prevent these devices from falling.

[0017] When the semiconductor device and the method for forming the same of the present invention are applied to the preparation of capacitors of a memory circuit, they can provide good support for the capacitor device formed in the through hole, reduce the probability of defects in the memory circuit finally obtained, and improve the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a cross-sectional schematic diagram of a semiconductor device in a specific implementation manner of the present invention.

[0019] Figure 2 It is a cross-sectional schematic diagram of a semiconductor device in a specific implementation manner of the present invention.

[0020] Figure 3 It is a cross-sectional schematic diagram of a semiconductor device in a specific implementation manner of the present invention.

[0021] Figure 4 The figure is a schematic flow chart of the steps of a method for forming a semiconductor device in a specific embodiment of the present invention. DETAILED DESCRIPTION

[0022] Research has found that the insufficient number of support layers that the through-hole passes through is an important reason for the device formed in the through-hole to fall off. When forming the support layers that support the through-hole, they are usually formed uniformly, and different numbers of support layers are not formed for deeper or shallower through-holes in a certain area to provide sufficient support for different through-holes.

[0023] A semiconductor device and a method for forming the same proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0024] See also Figure 1 , is a cross-sectional schematic diagram of a semiconductor device in a specific implementation manner of the present invention.

[0025] In this specific embodiment, a semiconductor device is provided, comprising: a substrate 100; at least three stacked support layers 101 formed above the substrate 100; at least two through holes 103, one end of which is arranged on the upper surface of the uppermost support layer 101 and extends downward in a direction perpendicular to the surface of the substrate 100, and at least two through holes 103 have different lengths; the distribution of the support layer 101 gradually becomes sparse downward in a direction perpendicular to the surface of the substrate 100.

[0026] In this specific embodiment, the through hole 103 is used to prepare devices whose length direction is perpendicular to the surface of the substrate 100, and these devices are supported by all the supporting layers 101 through which the through hole 103 passes.

[0027] In this specific embodiment, since the distribution of the support layer 101 gradually becomes sparser downward in the direction perpendicular to the surface of the substrate 100, the higher the support layer 101 is, the denser the distribution is. When the through hole 103 extends downward from the surface of the uppermost support layer 101 in the direction perpendicular to the substrate surface 101, the first area through which the support layer is most densely distributed is the through hole 103. When the through hole 103 passes through this area, since the support layer 101 distributed in this area is denser, even if the length of the through hole 103 is short, there is a greater probability that it passes through the multi-layer support layer 101, so that the device formed in the through hole 103 can be supported by the multi-layer support layer 101, reducing the possibility of the device formed in the through hole 103 falling off.

[0028] In this specific embodiment, the semiconductor device can be used in situations where the through holes 103 have different lengths. For many through holes 103 of different lengths and types formed on a substrate, enough supporting layers 101 are provided as much as possible to support devices formed in various types of through holes 103 to prevent these devices from falling.

[0029] Furthermore, since the through hole 103 extends from the top to the bottom, the upper region may be sufficiently supported by the supporting layer 101, so there is no need to set more supporting layers 101 in the lower region to further support the device formed in the through hole 103. Therefore, fewer supporting layers can be set in the lower region to save the material cost required for setting up the supporting layers.

[0030] In a specific embodiment, the substrate 100 is a semiconductor substrate, and germanium and silicon are commonly used as raw materials for the semiconductor substrate. In fact, the preparation material of the semiconductor substrate can be selected according to needs, such as gallium arsenide, gallium phosphide, cadmium sulfide, zinc sulfide, etc.

[0031] In a specific embodiment, when the semiconductor device is applied to a memory circuit, the semiconductor device can be used to make a capacitor of the memory. This can match the capacitor of the memory prepared in the edge area of ​​the wafer. In the area at the edge of the wafer, the through holes 103 generated are often of different lengths. Since a support layer 101 is provided that is gradually sparse from top to bottom, even if a capacitor device is provided in a through hole 103 with a shorter length, the through hole 103 may also pass through more support layers 101, so that the capacitor device in the through hole 103 can also obtain the support force provided by more support layers 101, reducing the possibility of the capacitor device falling.

[0032] In a specific embodiment, the number of the support layers 101 is more than 4, and each support layer 101 is separated by a dielectric layer 102, and the distance between the lower surface of the uppermost support layer 101 and the upper surface of the lowermost support layer 101 is the maximum distance.

[0033] In a specific embodiment, the dielectric layer 102 includes at least one of boron- and phosphorus-containing silicon oxide, tetraethyl orthosilicate, and silane. In a specific embodiment, the dielectric layer 102 has a thickness of 100 to 800 nm.

[0034] When applied to a capacitor device of a memory, the dielectric layer 102 needs to be eliminated later, so the thickness of the dielectric layer 102 needs to be planned to prevent the dielectric layer 102 from being too thick, which will take a long time to eliminate the dielectric layer 102 and affect the yield of the product.

[0035] In this specific embodiment, more than four layers of support layers 101 are provided to ensure that the number of support layers 101 is sufficient, so that when the distance between the uppermost support layer 101 and the lowermost support layer 101 is the maximum distance, the number of support layers 101 distributed within the maximum distance is greater. In this specific embodiment, even if the length of the through hole 103 is shorter, it is possible that due to the denser distribution of support layers 101 in the area close to the uppermost support layer 101, the device formed in the through hole 103 can also be supported by sufficient support layers 101, and the possibility of falling is low.

[0036] In a specific embodiment, the support layer 101 includes carbon-containing silicon nitride, or at least one of silicon nitride, and the thickness of a single layer of the support layer 101 is 10 to 200 nm, so as to have sufficient support strength and can play a strong supporting role for the device formed in the through hole 103. In fact, the thickness of each layer of the support layer 101 can also be set as needed. The thicker the support layer 101 is, the larger the contact area between the support layer 101 and the device is, and the greater the support force of the support layer 101 on the device is.

[0037] In a specific implementation, each support layer 101 has the same thickness, and each support layer 101 can provide equal support force to the device formed in the through hole 103. In fact, the thickness of each support layer 101 can also be set to be different according to needs.

[0038] In a specific embodiment, the distance between two adjacent support layers 101 is determined by the thickness of the dielectric layer 102. The thicker the dielectric layer 102 is, the greater the distance between two adjacent support layers 101. Therefore, the distance between two adjacent support layers 101 is also between 100 and 800 nm.

[0039] In a specific implementation, the material of the dielectric layer 102 includes at least one of boron- and phosphorus-containing silicon oxide, tetraethyl orthosilicate, and silane.

[0040] In a specific embodiment, when the number of the supporting layers 101 is four or more, the distance between an intermediate supporting layer closest to the bottom supporting layer 101 and the bottom supporting layer 101 is half of the maximum distance. When the semiconductor device in this specific embodiment is used to prepare a capacitor in a memory circuit, it is possible to avoid major changes to the existing production process.

[0041] In a specific embodiment, when the number of the support layers 101 is four or more, the distance between an intermediate support layer closest to the lowest support layer 101 and the lowest support layer 101 is increased or decreased by an adjustment distance based on half of the maximum distance.

[0042] In this specific embodiment, when the total number of support layers 101 is the same, the higher the position of the intermediate support layer is set, the denser the distribution of the support layer 101 is in the area between the intermediate support layer and the top support layer. At this time, when the through hole 103 passes through the area between the intermediate support layer and the top support layer 101, even if the length of the through hole 103 is short, it is more likely to pass through enough support layers 101 and obtain support from enough support layers 101, thereby reducing the possibility of the device formed in the through hole 103 falling. The lower the position of the intermediate support layer is set, the sparser the distribution of the support layer 101 is in the area between the intermediate support layer and the top support layer 101. When the length of the through hole 103 is short, when passing through the area between the intermediate support layer and the top support layer, the possibility of passing through enough support layers 101 is smaller, but this can be applied to the scene with a large number of support layers 101, so as to facilitate the arrangement of more support layers 101. Therefore, the position of the intermediate support layer can be selected as needed.

[0043] In this specific embodiment, when the total number of the supporting layers 101 is large enough, the middle supporting layer can be arranged closer to the bottom supporting layer 101, because at this time there are enough supporting layers 101, and the area between the middle supporting layer and the top supporting layer 101 needs to be arranged wide enough to ensure that the area between the middle supporting layer and the top supporting layer 101 can accommodate all supporting layers except the middle supporting layer, the top supporting layer 101 and the bottom supporting layer 101. When the total number of the supporting layers 101 is limited, the middle supporting layer can be arranged closer to the top supporting layer 101 to increase the distribution density of the supporting layers 101 in the area close to the top supporting layer 101.

[0044] See also Figure 2 , 3 ,in Figure 2 is a cross-sectional schematic diagram of a semiconductor device in a specific implementation manner of the present invention, Figure 3 It is a cross-sectional schematic diagram of a semiconductor device in a specific implementation manner of the present invention.

[0045] exist Figure 2In the specific embodiment shown, the distance between the middle support layer and the bottom support layer 101 is half of the maximum distance plus an adjustment distance. At this time, the distance between the middle support layer and the top support layer 101 is closer. When the number of support layers 101 distributed between the top support layer 101 and the middle support layer is constant, the distribution of support layers 101 between the top support layer 101 and the middle support layer is more dense. At this time, a through hole with a certain length has a greater probability of passing through more support layers 101. For example Figure 2 The second through hole from the left in the middle, Figure 2 The substrate can pass through three supporting layers 101 to obtain support from the three supporting layers 101 .

[0046] exist Figure 3 In the specific embodiment shown, the distance between the middle support layer and the bottom support layer 101 is half of the maximum distance minus an adjustment distance. In this case, the distance between the middle support layer and the top support layer 101 is relatively far. When the number of support layers 101 distributed between the top support layer 101 and the middle support layer is constant, the distribution of support layers 101 between the top support layer 101 and the middle support layer is more sparse. Figure 2 The second through hole 103 from the left corresponds to Figure 3 The second through hole 103 from the left in the figure can only pass through two supporting layers 101 and obtain support from the two supporting layers 101.

[0047] In a specific implementation, the adjustment distance is less than or equal to 600 nm. In this specific implementation, the adjustment distance can be set as needed.

[0048] In a specific embodiment, see Figure 1 When the stacked structure 104 includes only three support layers 101, the middle support layer is closer to the top support layer 101, so that the through hole 103 that does not extend into the lower half of the stacked structure 104 has a greater probability of passing through more support layers 101, so as to provide more support for the device arranged in the through hole 103.

[0049] In a specific implementation, the through hole 103 is used to form a capacitor of a memory, a capacitor device is formed in the through hole 103 , and the entrances of the through hole 103 are evenly distributed on the upper surface of the uppermost support layer 101 .

[0050] See also Figure 4, is a schematic flow chart of the steps of a method for forming a semiconductor device in a specific embodiment of the present invention. In this specific embodiment, a method for forming a semiconductor device is also provided, comprising the following steps: S401 forming at least three stacked support layers 101 above a substrate, and the distribution of the support layers 101 gradually becomes sparse downward along a direction perpendicular to the surface of the substrate 100; S402 etching downward from the upper surface of the topmost support layer 101 along a direction perpendicular to the surface of the substrate 100 to form at least two through holes 103, and at least two through holes 103 have different lengths.

[0051] In this specific embodiment, since the distribution of the support layer 101 gradually becomes sparse downward along the direction perpendicular to the surface of the substrate 100, when the through hole 103 extends into the interior of the stacked structure 104, it first passes through the upper region where the support layer 101 is more densely distributed, and then passes through the lower region where the support layer is more sparsely distributed, and can obtain sufficient support from the upper region. When the through hole 103 is short, it is also more likely to pass through multiple support layers 101, and the device formed in the shorter through hole 103 is also more likely to be supported by multiple support layers 101, reducing the possibility of most devices formed in the through hole 103 falling due to lack of support from the support layer 101, reducing the probability of defects in the memory finally obtained, and improving the product yield.

[0052] In one specific embodiment, the support layer 101 formed on the substrate 100 is realized by atomic layer deposition. In other specific embodiments, the support layer 101 can also be formed on the surface of the substrate 100 by chemical vapor deposition, physical vapor deposition and other methods.

[0053] In some specific embodiments, each supporting layer 101 is separated by a dielectric layer 102 , and the distance between the lower surface of the uppermost supporting layer 101 and the upper surface of the lowermost supporting layer 101 is the maximum distance.

[0054] In a specific embodiment, the dielectric layer 102 includes at least one of silicon oxide containing boron and phosphorus, tetraethyl orthosilicate and silane. In a specific embodiment, the dielectric layer 102 has a thickness of 100 to 800 nm. Therefore, the distance between two adjacent support layers 101 is also 100 to 800 nm.

[0055] In a specific embodiment, when forming the through hole 103, etching is performed downward from the upper surface of the uppermost support layer 101 in a direction perpendicular to the surface of the substrate 100, and directional etching is used, so that the sidewall of the finally formed through hole 103 is perpendicular to the surface of the substrate 100. In fact, a specific etching method can also be selected according to needs.

[0056] In a specific implementation, the through hole 103 is used to form a capacitor of a memory. When preparing the capacitor, a capacitor device needs to be formed in the through hole 103, and the capacitor device is supported by the supporting layer 101 through which the through hole 103 passes to prevent it from falling.

[0057] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A semiconductor device, It is characterized in that include: substrate; At least three stacked support layers are formed on the substrate, each of the support layers having the same thickness; at least two through holes, one end of which is disposed on the upper surface of the uppermost support layer and extends downward in a direction perpendicular to the surface of the substrate, and at least two of the through holes have different lengths; The distribution of the support layer gradually becomes sparse downward along a direction perpendicular to the surface of the substrate; The number of the support layers is more than 4, and each support layer is separated by a dielectric layer, and the distance between the lower surface of the top support layer and the upper surface of the bottom support layer is the maximum distance; the distance between an intermediate support layer closest to the bottom support layer and the bottom support layer is half of the maximum distance.

2. The semiconductor device according to claim 1, It is characterized in that The distance between an intermediate support layer closest to the lowest support layer and the lowest support layer is increased or decreased by an adjustment distance based on half of the maximum distance.

3. The semiconductor device according to claim 2, It is characterized in that The maximum distance is 1500nm to 2500nm, and the adjustment distance is less than or equal to 600nm.

4. The semiconductor device according to claim 1, It is characterized in that The thickness of the support layer ranges from 10 to 200 nm.

5. The semiconductor device according to claim 1, It is characterized in that The distance between two adjacent support layers ranges from 100 to 1000 nm.

6. The semiconductor device according to claim 1, It is characterized in that The support layer includes carbon-containing silicon nitride or at least one of silicon nitride, and the dielectric layer includes at least one of boron- and phosphorus-containing silicon oxide, tetraethyl orthosilicate and silane.

7. A method for forming a semiconductor device, It is characterized in that The following steps are involved: At least three stacked support layers are formed above the substrate, and the support layers are distributed vertically, and the thickness of each support layer is the same; The surface of the substrate gradually becomes sparse in a downward direction; Etching downward from the upper surface of the uppermost support layer in a direction perpendicular to the surface of the substrate to form at least two through holes, wherein at least two of the through holes have different lengths; The number of the support layers is more than 4, and each support layer is separated by a dielectric layer, and the distance between the lower surface of the top support layer and the upper surface of the bottom support layer is the maximum distance; the distance between an intermediate support layer closest to the bottom support layer and the bottom support layer is half of the maximum distance.

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