Flash memory data reading and writing method, device, storage medium and terminal equipment

Abstract

The present disclosure relates to a flash memory data reading and writing method, device, storage medium and terminal device, the method comprising: reading first data in a first area of ​​the flash memory according to a read data instruction; reading third data in a second area of ​​the flash memory when the address of the first data includes the address of the second data, wherein the second data is modified more frequently than other data in the first area; replacing the second data in the first data with the third data according to the address mapping relationship between the second data and the third data, to obtain the replaced first data. Through the embodiments of the present application, when reading flash memory data, it can be realized that data with a higher modification frequency is read according to the second area, without frequently modifying the first area, thereby reducing the probability of data errors, saving a lot of resources and increasing the service life of the flash memory.

Description

Technical Field

[0001] The present disclosure relates to the field of terminal equipment, and in particular to a flash memory data reading and writing method, device, storage medium and terminal equipment. Background Art

[0002] In mobile communication devices, flash memory is generally used as the storage medium. Flash memory is a non-volatile random access memory (NVRAM), a type of ROM, and can be erased and written more than 100,000 times.

[0003] In the prior art, the smallest unit of flash memory erasure is generally a block or sector. The resulting problem is that each time the data in the flash memory is modified, most of the data that does not need to be modified is usually erased, wasting a lot of time and resources. Therefore, a more efficient way to modify data in the flash memory is urgently needed. Summary of the invention

[0004] In view of this, the present disclosure proposes a flash memory data reading and writing method, apparatus, storage medium and terminal device.

[0005] According to one aspect of the present disclosure, a flash memory data reading and writing method is provided, the method comprising: reading first data in a first area in a flash memory according to a read data instruction; reading third data in a second area in the flash memory when the address of the first data includes the address of the second data, wherein the second data is modified more frequently than other data in the first area; replacing the second data in the first data with the third data according to an address mapping relationship between the second data and the third data, to obtain the replaced first data.

[0006] According to an embodiment of the present application, by reading the first data in the first area of ​​the flash memory according to a read data instruction, and when the address of the second data is included in the address of the first data, reading the third data in the second area of ​​the flash memory, and replacing the second data in the first data with the third data according to the address mapping relationship between the second data and the third data, to obtain the replaced first data, it can be achieved that when reading the flash memory data, data with a higher modification frequency can be read according to the second area, without the need to frequently modify the first area, thereby reducing the probability of data errors and saving a large amount of resources.

[0007] In a possible implementation, the method further includes: determining, according to a write data instruction, the second data in the fourth data to be written and the write address of the second data; erasing the third data in the second area; and writing the second data to be written into the second area as new third data according to the address mapping relationship and the write address of the second data.

[0008] According to an embodiment of the present application, by determining the second data in the fourth data to be written and the write address of the second data according to a write data instruction, erasing the third data in the second area, and writing the second data to be written into the second area according to the address mapping relationship and the write address of the second data as new third data, it can be achieved that when the data that is frequently modified in the flash memory needs to be modified, there is no need to erase most of the remaining data that does not need to be modified, and only the second area needs to be erased, which can save a lot of time and data transmission resources, and also prevent the accidental modification of data that does not need to be modified, thereby improving the service life of the flash memory.

[0009] In a possible implementation, the method further includes: determining a write address of fourth data to be written according to a write data instruction; when the fourth data includes other data other than the second data, erasing the sector or block corresponding to the write address of the fourth data in the first area; and writing the fourth data into the first area.

[0010] According to an embodiment of the present application, by determining the write address of the fourth data to be written according to a write data instruction, when the fourth data includes other data other than the second data, erasing the sector or block corresponding to the write address of the fourth data in the first area, and writing the fourth data to the first area, it is possible to modify the data in the flash memory except the second data, so that the modification result is more accurate and prevent accidental modification.

[0011] In a possible implementation manner, the method further includes: when the fourth data only includes the second data, not erasing the first area.

[0012] According to an embodiment of the present application, by not erasing the first area when only the second data is included in the fourth data, data modification can be made more flexible, data transmission resources can be saved, the number of flash memory erases can be reduced, and the life of the flash memory can be improved.

[0013] In a possible implementation manner, the method further includes: when the address of the second data changes, redetermining the address mapping relationship between the second data and the third data according to the changed address.

[0014] According to the embodiment of the present application, when the address of the second data changes, the address mapping relationship between the second data and the third data is redetermined according to the changed address, so that the address mapping relationship can be changed, which is more flexible and increases operability.

[0015] According to another aspect of the present disclosure, a flash memory data reading and writing device is provided, the device comprising: a first module, used to read first data in a first area in a flash memory according to a read data instruction; a second module, used to read third data in a second area in the flash memory when the address of the first data includes the address of the second data, wherein the second data is modified more frequently than other data in the first area; and a third module, used to replace the second data in the first data with the third data according to an address mapping relationship between the second data and the third data, to obtain the replaced first data.

[0016] In one possible implementation, the device also includes: a fourth module, used to determine the second data in the fourth data to be written and the write address of the second data according to the write data instruction; a fifth module, used to erase the third data in the second area; and a sixth module, used to write the second data to be written into the second area as new third data according to the address mapping relationship and the write address of the second data.

[0017] In one possible implementation, the device also includes: a seventh module, used to determine the write address of the fourth data to be written according to the write data instruction; an eighth module, used to erase the sector or block corresponding to the write address of the fourth data in the first area when the fourth data includes other data other than the second data; and a ninth module, used to write the fourth data into the first area.

[0018] In a possible implementation manner, the device further includes: a tenth module, configured to not erase the first area when the fourth data includes only the second data.

[0019] In a possible implementation, the device further includes: an eleventh module, configured to redetermine an address mapping relationship between the second data and the third data according to the changed address when the address of the second data changes.

[0020] According to another aspect of the present disclosure, a terminal device is provided, including a flash memory controller, wherein the flash memory controller is used to execute the above method.

[0021] According to another aspect of the present disclosure, a flash memory data reading device is provided, comprising: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to execute the above method.

[0022] According to another aspect of the present disclosure, a non-volatile computer-readable storage medium is provided, on which computer program instructions are stored, wherein the computer program instructions implement the above method when executed by a processor.

[0023] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0025] Figure 1 A structural diagram of a flash memory storage system according to an embodiment of the present application is shown.

[0026] Figure 2 A schematic diagram of flash memory partition according to an embodiment of the present application is shown.

[0027] Figure 3 A flow chart of modifying flash memory data according to an embodiment of the present application is shown.

[0028] Figure 4 A flow chart of reading flash memory data according to an embodiment of the present application is shown.

[0029] Figure 5 A flow chart of a flash memory data reading and writing method according to an embodiment of the present application is shown.

[0030] Figure 6 A flow chart of a flash memory data reading and writing method according to an embodiment of the present application is shown.

[0031] Figure 7 A flow chart of a flash memory data reading and writing method according to an embodiment of the present application is shown.

[0032] Figure 8 A structural diagram of a flash memory data reading and writing device according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0033] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0034] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0035] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0036] Figure 1 FIG. 2 shows a structural diagram of a flash memory storage system according to an embodiment of the present application. Figure 1 As shown, the flash memory storage system 100 may include a flash memory controller 110, a bus connection interface 120, and a flash memory 130. The flash memory storage system 100 may be connected to a host 200, and data may be written to or read from the flash memory storage system 100 through the host 200. The flash memory storage system 100 may be a portable disk, a memory card, or a solid state drive (SSD), which is not limited in the present application.

[0037] The flash memory controller 110 may be used to coordinate the overall operation of the bus connection interface 120 and the flash memory 130, such as data storage, reading and erasing, etc. The flash memory controller 110 may include a microprocessor 110a and a flash memory interface 110b.

[0038] The microprocessor 110a can be used to manage and operate the flash memory 130, such as performing wear leveling, bad block management, maintaining a mapping table, etc. In the embodiment of the present application, the microprocessor 110a can be used to execute the steps of the flash memory data reading and writing method according to the embodiment.

[0039] The flash memory interface 110b is coupled to the microprocessor 110a and can be used to access the flash memory 130. For example, data that the host 200 wants to write to the flash memory 130 can be converted into a format acceptable to the flash memory 130 via the flash memory interface 110b.

[0040] In addition, although not shown Figure 1 However, the flash memory controller 110 may further include a memory management module, a buffer memory, a power management module and other functional modules commonly found in general flash memories.

[0041] The bus connection interface 120 can be used to connect the host 200. The bus connection interface 120 can be a USB interface, a PCI Express interface, an IEEE 1394 interface, a SATA interface, an MS interface, an MMC interface, an SD interface, a CF interface, an IDE interface or other suitable data transmission interface, which is not limited in the present application.

[0042] The flash memory 130 is coupled to the flash memory controller 110 and can be used to store data. The flash memory 130 can be divided into a plurality of physical blocks 130-0 to 130-N. For the convenience of explanation, the physical blocks are referred to as blocks below. In the flash memory, a block can be the smallest unit of erasure. That is, each block contains the minimum number of storage units that are erased together. In a possible implementation, according to different flash memory designs, each block can also be divided into a plurality of sectors. In this case, the sector can be the smallest unit of erasure in the flash memory. Each block (or sector) can be divided into a plurality of pages (pages) ( Figure 1 In the example, a block can be divided into several pages. A page can be the smallest unit of programming, that is, a page can be the smallest unit of writing data or reading data. Each page can be divided into 256 bytes.

[0043] A block (or sector) may be composed of any number of pages, such as 64 pages, 128 pages, 256 pages, etc. The blocks 130-0 to 130-N may also be grouped into a number of zones. The memory is managed by zones so that the zones are operated independently of each other to increase the parallelism of the operation and simplify the complexity of the management.

[0044] Some examples of the flash memory data reading and writing method according to the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0045] Figure 2 FIG. 2 shows a schematic diagram of flash memory partition according to an embodiment of the present application. Figure 2 As shown, the flash memory can be divided into two parts: a data area and a replacement area. The data area can be used to store all data and may include multiple blocks (or sectors). The replacement area can be used to store data that needs to be modified frequently among all data. Since the size of data that needs to be modified frequently may only occupy one page, the size of the replacement area is usually smaller than the size of the data area.

[0046] Among them, A1, A2...An (hereinafter referred to as A(x)) and B1, B2...Bn (hereinafter referred to as B(x)) can represent a byte of data respectively, A(x) can be data in a specific position in the data area that needs to be frequently modified, n can be the number of bytes of data that needs to be frequently modified, x can be any value from 1 to n, B(x) can be data in the replacement area that corresponds to A(x), and the data value of B(x) can be used to replace the data value corresponding to A(x), that is, A(x) and B(x) can be a mapping relationship (for example, A1 corresponds to B1, A2 corresponds to B2...An corresponds to Bn). Among them, A1, A2...An can be continuous bytes or discontinuous bytes in the data area, A1, A2...An can be distributed in different blocks, different sectors or different pages in the data area, and B1, B2...Bn can be continuous bytes in the replacement area. The storage location (or address) of A(x) and the storage location of B(x) can be set according to actual needs.

[0047] The mapping relationship between A(x) and B(x) can be a mapping relationship between the storage location of A(x) and the storage location of B(x), that is, the location of B(x) in the flash memory can be mapped to the corresponding location of A(x) in the flash memory. For example, if the location of A1 in the data area is the second byte of the first block, the first sector, and the first page, and B1 is the first byte in the replacement area, then the first byte of the replacement area is mapped to the second byte of the first block, the first sector, and the first page of the data area. Among them, when it is necessary to change the position of data that needs to be frequently modified among all the data in the data area, the mapping relationship between the position of B(x) and the position of A(x) can be changed. For example, when it is necessary to select another position in the data area (such as the 1st block, the 1st sector, the 5th byte of the 1st page) to store data A1, the original mapping relationship can be modified so that the 1st byte of the replacement area where B1 is located is mapped to the modified 5th byte above, corresponding to A1 at the modified position, so as to obtain a new mapping relationship between A(x) and B(x). It should be noted that the present application does not limit the method of determining the position of data that needs to be frequently modified in the data area.

[0048] In a possible implementation, when the data in the data area of ​​the flash memory that needs to be frequently modified (i.e., the data corresponding to A(x)) needs to be modified, the content of B(x) can be determined based on the modified data, and then all the data in the replacement area can be erased, and the content of B(x) can be written into the replacement area. Thus, when the data in the data area of ​​the flash memory needs to be read, the corresponding data in the data area can be read, and according to the mapping relationship between A(x) and B(x), the data value of B(x) can be used to replace the data value corresponding to A(x) in the corresponding data read.

[0049] Therefore, when modifying the data stored in the flash memory, if only the data A(x) with a higher modification frequency is modified, it is not necessary to change other data in the data area of ​​the flash memory, and it is not necessary to erase the entire block or sector of the flash memory, which reduces the time for modifying the data stored in the flash memory, saves a lot of resources, and increases the service life of the flash memory. At the same time, only replacing the data that needs to be modified can also prevent accidental modification of other data in the flash memory.

[0050] Combination Figure 1 The application scenario shown, Figure 3 FIG. 2 shows a flow chart of modifying flash memory data according to an embodiment of the present application. Figure 3 As shown, the steps for modifying the data in the flash memory include:

[0051] In step S301 , the microprocessor 110 a receives a write data instruction from the host 200 .

[0052] Among them, the written data may refer to the modified data in the flash memory corresponding to the data that needs to be modified. The written data may include one page of data or multiple pages of data. The data may include data corresponding to the storage location where A(x) is located, or may not include data corresponding to the storage location where A(x) is located, or may only include data at part of the storage location where A(x) is located.

[0053] Step S302: When the microprocessor 110a determines that the write data address includes the storage location where A(x) is located, the microprocessor 110a erases the replacement area in the flash memory 130 through the flash memory interface 110b.

[0054] The write data address includes the storage location where A(x) is located. The write data address may include part of the storage location where A(x) is located, for example, only the storage locations where A1 and A2 are located, or the write data address may include all the storage locations where A(x) is located.

[0055] In step S303, the microprocessor 110a writes the data to be written to the location of A(x) to the location of B(x) corresponding to A(x) in the replacement area through the flash memory interface 110b.

[0056] For example, if the write data address only includes the storage locations where A1 and A2 are located, the data in the replacement area can be erased through the flash memory interface 110b, and the data to be written to the storage location where A1 is located is written to the storage location where B1 is located, and the data to be written to the storage location where A2 is located is written to the storage location where B2 is located. At the same time, the corresponding data of B3 to Bn are kept unchanged and written to the corresponding storage locations of B3 to Bn.

[0057] For another example, if the write data address includes all the storage locations where A(x) is located, the data in the replacement area can be erased through the flash memory interface 110b, and the data to be written to the storage location where A1-An is located can be written to the storage location where B1-Bn is located according to the mapping relationship between the addresses of A(x) and B(x).

[0058] Step S304: When the microprocessor 110a determines that the write data address includes not only the storage location where A(x) is located but also other storage locations, the microprocessor 110a erases the sector corresponding to the write data address in the data area through the flash memory interface 110b and directly writes data in the sector. Furthermore, according to the method of steps S301 to S303, the data of A(x) is correspondingly written into the replacement area as B(x).

[0059] The data written in the sector may include data at the storage location where the modified A(x) is located, data at other modified storage locations that need to be modified, and data at other storage locations in the sector that do not need to be modified.

[0060] Step S305: When the microprocessor 110a determines that the write data address includes only the storage location where A(x) is located and does not include other storage locations, the data area is not erased through the flash memory interface 110b after executing steps S301 to S303.

[0061] Therefore, when only a few bytes of data in the flash memory need to be modified, the data content corresponding to B(x) can be modified according to the mapping relationship between A(x) and B(x), without erasing the contents of an entire sector or block in the data area, thus saving a lot of resources and preventing accidental modification of other data.

[0062] For example, the write data address is the 1st block, the 2nd sector, and the 3rd page, which does not include the storage location where A(x) is located. The first block and the second sector can be erased through the flash memory interface 110b, and the modified data can be directly written in the sector.

[0063] For another example, the write data address is the first block, the second sector, and the third page, which includes both the storage location of A(x) (which may include part of A(x) or all of A(x)) and the storage location of other data. The first block and the second sector can be erased through the flash memory interface 110b, and the modified data can be directly written in the sector. In addition, according to the method of steps S301-S303, the data of A(x) is correspondingly written into the replacement area as B(x). The example of the write data address including the storage location of part of A(x) or all of A(x) can be referred to as shown in step S303.

[0064] For another example, if the write data address is only the storage location where A1 and A2 are located, the data area will not be erased. According to the method of steps S301 to S303, the data of A1 and A2 will be written into the replacement area accordingly as B1, B2, and B3-Bn remain unchanged.

[0065] It should be noted that the data position corresponding to A(x) is a position with a higher modification frequency in the data area. The position corresponding to A(x) can also be changed as needed. For example, if the data position corresponding to A1 (or A2, A3, etc.) changes but the data content does not change, the mapping relationship between A1 and B1 can be directly modified. For example, the position of the second byte in page 1 corresponding to A1 (or A2, A3, etc.) can be changed to the position of the third byte in page 2, so that B1 corresponds to the new position of A1. If it is determined that the third byte in the first block, the first sector, and the second page is a new position with a higher modification frequency, and the position does not correspond to any A(x), then the microprocessor 110a can replace the position of the second byte in page 1 originally corresponding to A1 (or A2, A3, etc.) with the position of the third byte in page 2, wherein the microprocessor 110a can determine the replaced A(x) according to a preset priority, thereby only needing to modify the mapping relationship between A1 and B1 so that B1 corresponds to the new position of A1, and then modify B1 according to steps S301-S303.

[0066] Combination Figure 1 The application scenario shown, Figure 4 FIG. 2 shows a flow chart of reading flash memory data according to an embodiment of the present application. Figure 4 As shown, the steps of reading data in the flash memory include:

[0067] In step S401, the microprocessor 110a receives a data read instruction from the host 200, and reads corresponding data in the data area through the flash memory interface 110b.

[0068] Among them, data of a certain page or multiple pages in the data area can be read, and the read data address may include the locations of all A(x), or may not include the locations of A(x), or may only include the locations of part of A(x) (such as only A1 and A2), and this application does not impose any restrictions on this.

[0069] Step S402: When the microprocessor 110a determines that the read data address includes the storage location where A(x) is located, the microprocessor 110a reads B(x) corresponding to A(x) in the replacement area through the flash memory interface 110b.

[0070] The microprocessor 110a may read all or part of the data in the replacement area. For example, when the microprocessor 110a determines that the read data address includes the storage location where A1 is located, the microprocessor 110a may read the page corresponding to the storage location where B1 is located in the replacement area through the flash memory interface 110b.

[0071] In step S403, the microprocessor 110a replaces A(x) in the data read from the data area with B(x) according to the mapping relationship, and sends the replaced data to the host.

[0072] Taking the example that the corresponding data in the read data area only contains the data corresponding to A1 and A2 in A(x), the microprocessor 110a can replace the data corresponding to A1 in the read data with the data corresponding to B1 in the replacement area; and replace the data corresponding to A2 with the data corresponding to B2 according to the mapping relationship between A(x) and B(x).

[0073] Therefore, if the data corresponding to A(x) is modified before reading, the latest modified data corresponding to A(x) can be obtained by replacement, thereby ensuring the accuracy of the data in the read data area.

[0074] Step S404: When the microprocessor 110a determines that the read data address does not include the storage location where A(x) is located, the microprocessor 110a directly reads the data in the data area corresponding to the read data address through the flash memory interface 110b.

[0075] Figure 5 FIG. 4 is a flow chart showing a flash memory data reading and writing method according to an embodiment of the present application. The method can be used in a terminal device, for example, in the microprocessor 100a described above in the terminal device, such as Figure 5 As shown, the method includes:

[0076] Step S501, reading first data in a first area in a flash memory according to a data read instruction;

[0077] Step S502, when the address of the first data includes the address of the second data, reading third data in the second area of ​​the flash memory, wherein the second data is modified more frequently than other data in the first area;

[0078] Step S503: according to the address mapping relationship between the second data and the third data, the second data in the first data is replaced with the third data to obtain the replaced first data.

[0079] According to an embodiment of the present application, by reading the first data in the first area of ​​the flash memory according to a read data instruction, and when the address of the second data is included in the address of the first data, reading the third data in the second area of ​​the flash memory, and replacing the second data in the first data with the third data according to the address mapping relationship between the second data and the third data, to obtain the replaced first data, it can be achieved that when reading the flash memory data, data with a higher modification frequency can be read according to the second area, without the need to frequently modify the first area, thereby reducing the probability of data errors and saving a large amount of resources.

[0080] The first area may be the data area mentioned above, the second area may be the replacement area mentioned above, the first data may be one page or multiple pages of data in the data area, the first data may include all, part or no second data, the second data may be data that is modified more frequently at a specific location, the address of the second data may be a specific location, the specific location may be one byte or multiple bytes, the third data may be data in the replacement area, may be one page or multiple pages. The second data and the address of the second data in the flash memory may be set as needed.

[0081] For example, the second data may be A(x) mentioned above, the third data may be B(x) mentioned above, the address of the first data may include the address of the second data, or the address of the first data may include at least one address of A1-An.

[0082] For examples of steps S501-S503, please refer to Figure 4 As shown in S401-S404.

[0083] Figure 6 FIG. 1 is a flow chart showing a flash memory data reading and writing method according to an embodiment of the present application. Figure 6 As shown, the method also includes:

[0084] Step S601, determining second data in fourth data to be written and a write address of the second data according to a write data instruction;

[0085] Step S602, erasing the third data in the second area;

[0086] Step S603: writing the second data to be written into the second area as new third data according to the address mapping relationship and the writing address of the second data.

[0087] According to an embodiment of the present application, by determining the second data in the fourth data to be written and the write address of the second data according to a write data instruction, erasing the third data in the second area, and writing the second data to be written into the second area according to the address mapping relationship and the write address of the second data as new third data, it can be achieved that when the data that is frequently modified in the flash memory needs to be modified, there is no need to erase most of the remaining data that does not need to be modified, and only the second area needs to be erased, which can save a lot of time and data transmission resources, and also prevent the accidental modification of data that does not need to be modified, thereby improving the service life of the flash memory.

[0088] The fourth data may be modified data corresponding to the data to be modified in the data area, and may correspond to the location of one or more pages in the flash memory. The address of the fourth data may include the address of all the second data, or may only include the address of part of the second data. Erasing the third data in the second area may be erasing all the third data in the second area. The second data to be written is written into the second area, wherein, in the case where the second data in the fourth data is not all the second data, the corresponding part in the second area that does not need to be changed may remain unchanged.

[0089] For examples of steps S601-S603, please refer to Figure 3 Steps S301-S303.

[0090] Figure 7 FIG. 1 is a flow chart showing a flash memory data reading and writing method according to an embodiment of the present application. Figure 7 As shown, the method also includes:

[0091] Step S701, determining a write address of fourth data to be written according to a write data instruction;

[0092] Step S702, when the fourth data includes other data than the second data, erasing the sector or block corresponding to the write address of the fourth data in the first area;

[0093] Step S703: write the fourth data into the first area.

[0094] According to an embodiment of the present application, by determining the write address of the fourth data to be written according to a write data instruction, when the fourth data includes other data other than the second data, erasing the sector or block corresponding to the write address of the fourth data in the first area, and writing the fourth data to the first area, it is possible to modify the data in the flash memory except the second data, so that the modification result is more accurate and prevent accidental modification.

[0095] The fourth data may be data in a sector or block, or in one page or multiple pages, corresponding to the write address.

[0096] If the fourth data includes both the second data and other data other than the second data, steps S701 to S703 and steps S601 to S603 may be executed.

[0097] For examples of steps S701-S703, please refer to Figure 3 Steps S301-S304.

[0098] In a possible implementation manner, the method further includes: when the fourth data only includes the second data, not erasing the first area.

[0099] According to an embodiment of the present application, when only the second data is included in the fourth data, the first area is not erased. At this time, only steps S601 to S603 can be executed, which can achieve more flexible modification of data, save data transmission resources, reduce the number of flash memory erase times, and improve the life of the flash memory.

[0100] An example of the above process can be found in Figure 3 Step S305.

[0101] In a possible implementation manner, the method further includes: when the address of the second data changes, redetermining the address mapping relationship between the second data and the third data according to the changed address.

[0102] According to the embodiment of the present application, when the address of the second data changes, the address mapping relationship between the second data and the third data is redetermined according to the changed address, so that the address mapping relationship can be changed, which is more flexible and increases operability.

[0103] Among them, the address mapping relationship between the second data and the third data can be redetermined by, in the presence of new second data, modifying the address in the original second data to the address corresponding to the new second data, and redetermining the address mapping relationship between the second data and the third data; or, when the corresponding address in the original second data changes, modifying the original address to the new address, and redetermining the address mapping relationship between the second data and the third data; or, adding a new address corresponding to the new second data, and redetermining the address mapping relationship between the second data and the third data.

[0104] Figure 8 FIG. 2 shows a structural diagram of a flash memory data reading and writing device according to an embodiment of the present application. Figure 8 As shown, the device comprises:

[0105] The first module 8001 is used to read the first data in the first area of ​​the flash memory according to the read data instruction;

[0106] A second module 8002 is configured to read third data in a second area in the flash memory when the address of the first data includes an address of second data, wherein the second data is modified more frequently than other data in the first area;

[0107] The third module 8003 is used to replace the second data in the first data with the third data according to the address mapping relationship between the second data and the third data, so as to obtain the replaced first data.

[0108] According to an embodiment of the present application, by reading the first data in the first area of ​​the flash memory according to a read data instruction, and when the address of the second data is included in the address of the first data, reading the third data in the second area of ​​the flash memory, and replacing the second data in the first data with the third data according to the address mapping relationship between the second data and the third data, to obtain the replaced first data, it can be achieved that when reading the flash memory data, data with a higher modification frequency can be read according to the second area, without the need to frequently modify the first area, thereby reducing the probability of data errors and saving a large amount of resources.

[0109] In one possible implementation, the device also includes: a fourth module, used to determine the second data in the fourth data to be written and the write address of the second data according to the write data instruction; a fifth module, used to erase the third data in the second area; and a sixth module, used to write the second data to be written into the second area as new third data according to the address mapping relationship and the write address of the second data.

[0110] According to an embodiment of the present application, by determining the second data in the fourth data to be written and the write address of the second data according to a write data instruction, erasing the third data in the second area, and writing the second data to be written into the second area according to the address mapping relationship and the write address of the second data as new third data, it can be achieved that when the data that is frequently modified in the flash memory needs to be modified, there is no need to erase most of the remaining data that does not need to be modified, and only the second area needs to be erased, which can save a lot of time and data transmission resources, and also prevent the accidental modification of data that does not need to be modified, thereby improving the service life of the flash memory.

[0111] In one possible implementation, the device also includes: a seventh module, used to determine the write address of the fourth data to be written according to the write data instruction; an eighth module, used to erase the sector or block corresponding to the write address of the fourth data in the first area when the fourth data includes other data other than the second data; and a ninth module, used to write the fourth data into the first area.

[0112] According to an embodiment of the present application, by determining the write address of the fourth data to be written according to a write data instruction, when the fourth data includes other data other than the second data, erasing the sector or block corresponding to the write address of the fourth data in the first area, and writing the fourth data to the first area, it is possible to modify the data in the flash memory except the second data, so that the modification result is more accurate and prevent accidental modification.

[0113] In a possible implementation manner, the device further includes: a tenth module, configured to not erase the first area when the fourth data includes only the second data.

[0114] According to an embodiment of the present application, by not erasing the first area when only the second data is included in the fourth data, data modification can be made more flexible, data transmission resources can be saved, the number of flash memory erases can be reduced, and the life of the flash memory can be improved.

[0115] In a possible implementation, the device further includes: an eleventh module, configured to redetermine an address mapping relationship between the second data and the third data according to the changed address when the address of the second data changes.

[0116] According to the embodiment of the present application, when the address of the second data changes, the address mapping relationship between the second data and the third data is redetermined according to the changed address, so that the address mapping relationship can be changed, which is more flexible and increases operability.

[0117] An embodiment of the present application further provides a terminal device, which includes a flash memory controller, and the flash memory controller is used to execute the above method.

[0118] An embodiment of the present application also provides a flash memory data reading device, comprising: a processor; and a memory for storing processor executable instructions; wherein the processor is configured to execute the above method.

[0119] An embodiment of the present application further provides a non-volatile computer-readable storage medium having computer program instructions stored thereon, wherein the computer program instructions implement the above method when executed by a processor.

[0120] The present disclosure may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0121] A computer-readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples of computer-readable storage media (a non-exhaustive list) include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium is not to be interpreted as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through a wire.

[0122] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0123] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0124] Various aspects of the present disclosure are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0125] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0126] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0127] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0128] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A flash memory data reading and writing method, characterized in that: The method comprises: Reading first data in a first area in the flash memory according to a data read instruction; In a case where the address of the first data includes the address of the second data, reading third data in the second area of ​​the flash memory, wherein the second data is modified more frequently than other data in the first area, the second data includes data of discontinuous and / or continuous bytes, the second area is used to store part of the data in the first area, the part of the data in the first area is modified more frequently than other data in the first area, and the third data includes data of continuous bytes of one or more pages; According to the address mapping relationship between the second data and the third data, the second data in the first data is replaced with the third data to obtain the replaced first data.

2. The method according to claim 1, characterized in that The method further comprises: Determine, according to the write data instruction, the second data in the fourth data to be written and the write address of the second data; erasing the third data in the second area; According to the address mapping relationship and the writing address of the second data, the second data to be written is written into the second area as new third data.

3. The method according to claim 1 or 2, characterized in that: The method further comprises: Determining, according to the write data instruction, a write address of fourth data to be written; When the fourth data includes other data than the second data, erasing the sector or block corresponding to the write address of the fourth data in the first area; The fourth data is written into the first area.

4. The method according to claim 3, characterized in that The method further comprises: When the fourth data includes only the second data, the first area is not erased.

5. The method according to claim 1, characterized in that The method further comprises: When the address of the second data changes, the address mapping relationship between the second data and the third data is re-determined according to the changed address.

6. A flash memory data reading and writing device, characterized in that: The device comprises: A first module is used to read first data in a first area in the flash memory according to a read data instruction; A second module is configured to read third data in a second area in the flash memory when the address of the first data includes the address of the second data, wherein the second data is modified more frequently than other data in the first area, the second data includes data of discontinuous and / or continuous bytes, the second area is used to store part of the data in the first area, the part of the data in the first area is modified more frequently than other data in the first area, and the third data includes data of continuous bytes of one or more pages; The third module is used to replace the second data in the first data with the third data according to the address mapping relationship between the second data and the third data, so as to obtain the replaced first data.

7. The device according to claim 6, characterized in that The device also includes: A fourth module is used to determine the second data in the fourth data to be written and the write address of the second data according to the write data instruction; A fifth module, configured to erase the third data in the second area; The sixth module is used to write the second data to be written into the second area as new third data according to the address mapping relationship and the writing address of the second data.

8. The device according to claim 6 or 7, characterized in that The device also includes: A seventh module is used to determine a write address of fourth data to be written according to the write data instruction; An eighth module, configured to erase a sector or a block corresponding to a write address of the fourth data in the first area when the fourth data includes other data than the second data; A ninth module is configured to write the fourth data into the first area.

9. The device according to claim 8, characterized in that The device also includes: A tenth module is used for not erasing the first area when the fourth data only includes the second data.

10. The device according to claim 6, characterized in that The device also includes: The eleventh module is used to redetermine the address mapping relationship between the second data and the third data according to the changed address when the address of the second data changes.

11. A terminal device, characterized in that: The terminal device comprises a flash memory controller, and the flash memory controller is used to execute the method according to any one of claims 1-5.

12. A flash memory data reading and writing device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to implement the method described in any one of claims 1-5.

13. A non-volatile computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method according to any one of claims 1 to 5 is implemented.

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