Bottom Lead Chemical Mechanical Planarization for TMR Magnetic Sensors

Abstract

A Wheatstone bridge array including a tunneling magnetoresistive (TMR) sensor and a method of manufacturing are disclosed. A bottom lead for the TMR sensor has a very small surface roughness not only due to chemical mechanical planarization (CMP) but also due to forming the bottom lead from multiple layers. The multiple layers include at least a bottom first metal layer and a top second metal layer disposed on the first metal layer. The second metal layer generally has a lower surface roughness than the first metal layer. In addition, the second metal layer has a slower polishing rate. Therefore, not only does the second metal layer reduce the surface roughness, but the slower polishing rate also enables the top second metal film to be polished to a very fine surface roughness of less than or equal to about 2 angstroms.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Application No. 16 / 730,771, filed on December 30, 2019, which claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 891,154, filed on August 23, 2019, both of which are hereby incorporated by reference in their entirety. Technical Field

[0003] Embodiments of the present disclosure generally relate to a Wheatstone bridge array and a method for manufacturing the same. Background Art

[0004] A Wheatstone bridge is a circuit used to measure an unknown resistance by balancing two legs of a bridge circuit, one of which contains the unknown component. The Wheatstone circuit provides extremely accurate measurements compared to a simple voltage divider.

[0005] The Wheatstone bridge includes a plurality of resistors, which in particular recently include magnetic materials, such as magnetic sensors. The magnetic sensors may include Hall effect magnetic sensors, anisotropic magnetoresistive sensors (AMR), giant magnetoresistive (GMR) sensors, and tunneling magnetoresistive (TMR) sensors. TMR sensors have very high sensitivity compared to other magnetic sensors.

[0006] The reliability and performance of a TMR sensor determines the magnetoresistive response. Various factors affect the reliability and performance of a TMR sensor, such as the material of the TMR sensor and, more importantly, the method of manufacturing the TMR sensor. For example, while two different TMR sensors can be manufactured using exactly the same material, the TMR sensors will have different reliability and performance due to different manufacturing processes.

[0007] Therefore, there is a need in the art for TMR sensors and methods of manufacturing the same that provide good reliability and performance. Summary of the invention

[0008] A Wheatstone bridge array including a tunneling magnetoresistive (TMR) sensor and a method of manufacturing are disclosed. The bottom lead for the TMR sensor has a very small surface roughness not only due to chemical mechanical planarization (CMP) but also due to forming the bottom lead from multiple layers. The multiple layers include at least a bottom first metal layer and a top second metal layer disposed on the first metal layer. The second metal layer generally has a lower surface roughness than the first metal layer. In addition, the second metal layer has a slower polishing rate. Therefore, not only does the second metal layer reduce the surface roughness, but the slower polishing rate also enables the top second metal film to be polished to a very fine surface roughness of less than or equal to about 2 angstroms.

[0009] In one embodiment, a TMR sensor device includes: a substrate; a bottom lead disposed over the substrate, the bottom lead formed by a CMP process; a TMR sensor stack coupled to the bottom lead; and a top lead coupled to the TMR sensor stack.

[0010] In another embodiment, a method for manufacturing a TMR sensor device includes: forming a bottom lead above a substrate, wherein the formation includes: depositing a first conductive material above the substrate; depositing a second conductive material on the first conductive material, wherein the first conductive material and the second conductive material are different; depositing a photoresist layer above the bottom lead; selectively removing a portion of the bottom lead; depositing an electrically insulating material adjacent to the remaining bottom lead; depositing a CMP stop layer on the electrically insulating material; performing a CMP process on the bottom lead; forming a TMR sensor stack above the bottom lead; and forming a top lead above the TMR sensor stack.

[0011] In another embodiment, a method for manufacturing a bottom lead includes: depositing alternating layers of conductive material onto a substrate to produce a bottom lead stack; depositing a CMP inert metal film layer on top of the bottom lead stack; depositing an outer insulating material around the bottom lead stack; depositing a CMP stop layer on top of the outer insulating material; and performing a CMP process on the CMP inert metal film using a polishing slurry. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order that the above-mentioned features of the present disclosure may be understood in detail, a more specific description of the present disclosure briefly summarized above may be made by reference to embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only show typical embodiments of the present disclosure and therefore should not be considered as limiting the scope of the present disclosure, as the present disclosure may admit of other equally effective embodiments.

[0013] Figure 1 is a schematic diagram of a Wheatstone bridge array design.

[0014] Figure 2is a schematic diagram of the bottom leads of a TMR sensor for a Wheatstone bridge array.

[0015] Figures 3A to 3G is a schematic diagram of the bottom leads of a TMR sensor for a Wheatstone bridge array according to one embodiment.

[0016] Figure 4A and 4B is a schematic diagram of a TMR sensor used in a Wheatstone bridge array according to one embodiment.

[0017] Figure 5 is a flow chart illustrating a method of fabricating a bottom lead of a TMR sensor for a Wheatstone bridge array.

[0018] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. DETAILED DESCRIPTION

[0019] Hereinafter, reference is made to embodiments of the present disclosure. However, it should be understood that the present disclosure is not limited to specific described embodiments. In fact, any combination of the following features and elements (whether or not related to different embodiments) is encompassed to implement and practice the present disclosure. In addition, although the embodiments of the present disclosure can achieve advantages that are superior to other possible solutions and / or superior to the prior art, whether a particular advantage is achieved by a given embodiment does not limit the present disclosure. Therefore, the following aspects, features, embodiments and advantages are merely illustrative and are not considered to be elements or limitations of the appended claims unless explicitly stated in the claims. Similarly, reference to "the present disclosure" should not be interpreted as a generalization of any inventive subject matter disclosed herein, and should not be considered as an element or limitation of the appended claims unless explicitly stated in the claims.

[0020] A Wheatstone bridge array including a tunneling magnetoresistive (TMR) sensor and a method of manufacturing are disclosed. The bottom lead for the TMR sensor has a very small surface roughness not only due to chemical mechanical planarization (CMP) but also due to forming the bottom lead from multiple layers. The multiple layers include at least a bottom first metal layer and a top second metal layer disposed on the first metal layer. The second metal layer generally has a lower surface roughness than the first metal layer. In addition, the second metal layer has a slower polishing rate. Therefore, not only does the second metal layer reduce the surface roughness, but the slower polishing rate also enables the top second metal film to be polished to a very fine surface roughness of less than or equal to about 2 angstroms.

[0021] Figure 1is a schematic diagram of a Wheatstone bridge array 100 design. The array 100 includes a bias source 102, a first resistor 104, a second resistor 106, a third resistor 108, a fourth resistor 110, a first sensor output pad 112, a second sensor output pad 114, and a ground connection 116. A bias voltage is applied across the array from the bias source 102 to the ground connection 116. The first sensor output pad 112 and the second sensor output pad 114 sense the output of the applied voltage. Any temperature change from the resistors 104, 106, 108, 110 can be cancelled.

[0022] As discussed herein, resistors 104, 106, 108, 110 each comprise a TMR sensor. In one embodiment, the TMR sensors are each distinct and different, such that resistors 104, 106, 108, 110 have different resistances. In another embodiment, the TMR sensors are the same, but resistors 104, 106, 108, 110 are different. In yet another embodiment, resistors 104, 110 are identical to one another (as are TMR sensors that include resistors 104, 110), and resistors 106, 108 are identical to one another (as are TMR sensors that include resistors 106, 108), but are different from resistors 104, 110. For the TMR sensors in array 100, the RA for array 100 is approximately 100 ohms square micrometer.

[0023] Typical magnetic field sensors use magnetoresistive (MR) devices in a Wheatstone bridge circuit. The sensor requires the MR device to be changed in different ways in the bridge. As discussed in this article, a new method of manufacturing a magnetic field sensor will manufacture two different TMR films in the same layer. The reliability and performance of the TMR film determine the magnetoresistive response. The TMR film is manufactured on a flat and smooth surface by implementing a bottom layer CMP process. The new method considers different polishing mechanisms to achieve a roughness of about 2A and a minimum thickness variation of 2 to 4nm. The TMR film manufactured on an ultra-smooth surface has a 40% improved performance and magnetoresistive response. In this way, combined with different TMR film features, a perfect Wheatstone bridge design for a magnetic field sensor can be manufactured.

[0024] about Figure 1 If the free layer of the TMR sensor including resistors 104, 106, 108, 110 has a long axis at +45° or -45° relative to the pinned layer magnetization direction, then the free layer easy axis is constrained to be along the long axis due to shape anisotropy, and the magnetization direction can be set by the Ampere field from the set line current as shown in the sketch, especially when there is a set line on top of the free layer that is orthogonal to the long axis of the free layer.

[0025] When a magnetic field is applied along the Y axis, resistors 110 and 104 increase with the field, while resistors 106, 108 decrease with the field. This different response enables a Wheatstone bridge, and the sensor sensitivity is proportional to the output voltage, which is proportional to the difference between resistor 110 (or resistor 104) and resistor 106 (or resistor 108). However, due to the 45° free layer or pinned layer initial state, only half of the magnetoresistance change is used in use. If the free layer to pinned layer initial state can be 90° and still have two different magnetoresistance changes, the sensor sensitivity can be increased by a factor of two.

[0026] If the free layer is orthogonal to the pinned layer, the pinned layer magnetization direction is set by the magnetic annealing direction. Typically, resistors 104, 106, 108, 110 are made of the same TMR film and undergo the same process, and therefore all have the same pinned layer orientation. Each device can operate with a full MR ratio, but all devices respond to external fields in the same way and therefore there is no output voltage at all. A simple way to solve this problem is to shield resistors 106 and 108 by covering them with a thick NiFe film so that resistors 106 and 108 will not respond to the magnetic field. Alternatively, resistors 106 and 108 can be replaced with constant resistors. However, this type of half-bridge sensing scheme will also reduce the output voltage and therefore limit the sensitivity.

[0027] As discussed herein, the new CMP process provides an ultra-smooth surface to fabricate a magnetic field sensor having two different TMR films in the same layer. The two different TMR films provide two different magnetoresistive responses. Furthermore, the two TMR films having the magnetic moments of the free layer and the pinned layer are orthogonal to each other, but the magnetoresistive responses are opposite, i.e., one TMR resistance increases linearly with the external magnetic field, while the other TMR resistance decreases linearly with the external magnetic field. In this way, a perfect Wheatstone bridge design for a magnetic field sensor is fabricated.

[0028] To achieve maximum performance of two different TMR films in the same layer, an important key factor is to provide an ultra-smooth surface at the bottom lead (BL). However, the BL usually accumulates a surface roughness of about 10 to 20 Å after plating and deposition processes. The wavy bottom lead surface is not desirable and affects the sensitivity of the TMR film.

[0029] Figure 2is a schematic diagram of a BL 200 for a TMR sensor of a Wheatstone bridge array 100. The BL 200 includes a substrate 202 and an electrode material 204. In one embodiment, the substrate 202 includes an insulating material, such as aluminum oxide. It should be understood that although aluminum oxide is discussed as an insulating material, other insulating materials are also contemplated. In addition, the substrate 202 is not limited to a single layer, but can encompass multiple layers of a CMOS device. The electrode material 204 is a conductive material. One suitable conductive material that can be used is copper. Copper tends to be easily deposited by both electroplating and electroless plating. However, copper tends to be deposited in a granular form and therefore has a particle size that can be between about 10 angstroms and about 20 angstroms and between about 10 angstroms and about 20 angstroms. Figure 2 The surface roughness of the roughened surface is shown in FIG.

[0030] A special BL CMP process with minimal metal removal while still achieving the goal of surface roughness reduction is advantageous in both TMR film magnetic sensor fabrication. Figures 3A to 3G 3 is a schematic diagram of a BL 300 for a TMR sensor of a Wheatstone bridge array 100 according to one embodiment. In this process flow, a BL film stack (typical BL stack: Ta / Cu / Ta / Cu / Ta) is deposited or plated as full film metal. A CMP-inert metal film (10 to 15 nm Ta) is deposited on the BL stack. When copper is used, copper has a much higher polishing rate and cannot be used to control the thickness of the final BL stack within the nm level. It is considered to use tantalum above copper. Tantalum has a slower polishing rate than the BL stack material (e.g., copper) and can ensure the thickness of the BL stack. However, for a typical polishing process, the 10 to 15 nm Ta film is extremely thin. Therefore, photo patterning can define the BL size and replace the field metal material with a dielectric material. As will be discussed below, a thin SiOx is deposited as a CMP stop layer. A CMP roughness correction is performed, and the SiOx CMP stop layer is then removed for downstream TMR film deposition. The CMP process discussed herein is advantageous due to stringent surface roughness requirements (ie, about 2 angstroms) and accurate thickness control (eg, total removal <5 nm) to ensure stability and sensitivity of the BL stack.

[0031] In operation, the selection of polishing slurry depends on several parameters, including total removal, selectivity of different materials, particle size and additive dispersion. Based on the requirement to remove the minimum inert tantalum film to ensure thickness control, a customized slurry with a specific dilution level (1:5 to 1:20) is selected. Suitable slurries that can be used include slurries from Cabot's MH series slurries. In one embodiment, the slurry includes Al2O3-based abrasive particles, which are diluted to a ratio of 1:5, 1:10 or 1:20 to reduce the removal rate. Cleaning surfactants may also be added to disperse the abrasive particles and enhance the cleaning effect as needed. In one embodiment, the pH of the slurry is neutral. Therefore, the customized slurry has a reduced tantalum film removal rate. In order to ensure that SiOx is properly used as a CMP stop layer, the customized slurry has a high selectivity between SiOx and AlOx, so that the SiOx stop layer controls the bulk thickness without being affected by the polishing process. Both particle size and additive dispersion contribute to the final surface roughness. Smaller particle size, smoother particles will have better final roughness. Additive dispersion serves to reduce particle agglomeration and improve the final cleaning effect.

[0032] Combined with slurry selection and optimized polishing conditions, the above BL CMP process will remove 2 to 5 nm of tantalum from the topmost tantalum layer and achieve a surface roughness of about 2 angstroms for downstream TMR film deposition.

[0033] like Figure 3A , a first conductive layer 302 is formed on the substrate 202. The first conductive layer 302 may include any conductive material that is considered a BL material. In one embodiment, the first conductive layer 302 includes copper. The first conductive layer 302 has a surface roughness much greater than 2 angstroms. The first conductive layer 302 may be deposited by well-known methods such as electroplating, electroless plating, and sputtering.

[0034] The second conductive layer 304 is deposited on the first conductive layer 302. The second conductive layer 304 is more amorphous than the first conductive layer 302, and therefore, the second conductive layer has a lower surface roughness than the first conductive layer 302. It can be said that the second conductive layer 304 slightly resets the surface roughness for the layer deposited above the second conductive layer. Because the second conductive layer 304 is more amorphous than the first conductive layer 302, the surface roughness of the first conductive layer 302 is not exactly the same as the surface roughness of the second conductive layer 304. However, the second conductive layer 304 does have a surface roughness, but the surface roughness is less than the surface roughness of the first conductive layer 302. In one embodiment, the second conductive layer 304 includes any conductive material that is considered to be a BL material. In another embodiment, the second conductive layer 304 includes tantalum. The second conductive layer 304 can be deposited by well-known methods such as electroplating, electroless plating, and sputtering.

[0035] like Figure 3B and 3C , additional first conductive layers 306, 310 are deposited alternately with additional second conductive layers 308, 312. The first conductive layers 302, 306, 310 and the second conductive layers 304, 308, 312 are deposited alternately such that the desired thickness for the BL is achieved. With each successive layer of the first conductive layers 302, 306, 310 and the second conductive layers 304, 308, 312, the surface roughness is less than the previous corresponding conductive layer. However, it should be noted that if there is no additional processing other than deposition, the surface roughness of the topmost layer is never less than or equal to 2 angstroms. In addition, it should be noted that although six total conductive layers have been shown, the present disclosure is not limited to six total conductive layers, and in fact, any number of conductive layers is contemplated as long as the second conductive layer material is at the topmost conductive layer and the total thickness is between about 20nm and about 500nm.

[0036] Figure 3D BL 300 is shown with alternating layers of a first conductive layer and a second conductive layer collectively represented by layer 314 and having a surface roughness. A topmost layer 316, which will be the second conductive layer, is shown as having a surface roughness greater than 2 angstroms. A mask is then formed over the topmost layer 316. In one embodiment, the mask is a photoresist mask formed by depositing a photoresist layer over the topmost layer 316, selectively exposing the photoresist, and then removing the exposed photoresist (or unexposed photoresist, depending on the type of photoresist used). The remaining photoresist acts as a mask that selectively covers portions of BL 300. The exposed portions of BL 300 are then removed by a well-known removal technique, such as etching, to expose substrate 202. Insulating material 318 is then deposited over the exposed substrate 202, as shown. Figure 3E . In one embodiment, the insulating material 318 is the same as the topmost layer of the substrate 202. In another embodiment, the insulating material comprises aluminum oxide. It should be understood that the embodiments discussed herein are not limited to aluminum oxide for the insulating material 318. The insulating material 318 can be deposited by well-known deposition methods such as chemical vapor deposition (CVD), atomic layer deposition (ALD), or plasma enhanced CVD (PECVD).

[0037] A CMP stop material 320 is then deposited on the insulating material 318, such as Figure 3F. In one embodiment, CMP stop material 320 comprises an insulating material. In another embodiment, CMP stop material 320 comprises an insulating material different from insulating material 318. In yet another embodiment, CMP stop material 320 comprises SiOx. CMP stop material 320 may be deposited by well-known deposition methods such as CVD, ALD, or PECVD. CMP stop material 320 will be removed during the CMP process at a significantly lower rate than topmost layer 316 and provides an indication that the CMP process is complete. Figure 3G , a CMP process is performed to reduce the surface roughness of the topmost layer 316 while retaining the CMP stop material 320. In one embodiment, the surface roughness of the topmost layer 316 after the CMP process will be less than or equal to 2 angstroms, and the total material removed will be between about 2 nm and about 5 nm. In one embodiment, after the CMP process, the CMP stop material 320 is removed in a separate process.

[0038] Since the topmost layer 316 has a surface roughness less than or equal to 2 angstroms, a TMR film can be formed. Figure 4A and 4B is a schematic diagram of TMR sensors 400 , 450 used in a Wheatstone bridge array 100 according to one embodiment. Figure 4A A first TMR sensor 400 is shown and Figure 4B A second TMR sensor 450 is shown.

[0039] exist Figure 4A , the TMR sensor 400 includes a BL 420 and a top lead 422. The BL 420 is manufactured as discussed above. The top lead 422 can be manufactured by the same process as the BL 420. In one embodiment, the top lead 422 can be manufactured by using a single conductive layer (e.g., copper) rather than a multi-layer structure because the surface roughness for the top lead 422 does not affect the performance of the TMR sensor 400.

[0040] The TMR sensor 400 includes a seed layer 402 formed on the BL 420. In one embodiment, the seed layer 402 includes a conductive material such as ruthenium, and has a thickness between about 10 angstroms and about 100 angstroms, and is deposited by well-known deposition methods such as electroplating, electroless plating, or sputtering. In addition, it should be understood that while ruthenium has been exemplified as the seed layer 402 material, other materials are contemplated, and the embodiments discussed herein are not limited to ruthenium for the seed layer 402.

[0041] An antiferromagnetic (AFM) layer 404 is disposed on the seed layer 404. Suitable materials for the AFM layer 404 include IrMn or PtMn with a thickness between about 40 angstroms and about 500 angstroms. The AFM layer 404 can be formed by well-known deposition methods such as sputtering. In addition, it should be understood that although IrMn and PtMn have been exemplified as AFM layer 404 materials, other materials are contemplated and the embodiments discussed herein are not limited to IrMn or PtMn for the AFM layer 404.

[0042] A pinning layer 406 is disposed on the AFM layer 404. Suitable materials for the pinning layer 406 include CoFe or a Co / CoFe / Co multilayer stack having a thickness between about 20 angstroms and about 30 angstroms. The pinning layer 406 may be formed by well-known deposition methods such as sputtering. In addition, it should be understood that while CoFe or Co / CoFe / Co has been exemplified as the pinning layer 406 material, other materials are contemplated and the embodiments discussed herein are not limited to CoFe or Co / CoFe / Co for the pinning layer 406.

[0043] A spacer layer 408 is disposed on the pinning layer 406. Suitable materials for the spacer layer 408 include Ru with a thickness between about 4 angstroms and about 10 angstroms. The spacer layer 408 may be formed by well-known deposition methods such as sputtering. Additionally, it should be understood that while ruthenium has been exemplified as a spacer layer 408 material, other materials are contemplated and the embodiments discussed herein are not limited to ruthenium for the spacer layer 408.

[0044] A reference layer 410 is disposed on the spacer layer 408. Suitable materials for the reference layer 410 include CoFe / Ta / CoFeB / CoFe as a multilayer stack. The thickness of the CoFe layer may be between about 8 angstroms and about 10 angstroms. The thickness of the Ta layer may be between about 0.5 angstroms and about 2 angstroms. The thickness of the CoFeB layer may be between about 10 angstroms and about 15 angstroms. The thickness of the second CoFe layer may be between about 3 angstroms and about 10 angstroms. The reference layer 410 may be formed by well-known deposition methods such as sputtering. In addition, it should be understood that although CoFe / Ta / CoFeB / CoFe has been exemplified as a reference layer 410 material, other materials are contemplated and the embodiments discussed herein are not limited to CoFe / Ta / CoFeB / CoFe for the reference layer 410.

[0045] Barrier layer 412 is disposed on reference layer 410. Suitable materials for barrier layer 412 include MgO having a thickness between about 10 angstroms and about 20 angstroms. It should be understood that while MgO is illustrated as barrier layer 412, other insulating materials are contemplated.

[0046] The first free layer 414 is disposed on the barrier layer 412. Suitable materials for the first free layer 414 include a CoFe / CoFeB / Ta / NiFe multilayer stack. The thickness of the CoFe layer may be between about 3 angstroms and about 10 angstroms. The thickness of the CoFeB layer may be between about 10 angstroms and about 20 angstroms. The thickness of the Ta layer may be between about 0.5 angstroms and about 2 angstroms. The thickness of the NiFe layer may be between about 3 angstroms and about 300 angstroms, for example, between about 3 angstroms and about 10 angstroms or between about 10 angstroms and about 300 angstroms. The first free layer 414 may be formed by a well-known deposition method such as sputtering. In addition, it should be understood that although CoFe / CoFeB / Ta / NiFe has been exemplified as the first free layer 414 material, other materials are contemplated and the embodiments discussed herein are not limited to CoFe / CoFeB / Ta / NiFe for the first free layer 414.

[0047] Another spacer layer 416 is then formed on the first free layer 414. In one embodiment, the spacer layer 416 is a multilayer structure including Co / Ru / Co. It should be understood that the spacer layer 416 can be a single layer or other multilayer stack including a first magnetic layer, a non-magnetic conductive layer, and a second magnetic layer. In an embodiment where the spacer layer 416 is Co / Ru / Co, the thickness of the first Co layer can be between about 3 angstroms and about 6 angstroms, the thickness of the Ru layer can be between about 6 angstroms and about 10 angstroms, and the thickness of the second Co layer can be between about 3 angstroms and about 6 angstroms. The Co layer will enhance synthetic antiferromagnetic (SAF) coupling. The spacer layer 416 can be formed by a well-known deposition method such as sputtering.

[0048] The second free layer 418 is then formed on the spacer layer 416. Suitable materials for the second free layer 418 include a CoFe / CoFeB / Ta / NiFe multilayer stack. The thickness of the CoFe layer may be between about 3 angstroms and about 10 angstroms. The thickness of the CoFeB layer may be between about 10 angstroms and about 20 angstroms. The thickness of the Ta layer may be between about 0.5 angstroms and about 2 angstroms. The thickness of the NiFe layer may be between about 3 angstroms and about 300 angstroms, for example, between about 3 angstroms and about 10 angstroms or between about 10 angstroms and about 300 angstroms. The second free layer 418 may be formed by a well-known deposition method such as sputtering. In addition, it should be understood that although CoFe / CoFeB / Ta / NiFe has been exemplified as the second free layer 418 material, other materials are contemplated and the embodiments discussed herein are not limited to CoFe / CoFeB / Ta / NiFe for the second free layer 418.

[0049] Figure 4B is a schematic diagram of the TMR sensor 450. Figure 4B, TMR sensor 450 includes BL 466 and top lead 468. BL 466 is manufactured as discussed above. Top lead 468 can be manufactured by the same process as BL 466. In one embodiment, top lead 468 can be manufactured by using a single conductive layer (e.g., copper) rather than a multi-layer structure because the surface roughness for top lead 468 does not affect the performance of TMR sensor 450.

[0050] The TMR sensor 450 includes a seed layer 452. Suitable materials that can be used for the seed layer 452 include ruthenium with a thickness between about 10 angstroms and about 100 angstroms. The seed layer 452 can be formed over a substrate (not shown). The substrate is understood to be any layer on which the seed layer 452 can be deposited. The seed layer 452 can be formed by well-known deposition methods such as sputtering. In addition, it should be understood that although ruthenium has been exemplified as a seed layer 452 material, other materials are contemplated and the embodiments discussed herein are not limited to ruthenium for the seed layer 452.

[0051] The AFM layer 454 is disposed on the seed layer 452. Suitable materials for the AFM layer 454 include IrMn or PtMn with a thickness between about 40 angstroms and about 500 angstroms. The AFM layer 454 can be formed by well-known deposition methods such as sputtering. In addition, it should be understood that although IrMn and PtMn have been exemplified as AFM layer 454 materials, other materials are contemplated and the embodiments discussed herein are not limited to IrMn or PtMn for the AFM layer 454.

[0052] A pinning layer 456 is disposed on the AFM layer 454. Suitable materials for the pinning layer 456 include CoFe or a Co / CoFe / Co multilayer stack having a thickness between about 20 angstroms and about 30 angstroms. The pinning layer 456 may be formed by well-known deposition methods such as sputtering. In addition, it should be understood that while CoFe or Co / CoFe / Co has been exemplified as the pinning layer 456 material, other materials are contemplated and the embodiments discussed herein are not limited to CoFe or Co / CoFe / Co for the pinning layer 456.

[0053] A spacer layer 458 is disposed on the pinning layer 458. Suitable materials for the spacer layer 458 include ruthenium with a thickness between about 4 angstroms and about 10 angstroms. The spacer layer 458 can be formed by well-known deposition methods such as sputtering. In addition, it should be understood that although ruthenium has been exemplified as the spacer layer 458 material, other materials are contemplated and the embodiments discussed herein are not limited to ruthenium for the spacer layer 458.

[0054] A reference layer 460 is disposed on the spacer layer 458. Suitable materials for the reference layer 460 include CoFe / Ta / CoFeB / CoFe as a multilayer stack. The thickness of the CoFe layer may be between about 8 angstroms and about 10 angstroms. The thickness of the Ta layer may be between about 0.5 angstroms and about 2 angstroms. The thickness of the CoFeB layer may be between about 10 angstroms and about 15 angstroms. The thickness of the second CoFe layer may be between about 3 angstroms and about 10 angstroms. The reference layer 460 may be formed by well-known deposition methods such as sputtering. In addition, it should be understood that although CoFe / Ta / CoFeB / CoFe has been exemplified as a reference layer 460 material, other materials are contemplated and the embodiments discussed herein are not limited to CoFe / Ta / CoFeB / CoFe for the reference layer 460.

[0055] Barrier layer 462 is disposed on reference layer 460. Suitable materials for barrier layer 462 include MgO having a thickness between about 10 angstroms and about 20 angstroms. It should be understood that while MgO is illustrated as barrier layer 462, other insulating materials are contemplated.

[0056] The free layer 464 is disposed on the barrier layer 462. Suitable materials for the free layer 464 include a CoFe / CoFeB / Ta / NiFe multilayer stack. The thickness of the CoFe layer may be between about 3 angstroms and about 10 angstroms. The thickness of the CoFeB layer may be between about 10 angstroms and about 20 angstroms. The thickness of the Ta layer may be between about 0.5 angstroms and about 2 angstroms. The thickness of the NiFe layer may be between about 3 angstroms and about 300 angstroms, for example, between about 3 angstroms and about 10 angstroms or between about 10 angstroms and about 300 angstroms. The free layer 464 may be formed by a well-known deposition method such as sputtering. In addition, it should be understood that although CoFe / CoFeB / Ta / NiFe has been exemplified as a free layer 464 material, other materials are contemplated and the embodiments discussed herein are not limited to CoFe / CoFeB / Ta / NiFe for the free layer 464.

[0057] After the TMR sensors 400, 450 have been formed into a TMR stack, the stack is annealed in an induction oven at a temperature between about 250 degrees Celsius and about 300 degrees Celsius under a magnetic field between about 10,000 Oe and about 50,000 Oe.

[0058] Figure 5is a flow chart showing a method 500 of manufacturing a BL for a TMR sensor of a Wheatstone bridge array. In step 502, a first layer for the BL is deposited. The first layer corresponds to the first conductive layer 302 discussed above. Next, in step 504, a second layer for the BL is deposited. The second layer corresponds to the second conductive layer 304 discussed above. Subsequently, in step 506, a determination is made as to whether the thickness of the BL (i.e., the common thickness of the first layer and the second layer) is thick enough. If the thickness is not thick enough, then both steps 502 and 504 are repeated until the desired thickness is reached. If the BL is thick enough, then a mask is formed over the BL in step 508. Then the BL is patterned in step 510. In step 512, an insulating material is deposited adjacent to the BL. Then, in step 514, a CMP stop material is deposited over the insulating material. Then, in step 516, a CMP process is performed to reduce the surface roughness of the topmost layer of the BL. Finally, in step 518, the CMP stop material, which may be referred to as a CMP inert layer, is optionally removed.

[0059] In one embodiment, a TMR sensor device includes: a substrate; a bottom lead disposed above the substrate, the bottom lead formed by a chemical mechanical polishing (CMP) process; a tunneling magnetoresistive (TMR) sensor stack coupled to the bottom lead; and a top lead coupled to the TMR sensor stack. The bottom lead has a surface roughness less than or equal to 2 angstroms. The bottom lead includes alternating conductive layers having different surface roughnesses. The alternating conductive layers include different materials. At least one conductive layer is amorphous. A first layer of the alternating conductive layers includes copper, and a second layer of the alternating conductive layers includes tantalum. A CMP stop layer is disposed adjacent to a top surface of the bottom lead. The surface roughness of the bottom lead is the same as the surface roughness of the TMR sensor stack.

[0060] In another embodiment, a method of manufacturing a TMR sensor device includes: forming a bottom lead over a substrate, wherein the forming includes: depositing a first conductive material over the substrate; depositing a second conductive material on the first conductive material, wherein the first conductive material and the second conductive material are different; depositing a photoresist layer over the bottom lead; selectively removing a portion of the bottom lead; depositing an electrically insulating material adjacent to the remaining bottom lead; depositing a chemical mechanical polishing (CMP) stop layer on the electrically insulating material; performing a CMP process on the bottom lead; forming a tunneling magnetoresistive (TMR) sensor stack over the bottom lead; and forming a top lead over the TMR sensor stack. The CMP process reduces the surface roughness of a top layer of the bottom lead to less than or equal to 2 angstroms. The CMP stop layer includes SiOx. The CMP stop layer and the electrically insulating material include different materials. Forming the bottom lead includes at least one repetition of depositing the first conductive material and depositing the second conductive material. The thickness of the first conductive material is greater than the thickness of the second conductive material. The uppermost second conductive film has a thickness between about 10 nm and 13 nm after the CMP process.

[0061] In another embodiment, a method for manufacturing a bottom lead includes: depositing alternating layers of conductive material onto a substrate to produce a bottom lead stack; depositing a CMP inert metal film layer on top of the bottom lead stack; depositing an outer insulating material around the bottom lead stack; depositing a CMP stop layer on top of the outer insulating material; and performing a CMP process on the CMP inert metal film using a polishing slurry. The alternating layers of conductive material are copper and tantalum. The CMP inert metal film is tantalum. The CMP inert metal film has a thickness of 10 to 15 nm before performing the CMP process. The outer insulating material includes aluminum oxide. The CMP stop layer is silicon oxide. The CMP process removes less than 5 nm of the CMP inert metal film. The CMP inert metal film has a surface roughness of 2 angstroms or less after applying the CMP process.

[0062] In one embodiment, the TMR sensor is used in a camera, operating as a single-axis sensor. An example of this sensor is found in U.S. Patent Application Publication No. 2019 / 0020822A1, which is incorporated herein by reference. However, it is contemplated that the TMR sensor can be used as a two-dimensional or even three-dimensional sensor. In addition, it is contemplated that the TMR sensor can be integrated and used in inertial measurement unit technologies other than cameras, such as wearable devices, compasses, and MEMS devices. In addition, the TMR sensor can be operated as a position sensor, a bridge angle sensor, a magnetic switch, a current sensor, or a combination thereof. The TMR sensor can be used to focus a camera, such as a smartphone camera, by using the TMR sensor as a position and angle sensor. In addition, the TMR sensor can be used as a switch, current, and angle sensor in the automotive industry to replace current Hall, anisotropic magnetoresistive (AMR), and giant magnetoresistive (GMR) sensors. TMR sensors can also be used in drones and robotics industries as position and angle sensors. Medical devices can also use TMR sensors for flow rate control of bolus systems and endoscope camera sensors, etc. Thus, the TMR sensors discussed herein have good application beyond smartphone cameras, and thus should not be limited to use as sensors for smartphone cameras.Furthermore, the TMR sensors need not be arranged in a Wheatstone bridge arrangement, but may be arranged in any number of ways.

[0063] By using multiple layers for the bottom lead and performing a CMP process on the topmost layer of the bottom lead, a surface roughness of 2 angstroms or less can be achieved. The very low surface roughness for the bottom lead improves the performance and magnetoresistive response, resulting in improved functionality of the Wheatstone bridge array.

[0064] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope of the disclosure is determined by the claims that follow.

Claims

1. A tunneling magnetoresistive sensor device, i.e., a TMR sensor device, comprising: Substrate: A bottom lead disposed above the substrate, the bottom lead being formed by a chemical mechanical planarization process (CMP process), wherein the bottom lead comprises alternating conductive layers having different material compositions, at least one conductive layer being amorphous; a TMR sensor stack coupled to the bottom lead; and Top lead that couples to the TMR sensor stack. 2 . The TMR sensor device of claim 1 , wherein the bottom lead has a surface roughness less than or equal to 2 angstroms. The TMR sensor device of claim 1 , wherein the alternating conductive layers have different surface roughnesses. 4 . The TMR sensor device of claim 1 , wherein a first layer of the alternating conductive layers comprises copper and a second layer of the alternating conductive layers comprises tantalum. 5 . The TMR sensor device of claim 1 , further comprising a CMP stop layer disposed adjacent to a top surface of the bottom lead. 6 . The TMR sensor device of claim 1 , wherein a surface roughness of the bottom lead is the same as a surface roughness of the TMR sensor stack.

7. A method for manufacturing a TMR sensor device, comprising: forming a bottom lead over the substrate, wherein the forming comprises: depositing a first conductive material over the substrate; depositing a second conductive material on the first conductive material, wherein the first conductive material and the second conductive material are different; depositing a photoresist layer over the bottom lead; selectively removing a portion of the bottom lead; depositing an electrically insulating material adjacent to the remaining bottom lead; depositing a CMP stop layer on the electrically insulating material; performing a CMP process on the bottom lead; forming a TMR sensor stack over the bottom lead; and A top lead is formed over the TMR sensor stack.

8. The method of claim 7, wherein the CMP process reduces the surface roughness of the top layer of the bottom lead to less than or equal to 2 angstroms.

9. The method of claim 7, wherein the CMP stop layer comprises SiOx.

10. The method of claim 7, wherein the CMP stop layer and the electrically insulating material comprise different materials. 11 . The method of claim 7 , wherein forming the bottom lead comprises at least one repetition of depositing the first conductive material and depositing the second conductive material. 12 . The method of claim 7 , wherein a thickness of the first conductive material is greater than a thickness of the second conductive material. 13 . The method of claim 7 , wherein the uppermost second conductive film has a thickness between 10 nm and 13 nm after the CMP process.

14. A method for manufacturing a bottom lead, comprising: depositing alternating layers of conductive material onto the substrate to produce a bottom lead stack; depositing a layer of CMP inert metal film on top of the bottom lead stack; depositing an outer insulating material around the bottom lead stack; depositing a CMP stop layer on top of the outer insulating material, wherein the CMP stop layer is silicon oxide; and A CMP process is performed on the CMP inert metal film using a polishing slurry.

15. The method of claim 14, wherein the alternating layers of conductive material are copper and tantalum.

16. The method of claim 14, wherein the CMP inert metal film is tantalum. 17 . The method of claim 14 , wherein the CMP inert metal film has a thickness of 10 nm to 15 nm before performing the CMP process. The method of claim 14 , wherein the outer insulating material comprises aluminum oxide.

19. The method of claim 14, wherein the CMP process removes less than 5 nm of the CMP inert metal film.

20. The method of claim 14, wherein the CMP inert metal film has a surface roughness of 2 angstroms or less after applying the CMP process.

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