Integrated circuit configured to perform symmetric cryptographic operations with secret key protection

Abstract

Embodiments of the present disclosure relate to an integrated circuit configured to perform symmetric cryptographic operations using secret key protection. A unique hardware key is recorded in a secure hardware environment. A first logic circuit of the secure hardware environment is configured to generate a unique derived key based on the unique hardware key and at least one piece of information. The at least one piece of information relates to one or more of the following: an execution context and use of the secret key. The secure hardware environment further includes a first cryptographic device that symmetrically encrypts the secret key using the unique derived key. The symmetric encryption generates an encrypted secret key for use outside the secure hardware environment.

Description

[0001] priority

[0002] This application claims the benefit of priority of French Patent Application No. 2000994, filed on January 31, 2020, the contents of which are incorporated herein by reference to the maximum extent permitted by law. Technical Field

[0003] Embodiments and implementations are directed to integrated circuits designed to perform symmetric cryptographic operations. Background Art

[0004] Symmetric encryption allows the use of a unique shared key to encrypt, and then decrypt binary data. In order to keep the binary data secret, care should be taken to keep the shared key secret.

[0005] Therefore, it is necessary to develop solutions that allow secure management of keys. Known solutions consist in using reliable software in a secure environment to perform this management. This solution has the disadvantage of being complex. In particular, it is difficult to protect the keys managed by software from certain attacks. Furthermore, managing keys by software is crucial in real-time applications. In fact, managing keys by software may require the use of a large amount of available resources and, as a result, may affect the operation of the real-time application, in particular its execution time.

[0006] Therefore, there is a need in the art for a solution that can securely manage keys and does not have the above-mentioned disadvantages. Summary of the invention

[0007] In an embodiment, an integrated circuit includes: a secure hardware environment in which a unique hardware key is recorded, the secure hardware environment including a first logic circuit configured to generate a unique derived key from the unique hardware key and at least one piece of information related to an execution context and / or use of a secret key, and wherein the secure hardware environment further includes a first cryptographic device configured to perform a symmetric cryptographic operation on the secret key using the unique derived key and to transmit an encrypted secret key resulting from the operation.

[0008] A secure hardware environment is secure "hardware".

[0009] A unique hardware key is associated with a unique integrated circuit.

[0010] Thus, the first logic circuit enables the generation of a unique derived key according to a given use and / or execution context for a given integrated circuit.Thus, the first logic circuit enables the generation of a different unique derived key for each execution context and each use of a given integrated circuit.

[0011] The unique hardware key and the unique derived key are not accessible outside the secure hardware environment.

[0012] The unique derived key is used to encrypt the secret key.

[0013] The encrypted secret key can be recorded in the output register. The encrypted secret key can then be restored by software from the output register. Software can then manipulate the encrypted secret key outside the secure hardware environment, but software cannot directly manipulate the unencrypted secret key. The unencrypted secret key cannot be read by software.

[0014] Such an integrated circuit thus makes it possible to obtain secure storage of the secret key by storing the secret key only after encrypting it using the unique derived key.

[0015] Furthermore, the encryption of the secret key depends on a unique hardware key that is unknown outside the secure hardware environment and depends on the usage and / or execution context of the secret key. Such encryption is therefore robust.

[0016] Such an electronic circuit can avoid the use of software dedicated to key management. In fact, the management of the key is obtained through hardware reinforcement of the secure hardware environment. Therefore, such an electronic circuit ensures an improved security management of the key.

[0017] In an advantageous embodiment, the secure hardware environment further comprises a second cryptographic device configured to perform a symmetric cryptographic operation on the binary data using the secret key, and to transmit encrypted binary data resulting from the operation.

[0018] The encrypted binary data can then be manipulated outside the secure hardware environment by software.

[0019] In an advantageous embodiment, the secure hardware environment further comprises a first decryption device configured to perform a decryption operation on the encrypted secret key using said unique derived key and to transfer the secret key resulting from the operation outside the secure hardware environment.

[0020] The encrypted secret key may be a key previously encrypted by the first encryption device. Thus, the secret key delivered by the first decryption device is identical to the secret key from the encrypted secret key that has been delivered by the first encryption device.

[0021] Because the secret key is decrypted in a secure hardware environment, the secret key cannot be accessed by software.

[0022] Preferably, the second encryption device is also configured to perform an encryption operation on the unencrypted binary data using the secret key delivered by the first decryption device, and to deliver the encrypted binary data resulting from this operation.

[0023] Advantageously, the secure hardware environment further comprises a register, referred to as a key register, configured to record each secret key generated by the first decryption device and to enable each recorded secret key to be transmitted to the second encryption device in order to encrypt the unencrypted binary data.

[0024] In an advantageous embodiment, the secure hardware environment further comprises a second decryption device configured to perform a decryption operation on the encrypted binary data using the secret key delivered by the first decryption device and to deliver unencrypted binary data resulting from this operation outside the secure hardware environment.

[0025] In an advantageous embodiment, the secure hardware environment further comprises a register, referred to as a key register, configured to record each secret key generated by the first decryption device and to enable transmission of each recorded secret key to the second decryption device for decrypting the encrypted binary data.

[0026] According to another aspect, a system on chip is proposed, the system on chip comprising an integrated circuit such as described above and configured to execute software according to execution contexts with different security and / or confidentiality levels. The integrated circuit is configured to authorize the use of the secret key according to these execution contexts if the protection of the secret key is released by the software after the secret key is recorded in the key register and if the key is not unique to a single execution context.

[0027] Such a system allows the secret key to be used by software of different execution contexts while ensuring the protection of the secret key. Specifically, the secret key can be used by the software but still remain unknown.

[0028] In an advantageous embodiment, the integrated circuit is configured to delete the secret key of the key register when a new execution context is detected while the secret key is protected or when the secret key is unique to a given execution context and a new execution context is detected.

[0029] Thus, the integrated circuit is configured to detect misuse of the secret key, in other words, modification of the execution context when the secret key is not authorized.

[0030] Furthermore, the integrated circuit is configured to delete the secret key if it is compromised, in other words, upon detection of misuse of the key.

[0031] Such an integrated circuit makes it possible to isolate secret keys by execution context and allow the use of these secret keys in other execution contexts only if their use is authorized.

[0032] In an embodiment, a method for encrypting a secret key in a secure hardware environment includes generating a unique derived key from a unique hardware key recorded in the secure hardware environment and at least one piece of information related to an execution context and / or use of the secret key, and symmetrically encrypting the secret key using the generated unique derived key.

[0033] According to another aspect, a method for encrypting binary data in a secure hardware environment includes: symmetrically encrypting the binary data using a secret key to obtain encrypted binary data, and symmetrically encrypting the secret key according to the above encryption method.

[0034] According to another aspect, a method for decrypting an encrypted secret key in a secure hardware environment includes generating a unique derived key from a unique hardware key recorded in the secure hardware environment and at least one piece of information related to an execution context and / or use of the secret key, and decrypting the encrypted secret key using the generated unique derived key.

[0035] According to another aspect, a method for decrypting encrypted binary data in a secure hardware environment with the aid of an encrypted secret key comprises: decrypting the encrypted secret key according to the decryption method as described above, thereby obtaining a secret key suitable for decrypting the encrypted binary data, and then using the secret key to decrypt the encrypted binary data. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Other advantages and features will become apparent from the detailed description of non-limiting embodiments and implementations and from the accompanying drawings, in which:

[0037] Figure 1 is a block diagram of the secure hardware environment;

[0038] Figure 2 is a block diagram of the encryption system;

[0039] Figure 3 A method for encrypting a secret key is shown;

[0040] Figure 4 is a block diagram of a decryption system; and

[0041] Figure 5 A method for decrypting a secret key is shown. DETAILED DESCRIPTION

[0042] An integrated circuit according to an embodiment comprises a secure hardware environment EMS, comprising Figure 1 The first logic circuit GEN1 shown in Figure 2The encryption system SCH and Figure 4 The decryption system SDCH is shown in FIG.

[0043] The first logic circuit GEN1 is used to generate a unique derived key HIK.

[0044] The encryption system SCH is used to encrypt binary data DAT using a secret key SK, and this secret key SK is encrypted using a unique derived key HIK generated by the first logic circuit GEN1.

[0045] The decryption system SDCH is used to decrypt the encrypted secret key E_SK using the unique derived key HIK generated by the first logic circuit GEN1 and to decrypt the encrypted binary data E_DAT using the decrypted secret key SK. The encryption system SCH and the decryption system SDCH may be combined so as to bring together certain elements of the two systems.

[0046] The first logic circuit GEN1 is configured to generate a unique derivation key HIK from a unique hardware key HUK and at least one piece of information INF relating to an execution context and / or a use of a secret key to be encrypted.

[0047] The unique hardware key HUK is recorded in the secure hardware environment EMS. The unique hardware key HUK is associated with the integrated circuit. The unique hardware key HUK is unknown outside the secure hardware environment EMS and cannot be used outside this environment. The unique hardware key HUK can be obtained by a physical unclonable function (hereinafter also referred to as the acronym "PUF").

[0048] Specifically, the information INF may relate to the execution context (secure / non-secure execution context, privileged / non-privileged execution context) of the secret key to be encrypted, the use of this secret key (e.g., duration of use, sharing type), and the use of the software that needs to use this secret key. This final use can be obtained through the "trust root".

[0049] Therefore, the first logic circuit GEN1 comprises a first input configured to receive said unique hardware key HUK.

[0050] The first logic circuit GEN1 further comprises a second input configured to receive said at least one piece of information INF relating to the execution context and / or the use of the secret key to be encrypted.

[0051] The first logic circuit GEN1 may also generate a unique derivation key HIK according to a given use and / or execution context for a given integrated circuit. Thus, for a given integrated circuit, the first logic circuit GEN1 may generate a different unique derivation key HIK for each execution context and each use.

[0052] The unique derived key HIK is inaccessible outside the secure hardware environment EMS. Thus, software cannot read the unique derived key HIK, but can use it in the secure hardware environment EMS.

[0053] The cryptographic system SCH further comprises a first cryptographic device CH1 configured to perform symmetric cryptographic operations on the secret key SK.

[0054] In particular, at least one secret key SK is provided only once during the life of the integrated circuit and is deleted after its use. In particular, the secret key SK may be a key known only by the manufacturer of the integrated circuit (in particular, the manufacturer of the original equipment). Therefore, this manufacturer may encrypt the secret key SK using the first encryption device CH1.

[0055] Alternatively, the secret key SK may be created by a random number generator.

[0056] A symmetric encryption operation of the secret key SK is performed using the unique derived key HIK generated by the first logic circuit GEN1. In particular, the secret key SK may be encrypted using the Advanced Encryption Standard AES, in particular according to ECB (Electronic Code Book) mode.

[0057] Since the encryption of the secret key SK is performed using the unique derived key HIK, the encryption of the secret key SK depends indirectly on the unique hardware key HUK and indirectly on the usage and / or execution context associated with the secret key. Such encryption is therefore robust.

[0058] At the end of this encryption operation, the first encryption device CH1 is configured to deliver the encrypted secret key E_SK resulting from this operation.

[0059] The encrypted secret key E_SK can be recorded in the first output register DOUT1 outside the secure hardware environment EMS. Then, the encrypted secret key can be restored from the output register by software. Then, the software can manipulate the encrypted secret key outside the secure hardware environment, but the software cannot directly manipulate the unencrypted secret key SK. The unencrypted secret key SK cannot be read by software.

[0060] Therefore, the first output register DOUT1 does not store unencrypted secret keys SK, but only those encrypted secret keys. Therefore, the storage of the secret key SK is secure.

[0061] Such an electronic circuit can avoid the use of software dedicated to key management. Therefore, such an electronic circuit ensures improved security management of keys.

[0062] Furthermore, the integrated circuit further comprises a first input register DIN1 outside the secure hardware environment EMS. Binary data to be encrypted may be recorded in the first input register.

[0063] The encryption system SCH further comprises a second encryption device CH2. The second encryption device CH2 is configured to perform a symmetric encryption operation on the binary data DAT from the first input register DIN1. Specifically, the second encryption device CH2 is configured to encrypt the binary data DAT using a secret key SK.

[0064] The second binary circuit thus delivers the encrypted binary data E_DAT resulting from this symmetric encryption operation.

[0065] The integrated circuit comprises a second output register DOUT2 outside the secure hardware environment EMS. Encrypted binary data E_DAT can be recorded in this second output register DOUT2. This encrypted binary data E_DAT can then be manipulated outside the secure hardware environment by software accessing the second output register DOUT2.

[0066] exist Figure 3 A method for encrypting a secret key SK is shown in step 20. In step 20, the secret key SK is provided to the encryption system during the key provision phase. In parallel, in step 21, a unique derived key HIK is generated by a first logic circuit GEN1 using a unique hardware key HUK and information INF related to the use and / or execution context of the secret key SK. In step 22, the key SK generated in step 20 is encrypted by a first encryption device CH1 by a symmetric encryption operation using the unique derived key HIK generated in step 21. In step 23, the encrypted secret key E_SK is recorded in a first output register DOUT1. Once encrypted by the system SCH, the key SK can be deleted.

[0067] In parallel with the encryption process of the secret key SK, Figure 3 The binary data DAT encryption process that can be implemented is shown in FIG. In step 24, the binary data DAT is extracted from the first input register DIN1. In step 25, the binary data DAT is encrypted by the second encryption device CH2 through a symmetric encryption operation using the secret key SK generated in step 20. In step 26, the encrypted binary data E_DAT is recorded in the second output register DOUT2.

[0068] See now Figure 4The integrated circuit further comprises a second input register DIN2 outside the secure hardware environment EMS. The encrypted secret key E_SK may be recorded in the second input register DIN2. Specifically, the encrypted secret key E_SK is a secret key SK that has been previously encrypted by the first encryption device CH1. These encrypted secret keys E_SK may have been manipulated simultaneously by software outside the secure hardware environment.

[0069] The decryption system SDCH comprises a first decryption device DCH1. The first decryption device DCH1 is configured to decrypt the encrypted secret key E_SK from the second input register DIN2. Specifically, the first decryption device DCH1 is configured to perform a decryption operation using a unique derived key HIK generated by the first logic circuit GEN1.

[0070] More specifically, the encrypted secret key E_SK can be decrypted using decryption AES, in particular according to ECB mode.

[0071] Therefore, the first decryption device DCH1 is configured to deliver the same secret key SK as the secret key SK that has generated the encrypted secret key E_SK in the second input device. Therefore, it is also important to use the same unique derived key HIK for the decryption of the encrypted secret key E_SK as used for the encryption of the secret key SK. In particular, the encrypted secret key E_SK cannot be decrypted by an integrated circuit different from the integrated circuit used for the encryption of the secret key SK.

[0072] The decrypted secret key SK is not accessible outside the secure hardware environment EMS.

[0073] When the encryption system SCH and the decryption system SDCH are combined, the first decryption device DCH1 of the encryption system and the first encryption device CH1 can be formed by the same device. This device is then suitable for encrypting the key SK and decrypting the encrypted secret key E_SK.

[0074] The decryption system SDCH also comprises a register called key register SK_REG in which the secret key SK decrypted by the first decryption device DCH1 is recorded.

[0075] The integrated circuit also includes a third input register DIN3 outside the secure hardware environment EMS. Encrypted binary data E_DAT can be recorded in the third input register DIN3. Specifically, the encrypted binary data E_DAT is the binary data DAT that has been previously encrypted by the second encryption device CH2. These encrypted binary data E_DAT can have been manipulated simultaneously by software outside the secure hardware environment.

[0076] The decryption system SDCH further comprises a second decryption device DCH2. The second decryption device DCH2 is configured to decrypt the encrypted binary data E_DAT from the third input register DIN3. Specifically, the second decryption device DCH2 is configured to perform a decryption operation using the secret key SK decrypted by the first decryption device DCH1 and recorded in the key register SK_REG.

[0077] Therefore, the second decryption device DCH2 is configured to pass decrypted binary data DAT, which is the same as the binary data of the encrypted binary data E_DAT that is encrypted and stored in the third input register DIN3. In addition, the encrypted binary data E_DAT cannot be decrypted by an integrated circuit different from the integrated circuit used to encrypt the binary data DAT. In fact, these binary data DAT have been encrypted using a secret key SK. Then, the secret key SK is encrypted to obtain an encrypted secret key E_SK. In order to decrypt the encrypted secret key E_SK, a key HIK identical to the key used to encrypt the key SK must be used. However, the key HIK specifically depends on the unique hardware key HUK associated with the integrated circuit. Therefore, the integrated circuit can be used as an anti-cloning system to prevent the encrypted binary data E_DAT from being decrypted by another integrated circuit.

[0078] The integrated circuit also comprises a third output register DOUT3 outside the secure hardware environment EMS. The decrypted binary data DAT delivered by the second decryption device DCH2 can be recorded in this third output register DOUT3 in a manner that can be used by software.

[0079] When the encryption system SCH and the decryption system SDCH are combined, the second decryption device DCH2 of the encryption system SCH and the second encryption device CH2 can be formed by the same device. This device is then able to encrypt binary data DAT and decrypt encrypted binary data E_DAT.

[0080] Figure 5A method for decrypting an encrypted secret key E_SK is shown in FIG. 27. In step 27, the encrypted secret key E_SK is extracted from the second input register DIN2. In step 28, a unique derived key HIK is generated by the first logic circuit GEN1 using a unique hardware key HUK and information INF related to the use and / or execution context of the secret key. In step 29, the encrypted secret key E_SK extracted in step 27 is decrypted by the first decryption device DCH1 through a decryption operation using the unique derived key HIK generated in step 28. In step 30, the decrypted secret key SK is recorded in the key register SK_REG.

[0081] Then also Figure 5 , what can be implemented is a method for decrypting encrypted binary data E_DAT. In step 31, the encrypted binary data E_DAT is extracted from the third input register DIN3. In step 32, the encrypted binary data E_DAT is decrypted by the second decryption device DCH2 using the secret key SK recorded in the key register SK_REG in step 30. In step 33, the decrypted binary data DAT is recorded in the third output register DOUT3.

[0082] Similarly, the encryption method of binary data DAT can be implemented using the secret key SK decrypted from the encrypted secret key E_SK according to the decryption method as described above. The binary data is then encrypted by the encryption device CH2, which can also be the decryption device DCH2 when the encryption system SCH and the decryption system SDCH are combined.

[0083] An integrated circuit as described above may be used in a system-on-chip configured to execute software according to execution contexts having different levels of security and / or confidentiality.

[0084] Then, if the secret key SK is unprotected by software after it has been recorded in the key register SK_REG, and if the key is not specific to a single execution context, the integrated circuit is configured to authorize the use of the secret key SK according to these execution contexts. Thus, the integrated circuit allows a given software to manage an unlimited number of unknown secret keys SK that can be used by software with different execution contexts.

[0085] Furthermore, when a new execution context is detected while the secret key SK is protected, or when the secret key SK is unique to a given execution context and a new execution context is detected, the integrated circuit is further configured to delete the secret key SK of the key register SK_REG.

[0086] Thus, the integrated circuit is configured to detect misuse of the secret key, in other words, modification of the execution context when the secret key is not authorized.

[0087] Such a system allows the use of the key SK by software of different execution contexts based on the management of the key in the secure hardware environment EMS, so that the protection of the secret key SK can be ensured. Such key management enables the use of the secret key SK in different execution contexts. Specifically, the secret key SK can be used by the software, but it remains unknown to the software.

[0088] More specifically, such a system makes it possible to isolate secret keys SK by execution context and to allow the use of these secret keys in other execution contexts only when such use is authorized.

[0089] Furthermore, the integrated circuit is configured to delete the secret key SK if it is compromised, in other words as soon as misuse of the key is detected.

Claims

1. An integrated circuit, comprising: A secure hardware environment is configured to record a unique hardware key, and the secure hardware environment includes: A first logic circuit configured to generate a unique derived key from the unique hardware key and at least one piece of information, wherein the at least one piece of information relates to one or more of: an execution context and use of a secret key; and a first cryptographic device configured to perform a symmetric cryptographic operation on the secret key using the unique derived key, and to communicate an encrypted secret key resulting from the performance of the symmetric cryptographic operation outside of the secure hardware environment; a second cryptographic device configured to perform a further symmetric cryptographic operation on the binary data using the secret key, and to communicate encrypted binary data resulting from the performance of the further symmetric cryptographic operation outside the secure hardware environment; a first decryption device configured to perform a decryption operation on the encrypted secret key using the unique derived key, and to deliver the secret key resulting from the performance of the decryption operation; a second decryption device configured to perform a further decryption operation on the encrypted binary data using the secret key delivered by the first decryption device, and to deliver unencrypted binary data resulting from the performance of the further decryption operation; and A key register is configured to record each secret key generated by the first decryption device and enable each recorded secret key to be transmitted to the second decryption device in order to decrypt the encrypted binary data.

2. The integrated circuit of claim 1 , wherein the second encryption device is further configured to perform an encryption operation on unencrypted binary data using the secret key delivered by the first decryption device, and to deliver encrypted binary data resulting from the performance of the encryption operation.

3. The integrated circuit of claim 2, wherein the key register is further configured to transmit the recorded secret key to the second encryption device to encrypt unencrypted binary data.

4. A system on chip, comprising: The integrated circuit according to claim 3; wherein the system on chip is configured to execute software according to execution contexts having different security levels or confidentiality levels; and Wherein the integrated circuit is configured to: if the encryption of the secret key is decrypted by software after the secret key is recorded in the key register, and if the secret key is not unique to a single execution context, authorize use of the decrypted secret key according to the execution context.

5. The system on chip of claim 4, wherein the integrated circuit is configured to delete the secret key from the key register in response to one or more of: upon detecting a new execution context while the secret key is protected; and When the secret key is unique to a given execution context and a new execution context is detected.

6. A system on chip, comprising: The integrated circuit according to claim 1; wherein the system on chip is configured to execute software according to execution contexts having different security levels or confidentiality levels; and Wherein the integrated circuit is configured to: if the encryption of the secret key is decrypted by software after the secret key is recorded in the key register, and if the secret key is not unique to a single execution context, authorize use of the decrypted secret key according to the execution context.

7. The system on chip of claim 6, wherein the integrated circuit is configured to delete the secret key from the key register in response to one or more of: upon detecting a new execution context while the secret key is protected; and When the secret key is unique to a given execution context and a new execution context is detected.

8. A method comprising: The secret key is encrypted in a secure hardware environment by following these steps: generating a unique derived key based on a unique hardware key recorded in the secure hardware environment, and at least one piece of information, wherein the at least one piece of information relates to one or more of: an execution context and use of the secret key; symmetrically encrypting the secret key using the generated unique derived key; decrypting the encrypted secret key using the generated unique derived key; as well as If the encryption of the secret key is removed by software after the secret key is recorded in the secure hardware environment, and if the secret key is not unique to a single execution context, use of the decrypted secret key is authorized according to the execution context.

9. The method according to claim 8, further comprising: The binary data is encrypted in the secure hardware environment as follows: The binary data is symmetrically encrypted using the secret key to obtain encrypted binary data.

10. A method comprising: The encrypted secret key generated by the symmetric encryption secret key is decrypted in a secure hardware environment by the following steps: generating a unique derived key based on a unique hardware key recorded in the secure hardware environment, and at least one piece of information, wherein the at least one piece of information relates to one or more of: an execution context and use of the secret key; decrypting the encrypted secret key using the generated unique derived key and delivering the secret key resulting from the performance of the decryption; as well as Each secret key is recorded and each recorded secret key is enabled to be transmitted in order to decrypt the encrypted binary data.

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