Phosphor substrate, light-emitting substrate, and lighting device
By setting the phosphor layer and the electrode group on the phosphor substrate of the LED lighting device to match the thermal expansion coefficient of the insulating substrate, the light color adjustment and warping problems in the prior art are solved, and a stable light emission effect is achieved.
Patent Information
- Application Number
- CN201980083426.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-12-27
- Filing Date
- 2019-12-18
- Publication Date
- 2025-01-07
- Estimated Expiration
- 2039-12-18
AI Technical Summary
The existing LED lighting devices cannot use reflective materials to adjust the emitted light to a different color from the light emitted by the light emitting element, and the substrate structure is unclear, which makes the warping problem caused by heating difficult to solve.
A structure in which a phosphor layer is provided on a phosphor substrate and matches the thermal expansion coefficient through the insulating substrate, the electrode group and the thermal expansion coefficient are designed to suppress warping caused by heating, and light wavelength conversion is performed through the phosphor layer to stabilize light emission.
The color adjustment of the light emitted by the light emitting element is achieved, reducing the risk of warping, and ensuring the stability and optical performance of the light emission.
Smart Images

Figure CN113228313B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a fluorescent substrate, a light-emitting substrate and a lighting device. Background Art
[0002] Patent Document 1 discloses an LED lighting fixture including a substrate on which a light emitting element (LED element) is mounted. In this LED lighting fixture, a reflective material is provided on the surface of the substrate to improve light emission efficiency.
[0003] Patent document 1: China Patent Publication No. 106163113
[0004] The LED lighting device disclosed in Patent Document 1 is initially unable to adjust the light emitted by the LED lighting device to a light having a different color from the light emitted by the light emitting element by using a reflective material. Furthermore, Patent Document 1 does not clearly disclose the specific structure of the substrate. Summary of the invention
[0005] An object of the present invention is to provide a phosphor substrate having a phosphor layer provided on one surface thereof and which is unlikely to warp in a phosphor substrate on which a plurality of light emitting elements are mounted.
[0006] The phosphor substrate of the first embodiment of the present invention is a phosphor substrate with multiple light-emitting elements mounted on one side, which comprises: an insulating substrate; a first electrode group, which is arranged on one side of the above-mentioned insulating substrate and has multiple electrodes connected to the above-mentioned multiple light-emitting elements; and a phosphor layer, which is arranged on one side of the above-mentioned insulating substrate and contains a phosphor whose peak emission wavelength when the light emitted by the above-mentioned light-emitting elements is used as excitation light is in the visible light region, and the above-mentioned insulating substrate contains bismaleimide resin and glass cloth.
[0007] A phosphor substrate according to a second embodiment of the present invention is the phosphor substrate according to the first embodiment, and includes a second electrode group which is disposed on the other surface of the insulating substrate and has a plurality of electrodes.
[0008] The phosphor substrate of the third embodiment of the present invention is the phosphor substrate of the first or second embodiment, wherein the thermal expansion coefficients of the insulating substrate in the longitudinal and lateral directions are both 10 ppm / °C or less within a range of 50°C to 100°C.
[0009] A phosphor substrate according to a fourth embodiment of the present invention is the phosphor substrate according to any one of the first to third embodiments, wherein the insulating substrate has a glass transition temperature higher than 300°C.
[0010] The phosphor substrate of the fifth embodiment of the present invention is the phosphor substrate of any one of the first to fourth embodiments, wherein the storage modulus of the insulating substrate is greater than 1.0×1010 Pa and less than 1.0×10 11 Pa.
[0011] A phosphor substrate according to a sixth embodiment of the present invention is the phosphor substrate according to any one of the first to fifth embodiments, wherein the plurality of electrodes included in the second electrode group are dummy electrodes that are not electrically connected to the plurality of electrodes included in the first electrode group.
[0012] A phosphor substrate according to a seventh embodiment of the present invention is the phosphor substrate according to any one of the first to sixth embodiments, wherein the second electrode group is patterned.
[0013] A phosphor substrate according to an eighth embodiment of the present invention is the phosphor substrate according to any one of the first to seventh embodiments, wherein the thickness of the insulating substrate is 200 μm or less.
[0014] A phosphor substrate according to a ninth embodiment of the present invention is the phosphor substrate according to the eighth embodiment, wherein the thickness of the insulating substrate is 100 μm or more.
[0015] A phosphor substrate according to a tenth embodiment of the present invention is the phosphor substrate according to any one of the first to ninth embodiments, wherein the light emitting element is a CSP in which an LED is incorporated and packaged in a chip size.
[0016] The light emitting substrate of the present invention includes: the phosphor substrate according to any one of the first to tenth embodiments; and a plurality of light emitting elements respectively bonded to the plurality of electrodes of the first electrode group.
[0017] The lighting device of the present invention includes: the light-emitting substrate described above; and a power source that supplies electric power for causing the light-emitting element to emit light.
[0018] The phosphor substrates according to the first to tenth embodiments of the present invention can suppress the occurrence of warping due to heat generated by the plurality of light emitting elements in the phosphor substrate having a phosphor layer on one surface and mounting a plurality of light emitting elements.
[0019] In addition, the light-emitting substrate of the present invention can suppress the occurrence of warping of the phosphor substrate, and accordingly can stabilize the light emission from the plurality of light-emitting elements and the phosphor layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The above-mentioned object and other objects, features and advantages will become more apparent from the preferred embodiments described below and the accompanying drawings.
[0021] Figure 1A It is a top view of the light emitting substrate of this embodiment.
[0022] Figure 1BIt is a bottom view of the light emitting substrate and the phosphor substrate of this embodiment.
[0023] Figure 1C is along Figure 1A A partial cross-sectional view of the light-emitting substrate cut along the 1C-1C cutting line.
[0024] Figure 2A It is a top view of the phosphor substrate (the phosphor layer is omitted) of this embodiment.
[0025] Figure 2B It is a top view of the phosphor substrate of this embodiment.
[0026] Figure 3A It is an explanatory diagram of the first step of the method for manufacturing the light emitting substrate according to the present embodiment.
[0027] Figure 3B It is an explanatory diagram of the second step of the method for manufacturing the light emitting substrate according to the present embodiment.
[0028] Figure 3C It is an explanatory diagram of the third step of the method for manufacturing the light emitting substrate according to the present embodiment.
[0029] Figure 3D It is an explanatory diagram of the fourth step of the method for manufacturing the light emitting substrate according to the present embodiment.
[0030] Figure 3E It is an explanatory diagram of the fifth step of the method for manufacturing the light emitting substrate according to the present embodiment.
[0031] Figure 4 It is a diagram for explaining the light-emitting operation of the light-emitting substrate of this embodiment.
[0032] Figure 5 It is a diagram for explaining the light-emitting operation of the light-emitting substrate according to the first comparative embodiment.
[0033] Figure 6 This is a graph showing the results of a first test of the correlated color temperature of the light-emitting substrate of the present embodiment.
[0034] Figure 7 This is a graph showing the results of a second test of the correlated color temperature of the light-emitting substrate of the present embodiment.
[0035] Figure 8 It is a bottom view of a light emitting substrate and a phosphor substrate of a modified example. DETAILED DESCRIPTION
[0036] "summary"
[0037] Below, refer to Figure 1A to Figure 1C , Figure 2A , Figure 2BThe structure and function of the light emitting substrate 10 of this embodiment will be described. Figure 3A to Figure 3E Next, a method for manufacturing the light emitting substrate 10 of the present embodiment will be described. Figure 4 Next, the light emitting operation of the light emitting substrate 10 of this embodiment will be described. Figures 4 to 7 The effects of the present embodiment will be described with reference to the following. In the following description, the same reference numerals are given to the same components in all the drawings to be referred to, and the description thereof will be appropriately omitted.
[0038] 《Structure and function of the light-emitting substrate of this embodiment》
[0039] Figure 1A 3 is a top view (viewed from the surface 31 ) of the light emitting substrate 10 of the present embodiment. Figure 1B It is a bottom view (viewed from the back surface 33 ) of the light emitting substrate 10 according to the present embodiment. Figure 1C is along Figure 1A A partial cross-sectional view of the light-emitting substrate 10 cut along the 1C-1C cutting line.
[0040] The light emitting substrate 10 of the present embodiment is formed in a rectangular shape as an example when viewed from the front surface 31 and the back surface 33. In addition, the light emitting substrate 10 of the present embodiment includes a plurality of light emitting elements 20, a phosphor substrate 30, a connector, and electronic components such as a driver IC (not shown). That is, the light emitting substrate 10 of the present embodiment is configured such that a plurality of light emitting elements 20 and the above-mentioned electronic components are mounted on the phosphor substrate 30.
[0041] The light emitting substrate 10 of this embodiment has a light emitting function when powered by an external power source (not shown) directly connected by a wire or via a connector. Therefore, the light emitting substrate 10 of this embodiment is used as a main optical component of a lighting device (not shown) or the like.
[0042] <Multiple light-emitting elements>
[0043] As an example, each of the plurality of light emitting elements 20 is a CSP (Chip Scale Package) in which a flip chip LED 22 (hereinafter referred to as LED 22) is incorporated (see Figure 1C ).like Figure 1C As shown, as a CSP, it is preferred that the entire periphery (five surfaces) except the bottom surface of LED 22 is covered by a phosphor sealing layer 24. The phosphor sealing layer 24 contains a phosphor, and the light of LED 22 is color-converted by the phosphor of the phosphor sealing layer 24 and emitted to the outside. Figure 1AAs shown, a plurality of light emitting elements 20 are mounted on the phosphor substrate 30 in a state of being regularly arranged over the entire surface 31 (one side) of the phosphor substrate 30. In addition, the correlated color temperature of the light emitted by each light emitting element 20 of the present embodiment is 3,018K as an example. In addition, when the plurality of light emitting elements 20 are in light emitting operation, heat is dissipated (cooled) by using a heat sink (not shown) and a cooling fan (not shown) to control the phosphor substrate 30 from a normal temperature to 50°C to 100°C. Here, in this specification, the meaning of "to" used in the numerical range is supplemented, for example, "50°C to 100°C" means "50°C or more and 100°C or less". Moreover, in this specification, "to" used in the numerical range means "above the recorded part before 'to' and below the recorded part after 'to'".
[0044] <Phosphor substrate>
[0045] Figure 2A This is a diagram of the phosphor substrate 30 according to the present embodiment, and is a plan view (a diagram viewed from the surface 31 ) in which the phosphor layer 36 is omitted from the illustration. Figure 2B 31 is a top view of the fluorescent substrate 30 of the present embodiment (a view viewed from the surface 31). The bottom view of the fluorescent substrate 30 of the present embodiment is the same as the view of the light-emitting substrate 10 viewed from the back surface 33. Figure 1C The partial cross-sectional view of FIG. 3 is the same as the view without the light emitting element 20. That is, the phosphor substrate 30 of the present embodiment is formed in a rectangular shape as an example when viewed from the front surface 31 and the back surface 33.
[0046] The phosphor substrate 30 of the present embodiment includes an insulating layer 32 (an example of an insulating substrate), an electrode layer 34 (an example of a first electrode group), a phosphor layer 36, and a back pattern layer 38 (see Figure 1B , Figure 1C , Figure 2A as well as Figure 2B ). In addition, Figure 2A The phosphor layer 36 is omitted in FIG. Figure 2B As shown, as an example, the insulating layer 32 and the surface 31 of the electrode layer 34 are arranged in a portion other than a plurality of electrode pairs 34A (an example of a plurality of electrodes) described later.
[0047] In addition, if Figure 1B as well as Figure 2AAs shown, through holes 39 are formed at six positions, namely, four positions near the four corners and two positions near the center of the fluorescent substrate 30. The through holes 39 at the six positions are used as positioning holes when manufacturing the fluorescent substrate 30 and the light-emitting substrate 10. Furthermore, the through holes 39 at the six positions are used as screw holes for installation to ensure the heat dissipation effect of the (light-emitting) lamp frame (to prevent the substrate from warping and floating). In addition, as described later, the fluorescent substrate 30 of the present embodiment is a two-panel board (hereinafter referred to as a motherboard MB) having a copper foil layer on both sides of an insulating plate. Figure 3A ) is manufactured by processing (etching, etc.).
[0048] 〔Insulation layer〕
[0049] Hereinafter, main features of the insulating layer 32 of this embodiment will be described.
[0050] As described above, the shape is, as an example, a rectangle when viewed from the front surface 31 and the back surface 33 .
[0051] As an example, the material is an insulating material containing bismaleimide resin and glass cloth. In addition, the insulating material does not contain halogen and phosphorus (halogen-free, phosphorus-free).
[0052] As an example, the thickness is preferably 100 μm to 200 μm.
[0053] The longitudinal and lateral thermal expansion coefficients (CTE) are each, as an example, 10 ppm / °C or less in the range of 50°C to 100°C. In addition, from another point of view, the longitudinal and lateral thermal expansion coefficients (CTE) are each, as an example, 6 ppm / K. This value is roughly the same as that of the light emitting element 20 of the present embodiment (90% to 110%, i.e., within ±10%).
[0054] As an example, the glass transition temperature is above 300°C.
[0055] As an example, the storage modulus is greater than 1.0×10 10 Pa and less than 1.0×10 11 Pa.
[0056] As an example, the bending elastic moduli in the longitudinal direction and the transverse direction are 35 GPa and 34 GPa, respectively, under normal conditions.
[0057] As an example, the hot bending elastic modulus in the longitudinal and transverse directions at 250° C. is 19 GPa.
[0058] As an example, the water absorption rate is 0.13% when the battery is left in a temperature environment of 23° C. for 24 hours.
[0059] As an example, the dielectric constant is 4.6 at 1 MHz.
[0060] As an example, the dielectric loss tangent is 0.010 at 1 MHz normal.
[0061] In addition, the insulating layer 32 of the present embodiment corresponds to a portion of the insulating layer of the motherboard MB, and as an example, CS-3305A manufactured by Richang Industry Co., Ltd. is used as the motherboard MB.
[0062] 〔Electrode layer〕
[0063] The electrode layer 34 of this embodiment is a metal layer provided on the surface 31 side of the insulating layer 32. The electrode layer 34 of this embodiment is, for example, a copper foil layer (layer made of Cu). In other words, the electrode layer 34 of this embodiment is formed to contain copper at least on its surface.
[0064] The electrode layer 34 is a pattern provided on the insulating layer 32, and is electrically connected to a terminal (not shown) connected to a connector (not shown). Furthermore, the electrode layer 34 supplies power supplied from an external power source (not shown) via the connector to the plurality of light-emitting elements 20 in the configuration of the light-emitting substrate 10. Therefore, a portion of the electrode layer 34 is a plurality of electrode pairs 34A to which the plurality of light-emitting elements 20 are respectively connected. That is, the electrode layer 34 of the light-emitting substrate 10 of the present embodiment is arranged on the insulating layer 32, and is connected to each light-emitting element 20.
[0065] As described above, the plurality of light emitting elements 20 of the light emitting substrate 10 of the present embodiment are regularly arranged over the entire surface 31, so the plurality of electrode pairs 34A are also regularly arranged over the entire surface 31 (see Figure 2A ). The portion of the electrode layer 34 other than the plurality of electrode pairs 34A is referred to as a wiring portion 34B. Figure 1C As shown, as an example, the plurality of electrode pairs 34A protrude further outward in the thickness direction of the insulating layer 32 (phosphor substrate 30) than the wiring portion 34B. In other words, among the surfaces of the electrode layer 34 facing outward in the thickness direction of the insulating layer 32, the surfaces to which the light emitting elements 20 are bonded (bonding surfaces 34A1) are located outward in the thickness direction of the insulating layer 32 than the surfaces other than the bonding surfaces 34A1 (non-bonding surfaces 34B1).
[0066] In addition, the region where the electrode layer 34 is arranged on the surface 31 of the insulating layer 32 (defined as the first arrangement region) is, as an example, a region (area) of 60% or more of the surface 31 of the insulating layer 32 (see Figure 2AIn addition, more than 80% of the first configuration region overlaps with a region (defined as a second configuration region) in which the back pattern layer 38 is configured in the insulating layer 32 in the thickness direction of the insulating layer 32 .
[0067] 〔Phosphor layer〕
[0068] like Figure 2B As shown in FIG. 1 , the phosphor layer 36 of the present embodiment is arranged, as an example, in the insulating layer 32 and the surface 31 of the electrode layer 34, in a portion other than the plurality of electrode pairs 34A. That is, the phosphor layer 36 is arranged in a region other than the plurality of electrode pairs 34A in the electrode layer 34. In other words, at least a portion of the phosphor layer 36 is arranged to surround the periphery of each bonding surface 34A1 over the entire circumference when viewed from the surface 31 side (see FIG. 1 ). Figure 1C as well as Figure 2B ) In the present embodiment, the region where the fluorescent layer 36 is arranged on the surface 31 of the insulating layer 32 is, as an example, 80% or more of the region on the surface 31 of the insulating layer 32 .
[0069] In addition, the surface of the phosphor layer 36 on the outside in the thickness direction of the insulating layer 32 is located on the outside in the thickness direction relative to the bonding surface 34A1 of the electrode layer 34 (see Figure 1C ).
[0070] The phosphor layer 36 of the present embodiment is, as an example, an insulating layer including a phosphor and an adhesive described later. The phosphor contained in the phosphor layer 36 is a microparticle dispersed in an adhesive and maintained, and has the property of exciting the light emitted by the LED 22 of each light emitting element 20 as excitation light. Specifically, the phosphor of the present embodiment has the property that the peak wavelength of light emission when the light emitted by the light emitting element 20 is used as excitation light is in the visible light region. In addition, the adhesive is, for example, epoxy, acrylate, silicone, etc., as long as it is a material having the same insulating property as the adhesive contained in the solder resist.
[0071] (Specific example of phosphor)
[0072] Here, the phosphor contained in the phosphor layer 36 of the present embodiment is, as an example, selected from at least one phosphor in the group consisting of α-type Sialon phosphor containing Eu, β-type Sialon phosphor containing Eu, CASN phosphor containing Eu, and SCASN phosphor containing Eu. In addition, the above-mentioned phosphor is an example of the present embodiment, and may also be a phosphor other than the above-mentioned phosphor, such as YAG, LuAG, BOS, and other visible light-excited phosphors.
[0073] The α-sialon phosphor containing Eu has the general formula: M x Eu y Si12-(m+n) Al (m+n) O n N 16-n In the above general formula, M is one or more elements selected from the group consisting of Li, Mg, Ca, Y and lanthanide elements (excluding La and Ce), and at least one element containing Ca, and when the valence of M is set to a, ax+2y=m, x is 0<x≤1.5, 0.3≤m<4.5, and 0<n<2.25.
[0074] The β-sialon phosphor containing Eu is composed of the general formula: Si 6-z Al z O z N 8-z The β-sialon represented by (z = 0.005 to 1) contains divalent europium (Eu 2+ ) as a phosphor with the luminescence center.
[0075] In addition, examples of the nitride phosphor include a CASN phosphor containing Eu, a SCASN phosphor containing Eu, and the like.
[0076] A CASN phosphor containing Eu (an example of a nitride phosphor) is, for example, a phosphor having the formula CaAlSiN3:Eu 2+ Expressed in Eu 2+ A red phosphor having a crystal composed of alkaline earth silicon nitride as a matrix and an activator. In addition, in the definition of CASN phosphor containing Eu in this specification, SCASN phosphor containing Eu is excluded.
[0077] The SCASN phosphor containing Eu (an example of a nitride phosphor) is, for example, a phosphor having the formula (Sr, Ca)AlSiN3:Eu 2+ Indicated by Eu 2+ A red phosphor with an activator and a crystal composed of alkaline earth silicon nitride as its matrix.
[0078] 〔Back pattern layer〕
[0079] The back pattern layer 38 of the present embodiment is a metal layer provided on the back surface 33 side of the insulating layer 32. As an example, the back pattern layer 38 of the present embodiment is a copper foil layer (layer made of Cu).
[0080] like Figure 1B As shown, the back pattern layer 38 is a layer in which a plurality of rectangular portions 38A (an example of a plurality of electrodes, hereinafter referred to as a plurality of portions 38A) are arranged in a straight line along the long side direction of the insulating layer 32 and are arranged adjacent to each other in a manner that the phases are shifted in the short side direction. That is, the back pattern layer 38 of this embodiment forms a pattern in which a plurality of portions 38A are arranged.
[0081] In addition, the back pattern layer 38 is an independent floating layer as an example. That is, the back pattern layer 38 (the plurality of portions 38A constituting it) of this embodiment is a virtual electrode that is not electrically connected to the plurality of electrode pairs 34A of the electrode layer 34 on the surface 31 side. In addition, although the area of the second configuration region of this embodiment is set larger than the area of the first configuration region (refer to Figure 1B as well as Figure 2A ), but is set to an area of 90% to 110% of the area of the first configuration area.
[0082] The above is the description of the structures of the light emitting substrate 10 and the phosphor substrate 30 according to the present embodiment.
[0083] 《Method for manufacturing light-emitting substrate according to the present embodiment》
[0084] Next, refer to Figure 3A to Figure 3E The method for manufacturing the light emitting substrate 10 of the present embodiment is described below. The method for manufacturing the light emitting substrate 10 of the present embodiment includes a first step, a second step, a third step, a fourth step, and a fifth step, and each step is performed in the order in which they are described.
[0085] <First step>
[0086] Figure 3A 1 and 10 are diagrams showing the start and end of the first step. The first step is to form a pattern 34C identical to the electrode layer 34 when viewed in the thickness direction on the surface 31 of the motherboard MB and to form a back pattern layer 38 on the back surface 33. This step is performed, for example, by etching using a mask pattern (not shown).
[0087] <Second step>
[0088] Figure 3B 3 is a diagram showing the start and end of the second process. The second process is a process of half-hatching a portion of the pattern 34C (etching to the middle of the thickness direction). If this process is completed, the result is the formation of an electrode layer 34 having a plurality of electrode pairs 34A and wiring portions 34B. That is, if this process is completed, a plurality of bonding surfaces 34A1 and a plurality of non-bonding surfaces 34B1 are formed in the electrode layer 34. This process is performed, for example, by etching using a mask pattern (not shown).
[0089] <Third step>
[0090] Figure 3C3 is a diagram showing the start and end of the third step. The third step is a step of applying the fluorescent paint 36C to the entire surface 31 of the insulating layer 32, that is, the surface on which the electrode layer 34 is formed. In this step, the fluorescent paint 36C is applied, for example, by printing. In this case, the fluorescent paint 36C is applied thicker than all the electrode pairs 34A. In other words, in this case, in the thickness direction of the insulating layer 32, the fluorescent paint 36C is applied in a manner that covers each bonding surface 34A1 from the outside in the thickness direction (each bonding surface 34A1 is shielded by the fluorescent paint 36C).
[0091] <Fourth step>
[0092] Figure 3D : is a diagram showing the start and end of the fourth step. The fourth step is a step of removing a portion of the phosphor layer 36 after the phosphor paint 36C is cured, so that the bonding surfaces 34A1 of all the electrode pairs 34A are exposed. Here, in the case where the binder of the phosphor paint 36C is, for example, a thermosetting resin, after the phosphor paint 36C is cured by heating, a two-dimensional laser processing device (not shown) is used to selectively irradiate the portion on each bonding surface 34A1 in the phosphor layer 36 with laser. As a result, the portion on each bonding surface 34A1 in the phosphor layer 36 and the portion near each bonding surface 34A1 of the electrode pair 34A are ablated, and each bonding surface 34A1 is exposed. As a result of the above, the phosphor substrate 30 of the present embodiment is manufactured.
[0093] In addition to the above method, this step can also be performed by the following method, for example. When the binder of the fluorescent coating 36C is, for example, a UV curable resin (photosensitive resin), a mask pattern is applied to the portion (coating opening portion) overlapping with each bonding surface 34A1, UV light is exposed, and the portion other than the mask pattern is UV cured, and the non-exposed portion (uncured portion) is removed by a resin removing liquid, thereby exposing each bonding surface 34A1. Then, heat is usually applied to perform post-curing (photo development method).
[0094] <Fifth step>
[0095] Figure 3E : is a diagram showing the start and end of the fifth process. The fifth process is a process of mounting a plurality of light-emitting elements 20 on a phosphor substrate 30. In this process, solder paste SP is printed on each joint surface 34A1 of a plurality of electrode pairs 34A of the phosphor substrate 30, and each electrode of the plurality of light-emitting elements 20 is aligned with each joint surface 34A1, and the solder paste SP is melted in an environment of 250°C as an example. Then, if the solder paste SP is cooled and solidified, each light-emitting element 20 is joined to each electrode pair 34A. That is, this process is performed by a reflow process as an example.
[0096] The above is the description of the method for manufacturing the light emitting substrate 10 according to the present embodiment.
[0097] 《Light-emitting operation of the light-emitting substrate of the present embodiment》
[0098] Next, refer to Figure 4 The light emitting operation of the light emitting substrate 10 of this embodiment will be described. Figure 4 It is a diagram for explaining the light emitting operation of the light emitting substrate 10 according to the present embodiment.
[0099] First, when the operation switch (not shown) for operating the plurality of light emitting elements 20 is turned on, power is supplied to the electrode layer 34 from an external power source (not shown) via a connector (not shown), and the plurality of light emitting elements 20 radially scatter light L, and a portion of the light L reaches the surface 31 of the phosphor substrate 30. The behavior of the light L will be described below according to the traveling direction of the radiated light L.
[0100] Part of the light L emitted from each light emitting element 20 is emitted to the outside without entering the fluorescent layer 36. In this case, the wavelength of the light L remains the same as the wavelength of the light L emitted from each light emitting element 20.
[0101] In addition, the light of LED22 itself in a part of the light L emitted from each light emitting element 20 enters the phosphor layer 36. Here, the above-mentioned "light of LED22 itself in a part of the light L" refers to the light of each light emitting element 20 (CSP itself) in the emitted light L that has not been color-converted by the phosphor (phosphor sealing layer 24), that is, the light of LED22 itself (as an example, blue (wavelength is around 470nm) light). Moreover, if the light L of LED22 itself collides with the phosphor dispersed in the phosphor layer 36, the phosphor is excited to generate excitation light. Here, the reason for the excitation of the phosphor is that the phosphor dispersed in the phosphor layer 36 uses a phosphor with an excitation peak in blue light (visible light excitation phosphor). With this, part of the energy of the light L is used for the excitation of the phosphor, so that the light L loses part of its energy. As a result, the wavelength of the light L is converted (converted). For example, depending on the type of phosphor in the phosphor layer 36 (for example, when the phosphor uses a red CASN), the wavelength of the light L becomes longer (for example, 650nm, etc.). In addition, the excitation light of the phosphor layer 36 is also emitted from the phosphor layer 36 as it is, but a part of the excitation light is directed toward the electrode layer 34 on the lower side. Moreover, a part of the excitation light is emitted to the outside by reflection of the electrode layer 34. As described above, in the case where the wavelength of the excitation light caused by the phosphor of the phosphor layer 36 is greater than 600nm, a reflection effect is expected even if the electrode layer 34 is Cu. In addition, although the wavelength of the light L is different from the above example depending on the type of phosphor of the phosphor layer 36, the wavelength conversion of the light L is performed even in any case. For example, in the case where the wavelength of the excitation light is less than 600nm, if the electrode layer 34 or its surface is set to Ag (metal plating), a reflection effect is expected. In addition, a white reflection layer may be provided on the lower side (insulating layer 32 side) of the phosphor layer 36. The reflection layer is provided, for example, by a white coating such as titanium oxide filler.
[0102] As described above, the light L emitted by each light emitting element 20 (the light L emitted radially by each light emitting element 20) is irradiated to the outside together with the above-mentioned excitation light through the above-mentioned multiple optical paths. Therefore, when the emission wavelength of the phosphor contained in the phosphor layer 36 is different from the emission wavelength of the phosphor (phosphor sealing layer 24) of the LED 22 in the sealing (or covering) light emitting element 20 (CSP), the light emitting substrate 10 of the present embodiment irradiates the light beam of the light L emitted by each light emitting element 20 as a light beam of light L containing a wavelength different from the wavelength of the light L emitted by each light emitting element 20 together with the above-mentioned excitation light. For example, the light emitting substrate 10 of the present embodiment irradiates the synthesized light of the light (wavelength) emitted by the light emitting element 20 and the light (wavelength) emitted by the phosphor layer 36.
[0103] The above is the description of the light emitting operation of the light emitting substrate 10 according to the present embodiment.
[0104] <<Effects of the present embodiment>>
[0105] Next, the effects of this embodiment will be described with reference to the drawings.
[0106] <First Effect>
[0107] Regarding the first effect, the present embodiment is compared with the first comparative embodiment described below (see Figure 5 Here, in the description of the first comparative embodiment, when the same structural elements as those in the present embodiment are used, the same names, reference numerals, etc. as those in the present embodiment are used for the structural elements. Figure 5 The diagram is used to explain the light-emitting operation of the light-emitting substrate 10A of the first comparative embodiment. The light-emitting substrate 10A of the first comparative embodiment (substrate 30A carrying a plurality of light-emitting elements 20) has the same structure as the light-emitting substrate 10 (phosphor substrate 30) of the present embodiment except that it does not have the phosphor layer 36.
[0108] In the case of the light emitting substrate 10A of the first comparative embodiment, the light L emitted from each light emitting element 20 and incident on the surface 31 of the substrate 30A is reflected or scattered without being converted in wavelength. Therefore, in the case of the substrate 30A of the first comparative embodiment, when the light emitting element 20 is mounted, it is not possible to adjust the light to a light of a different color from the light emitted by the light emitting element 20. That is, in the case of the light emitting substrate 10A of the first comparative embodiment, it is not possible to adjust the light to a light of a different color from the light emitted by the light emitting element 20.
[0109] In contrast, in the present embodiment, when viewed from the thickness direction of the insulating layer 32, the phosphor layer 36 is disposed on the surface 31 of the insulating layer 32 and around each bonding surface 34A1 with each light emitting element 20. Therefore, a portion of the light L radially emitted from each light emitting element 20 enters the phosphor layer 36, undergoes wavelength conversion by the phosphor layer 36, and is irradiated to the outside. In this case, a portion of the light L radially emitted from each light emitting element 20 enters the phosphor layer 36, excites the phosphor contained in the phosphor layer 36, and generates excitation light.
[0110] here, Figure 6 : is a graph showing the results of the first test of the correlated color temperature of the light emitting substrate 10 of the present embodiment. Figure 7 : is a graph showing the results of the second test of the correlated color temperature of the light emitting substrate 10 according to the present embodiment.
[0111] The first test is a result obtained by investigating the relationship between current (mA) and correlated color temperature (K) for a plurality of light-emitting elements 20 when power is supplied to a light-emitting substrate 10 having a plurality of light-emitting elements 20 with a correlated color temperature of 2200K to 2300K. Here, HE (1) and HE (2) represent two examples in which the structure of the electrode layer 34 is the same as that of the present embodiment. Figure 6 As shown in the results, the correlated color temperature of the light L emitted by the light emitting substrate 10 is lower than the correlated color temperature of the plurality of light emitting elements 20 in any case. That is, in the case of the present embodiment, the correlated color temperature can be shifted by providing the phosphor layer 36 .
[0112] In addition, the second test is the result of investigating the relationship between current (mA) and correlated color temperature (K) for a plurality of light-emitting elements 20 when power is supplied to a light-emitting substrate 10 having a plurality of light-emitting elements 20 with a correlated color temperature of 2900K to 3000K. Here, HE(1) indicates a case where the structure of the electrode layer 34 is the same as that of the present embodiment. Figure 7 As shown in the results, the correlated color temperature of the light L emitted by the light emitting substrate 10 is lower than the correlated color temperature of the plurality of light emitting elements 20. That is, in the case of the present embodiment, by providing the phosphor layer 36, the correlated color temperature can be shifted.
[0113] Therefore, according to the phosphor substrate 30 of the present embodiment, when the light emitting element 20 is mounted, the light L emitted from the phosphor substrate 30 can be adjusted to light of a different emission color from the light L emitted by the light emitting element 20. Accordingly, according to the light emitting substrate 10 of the present embodiment, the light L emitted from the phosphor substrate 30 can be adjusted to light of a different emission color from the light L emitted by the light emitting element 20. From one point of view, according to the light emitting substrate 10 of the present embodiment, light L of a different emission color from the light L emitted by the light emitting element 20 can be irradiated to the outside.
[0114] <Second effect>
[0115] In the case of the first comparative form, such as Figure 5 As shown, the light L irradiated to the outside generates a spot due to the arrangement interval of each light emitting element 20. Here, it means that the larger the spot of the light L is, the greater the glare is.
[0116] In contrast, in the case of this embodiment, if Figure 2B As shown, each bonding surface 34A1 is surrounded by the fluorescent layer 36 (over the entire circumference), and the fluorescent layer 36 is also provided between adjacent light emitting elements 20. Therefore, excitation light is also emitted from the periphery of each bonding surface 34A1 (the periphery of each light emitting element 20).
[0117] Therefore, according to this embodiment, glare can be reduced compared with the first comparative embodiment.
[0118] This effect is particularly effective when phosphor layer 36 is provided over the entire surface of insulating layer 32 , specifically, when the area where phosphor layer 36 is arranged in surface 31 of insulating layer 32 accounts for 80% or more of surface 13 .
[0119] <Third Effect>
[0120] As described above, when the plurality of light-emitting elements 20 are in light-emitting operation, heat dissipation (cooling) is performed by using a heat sink (not shown) and a cooling fan (not shown), taking the phosphor substrate 30 as an example, in a manner of controlling the normal temperature to 50°C to 100°C. Therefore, the electrode layer 34 and the insulating layer 32 are thermally expanded, and each light-emitting element 20 is also thermally expanded. Moreover, due to the difference in thermal expansion coefficient between the former and the latter, the substrate 30 composed of the insulating layer 32 and the electrode layer 34 is warped. As a result, there is a concern that the traveling direction of the light L emitted from the plurality of light-emitting elements 20 and the phosphor layer 36 is affected by the warping. In addition, there is a concern that cracks are generated in the phosphor layer 36 due to the warping.
[0121] However, in this embodiment, components with the same thermal behavior (expansion, contraction) (i.e., components of the same shape) are attached to the front and back through the insulating layer 32 to suppress warping. If the Cu pattern is attached only to the surface 31 side, stress and warping will occur at the interface of materials with different thermal behaviors, but the warping will be forcibly eliminated by being sandwiched between the two sides. As a result, the light-emitting substrate 10 of this embodiment is not prone to failure. In addition, the light-emitting substrate 10 of this embodiment can stabilize the light emission from the plurality of light-emitting elements 20 and the phosphor layer 36.
[0122] In the present embodiment, the ratio of the first arrangement region (the arrangement region of the electrode layer 34) to the surface 31 of the insulating layer 32 is set to 60% or more (see Figure 2A ). Therefore, the wiring portion 34B (see Figure 2A That is, in the case of this embodiment, it can be said that the electrode layer 34 and the back pattern layer 38 cooperate to effectively dissipate the heat of the plurality of light emitting elements 20.
[0123] Furthermore, in this embodiment, at least a portion (80% or more) of the first arrangement region overlaps with the back pattern layer 38 in the thickness direction of the insulating layer 32. Therefore, it can be said that this is effective in that the heat of the insulating layer 32 can be efficiently dissipated (dissipated) from both sides in the thickness direction.
[0124] Furthermore, in the present embodiment, the area of the second configuration region is 90% to 110% of the area of the first configuration region. That is, the back pattern layer 38 is in contact with the electrode layer 34 in the insulating layer 32 at a region substantially the same as (approximately ±10%). Therefore, the heat of the insulating layer 32 can be efficiently dissipated from the surface 31 side and the back surface 33 side of the insulating layer 32.
[0125] <Fourth Effect>
[0126] As described above, the phosphor substrate 30 of the present embodiment and the plurality of light emitting elements 20 disposed on the phosphor substrate 30 are heated to 250° C. (see FIG. 1 ) as an example during the fifth step (reflow step) of manufacturing. Figure 3E ). Therefore, the phosphor substrate 30 thermally expands, and each light emitting element 20 also thermally expands. Moreover, due to the difference in thermal expansion coefficient between the former and the latter, the insulating layer 32 (phosphor substrate 30) warps. As a result, there is a concern that mounting of the plurality of light emitting elements 20 may be poor.
[0127] However, in the case of this embodiment, the electrode layers having the same physical properties and structure are used on the surface 31 and the back surface 33 to suppress warping, and the thermal expansion coefficients of the insulating layer 32 and the light emitting element 20 (CSP) are set to be the same or to the same degree, thereby suppressing the thermal stress therebetween. Accordingly, according to this embodiment, manufacturing defects are unlikely to occur.
[0128] The above is the description of the effects of this embodiment.
[0129] As described above, the present invention has been described by taking the above-mentioned embodiments and examples as examples, but the present invention is not limited to the above-mentioned embodiments and examples. The technical scope of the present invention also includes the following forms (modifications), for example.
[0130] For example, in the description of this embodiment, an example of the light emitting element 20 is a CSP. However, an example of the light emitting element 20 may be a component other than a CSP. For example, it may be a component equipped with only a flip chip. In addition, it can also be applied to the substrate itself of a COB device.
[0131] In the description of this embodiment, the surface of the phosphor layer 36 on the outside in the thickness direction of the insulating layer 32 is located on the outside in the thickness direction relative to the bonding surface 34A1 of the electrode layer 34 (see Figure 1C However, if the mechanism of the first effect is considered, the first effect will obviously be achieved even if the surface of the insulating layer 32 in the phosphor layer 36 on the outside in the thickness direction is located at the same position as the bonding surface 34A1 of the electrode layer 34 in the thickness direction or is located on the inside of the bonding surface 34A1 in the thickness direction.
[0132] In the description of this embodiment, the phosphor layer 36 is disposed on the insulating layer 32 and the surface 31 of the electrode layer 34, except for the plurality of electrode pairs 34A (see Figure 2B ). However, considering the mechanism of the first effect, it is obvious that the first effect can be achieved even if the phosphor layer 36 is not arranged over the entire area of the portion other than the plurality of electrode pairs 34A in the surface 31 of the phosphor substrate 30. Therefore, it can be said that even if the phosphor layer 36 is arranged only in the range of the surface 31 different from the case of the present embodiment, the form different from the phosphor substrate 30 and the light-emitting substrate 10 of the present embodiment also belongs to the technical scope of the present invention.
[0133] In the description of the present embodiment, it is described that CS-3305A manufactured by Richang Industry Co., Ltd. is used as the motherboard MB when manufacturing the phosphor substrate 30 and the light-emitting substrate 10. However, this is only an example, and a different motherboard MB may be used. For example, the thickness of the insulating layer and the thickness of the copper foil of CS-3305A manufactured by Richang Industry Co., Ltd. are not limited to the standard specifications, and in particular, a material with a thicker copper foil may be used.
[0134] The light emitting substrate 10 of this embodiment (including its modified examples) can be combined with other components and applied to a lighting device. In this case, the other components are a power supply for supplying power for causing the light emitting element 20 of the light emitting substrate 10 to emit light.
[0135] In addition, in the present embodiment, the back pattern layer 38 (the plurality of portions 38A constituting the back pattern layer 38) is described as a virtual electrode that is not electrically connected to the plurality of electrode pairs 34A of the electrode layer 34 on the surface 31 side. However, the back pattern layer 38 may be connected to the electrode layer 34 on the surface 31, for example, via a through hole (not shown), so that the back pattern layer 38 constitutes a part of an electrical path for supplying power to the electrode layer 34, or the back pattern layer 38 may constitute a part of a heat dissipation path.
[0136] In addition, in the present embodiment, the back surface pattern layer 38 is provided on the back surface 33 of the phosphor substrate 30. However, Figure 8 As in the phosphor substrate 30A (light-emitting substrate 10A) of the modified example, the back surface pattern layer 38 is not arranged on the back surface 33 .
[0137] This application claims the benefit of priority based on Japanese patent application No. 2018-244546, filed on December 27, 2018, the disclosure of which is incorporated herein in its entirety.
Claims
1. A fluorescent substrate having a plurality of light-emitting elements mounted on one surface, comprising: Insulating substrate; a first electrode group disposed on one surface of the insulating substrate and having a plurality of electrodes bonded to the plurality of light emitting elements; and a phosphor layer disposed on one side of the insulating substrate, comprising a phosphor having a peak emission wavelength in the visible light region when the light emitted by the light emitting element is used as excitation light, The insulating substrate comprises bismaleimide resin and glass cloth. The phosphor layer does not cover the light emitting element.
2. The phosphor substrate according to claim 1, comprising: The second electrode group is disposed on the other surface of the insulating substrate and includes a plurality of electrodes.
3. The phosphor substrate according to claim 1 or 2, wherein: The thermal expansion coefficients of the insulating substrate in the longitudinal direction and the lateral direction are each 10 ppm / °C or less within a range of 50°C to 100°C.
4. The phosphor substrate according to claim 1 or 2, wherein: The insulating substrate has a glass transition temperature higher than 300°C.
5. The phosphor substrate according to claim 1 or 2, wherein: The storage modulus of the insulating substrate is greater than 1.0×10 10 Pa and less than 1.0×10 11 Pa.
6. The phosphor substrate according to claim 2, wherein: The plurality of electrodes included in the second electrode group are dummy electrodes that are not electrically connected to the plurality of electrodes included in the first electrode group.
7. The phosphor substrate according to claim 2 or 6, wherein: The second electrode group is formed with a pattern.
8. The phosphor substrate according to claim 1 or 2, wherein: The insulating substrate has a thickness of 200 μm or less.
9. The phosphor substrate according to claim 8, wherein: The insulating substrate has a thickness of 100 μm or more.
10. The phosphor substrate according to claim 1 or 2, wherein: The light emitting element is a CSP in which an LED is assembled and packaged in a chip size.
11. A light-emitting substrate comprising: The phosphor substrate according to claim 1 or 2; and A plurality of light emitting elements are respectively connected to the plurality of electrodes of the first electrode group.
12. A lighting device comprising: The light-emitting substrate according to claim 11; and A power source that supplies electric power for causing the light emitting element to emit light.
Citation Information
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