Antenna module

Abstract

An antenna module comprises a first substrate (1) and a second substrate (5, 5', 5"), wherein the second substrate (5, 5', 5") comprises at least one cavity (13, 14, 14a, 14b) on one of the first main surfaces. The first substrate (1) comprises at least an RF antenna element (3) and / or an RF chip (4) and / or an RF conductive trace arranged on the first main surface of the substrate. The first main surface of the first substrate (1) is connected to the first main surface of the second substrate (5, 5', 5") so that the RF element extends into the at least one cavity (13, 14, 14a, 14b).

Description

Technical Field

[0001] Embodiments of the present invention relate to antenna modules and corresponding manufacturing methods. Preferred embodiments relate to 3D glass wafer RF packages. Further preferred embodiments relate to a method for manufacturing a package for a high-frequency chip (RF chip, radio frequency chip) equipped with an antenna for transmitting and / or receiving radio waves or microwaves. Background Art

[0002] For high frequencies above 60 GHz up to THz (millimeter waves), especially in the RADAR range, many electrical technical requirements must be met in order to realize high-performance chip antenna systems that generate as little power consumption (waste heat) as possible; these requirements include:

[0003] - Avoid inductance in the conductive traces between the antenna and the RF chip; that is, for example, avoid using commonly used gold wire bonds on the chip pads, as these bond wires represent half of a "loop" of a conductive trace turn and therefore inductance creates losses.

[0004] - Shortest possible conductive trace paths, ie integrated package of chip and antenna.

[0005] - Exact geometrical definition (in the micrometer range if possible) of all materials, layer thicknesses, conductive traces and insulators within the package. Only then can the manufacturing technology correspond very well to the RF simulations performed previously. In addition, the package should not deform when subjected to heat, because otherwise the desired RF characteristics would be deviated from again.

[0006] In order to transmit RF signals as loss-free as possible, the surrounding electrically insulating dielectric should exhibit as low a dielectric constant (permittivity) as possible in order to minimize the direct capacitance.

[0007] In the prior art, several methods are known to avoid wire bonding contacts: flip chip bonding on a substrate (PCB or silicon wafer) and embedding technology, where the RF chip is buried in a cavity of the Si wafer and where a quasi-planar contact to the chip is then achieved on the front side of the wafer.

[0008] In this case, please refer to the following publications:

[0009] EP 3 346 549 A1 describes a module with an integrated antenna. Reference is also made to the publications entitled “Broadband Interconnect Design for Silicon-Based System-in-Package Applications up to 170 GHZ” and “High-Efficiency 60 GHz Antenna Fabricated Using Low-Cost Silicon Micromachining Techniques”.

[0010] In addition, it is known that the RF antenna may be configured in the form of a cavity filled with air, and an RF signal line is guided to the center via the cavity.

[0011] A disadvantage with these known concepts is that the conductive trace pads located above the antenna cavity do not include mechanical fixing means if the cavity is to be filled with air. If the conductive trace pads are only fixed via a coating (e.g. a polymer or foil), any mechanical deflection of the pads will result in a change in the radiation pattern. Another disadvantage in the prior art is that the top surface of the wafer in which the RF chip is embedded is open to the environment. That is, it still does not represent a safe or closed package.

[0012] Therefore, there is a need for an improved method in which the above-mentioned disadvantages are avoided, in particular during integration. Summary of the invention

[0013] The object of the present invention is to provide an integration concept of RF components, in particular of RF antenna and RF chip, which offers an improved compromise between mechanical stability, radiation pattern and producibility.

[0014] Embodiments of the present invention provide an antenna module having a first (e.g., insulating) substrate, a second substrate, and the second substrate having at least one cavity on a first main surface of the second substrate. In this context, the first substrate includes at least an RF element, an RF chip, and / or an RF conductive trace. The RF antenna element, the RF chip, and / or the RF conductive trace are arranged / formed on the first main surface of the first substrate or within the first main surface of the first substrate. For example, the first main surface of the first substrate is connected to the first main surface of the second substrate so that the RF element and / or the RF chip and / or the RF conductive trace are aligned to be flush or overlap with at least one cavity, and / or so that the RF antenna element and / or the RF chip and / or the RF conductive trace extend from the first main surface and / or extend into at least one cavity.

[0015] According to a preferred embodiment, the RF antenna element and / or the RF chip and / or the RF conductive trace are configured such that they protrude from the first main surface of the first substrate and / or into the at least one cavity.

[0016] Embodiments of the present invention are based on the discovery that RF chips (components) and / or RF conductive traces can be implemented on a (high resistance) substrate (without any general losses, such as a glass wafer or a ceramic wafer or a polymer wafer). An RF package can be provided by placing a silicon wafer, or in general, another substrate, in an adjusted manner on a substrate with an RF chip and / or RF conductive traces. According to an embodiment, the placement in an adjusted manner is provided by adhesion or bonding, for example. As described above, the other substrate (silicon wafer) includes one or more cavities. According to an embodiment, the cavity can vertically "bury" therein RF elements such as an RF chip (mounted on the surface of the substrate). In addition, by the interaction of the RF antenna element with the cavity, a so-called cavity antenna can be formed. The RF package advantageously meets requirements regarding stability, airtightness and regarding radiation properties, which may be caused, for example, by perforating one or more substrates.

[0017] According to an embodiment, the second substrate may include conductive traces, conductive traces arranged on the first main surface, or conductive traces in the cavity and / or on the bottom of the cavity. According to an embodiment, the substrate may include RF conductive traces or generally conductive traces. Therefore, the new concept is generally based on a 3D substrate stack consisting of a substrate (e.g., glass) and a Si substrate, and there are electrical connection paths on the two stacked substrates and between the two stacked substrates. The vertical connection path can be achieved without any general loss by a substrate through-connection (e.g., by a through-silicon via (TSV) in the case of a silicon substrate). In this regard, according to other embodiments, the other substrate may also include conductive traces on the first main surface and / or on the side of the first main surface or on the side of the second main surface positioned oppositely. The through-connection can be achieved, for example, by a through hole (e.g., TSV (through-silicon via)).

[0018] In the above embodiments, it is assumed that the RF elements (RF antenna elements, RF chips and / or RF conductive traces) are mounted on or in the substrate. Here, according to embodiments, each RF element can extend from the main surface and / or extend into at least one cavity. According to other embodiments, it is also feasible to provide several cavities associated with different RF elements.

[0019] With regard to the cavities, it should be noted that they can generally be filled with air, gas and vacuum. According to other embodiments, the cavity, or in general, the antenna module can include a so-called metamaterial arranged, for example, in the cavity and / or on the bottom of the cavity. The metamaterial can be associated with the RF antenna element, i.e. can be arranged in a cavity belonging to the RF antenna element. Advantageously, the metamaterial improves the radiation pattern of the antenna element. According to other embodiments, a thermosensitive element can also be provided. For example, the thermosensitive element is provided in the cavity or on the bottom of the cavity. The thermosensitive element can be associated with the RF chip and thus improve the temperature dissipation.

[0020] Regarding the substrate, it should be noted that the second substrate can, for example, be formed by a substrate stack. For example, a substrate such as a silicon substrate with an opening is provided here, which is closed by a so-called cover element or cover substrate. According to an embodiment, the cover substrate can be a substrate. Typically, the substrate stack can include an insulating substrate. Typically, regarding the second substrate, it should be noted that, for example, the latter is preferably a semiconductor substrate, such as a silicon substrate. Conversely, the substrate is, for example, a substrate consisting of a glass material, a ceramic material or a polymer material. Said types of materials exhibit advantages with regard to RF antenna properties. According to an embodiment, the substrate can also be a thinned substrate. In this context, for example, the substrate is thinned once the substrate has been bonded to the second substrate.

[0021] This advantageously improves the properties with regard to the integration capabilities of the antenna module.

[0022] Another embodiment provides a manufacturing method. The method comprises the following steps:

[0023] - providing a first (high resistance or insulating) substrate;

[0024] - providing a second substrate, the second substrate comprising at least one cavity at the first main surface; the first substrate comprising at least an RF antenna element and / or an RF chip and / or an RF conductive trace, the antenna element and / or the RF chip and / or the RF conductive trace being arranged on the first main surface of the first substrate; and

[0025] - connecting a main surface of the first substrate to a first main surface of the second substrate such that the RF antenna element and / or the RF chip and / or the RF conductive trace protrudes from the first main surface and / or into the at least one cavity.

[0026] According to another embodiment, the connection may be realized by flip chip technology or "face-to-face wafer bonding".

[0027] According to one embodiment, patterning of the second substrate (e.g., etching, dry etching) may be performed before the providing, for example, so as to merge at least one cavity into the first main surface. Here, conventional semiconductor manufacturing methods are adopted. According to other embodiments, this step may also include, for example, providing and / or merging conductive traces or other elements, such as thermosensitive elements or metamaterials. According to an embodiment, one or more semiconductor manufacturing steps may be performed before providing the first substrate and / or the second substrate, so as to apply RF elements, RF conductive traces, metamaterials, thermosensitive materials, RF conductive traces, RF chips and / or RF antenna elements to the first substrate and / or the second substrate.

[0028] According to other embodiments, it is feasible to implement thinning of the first substrate after the connection step. After the connection step, the substrate exhibits sufficient stability for the material to be thinned. In addition, thinning of the second substrate can also be implemented, for example in order to open the cavity from the back. The closure can then be implemented by another substrate. In this context, the layer stack is then formed instead of the second substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Further developments are defined in the dependent claims. Embodiments of the invention will be described in more detail with reference to the accompanying drawings, in which:

[0030] Figure 1 shows a schematic diagram of an antenna module according to a basic embodiment;

[0031] Figure 2a shows a schematic cross-sectional view of a device assembly for assembly according to a first extended embodiment;

[0032] Figure 2b Shown according to Figure 2a A schematic cross-sectional view of a device assembly in an assembled form of an embodiment of the present invention;

[0033] Figure 3a and Figure 3b shows a schematic cross-sectional view of a device assembly (before and after assembly) according to a second extended embodiment; and

[0034] Figure 4a-4c A schematic cross-sectional view of a component assembly (before assembly, partly assembled and assembled) according to a third extended embodiment is shown.

[0035] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. Herein, the same reference numerals will be used for the same elements and structures, so that their descriptions are mutually applicable or interchangeable. DETAILED DESCRIPTION

[0036] Figure 1An antenna module 100 is shown that includes a first substrate 1 and a second substrate 5. For example, the first substrate is a high resistance or electrically insulating substrate, which may include glass, ceramic or glass ceramic. For example, the second substrate 5 may be a semiconductor substrate. The substrates are connected to each other via first main surfaces 101 and 501, respectively, by flip chip or face-to-face wafer bonding. The oppositely positioned second main surfaces 102 and 502 are the outward-facing main surfaces of the module 100.

[0037] On the first main surface 101, the first substrate 1 comprises at least RF elements. By way of example, two RF elements are shown here, namely, an RF chip 4 and an RF antenna 3. According to the embodiment, they can be formed in the main surface 101, or they can be formed on the main surface 101, as depicted here.

[0038] The substrate 5 comprises a cavity 5k arranged on the side of the first main surface 501. The cavity 5k enables the substrates 1 and 5 to be connected via their main surfaces 101 and 501 despite the presence of one or more RF elements 3 and 4. For this purpose, the elements 3 and 4 extend into the cavity 5k. From a side viewing position, for this purpose, the elements 3 and 4 are associated with at least one cavity 5k, so that after the substrates are connected, the elements 3 and 5 will be aligned with the side of the cavity. As depicted, the elements 3 and 5 extend from the main surface 101 and extend into the cavity 5k. For this purpose, the cavity is adapted to the height of the elements 3 and 4, for example, in terms of its depth.

[0039] like Figure 1 As shown, the antenna module 100 will be formed by a package including a stack of substrates, such as an insulating substrate 1 and another substrate 5 (e.g., a silicon substrate). It is advantageous to use an insulating substrate (e.g., glass) because it is transparent to radio waves. In addition, the glass wafer 1 can be processed in a semiconductor production line by known methods of photolithographic patterning of highly precisely defined conductive traces 3. Therefore, the package structure 100 previously optimized in electromagnetic simulation can be transferred to an actual package with high accuracy and manufactured.

[0040] As far as the manufacturing method is concerned, it should be noted that two substrates 1 and 5 are provided in a basic step and then connected to each other in another basic step. Therefore, flip-chip mounting or face-to-face wafer bonding is suitable; different interconnection technologies can be used, for example, adhesion or bonding. This is why, according to an embodiment, a connection layer such as an adhesive layer or an insulating adhesive layer or an insulating layer can also be provided only between the two substrates 1 and 5. The layer insulates the surfaces 501 and 101 from each other at least at the contact points or connection points. As described above, according to an embodiment, standard semiconductor manufacturing methods can be used to manufacture glass substrates and / or ordinary insulating substrates 1. Therefore, by this method, a chip-antenna connection is formed on an insulating substrate. By analogy therewith, the cavity or opening of the second substrate 5 can also be introduced by standard manufacturing methods (for example, dry etching).

[0041] The following will refer to Figure 2a and Figure 2b Another embodiment is described.

[0042] Figure 2a The two substrates 1 and 5 are shown still separated from each other. The respective main surfaces to be connected are denoted by reference numerals 501 and 101.

[0043] In addition to the RF chip 4 , the substrate 1 has an RF antenna 3 and a feed line 2 applied to its main surface 101 .

[0044] The substrate 5 includes a cavity 13. In this embodiment, the cavity 13 is provided with a cavity metallization layer 7. The vertical wall may have a feed line located thereon. The feed line is represented by the reference numeral 7z and connects the cavity metallization layer 7 to, for example, a conductive via 9. The latter extends from the first main surface 501 through the entire substrate 5 to the second main surface 502. The second main surface 502 has a connector element in the form of, for example, a solder ball 91 disposed thereon. As described above, the cavity metallization layer 7 is disposed on the bottom of the cavity 19. In addition, a metamaterial layer 8 may also be arranged on the bottom and / or on the cavity metallization layer 7. Metamaterials are materials with variable electromagnetic properties (dielectric constant r and magnetic permeability μr). For example, this can be achieved by micro- and nano-patterning of conductive and non-conductive or magnetic coatings. With respect to the cavity metallization layer 7 and the metamaterial 8, it should be noted that both elements can extend over the entire width of the cavity 13 or only over the region of the cavity 13. Here, a variant is shown, where the cavity metallization layer extends over the entire width and the metamaterial extends over a reduced width. This therefore means that the cavity metallization layer 7 can be patterned according to embodiments. For example, the bottom is patterned to influence the radiation behavior.

[0045] exist Figure 2a In the design state shown, the insulating layer 6 or the insulating adhesive layer is also provided on the first main surface 501 of the substrate 5. Figure 2b It will become clear that via said insulating layer 6 or said insulating adhesive layer 6 a connection to the first main surface 101 will be established.

[0046] exist Figure 2b , the first main surface 101 of the substrate 1 is connected to the first main surface 501 of the substrate 5. As described above, the connection is achieved via the adhesive layer 6, which here covers the entire main surface 501. It should be noted at this point that the substrate module 1 can be smaller than the substrate module 5, preferably with a size selected so that at least the cavity 13 is completely covered or closed. The cavity 13 can, for example, be filled with a gas such as air.

[0047] It can be seen that the RF elements 3 and 4 are arranged laterally in the region of the cavity 13, while for example the RF connection pads can also overlap with the feed line in the region close to the cavity. An electrical connection can then be achieved in said region. This is not described, but for example extends through the insulating material 6. It should also be noted at this point that the insulating material 6 can be provided with different thicknesses on this side and the other side of the cavity in order to provide a corresponding height compensation at this point. The advantage of this arrangement is that the connection pads (for example the connection between 3 and 4) or the element 3 for introducing the RF signal are also geometrically defined. In an embodiment, the metamaterial 8 is arranged laterally in the region of the antenna 3. This is why a metamaterial 8 with reduced width is caused.

[0048] The following will refer to Figure 3a and Figure 3b A further exemplary embodiment is described in which the elements 3 and 4 are arranged for different cavities 13 and 14 .

[0049] Figure 3a The state in which the substrates 1 and 5' are still separated from each other is shown again. Therefore, in this embodiment, the substrate 5' comprises two cavities 14a and 14b. Cavity 14a is provided for the chip 4, while cavity 14b is provided for the RF antenna 3. This is why the cavity 14b optionally also comprises a metamaterial 8 at the bottom or more precisely on the cavity metallization layer 7. The remaining elements (e.g. feed line 7z or through hole 9 or adhesive layer 6) are for example connected to the substrate 5'. Figure 2a and Figure 2b Those elements in the embodiments are equivalent.

[0050] As depicted here, the depths of the cavities 14a and 14b can differ from one another according to an embodiment. Here, the cavity 14b, which forms a cavity antenna together with the RF antenna element 3, is formed deeper. Via this depth, for example, the RF properties of the cavity antenna are also set. The depth of the cavity 14a is selected so that the chip 4 extending into the cavity 14a has sufficient space or is at least embedded.

[0051] The depth of the antenna cavity 14b can be adapted to the desired wavelength of the transmitted or received wavelength. In some cases, for example, the depth can be equal to one quarter of the target wavelength, i.e., λ / 4. When using metamaterials, different values ​​can be usefully adopted for the depth of the cavity. Advantageously, embodiments of the present invention enable variability in the cavity depth, and therefore, the performance (especially energy efficiency) of the system can be optimized.

[0052] refer to Figure 4a , an embodiment will now be shown in which the second substrate is configured as a layer stack. Figure 4a In FIG. 1 , two starting substrates are shown. With respect to its elements 2, 3, 4, substrate 1 corresponds to Figure 2a or Figure 3a Substrate 1. Substrate 5" with Figure 3a The substrate 5' is equivalent to the substrate 5', and the substrate 5" is thinned on the back side (i.e. starting from the main surface 502). It should be noted here that when the substrate 5" is connected to the substrate 1 to form a chip stack (glass+Si), the thinning of the substrate 5". is preferably achieved until the cavities 14a and 14b or at least the cavity 14b of the antenna is opened.

[0053] The thinned layer stack is shown in Figure 4b , and is provided with reference numerals 1+5". After thinning, the two cavities 14a and 14b will be opened. The opened cavities 14a and 14b can then, for example, be closed with a further substrate 10 (for example a further silicon substrate or an insulating substrate). In the embodiment shown here, the further substrate 10 comprises an adhesive layer 12. Elements can additionally be introduced in the region of the cavities 14a and 14b. One example is the metamaterial 8 for the cavity 14b associated with the RF antenna 3 as described above. Another example would be a thermal element 11 in the region of the cavity 14a associated with the chip 4. This can establish, for example, a thermal contact surface with the RFIC in order to improve the cooling surface. In this regard, specific structures for the bottom of the cavities 14a and 14b (for example specific structures for the antenna) can be realized on this third wafer 10. In addition to the metamaterial, further geometrically specially patterned metal layers can also be provided, which ensures a further optimization of the cavity antenna 3+14b. Figure 4c The connection between the cooling element 14 and the chip 4 or the formation of a cavity antenna with the metamaterial 8 is depicted. The entire antenna module is provided with reference numeral 300 .

[0054] about Figure 4b and Figure 4cEmbodiments, it should be noted that they disclose the following advantageous structure: a second substrate 5', 5" configured as a layer stack and comprising at least two separate substrates; here, the first of the at least two separate substrates comprises one or more cavities or openings (from one main surface to the other main surface), and the second of the at least two separate substrates is used to encapsulate the one or more openings to form one or more cavities. In this regard, combining the first substrate and the second substrate configured as a layer stack produces a 3-layer wafer stack. Figure 4b and Figure 4c The bottommost wafer 10 in the embodiment provides the possibility to configure the patterning of the antenna base (e.g. meta-material) with the best quality / best material properties for semiconductor wafer technology processes. The second wafer is also optimized in terms of conductive properties and insulating properties. For example, the cavity substrate can be insulating; additionally or alternatively, the cover substrate can include a metallization layer for producing conductive traces / reflectors. With semiconductor manufacturing processes, very fine microstructures can be set in order to optimize the RH properties.

[0055] According to the above embodiment, the emission of mm-waves is achieved by means of a glass wafer 1. In order to minimize absorption losses in this context, the glass wafer 1 can be thinned / grinded. This is further possible in a reasonable manner, especially when the glass wafer 1 is stable during thinning. This is exactly what the bonded Si wafer 5 achieves within the wafer stack. The thinned glass substrate 1 is a perfect protection against environmental influences (humidity). All contacts are brought out to the back or side via TSV 9.

[0056] With regard to the above embodiments, it should be noted that the second wafer 5, 5' and / or 5" is preferably composed of silicon; therefore, it offers all known patterning techniques of standard semiconductor technology; it is very important for the present case that precisely defined cavities (using dry etching) and TSV contacts are manufactured through the wafer. The high thermal conductivity of the Si wafer is also advantageous, thus enabling good heat dissipation of the RF chip. The chip is mounted on the conductive traces by using flip-chip technology; this avoids wire bonding and undesired inductances.

[0057] Therefore, embodiments of the present invention may have the following characteristics: an electronic module 100, 200, 300, comprising a non-conductive substrate 1 having an electronic component 4 mounted on a first substrate surface and an antenna 3 mounted on the first substrate surface, the electronic module comprising a semi-conductive substrate 5, the semi-conductive substrate 5 having at least one cavity 13 on the first surface, and the first surface of the non-conductive substrate 1 is connected to the first surface of the semi-conductive substrate 5, so that the electronic component 4 and the antenna 3 extend into at least one cavity or respectively extend into separate cavities.

[0058] The entire package (chip + antenna) is available at "wafer level" (i.e. at low cost) with the different integrated functions of processing and transmitting / receiving RF signals. This becomes particularly advantageous for frequencies above 100 GHz, since the size of the antenna is now only a few millimeters, i.e. since many packages can be formed simultaneously on one wafer.

[0059] The manufacturing method can be described as follows:

[0060] - A non-conductive substrate 1 is provided, which has an electronic component 4 mounted on a first substrate surface and has an antenna 3 or a conductive trace structure 3 mounted on the first substrate surface.

[0061] - Providing a substrate 5 (semiconducting or insulating) having at least one cavity 13 on a first surface.

[0062] - connecting the first surface of the non-conductive substrate 1 to the first surface of the semi-conductive substrate 5 so that the electronic component 4 and the antenna 3 protrude into at least one cavity or into separate cavities respectively.

[0063] Even if some aspects have been described in the context of an apparatus, it should be understood that the aspects also represent a description of a corresponding method, such that a block or structural component of the apparatus is also understood to be a corresponding method step or feature of a method step. By analogy, aspects described in conjunction with or described as a method step also represent a description of a corresponding block or detail or feature of a corresponding apparatus.

Claims

1. An antenna module comprising the following features: A first substrate (1); a second substrate (5, 5', 5"), the second substrate (5, 5', 5") comprising at least one cavity (13, 14, 14a, 14b) at a first main surface, The first substrate (1) comprises at least an RF antenna element (3), an RF chip (4) and an RF conductive trace, wherein the RF antenna element (3), the RF chip (4) and the RF conductive trace are arranged on or in the first main surface of the first substrate (1). wherein at least the RF antenna element (3) extends from the first main surface and into the at least one cavity (13, 14, 14a, 14b), the first substrate (1) is a high resistance substrate or an insulating substrate, and the cavity (13) comprises an electrical contact cavity metallization layer of reduced width; The antenna module comprises a metamaterial (8), which is arranged on the bottom of the at least one cavity (13, 14, 14a, 14b) and is associated with the RF antenna element (3).

2. The antenna module according to claim 1, wherein: The first main surface of the first substrate (1) is connected to the first main surface of the second substrate (5, 5', 5'').

3. The antenna module according to claim 1, wherein: Several cavities (13, 14, 14a, 14b) are provided at the first main surface of the second substrate (5, 5', 5"), the cavities being associated with different RF antenna elements.

4. The antenna module according to claim 1, wherein: The second substrate (5, 5', 5") is formed by a substrate stack.

5. The antenna module according to claim 4, wherein: The substrate stack comprises a substrate (1) which serves as a cover element for the cavity (13, 14, 14a, 14b).

6. The antenna module according to claim 1, wherein: The second substrate (5, 5', 5") comprises conductive traces on the first main surface, conductive traces in the at least one cavity (13, 14, 14a, 14b) and conductive traces on the bottom of the at least one cavity (13, 14, 14a, 14b).

7. The antenna module according to claim 1, wherein: The connection between the first substrate (1) and the second substrate (5, 5', 5") is formed by an adhesive layer, an insulating adhesive layer or an insulating layer.

8. The antenna module according to claim 1, wherein: The second substrate (5, 5', 5") comprises one or more through holes (9) passing through the second substrate (5, 5', 5").

9. The antenna module according to claim 1, wherein: The second substrate (5, 5', 5") comprises a semiconductor material.

10. The antenna module according to claim 1, wherein: The cavity metallization layer (7) extends through a partial region of the cavity (13), or the cavity metallization layer (7) is patterned.

11. The antenna module according to claim 1, wherein: The first substrate (1) and / or the second substrate (5, 5', 5") is formed by a thinned substrate.

12. The antenna module according to claim 1, wherein: The at least one cavity (13, 14, 14a, 14b) is filled with a gas or a vacuum.

13. The antenna module according to claim 1, wherein: The antenna module comprises a thermal element (11) in the at least one cavity (13, 14, 14a, 14b), a thermal element (11) arranged on the bottom of the at least one cavity (13, 14, 14a, 14b), and a thermal element (11) associated with the RF chip (4).

14. The antenna module according to claim 1, wherein: The RF chip (4) is connected to a feed line (2), which is applied to a main surface (101) of the first substrate (1).

15. The antenna module according to claim 1, wherein: The second substrate (5, 5', 5") is configured as a layer stack comprising at least two separate substrates.

16. The antenna module according to claim 15, wherein: The first of the at least two separate substrates includes one or more cavities and / or one or more openings extending through the first of the at least two separate substrates, and the second of the at least two separate substrates is used to encapsulate the one or more openings to form the one or more cavities.

17. A method for manufacturing an antenna module, comprising: Providing a first substrate (1); providing a second substrate (5, 5', 5"), the second substrate (5, 5', 5") comprising at least one cavity (13, 14, 14a, 14b) at a first main surface, The first substrate (1) comprises at least an RF antenna element (3), an RF chip (4) and an RF conductive trace, wherein the RF antenna element, the RF chip (4) and the RF conductive trace are arranged on a first main surface of the first substrate (1); and Connecting the first main surface of the first substrate to the first main surface of the second substrate (5, 5', 5") so that at least the RF antenna element (3) protrudes from the first main surface and extends into the at least one cavity (13, 14, 14a, 14b), the first substrate (1) being a high resistance substrate or an insulating substrate, the cavity (13) comprising an electrical contact cavity metallization layer of reduced width, wherein the first main surface of the first substrate (1) is connected to the first main surface of the second substrate (5, 5', 5"); A metamaterial (8) is provided, which is arranged on the bottom of the at least one cavity (13, 14, 14a, 14b) and is associated with the RF antenna element (3).

18. The manufacturing method according to claim 17, wherein: The connecting step is achieved by flip chip technology or face-to-face wafer bonding.

19. The manufacturing method according to claim 17, wherein: Before providing the second substrate (5, 5', 5"), a patterning and etching step is performed to merge the at least one cavity (13, 14, 14a, 14b) into the first main surface; and / or Wherein, before providing the first substrate and / or the second substrate (5, 5', 5"), a semiconductor manufacturing step is performed to form a metamaterial (8), a thermal sensitive element (11), an RF conductive trace, an RF chip (4) and / or an RF antenna element (3) on the first substrate (1) and / or the second substrate (5, 5', 5") 20. The manufacturing method according to claim 17, wherein: The method comprises the following steps: thinning the first substrate (1) and / or the second substrate (5, 5', 5") after the connection.

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